Motofocuser.rar

Re: USB na ATXMEGA128A4U-AU - wątpliwości

Witajcie Próbuję własnie odpalić to USB na tym module: http://www.leon-instruments.pl/2013/03/x3-dil64.html i nie mogę sobie poradzić. Oczywiście przykład z: http://mikrokontrolery.blogspot.com/2011/03/Xmega-emulacja-portu-szeregowego-rs-232-na-USB.html działa bez zarzutu, ale miałem problemy z dodaniem do tego projektu innych potrzebnych mi rzeczy (biblioteki do TWI z ASF), kompilator sypał dziwacznymi błędami. Prawdopodobnie problem jest w tym "okrojeniu" biblioteki, o którym pisze autor, które powoduje jakieś niekompatybilności z innymi modułami ASF. Tak więc postanowiłem użyć zwykłej biblioteki do USB, tej oryginalnej z ASF. No i nie mogę doprowadzić kodu ko kompilującej się postaci. Zrobiłęm wszystko dokładnie wg tej instrukcji: http://asf.atmel.com/docs/3.23.1/xmegaau/html/udi_cdc_quickstart.html. Dodałem moduł USB Device (service) cdc, oraz utworzyłem pliki board na podstawie szablonu (ASF krzyczał). Zmieniłem konfigurację zegara i USB, wg wskazówek w instrukcji. No i coś mu nie pasuje w deklaracji funkcji w pliku conf_usb.h: #define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable() extern bool my_callback_cdc_enable(void); Rzuca błąd: Error 2 expected '=', ',', ';', 'asm' or '__attribute__' before 'extern' Nie mam pojęcia o co mu chodzi. Będę niezmiernie wdzięczny za pomoc, bo już udało mi się odpalić TWI, ale nie umiem go połączyć z obsługa USB. Mam jedno albo drugie. W załączniku przesyłam cały projekt Atmel Studio.

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Motofocuser.rar > asf.h

/**
* \file
*
* \brief Autogenerated API include file for the Atmel Software Framework (ASF)
*
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/

#ifndef ASF_H
#define ASF_H

/*
* This file includes all API header files for the selected drivers from ASF.
* Note: There might be duplicate includes required by more than one driver.
*
* The file is automatically generated and will be re-written when
* running the ASF driver selector tool. Any changes will be discarded.
*/

// From module: CPU specific features
#include & lt; ccp.h & gt;
#include & lt; xmega_reset_cause.h & gt;

// From module: Common build items for user board support templates
#include & lt; user_board.h & gt;

// From module: Generic board support
#include & lt; board.h & gt;

// From module: Interrupt management - XMEGA implementation
#include & lt; interrupt.h & gt;

// From module: NVM - Non Volatile Memory
#include & lt; nvm.h & gt;

// From module: Part identification macros
#include & lt; parts.h & gt;

// From module: Sleep Controller driver
#include & lt; sleep.h & gt;

// From module: Sleep manager - XMEGA A/AU/B/D implementation
#include & lt; sleepmgr.h & gt;
#include & lt; xmega/sleepmgr.h & gt;

// From module: System Clock Control - XMEGA A1U/A3U/A3BU/A4U/B/C implementation
#include & lt; sysclk.h & gt;

// From module: USB CDC Protocol
#include & lt; usb_protocol_cdc.h & gt;

// From module: USB Device CDC (Single Interface Device)
#include & lt; udi_cdc.h & gt;

// From module: USB Device Stack Core (Common API)
#include & lt; udc.h & gt;
#include & lt; udd.h & gt;

// From module: XMEGA compiler driver
#include & lt; compiler.h & gt;
#include & lt; status_codes.h & gt;

#endif // ASF_H


Motofocuser.rar > user_board.h

/**
* \file
*
* \brief User board definition template
*
*/

/* This file is intended to contain definitions and configuration details for
* features and devices that are available on the board, e.g., frequency and
* startup time for an external crystal, external memory devices, LED and USART
* pins.
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef USER_BOARD_H
#define USER_BOARD_H

#include & lt; conf_board.h & gt;

// External oscillator settings.
// Uncomment and set correct values if external oscillator is used.

// External oscillator frequency
//#define BOARD_XOSC_HZ 8000000

// External oscillator type.
//! & lt; External clock signal
//#define BOARD_XOSC_TYPE XOSC_TYPE_EXTERNAL
//! & lt; 32.768 kHz resonator on TOSC
//#define BOARD_XOSC_TYPE XOSC_TYPE_32KHZ
//! & lt; 0.4 to 16 MHz resonator on XTALS
//#define BOARD_XOSC_TYPE XOSC_TYPE_XTAL

// External oscillator startup time
//#define BOARD_XOSC_STARTUP_US 500000


#endif // USER_BOARD_H


Motofocuser.rar > status_codes.h

/**
* \file
*
* \brief Status code definitions.
*
* This file defines various status codes returned by functions,
* indicating success or failure as well as what kind of failure.
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef STATUS_CODES_H_INCLUDED
#define STATUS_CODES_H_INCLUDED

/**
* \defgroup group_xmega_utils_status_codes Status Codes
*
* \ingroup group_xmega_utils
*
* \{
*/

/* Note: this is a local workaround to avoid a pre-processor clash due to the
* lwIP macro ERR_TIMEOUT. */
#if defined(__LWIP_ERR_H__) & & defined(ERR_TIMEOUT)
#if (ERR_TIMEOUT != -3)

/* Internal check to make sure that the later restore of lwIP's ERR_TIMEOUT
* macro is set to the correct value. Note that it is highly improbable that
* this value ever changes in lwIP. */
#error ASF developers: check lwip err.h new value for ERR_TIMEOUT
#endif
#undef ERR_TIMEOUT
#endif

/**
* Status code that may be returned by shell commands and protocol
* implementations.
*
* \note Any change to these status codes and the corresponding
* message strings is strictly forbidden. New codes can be added,
* however, but make sure that any message string tables are updated
* at the same time.
*/
enum status_code {
STATUS_OK = 0, //! & lt; Success
ERR_IO_ERROR = -1, //! & lt; I/O error
ERR_FLUSHED = -2, //! & lt; Request flushed from queue
ERR_TIMEOUT = -3, //! & lt; Operation timed out
ERR_BAD_DATA = -4, //! & lt; Data integrity check failed
ERR_PROTOCOL = -5, //! & lt; Protocol error
ERR_UNSUPPORTED_DEV = -6, //! & lt; Unsupported device
ERR_NO_MEMORY = -7, //! & lt; Insufficient memory
ERR_INVALID_ARG = -8, //! & lt; Invalid argument
ERR_BAD_ADDRESS = -9, //! & lt; Bad address
ERR_BUSY = -10, //! & lt; Resource is busy
ERR_BAD_FORMAT = -11, //! & lt; Data format not recognized
ERR_NO_TIMER = -12, //! & lt; No timer available
ERR_TIMER_ALREADY_RUNNING = -13, //! & lt; Timer already running
ERR_TIMER_NOT_RUNNING = -14, //! & lt; Timer not running

/**
* \brief Operation in progress
*
* This status code is for driver-internal use when an operation
* is currently being performed.
*
* \note Drivers should never return this status code to any
* callers. It is strictly for internal use.
*/
OPERATION_IN_PROGRESS = -128,
};

typedef enum status_code status_code_t;

#if defined(__LWIP_ERR_H__)
#define ERR_TIMEOUT -3
#endif

/**
* \}
*/

#endif /* STATUS_CODES_H_INCLUDED */


Motofocuser.rar > stringz.h

/**
* \file
*
* \brief Preprocessor stringizing utils.
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef _STRINGZ_H_
#define _STRINGZ_H_

/**
* \defgroup group_xmega_utils_stringz Stringize
*
* \ingroup group_xmega_utils
*
* \{
*/

/*! \brief Stringize.
*
* Stringize a preprocessing token, this token being allowed to be \#defined.
*
* May be used only within macros with the token passed as an argument if the token is \#defined.
*
* For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN)
* and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to
* writing " A0 " .
*/
#define STRINGZ(x) #x

/*! \brief Absolute stringize.
*
* Stringize a preprocessing token, this token being allowed to be \#defined.
*
* No restriction of use if the token is \#defined.
*
* For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is
* equivalent to writing " A0 " .
*/
#define ASTRINGZ(x) STRINGZ(x)

/**
* \}
*/

#endif // _STRINGZ_H_


Motofocuser.rar > tpaste.h

/**
* \file
*
* \brief Preprocessor token pasting utils.
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef _TPASTE_H_
#define _TPASTE_H_

/**
* \defgroup group_xmega_utils_tpaste Token Paste
*
* \ingroup group_xmega_utils
*
* \{
*/

/*! \name Token Paste
*
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
* May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
*
* For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
* UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
* equivalent to writing U32.
*/
//! @{
#define TPASTE2( a, b) a##b
#define TPASTE3( a, b, c) a##b##c
#define TPASTE4( a, b, c, d) a##b##c##d
#define TPASTE5( a, b, c, d, e) a##b##c##d##e
#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f
#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g
#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h
#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i
#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j
//! @}

/*! \name Absolute Token Paste
*
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
* No restriction of use if the tokens are \#defined.
*
* For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
* as 32 is equivalent to writing U32.
*/
//! @{
#define ATPASTE2( a, b) TPASTE2( a, b)
#define ATPASTE3( a, b, c) TPASTE3( a, b, c)
#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d)
#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e)
#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f)
#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g)
#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h)
#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i)
#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j)
//! @}

/**
* \}
*/

#endif // _TPASTE_H_


Motofocuser.rar > preprocessor.h

/**
* \file
*
* \brief Preprocessor utils.
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef _PREPROCESSOR_H_
#define _PREPROCESSOR_H_

#include " tpaste.h "
#include " stringz.h "
#include " mrepeat.h "


#endif // _PREPROCESSOR_H_


Motofocuser.rar > init.c

/**
* \file
*
* \brief User board initialization template
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#include & lt; asf.h & gt;
#include & lt; board.h & gt;
#include & lt; conf_board.h & gt;

void board_init(void)
{
/* This function is meant to contain board-specific initialization code
* for, e.g., the I/O pins. The initialization can rely on application-
* specific board configuration, found in conf_board.h.
*/
}


Motofocuser.rar > conf_board.h

/**
* \file
*
* \brief User board configuration template
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef CONF_BOARD_H
#define CONF_BOARD_H
#define CONF_BOARD_USB_PORT
#endif // CONF_BOARD_H


Motofocuser.rar > compiler.h

/**
* \file
*
* \brief Commonly used includes, types and macros.
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef UTILS_COMPILER_H
#define UTILS_COMPILER_H

/**
* \defgroup group_xmega_utils XMEGA compiler driver
*
* Compiler abstraction layer and code utilities for 8-bit AVR.
* This module provides various abstraction layers and utilities to make code compatible between different compilers.
*
* \{
*/

#if defined(__GNUC__)
# include & lt; avr/io.h & gt;
# include & lt; avr/builtins.h & gt;
#elif defined(__ICCAVR__)
# include & lt; ioavr.h & gt;
# include & lt; intrinsics.h & gt;
#else
# error Unsupported compiler.
#endif

#include & lt; stdbool.h & gt;
#include & lt; stdint.h & gt;
#include & lt; stddef.h & gt;
#include & lt; stdlib.h & gt;

#include & lt; parts.h & gt;

#ifdef __ICCAVR__
/*! \name Compiler Keywords
*
* Port of some keywords from GCC to IAR Embedded Workbench.
*/
//! @{
#define __asm__ asm
#define __inline__ inline
#define __volatile__
//! @}
#endif

/**
* \def UNUSED
* \brief Marking \a v as a unused parameter or value.
*/
#define UNUSED(v) (void)(v)

/**
* \def unused
* \brief Marking \a v as a unused parameter or value.
*/
#define unused(v) do { (void)(v); } while(0)

/**
* \def barrier
* \brief Memory barrier
*/
#ifdef __GNUC__
# define barrier() asm volatile( " " ::: " memory " )
#else
# define barrier() asm ( " " )
#endif

/**
* \brief Emit the compiler pragma \a arg.
*
* \param arg The pragma directive as it would appear after \e \#pragma
* (i.e. not stringified).
*/
#define COMPILER_PRAGMA(arg) _Pragma(#arg)

/*
* AVR arch does not care about alignment anyway.
*/
#define COMPILER_PACK_RESET(alignment)
#define COMPILER_PACK_SET(alignment)

/**
* \brief Set aligned boundary.
*/
#if (defined __GNUC__)
#define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
#elif (defined __ICCAVR__)
#define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a)
#endif

/**
* \brief Set word-aligned boundary.
*/
#if (defined __GNUC__)
#define COMPILER_WORD_ALIGNED __attribute__((__aligned__(2)))
#elif (defined __ICCAVR__)
#define COMPILER_WORD_ALIGNED COMPILER_PRAGMA(data_alignment = 2)
#endif

/**
* \name Tag functions as deprecated
*
* Tagging a function as deprecated will produce a warning when and only
* when the function is called.
*
* Usage is to add the __DEPRECATED__ symbol before the function definition.
* E.g.:
* __DEPRECATED__ uint8_t some_deprecated_function (void)
* {
* ...
* }
*
* \note Only supported by GCC 3.1 and above, no IAR support
* @{
*/
#if ((defined __GNUC__) & & (__GNUC__ & gt; 3 || (__GNUC__ == 3 & & __GNUC_MINOR__ & gt; =1)))
#define __DEPRECATED__ __attribute__((__deprecated__))
#else
#define __DEPRECATED__
#endif
//! @}

/*! \name Usual Types
*/
//! @{
typedef unsigned char Bool; //! & lt; Boolean.
#ifndef __cplusplus
#if !defined(__bool_true_false_are_defined)
typedef unsigned char bool; //! & lt; Boolean.
#endif
#endif
typedef int8_t S8 ; //! & lt; 8-bit signed integer.
typedef uint8_t U8 ; //! & lt; 8-bit unsigned integer.
typedef int16_t S16; //! & lt; 16-bit signed integer.
typedef uint16_t U16; //! & lt; 16-bit unsigned integer.
typedef uint16_t le16_t;
typedef uint16_t be16_t;
typedef int32_t S32; //! & lt; 32-bit signed integer.
typedef uint32_t U32; //! & lt; 32-bit unsigned integer.
typedef uint32_t le32_t;
typedef uint32_t be32_t;
typedef int64_t S64; //! & lt; 64-bit signed integer.
typedef uint64_t U64; //! & lt; 64-bit unsigned integer.
typedef float F32; //! & lt; 32-bit floating-point number.
typedef double F64; //! & lt; 64-bit floating-point number.
typedef uint16_t iram_size_t;
//! @}


/*! \name Status Types
*/
//! @{
typedef Bool Status_bool_t; //! & lt; Boolean status.
typedef U8 Status_t; //! & lt; 8-bit-coded status.
//! @}


/*! \name Aliasing Aggregate Types
*/
//! @{

//! 16-bit union.
typedef union
{
S16 s16 ;
U16 u16 ;
S8 s8 [2];
U8 u8 [2];
} Union16;

//! 32-bit union.
typedef union
{
S32 s32 ;
U32 u32 ;
S16 s16[2];
U16 u16[2];
S8 s8 [4];
U8 u8 [4];
} Union32;

//! 64-bit union.
typedef union
{
S64 s64 ;
U64 u64 ;
S32 s32[2];
U32 u32[2];
S16 s16[4];
U16 u16[4];
S8 s8 [8];
U8 u8 [8];
} Union64;

//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers.
typedef union
{
S64 *s64ptr;
U64 *u64ptr;
S32 *s32ptr;
U32 *u32ptr;
S16 *s16ptr;
U16 *u16ptr;
S8 *s8ptr ;
U8 *u8ptr ;
} UnionPtr;

//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers.
typedef union
{
volatile S64 *s64ptr;
volatile U64 *u64ptr;
volatile S32 *s32ptr;
volatile U32 *u32ptr;
volatile S16 *s16ptr;
volatile U16 *u16ptr;
volatile S8 *s8ptr ;
volatile U8 *u8ptr ;
} UnionVPtr;

//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers.
typedef union
{
const S64 *s64ptr;
const U64 *u64ptr;
const S32 *s32ptr;
const U32 *u32ptr;
const S16 *s16ptr;
const U16 *u16ptr;
const S8 *s8ptr ;
const U8 *u8ptr ;
} UnionCPtr;

//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers.
typedef union
{
const volatile S64 *s64ptr;
const volatile U64 *u64ptr;
const volatile S32 *s32ptr;
const volatile U32 *u32ptr;
const volatile S16 *s16ptr;
const volatile U16 *u16ptr;
const volatile S8 *s8ptr ;
const volatile U8 *u8ptr ;
} UnionCVPtr;

//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers.
typedef struct
{
S64 *s64ptr;
U64 *u64ptr;
S32 *s32ptr;
U32 *u32ptr;
S16 *s16ptr;
U16 *u16ptr;
S8 *s8ptr ;
U8 *u8ptr ;
} StructPtr;

//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers.
typedef struct
{
volatile S64 *s64ptr;
volatile U64 *u64ptr;
volatile S32 *s32ptr;
volatile U32 *u32ptr;
volatile S16 *s16ptr;
volatile U16 *u16ptr;
volatile S8 *s8ptr ;
volatile U8 *u8ptr ;
} StructVPtr;

//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers.
typedef struct
{
const S64 *s64ptr;
const U64 *u64ptr;
const S32 *s32ptr;
const U32 *u32ptr;
const S16 *s16ptr;
const U16 *u16ptr;
const S8 *s8ptr ;
const U8 *u8ptr ;
} StructCPtr;

//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers.
typedef struct
{
const volatile S64 *s64ptr;
const volatile U64 *u64ptr;
const volatile S32 *s32ptr;
const volatile U32 *u32ptr;
const volatile S16 *s16ptr;
const volatile U16 *u16ptr;
const volatile S8 *s8ptr ;
const volatile U8 *u8ptr ;
} StructCVPtr;

//! @}


//_____ M A C R O S ________________________________________________________

/*! \name Usual Constants
*/
//! @{
#define DISABLE 0
#define ENABLE 1
#ifndef __cplusplus
#if !defined(__bool_true_false_are_defined)
#define false 0
#define true 1
#endif
#endif
#define PASS 0
#define FAIL 1
#define LOW 0
#define HIGH 1
//! @}


//! \name Compile time error handling
//@{

/**
* \internal
* \def ERROR_FUNC(name, msg)
* \brief Fail compilation if function call isn't eliminated
*
* If the compiler fails to optimize away all calls to the function \a
* name, terminate compilation and display \a msg to the user.
*
* \note Not all compilers support this, so this is best-effort only.
* Sometimes, there may be a linker error instead, and when optimization
* is disabled, this mechanism will be completely disabled.
*/
#ifndef ERROR_FUNC
# define ERROR_FUNC(name, msg) \
extern int name(void)
#endif

//@}

//! \name Function call demultiplexing
//@{

//! Error function for failed demultiplexing.
ERROR_FUNC(compiler_demux_bad_size, " Invalid parameter size " );

/**
* \internal
* \brief Demultiplex function call based on size of datatype
*
* Evaluates to a function call to a function name with suffix 8, 16 or 32
* depending on the size of the datatype. Any number of parameters can be
* passed to the function.
*
* Usage:
* \code
void foo8(uint8_t a, void *b);
void foo16(uint16_t a, void *b);
void foo32(uint32_t a, void *b);

#define foo(x, y) compiler_demux_size(sizeof(x), foo, x, y)
\endcode
*
* \param size Size of the datatype.
* \param func Base function name.
* \param ... List of parameters to pass to the function.
*/
#define compiler_demux_size(size, func, ...) \
(((size) == 1) ? func##8(__VA_ARGS__) : \
((size) == 2) ? func##16(__VA_ARGS__) : \
((size) == 4) ? func##32(__VA_ARGS__) : \
compiler_demux_bad_size())

//@}

/**
* \def __always_inline
* \brief The function should always be inlined.
*
* This annotation instructs the compiler to ignore its inlining
* heuristics and inline the function no matter how big it thinks it
* becomes.
*/
#if (defined __GNUC__)
#define __always_inline inline __attribute__((__always_inline__))
#elif (defined __ICCAVR__)
#define __always_inline _Pragma( " inline=forced " )
#endif

//! \name Optimization Control
//@{

/**
* \def __always_optimize
* \brief The function should always be optimized.
*
* This annotation instructs the compiler to ignore global optimization
* settings and always compile the function with a high level of
* optimization.
*/
#if (defined __GNUC__)
#define __always_optimize __attribute__((optimize(3)))
#elif (defined __ICCAVR__)
#define __always_optimize _Pragma( " optimize=high " )
#endif

/**
* \def likely(exp)
* \brief The expression \a exp is likely to be true
*/
#ifndef likely
# define likely(exp) (exp)
#endif

/**
* \def unlikely(exp)
* \brief The expression \a exp is unlikely to be true
*/
#ifndef unlikely
# define unlikely(exp) (exp)
#endif

/**
* \def is_constant(exp)
* \brief Determine if an expression evaluates to a constant value.
*
* \param exp Any expression
*
* \return true if \a exp is constant, false otherwise.
*/
#ifdef __GNUC__
# define is_constant(exp) __builtin_constant_p(exp)
#else
# define is_constant(exp) (0)
#endif

//! @}

/*! \name Bit-Field Handling
*/
#include " bit_handling/clz_ctz.h "
//! @{

/*! \brief Reads the bits of a value specified by a given bit-mask.
*
* \param value Value to read bits from.
* \param mask Bit-mask indicating bits to read.
*
* \return Read bits.
*/
#define Rd_bits( value, mask) ((value) & (mask))

/*! \brief Writes the bits of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue to write bits to.
* \param mask Bit-mask indicating bits to write.
* \param bits Bits to write.
*
* \return Resulting value with written bits.
*/
#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\
((bits ) & (mask)))

/*! \brief Tests the bits of a value specified by a given bit-mask.
*
* \param value Value of which to test bits.
* \param mask Bit-mask indicating bits to test.
*
* \return \c 1 if at least one of the tested bits is set, else \c 0.
*/
#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0)

/*! \brief Clears the bits of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue of which to clear bits.
* \param mask Bit-mask indicating bits to clear.
*
* \return Resulting value with cleared bits.
*/
#define Clr_bits(lvalue, mask) ((lvalue) & = ~(mask))

/*! \brief Sets the bits of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue of which to set bits.
* \param mask Bit-mask indicating bits to set.
*
* \return Resulting value with set bits.
*/
#define Set_bits(lvalue, mask) ((lvalue) |= (mask))

/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue of which to toggle bits.
* \param mask Bit-mask indicating bits to toggle.
*
* \return Resulting value with toggled bits.
*/
#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask))

/*! \brief Reads the bit-field of a value specified by a given bit-mask.
*
* \param value Value to read a bit-field from.
* \param mask Bit-mask indicating the bit-field to read.
*
* \return Read bit-field.
*/
#define Rd_bitfield( value,mask) (Rd_bits( value, (uint32_t)mask) & gt; & gt; ctz(mask))

/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue to write a bit-field to.
* \param mask Bit-mask indicating the bit-field to write.
* \param bitfield Bit-field to write.
*
* \return Resulting value with written bit-field.
*/
#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (uint32_t)(bitfield) & lt; & lt; ctz(mask)))

//! @}


/*! \brief This macro is used to test fatal errors.
*
* The macro tests if the expression is false. If it is, a fatal error is
* detected and the application hangs up. If TEST_SUITE_DEFINE_ASSERT_MACRO
* is defined, a unit test version of the macro is used, to allow execution
* of further tests after a false expression.
*
* \param expr Expression to evaluate and supposed to be nonzero.
*/
#if defined(_ASSERT_ENABLE_)
# if defined(TEST_SUITE_DEFINE_ASSERT_MACRO)
// Assert() is defined in unit_test/suite.h
# include " unit_test/suite.h "
# else
# define Assert(expr) \
{\
if (!(expr)) while (true);\
}
# endif
#else
# define Assert(expr) ((void) 0)
#endif

/*! \name Bit Reversing
*/
//! @{

/*! \brief Reverses the bits of \a u8.
*
* \param u8 U8 of which to reverse the bits.
*
* \return Value resulting from \a u8 with reversed bits.
*/
#define bit_reverse8(u8) ((U8)(bit_reverse32((U8)(u8)) & gt; & gt; 24))

/*! \brief Reverses the bits of \a u16.
*
* \param u16 U16 of which to reverse the bits.
*
* \return Value resulting from \a u16 with reversed bits.
*/
#define bit_reverse16(u16) ((U16)(bit_reverse32((U16)(u16)) & gt; & gt; 16))

/*! \brief Reverses the bits of \a u32.
*
* \param u32 U32 of which to reverse the bits.
*
* \return Value resulting from \a u32 with reversed bits.
*/
#if (defined __GNUC__)
#define bit_reverse32(u32) \
(\
{\
unsigned int __value = (U32)(u32);\
__asm__ ( " brev\t%0 " : " +r " (__value) : : " cc " );\
(U32)__value;\
}\
)
#elif (defined __ICCAVR__)
#define bit_reverse32(u32) ((U32)__bit_reverse((U32)(u32)))
#endif

/*! \brief Reverses the bits of \a u64.
*
* \param u64 U64 of which to reverse the bits.
*
* \return Value resulting from \a u64 with reversed bits.
*/
#define bit_reverse64(u64) ((U64)(((U64)bit_reverse32((U64)(u64) & gt; & gt; 32)) |\
((U64)bit_reverse32((U64)(u64)) & lt; & lt; 32)))

//! @}

//! \name Logarithmic functions
//! @{

/**
* \internal
* Undefined function. Will cause a link failure if ilog2() is called
* with an invalid constant value.
*/
int_fast8_t ilog2_undefined(void);

/**
* \brief Calculate the base-2 logarithm of a number rounded down to
* the nearest integer.
*
* \param x A 32-bit value
* \return The base-2 logarithm of \a x, or -1 if \a x is 0.
*/
static inline int_fast8_t ilog2(uint32_t x)
{
if (is_constant(x))
return ((x) & (1ULL & lt; & lt; 31) ? 31 :
(x) & (1ULL & lt; & lt; 30) ? 30 :
(x) & (1ULL & lt; & lt; 29) ? 29 :
(x) & (1ULL & lt; & lt; 28) ? 28 :
(x) & (1ULL & lt; & lt; 27) ? 27 :
(x) & (1ULL & lt; & lt; 26) ? 26 :
(x) & (1ULL & lt; & lt; 25) ? 25 :
(x) & (1ULL & lt; & lt; 24) ? 24 :
(x) & (1ULL & lt; & lt; 23) ? 23 :
(x) & (1ULL & lt; & lt; 22) ? 22 :
(x) & (1ULL & lt; & lt; 21) ? 21 :
(x) & (1ULL & lt; & lt; 20) ? 20 :
(x) & (1ULL & lt; & lt; 19) ? 19 :
(x) & (1ULL & lt; & lt; 18) ? 18 :
(x) & (1ULL & lt; & lt; 17) ? 17 :
(x) & (1ULL & lt; & lt; 16) ? 16 :
(x) & (1ULL & lt; & lt; 15) ? 15 :
(x) & (1ULL & lt; & lt; 14) ? 14 :
(x) & (1ULL & lt; & lt; 13) ? 13 :
(x) & (1ULL & lt; & lt; 12) ? 12 :
(x) & (1ULL & lt; & lt; 11) ? 11 :
(x) & (1ULL & lt; & lt; 10) ? 10 :
(x) & (1ULL & lt; & lt; 9) ? 9 :
(x) & (1ULL & lt; & lt; 8) ? 8 :
(x) & (1ULL & lt; & lt; 7) ? 7 :
(x) & (1ULL & lt; & lt; 6) ? 6 :
(x) & (1ULL & lt; & lt; 5) ? 5 :
(x) & (1ULL & lt; & lt; 4) ? 4 :
(x) & (1ULL & lt; & lt; 3) ? 3 :
(x) & (1ULL & lt; & lt; 2) ? 2 :
(x) & (1ULL & lt; & lt; 1) ? 1 :
(x) & (1ULL & lt; & lt; 0) ? 0 :
ilog2_undefined());

return 31 - clz(x);
}

//! @}

/*! \name Alignment
*/
//! @{

/*! \brief Tests alignment of the number \a val with the \a n boundary.
*
* \param val Input value.
* \param n Boundary.
*
* \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0.
*/
#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) )

/*! \brief Gets alignment of the number \a val with respect to the \a n boundary.
*
* \param val Input value.
* \param n Boundary.
*
* \return Alignment of the number \a val with respect to the \a n boundary.
*/
#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) )

/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary.
*
* \param lval Input/output lvalue.
* \param n Boundary.
* \param alg Alignment.
*
* \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary.
*/
#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) )

/*! \brief Aligns the number \a val with the upper \a n boundary.
*
* \param val Input value.
* \param n Boundary.
*
* \return Value resulting from the number \a val aligned with the upper \a n boundary.
*/
#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1))

/*! \brief Aligns the number \a val with the lower \a n boundary.
*
* \param val Input value.
* \param n Boundary.
*
* \return Value resulting from the number \a val aligned with the lower \a n boundary.
*/
#define Align_down(val, n ) ( (val) & ~((n) - 1))

//! @}


/*! \name Mathematics
*
* Compiler optimization for non-constant expressions, only for abs under WinAVR
*/
//! @{

/*! \brief Takes the absolute value of \a a.
*
* \param a Input value.
*
* \return Absolute value of \a a.
*
* \note More optimized if only used with values known at compile time.
*/
#define Abs(a) (((a) & lt; 0 ) ? -(a) : (a))
#ifndef abs
#define abs(a) Abs(a)
#endif

/*! \brief Takes the minimal value of \a a and \a b.
*
* \param a Input value.
* \param b Input value.
*
* \return Minimal value of \a a and \a b.
*
* \note More optimized if only used with values known at compile time.
*/
#define Min(a, b) (((a) & lt; (b)) ? (a) : (b))
#define min(a, b) Min(a, b)

/*! \brief Takes the maximal value of \a a and \a b.
*
* \param a Input value.
* \param b Input value.
*
* \return Maximal value of \a a and \a b.
*
* \note More optimized if only used with values known at compile time.
*/
#define Max(a, b) (((a) & gt; (b)) ? (a) : (b))
#define max(a, b) Max(a, b)

//! @}


/*! \brief Calls the routine at address \a addr.
*
* It generates a long call opcode.
*
* For example, `Long_call(0x80000000)' generates a software reset on a UC3 if
* it is invoked from the CPU supervisor mode.
*
* \param addr Address of the routine to call.
*
* \note It may be used as a long jump opcode in some special cases.
*/
#define Long_call(addr) ((*(void (*)(void))(addr))())

/*! \name System Register Access
*/
//! @{

/*! \brief Gets the value of the \a sysreg system register.
*
* \param sysreg Address of the system register of which to get the value.
*
* \return Value of the \a sysreg system register.
*/
#if (defined __GNUC__)
#define Get_system_register(sysreg) __builtin_mfsr(sysreg)
#elif (defined __ICCAVR__)
#define Get_system_register(sysreg) __get_system_register(sysreg)
#endif

/*! \brief Sets the value of the \a sysreg system register to \a value.
*
* \param sysreg Address of the system register of which to set the value.
* \param value Value to set the \a sysreg system register to.
*/
#if (defined __GNUC__)
#define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value)
#elif (defined __ICCAVR__)
#define Set_system_register(sysreg, value) __set_system_register(sysreg, value)
#endif

//! @}

/*! \name Debug Register Access
*/
//! @{

/*! \brief Gets the value of the \a dbgreg debug register.
*
* \param dbgreg Address of the debug register of which to get the value.
*
* \return Value of the \a dbgreg debug register.
*/
#if (defined __GNUC__)
#define Get_debug_register(dbgreg) __builtin_mfdr(dbgreg)
#elif (defined __ICCAVR__)
#define Get_debug_register(dbgreg) __get_debug_register(dbgreg)
#endif

/*! \brief Sets the value of the \a dbgreg debug register to \a value.
*
* \param dbgreg Address of the debug register of which to set the value.
* \param value Value to set the \a dbgreg debug register to.
*/
#if (defined __GNUC__)
#define Set_debug_register(dbgreg, value) __builtin_mtdr(dbgreg, value)
#elif (defined __ICCAVR__)
#define Set_debug_register(dbgreg, value) __set_debug_register(dbgreg, value)
#endif

//! @}


/*! \name MCU Endianism Handling
* xmega is a MCU little endianism.
*/
//! @{
#define MSB(u16) (((uint8_t* ) & u16)[1])
#define LSB(u16) (((uint8_t* ) & u16)[0])

#define MSW(u32) (((uint16_t*) & u32)[1])
#define LSW(u32) (((uint16_t*) & u32)[0])
#define MSB0W(u32) (((uint8_t*) & (u32))[3]) //! & lt; Most significant byte of 1st rank of \a u32.
#define MSB1W(u32) (((uint8_t*) & (u32))[2]) //! & lt; Most significant byte of 2nd rank of \a u32.
#define MSB2W(u32) (((uint8_t*) & (u32))[1]) //! & lt; Most significant byte of 3rd rank of \a u32.
#define MSB3W(u32) (((uint8_t*) & (u32))[0]) //! & lt; Most significant byte of 4th rank of \a u32.
#define LSB3W(u32) MSB0W(u32) //! & lt; Least significant byte of 4th rank of \a u32.
#define LSB2W(u32) MSB1W(u32) //! & lt; Least significant byte of 3rd rank of \a u32.
#define LSB1W(u32) MSB2W(u32) //! & lt; Least significant byte of 2nd rank of \a u32.
#define LSB0W(u32) MSB3W(u32) //! & lt; Least significant byte of 1st rank of \a u32.

#define MSB0(u32) (((uint8_t*) & u32)[3])
#define MSB1(u32) (((uint8_t*) & u32)[2])
#define MSB2(u32) (((uint8_t*) & u32)[1])
#define MSB3(u32) (((uint8_t*) & u32)[0])
#define LSB0(u32) MSB3(u32)
#define LSB1(u32) MSB2(u32)
#define LSB2(u32) MSB1(u32)
#define LSB3(u32) MSB0(u32)

#define LE16(x) (x)
#define le16_to_cpu(x) (x)
#define cpu_to_le16(x) (x)
#define LE16_TO_CPU(x) (x)
#define CPU_TO_LE16(x) (x)

#define BE16(x) Swap16(x)
#define be16_to_cpu(x) swap16(x)
#define cpu_to_be16(x) swap16(x)
#define BE16_TO_CPU(x) Swap16(x)
#define CPU_TO_BE16(x) Swap16(x)

#define LE32(x) (x)
#define le32_to_cpu(x) (x)
#define cpu_to_le32(x) (x)
#define LE32_TO_CPU(x) (x)
#define CPU_TO_LE32(x) (x)

#define BE32(x) Swap32(x)
#define be32_to_cpu(x) swap32(x)
#define cpu_to_be32(x) swap32(x)
#define BE32_TO_CPU(x) Swap32(x)
#define CPU_TO_BE32(x) Swap32(x)



//! @}


/*! \name Endianism Conversion
*
* The same considerations as for clz and ctz apply here but AVR32-GCC's
* __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when
* applied to constant expressions, so two sets of macros are defined here:
* - Swap16, Swap32 and Swap64 to apply to constant expressions (values known
* at compile time);
* - swap16, swap32 and swap64 to apply to non-constant expressions (values
* unknown at compile time).
*/
//! @{

/*! \brief Toggles the endianism of \a u16 (by swapping its bytes).
*
* \param u16 U16 of which to toggle the endianism.
*
* \return Value resulting from \a u16 with toggled endianism.
*
* \note More optimized if only used with values known at compile time.
*/
#define Swap16(u16) ((U16)(((U16)(u16) & gt; & gt; 8) |\
((U16)(u16) & lt; & lt; 8)))

/*! \brief Toggles the endianism of \a u32 (by swapping its bytes).
*
* \param u32 U32 of which to toggle the endianism.
*
* \return Value resulting from \a u32 with toggled endianism.
*
* \note More optimized if only used with values known at compile time.
*/
#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) & gt; & gt; 16)) |\
((U32)Swap16((U32)(u32)) & lt; & lt; 16)))

/*! \brief Toggles the endianism of \a u64 (by swapping its bytes).
*
* \param u64 U64 of which to toggle the endianism.
*
* \return Value resulting from \a u64 with toggled endianism.
*
* \note More optimized if only used with values known at compile time.
*/
#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) & gt; & gt; 32)) |\
((U64)Swap32((U64)(u64)) & lt; & lt; 32)))

/*! \brief Toggles the endianism of \a u16 (by swapping its bytes).
*
* \param u16 U16 of which to toggle the endianism.
*
* \return Value resulting from \a u16 with toggled endianism.
*
* \note More optimized if only used with values unknown at compile time.
*/
#define swap16(u16) Swap16(u16)

/*! \brief Toggles the endianism of \a u32 (by swapping its bytes).
*
* \param u32 U32 of which to toggle the endianism.
*
* \return Value resulting from \a u32 with toggled endianism.
*
* \note More optimized if only used with values unknown at compile time.
*/
#define swap32(u32) Swap32(u32)

/*! \brief Toggles the endianism of \a u64 (by swapping its bytes).
*
* \param u64 U64 of which to toggle the endianism.
*
* \return Value resulting from \a u64 with toggled endianism.
*
* \note More optimized if only used with values unknown at compile time.
*/
#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) & gt; & gt; 32)) |\
((U64)swap32((U64)(u64)) & lt; & lt; 32)))

//! @}


/*! \name Target Abstraction
*/
//! @{

#define _GLOBEXT_ extern //! & lt; extern storage-class specifier.
#define _CONST_TYPE_ const //! & lt; const type qualifier.
#define _MEM_TYPE_SLOW_ //! & lt; Slow memory type.
#define _MEM_TYPE_MEDFAST_ //! & lt; Fairly fast memory type.
#define _MEM_TYPE_FAST_ //! & lt; Fast memory type.

typedef U8 Byte; //! & lt; 8-bit unsigned integer.

#define memcmp_ram2ram memcmp //! & lt; Target-specific memcmp of RAM to RAM.
#define memcmp_code2ram memcmp //! & lt; Target-specific memcmp of RAM to NVRAM.
#define memcpy_ram2ram memcpy //! & lt; Target-specific memcpy from RAM to RAM.
#define memcpy_code2ram memcpy //! & lt; Target-specific memcpy from NVRAM to RAM.

//! @}

/**
* \brief Calculate \f$ \left\lceil \frac{a}{b} \right\rceil \f$ using
* integer arithmetic.
*
* \param a An integer
* \param b Another integer
*
* \return (\a a / \a b) rounded up to the nearest integer.
*/
#define div_ceil(a, b) (((a) + (b) - 1) / (b))

#include " preprocessor.h "
#include " progmem.h "
#include " interrupt.h "


#if (defined __GNUC__)
#define SHORTENUM __attribute__ ((packed))
#elif (defined __ICCAVR__)
#define SHORTENUM /**/
#endif

#if (defined __GNUC__)
#define FUNC_PTR void *
#elif (defined __ICCAVR__)
#if (FLASHEND & gt; 0x1FFFF) // Required for program code larger than 128K
#define FUNC_PTR void __farflash *
#else
#define FUNC_PTR void *
#endif /* ENABLE_FAR_FLASH */
#endif


#if (defined __GNUC__)
#define FLASH_DECLARE(x) const x __attribute__((__progmem__))
#elif (defined __ICCAVR__)
#define FLASH_DECLARE(x) const __flash x
#endif

#if (defined __GNUC__)
#define FLASH_EXTERN(x) extern const x
#elif (defined __ICCAVR__)
#define FLASH_EXTERN(x) extern const __flash x
#endif


/*Defines the Flash Storage for the request and response of MAC*/
#define CMD_ID_OCTET (0)

/* Converting of values from CPU endian to little endian. */
#define CPU_ENDIAN_TO_LE16(x) (x)
#define CPU_ENDIAN_TO_LE32(x) (x)
#define CPU_ENDIAN_TO_LE64(x) (x)

/* Converting of values from little endian to CPU endian. */
#define LE16_TO_CPU_ENDIAN(x) (x)
#define LE32_TO_CPU_ENDIAN(x) (x)
#define LE64_TO_CPU_ENDIAN(x) (x)

/* Converting of constants from little endian to CPU endian. */
#define CLE16_TO_CPU_ENDIAN(x) (x)
#define CLE32_TO_CPU_ENDIAN(x) (x)
#define CLE64_TO_CPU_ENDIAN(x) (x)

/* Converting of constants from CPU endian to little endian. */
#define CCPU_ENDIAN_TO_LE16(x) (x)
#define CCPU_ENDIAN_TO_LE32(x) (x)
#define CCPU_ENDIAN_TO_LE64(x) (x)

#if (defined __GNUC__)
#define ADDR_COPY_DST_SRC_16(dst, src) memcpy(( & (dst)), ( & (src)), sizeof(uint16_t))
#define ADDR_COPY_DST_SRC_64(dst, src) memcpy(( & (dst)), ( & (src)), sizeof(uint64_t))

/* Converts a 2 Byte array into a 16-Bit value */
#define convert_byte_array_to_16_bit(data) \
(*(uint16_t *)(data))

/* Converts a 4 Byte array into a 32-Bit value */
#define convert_byte_array_to_32_bit(data) \
(*(uint32_t *)(data))

/* Converts a 8 Byte array into a 64-Bit value */
#define convert_byte_array_to_64_bit(data) \
(*(uint64_t *)(data))

/* Converts a 16-Bit value into a 2 Byte array */
#define convert_16_bit_to_byte_array(value, data) \
((*(uint16_t *)(data)) = (uint16_t)(value))

/* Converts spec 16-Bit value into a 2 Byte array */
#define convert_spec_16_bit_to_byte_array(value, data) \
((*(uint16_t *)(data)) = (uint16_t)(value))

/* Converts spec 16-Bit value into a 2 Byte array */
#define convert_16_bit_to_byte_address(value, data) \
((*(uint16_t *)(data)) = (uint16_t)(value))

/* Converts a 32-Bit value into a 4 Byte array */
#define convert_32_bit_to_byte_array(value, data) \
((*(uint32_t *)(data)) = (uint32_t)(value))

/* Converts a 64-Bit value into a 8 Byte array */
/* Here memcpy requires much less footprint */
#define convert_64_bit_to_byte_array(value, data) \
memcpy((data), ( & (value)), sizeof(uint64_t))

#elif (defined __ICCAVR__)
#define ADDR_COPY_DST_SRC_16(dst, src) ((dst) = (src))
#define ADDR_COPY_DST_SRC_64(dst, src) ((dst) = (src))

/* Converts a 2 Byte array into a 16-Bit value */
#define convert_byte_array_to_16_bit(data) \
(*(uint16_t *)(data))

/* Converts a 4 Byte array into a 32-Bit value */
#define convert_byte_array_to_32_bit(data) \
(*(uint32_t *)(data))

/* Converts a 8 Byte array into a 64-Bit value */
#define convert_byte_array_to_64_bit(data) \
(*(uint64_t *)(data))

/* Converts a 16-Bit value into a 2 Byte array */
#define convert_16_bit_to_byte_array(value, data) \
((*(uint16_t *)(data)) = (uint16_t)(value))

/* Converts spec 16-Bit value into a 2 Byte array */
#define convert_spec_16_bit_to_byte_array(value, data) \
((*(uint16_t *)(data)) = (uint16_t)(value))

/* Converts spec 16-Bit value into a 2 Byte array */
#define convert_16_bit_to_byte_address(value, data) \
((*(uint16_t *)(data)) = (uint16_t)(value))

/* Converts a 32-Bit value into a 4 Byte array */
#define convert_32_bit_to_byte_array(value, data) \
((*(uint32_t *)(data)) = (uint32_t)(value))

/* Converts a 64-Bit value into a 8 Byte array */
#define convert_64_bit_to_byte_array(value, data) \
((*(uint64_t *)(data)) = (uint64_t)(value))
#endif

#define MEMCPY_ENDIAN memcpy
#define PGM_READ_BLOCK(dst, src, len) memcpy_P((dst), (src), (len))

#if (defined __GNUC__)
#define PGM_READ_BYTE(x) pgm_read_byte(x)
#define PGM_READ_WORD(x) pgm_read_word(x)
#elif (defined __ICCAVR__)
#define PGM_READ_BYTE(x) *(x)
#define PGM_READ_WORD(x) *(x)
#endif


#if (defined __GNUC__)
#define nop() do { __asm__ __volatile__ ( " nop " ); } while (0)
#elif (defined __ICCAVR__)
#define nop() __no_operation()
#endif


/**
* \}
*/

#endif // UTILS_COMPILER_H


Motofocuser.rar > mrepeat.h

/**
* \file
*
* \brief Preprocessor macro repeating utils.
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef _MREPEAT_H_
#define _MREPEAT_H_

/**
* \defgroup group_xmega_utils_mrepeat Macro Repeat
*
* \ingroup group_xmega_utils
*
* \{
*/

#include " preprocessor.h "


//! Maximal number of repetitions supported by MREPEAT.
#define MREPEAT_LIMIT 256

/*! \brief Macro repeat.
*
* This macro represents a horizontal repetition construct.
*
* \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT.
* \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with
* the current repetition number and the auxiliary data argument.
* \param data Auxiliary data passed to macro.
*
* \return & lt; tt & gt; macro(0, data) macro(1, data) ... macro(count - 1, data) & lt; /tt & gt;
*/
#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data)

#define MREPEAT0( macro, data)
#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data)
#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data)
#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data)
#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data)
#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data)
#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data)
#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data)
#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data)
#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data)
#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data)
#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data)
#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data)
#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data)
#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data)
#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data)
#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data)
#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data)
#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data)
#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data)
#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data)
#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data)
#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data)
#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data)
#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data)
#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data)
#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data)
#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data)
#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data)
#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data)
#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data)
#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data)
#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data)
#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data)
#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data)
#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data)
#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data)
#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data)
#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data)
#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data)
#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data)
#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data)
#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data)
#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data)
#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data)
#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data)
#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data)
#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data)
#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data)
#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data)
#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data)
#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data)
#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data)
#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data)
#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data)
#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data)
#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data)
#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data)
#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data)
#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data)
#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data)
#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data)
#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data)
#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data)
#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data)
#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data)
#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data)
#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data)
#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data)
#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data)
#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data)
#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data)
#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data)
#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data)
#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data)
#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data)
#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data)
#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data)
#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data)
#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data)
#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data)
#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data)
#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data)
#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data)
#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data)
#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data)
#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data)
#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data)
#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data)
#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data)
#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data)
#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data)
#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data)
#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data)
#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data)
#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data)
#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data)
#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data)
#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data)
#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data)
#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data)
#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data)
#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data)
#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data)
#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data)
#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data)
#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data)
#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data)
#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data)
#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data)
#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data)
#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data)
#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data)
#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data)
#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data)
#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data)
#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data)
#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data)
#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data)
#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data)
#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data)
#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data)
#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data)
#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data)
#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data)
#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data)
#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data)
#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data)
#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data)
#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data)
#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data)
#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data)
#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data)
#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data)
#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data)
#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data)
#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data)
#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data)
#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data)
#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data)
#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data)
#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data)
#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data)
#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data)
#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data)
#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data)
#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data)
#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data)
#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data)
#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data)
#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data)
#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data)
#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data)
#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data)
#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data)
#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data)
#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data)
#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data)
#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data)
#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data)
#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data)
#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data)
#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data)
#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data)
#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data)
#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data)
#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data)
#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data)
#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data)
#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data)
#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data)
#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data)
#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data)
#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data)
#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data)
#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data)
#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data)
#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data)
#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data)
#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data)
#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data)
#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data)
#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data)
#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data)
#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data)
#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data)
#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data)
#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data)
#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data)
#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data)
#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data)
#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data)
#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data)
#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data)
#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data)
#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data)
#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data)
#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data)
#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data)
#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data)
#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data)
#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data)
#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data)
#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data)
#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data)
#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data)
#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data)
#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data)
#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data)
#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data)
#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data)
#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data)
#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data)
#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data)
#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data)
#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data)
#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data)
#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data)
#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data)
#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data)
#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data)
#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data)
#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data)
#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data)
#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data)
#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data)
#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data)
#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data)
#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data)
#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data)
#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data)
#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data)
#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data)
#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data)
#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data)
#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data)
#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data)
#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data)
#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data)
#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data)
#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data)
#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data)
#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data)
#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data)
#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data)
#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data)
#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data)
#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data)
#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data)
#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data)
#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data)
#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data)
#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data)
#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data)
#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data)
#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data)
#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data)

/**
* \}
*/

#endif // _MREPEAT_H_


Motofocuser.rar > progmem.h

/**
* \file
*
* \brief Program memory access
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef UTILS_PROGMEM_H
#define UTILS_PROGMEM_H

/**
* \defgroup group_xmega_utils_progmem Program memory
*
* \ingroup group_xmega_utils
*
* \{
*/

/*! \name Program memory
*
* Macros for locating and accessing data in program memory.
*
* @{
*/
#if defined(__GNUC__) || defined(__DOXYGEN__)
# include & lt; avr/pgmspace.h & gt;
# define PROGMEM_LOCATION(type, name, loc) \
type name __attribute__((section (#loc)))
# define PROGMEM_DECLARE(type, name) const type name __attribute__((__progmem__))
# define PROGMEM_STRING(x) PSTR(x)
# define PROGMEM_STRING_T PGM_P
# define PROGMEM_T const
# define PROGMEM_PTR_T const *
# define PROGMEM_BYTE_ARRAY_T uint8_t*
# define PROGMEM_WORD_ARRAY_T uint16_t*
# define PROGMEM_READ_BYTE(x) pgm_read_byte(x)
# define PROGMEM_READ_WORD(x) pgm_read_word(x)

#elif defined(__ICCAVR__)
# include & lt; pgmspace.h & gt;
# ifndef __HAS_ELPM__
# define _MEMATTR_ASF __flash
# else /* __HAS_ELPM__ */
# define _MEMATTR_ASF __hugeflash
# endif /* __HAS_ELPM__ */
# define PROGMEM_LOCATION(type, name, loc) const _MEMATTR_ASF type name @ loc
# define PROGMEM_DECLARE(type, name) _MEMATTR_ASF type name
# define PROGMEM_STRING(x) ((_MEMATTR_ASF const char *)(x))
# define PROGMEM_STRING_T char const _MEMATTR_ASF *
# define PROGMEM_T const _MEMATTR_ASF
# define PROGMEM_PTR_T const _MEMATTR_ASF *
# define PROGMEM_BYTE_ARRAY_T uint8_t const _MEMATTR_ASF *
# define PROGMEM_WORD_ARRAY_T uint16_t const _MEMATTR_ASF *
# define PROGMEM_READ_BYTE(x) *(x)
# define PROGMEM_READ_WORD(x) *(x)
#endif
//! @}

/**
* \}
*/

#endif /* UTILS_PROGMEM_H */


Motofocuser.rar > clz_ctz.h

/**
* \file
*
* \brief CLZ/CTZ C implementation.
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef CLZ_CTH_H
#define CLZ_CTH_H

/**
* \brief Count leading zeros in unsigned integer
*
* This macro takes unsigned integers of any size, and evaluates to a call to
* the clz-function for its size. These functions count the number of zeros,
* starting with the MSB, before a one occurs in the integer.
*
* \param x Unsigned integer to count the leading zeros in.
*
* \return The number of leading zeros in \a x.
*/
#define clz(x) compiler_demux_size(sizeof(x), clz, (x))

/**
* \internal
* \brief Count leading zeros in unsigned, 8-bit integer
*
* \param x Unsigned byte to count the leading zeros in.
*
* \return The number of leading zeros in \a x.
*/
__always_inline static uint8_t clz8(uint8_t x)
{
uint8_t bit = 0;

if (x & 0xf0) {
x & gt; & gt; = 4;
} else {
bit += 4;
}

if (x & 0x0c) {
x & gt; & gt; = 2;
} else {
bit += 2;
}

if (!(x & 0x02)) {
bit++;
}

return bit;

}

/**
* \internal
* \brief Count leading zeros in unsigned, 16-bit integer
*
* \param x Unsigned word to count the leading zeros in.
*
* \return The number of leading zeros in \a x.
*/
__always_inline static uint8_t clz16(uint16_t x)
{
uint8_t bit = 0;

if (x & 0xff00) {
x & gt; & gt; = 8;
} else {
bit += 8;
}

return bit + clz8(x);
}

/**
* \internal
* \brief Count leading zeros in unsigned, 32-bit integer
*
* \param x Unsigned double word to count the leading zeros in.
*
* \return The number of leading zeros in \a x.
*/
__always_inline static uint8_t clz32(uint32_t x)
{
uint8_t bit = 0;

if (x & 0xffff0000) {
x & gt; & gt; = 16;
} else {
bit += 16;
}

return bit + clz16(x);
}

/**
* \brief Count trailing zeros in unsigned integer
*
* This macro takes unsigned integers of any size, and evaluates to a call to
* the ctz-function for its size. These functions count the number of zeros,
* starting with the LSB, before a one occurs in the integer.
*
* \param x Unsigned integer to count the trailing zeros in.
*
* \return The number of trailing zeros in \a x.
*/
#define ctz(x) compiler_demux_size(sizeof(x), ctz, (x))

/**
* \internal
* \brief Count trailing zeros in unsigned, 8-bit integer
*
* \param x Unsigned byte to count the trailing zeros in.
*
* \return The number of leading zeros in \a x.
*/
__always_inline static uint8_t ctz8(uint8_t x)
{
uint8_t bit = 0;

if (!(x & 0x0f)) {
bit += 4;
x & gt; & gt; = 4;
}
if (!(x & 0x03)) {
bit += 2;
x & gt; & gt; = 2;
}
if (!(x & 0x01))
bit++;

return bit;
}

/**
* \internal
* \brief Count trailing zeros in unsigned, 16-bit integer
*
* \param x Unsigned word to count the trailing zeros in.
*
* \return The number of trailing zeros in \a x.
*/
__always_inline static uint8_t ctz16(uint16_t x)
{
uint8_t bit = 0;

if (!(x & 0x00ff)) {
bit += 8;
x & gt; & gt; = 8;
}

return bit + ctz8(x);
}

/**
* \internal
* \brief Count trailing zeros in unsigned, 32-bit integer
*
* \param x Unsigned double word to count the trailing zeros in.
*
* \return The number of trailing zeros in \a x.
*/
__always_inline static uint8_t ctz32(uint32_t x)
{
uint8_t bit = 0;

if (!(x & 0x0000ffff)) {
bit += 16;
x & gt; & gt; = 16;
}

return bit + ctz16(x);
}

#endif /* CLZ_CTZ_H */


Motofocuser.rar > gas.h

/**
* \file
*
* \brief Assembler abstraction layer: GNU Assembler specifics
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef ASSEMBLER_GAS_H_INCLUDED
#define ASSEMBLER_GAS_H_INCLUDED

#ifndef __DOXYGEN__

/* IAR doesn't accept dots in macro names */
.macro ld_addr, reg, sym
lda.w \reg, \sym
.endm

/* Define a function \a name that is either globally visible or only
* file-local.
*/
.macro gas_begin_func name, is_public
.if \is_public
.global \name
.endif
.section .text.\name, " ax " , @progbits
.type \name, @function
\name :
.endm

/* Define a function \a name that is either globally visible or only
* file-local in a given segment.
*/
.macro gas_begin_func_segm name, is_public, segment
.if \is_public
.global \name
.endif
.section .\segment, " ax " , @progbits
.type \name, @function
\name :
.endm

/* Define \a name as a weak alias for the function \a strong_name */
.macro gas_weak_function_alias name, strong_name
.global \name
.weak \name
.type \name, @function
.set \name, \strong_name
.endm

/* Define a weak function called \a name */
.macro gas_weak_function name
.weak \name
gas_begin_func \name 1
.endm

#define REPEAT(count) .rept count
#define END_REPEAT() .endr
#define FILL_BYTES(count) .fill count
#define SET_LOC(offset) .org offset
#define L(name) .L##name
#define EXTERN_SYMBOL(name)

#define TEXT_SECTION(name) \
.section name, " ax " , @progbits
#define RODATA_SECTION(name) \
.section name, " a " , @progbits
#define DATA_SECTION(name) \
.section name, " aw " , @progbits
#define BSS_SECTION(name) \
.section name, " aw " , @nobits

#define FUNCTION(name) gas_begin_func name 0
#define PUBLIC_FUNCTION(name) gas_begin_func name 1
#define PUBLIC_FUNCTION_SEGMENT(name, segment) \
gas_begin_func_segm name 1 segment
#define WEAK_FUNCTION(name) gas_weak_function name
#define WEAK_FUNCTION_ALIAS(name, strong_name) \
gas_weak_function_alias name strong_name
#define END_FUNC(name) \
.size name, . - name

#define END_FILE()

#endif /* __DOXYGEN__ */

#endif /* ASSEMBLER_GAS_H_INCLUDED */


Motofocuser.rar > assembler.h

/**
* \file
*
* \brief Assembler abstraction layer and utilities
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef ASSEMBLER_H_INCLUDED
#define ASSEMBLER_H_INCLUDED

#if !defined(__ASSEMBLER__) & & !defined(__IAR_SYSTEMS_ASM__) \
& & !defined(__DOXYGEN__)
# error This file may only be included from assembly files
#endif

#if defined(__ASSEMBLER__)
# include " assembler/gas.h "
# include & lt; avr/io.h & gt;
#elif defined(__IAR_SYSTEMS_ASM__)
# include " assembler/iar.h "
# include & lt; ioavr.h & gt;
#endif

/**
* \ingroup group_xmega_utils
* \defgroup assembler_group Assembler Support
*
* This group provides a good handful of macros intended to smooth out
* the differences between various assemblers, similar to what compiler.h does
* for compilers, except that assemblers tend to be much less standardized than
* compilers.
*
* @{
*/

//! \name Control Statements
//@{
/**
* \def REPEAT(count)
* \brief Repeat the following statements \a count times
*/
/**
* \def END_REPEAT()
* \brief Mark the end of the statements to be repeated
*/
/**
* \def SET_LOC(offset)
* \brief Set the location counter to \a offset
*/
/**
* \def END_FILE()
* \brief Mark the end of the file
*/
//@}

//! \name Data Objects
//@{
/**
* \def FILL_BYTES(count)
* \brief Allocate space for \a count bytes
*/
//@}

//! \name Symbol Definition
//@{
/**
* \def L(name)
* \brief Turn \a name into a local symbol, if possible
*/
/**
* \def EXTERN_SYMBOL(name)
* \brief Declare \a name as an external symbol referenced by this file
*/
/**
* \def FUNCTION(name)
* \brief Define a file-local function called \a name
*/
/**
* \def PUBLIC_FUNCTION(name)
* \brief Define a globally visible function called \a name
*/
/**
* \def WEAK_FUNCTION(name)
* \brief Define a weak function called \a name
*
* Weak functions are only referenced if no strong definitions are found
*/
/**
* \def WEAK_FUNCTION_ALIAS(name, strong_name)
* \brief Define \a name as a weak alias for the function \a strong_name
* \sa WEAK_FUNCTION
*/
/**
* \def END_FUNC(name)
* \brief Mark the end of the function called \a name
*/
//@}

//! \name Section Definition
//@{
/**
* \def TEXT_SECTION(name)
* \brief Start a new section containing executable code
*/
/**
* \def RODATA_SECTION(name)
* \brief Start a new section containing read-only data
*/
/**
* \def DATA_SECTION(name)
* \brief Start a new section containing writeable initialized data
*/
/**
* \def BSS_SECTION(name)
* \brief Start a new section containing writeable zero-initialized data
*/
//@}

//! @}

#endif /* ASSEMBLER_H_INCLUDED */


Motofocuser.rar > usb_device.c

/**
* \file
*
* \brief USB Device driver
* Compliance with common driver UDD
*
* Copyright (c) 2011-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#include " conf_usb.h "

// Read Modify Write opcode is implemented after IAR AVR 5.51
#ifdef __ICCAVR__
# if (__VER__ & lt; = 551 || (__VER__ & lt; = 611 & & XMEGA_A1U) )
# undef USB_WORKAROUND_DO_NOT_USE_RMW
# define USB_WORKAROUND_DO_NOT_USE_RMW
# endif
#endif

#include " sysclk.h "
#include " udd.h "
#include " usb_device.h "
#include & lt; string.h & gt;

#ifndef UDD_NO_SLEEP_MGR
#include " sleepmgr.h "
#endif

#ifndef UDD_USB_INT_LEVEL
// By default USB interrupt have low priority
# define UDD_USB_INT_LEVEL USB_INTLVL_LO_gc
#endif



#ifdef USB_DEVICE_HS_SUPPORT
#error This product does not support high speed mode, please remove define USB_DEVICE_HS_SUPPORT in conf_usb.h
#endif

////////////////////////////////////////////////////
// USBB Device low-level driver (UDD)
////////////////////////////////////////////////////
/**
* \ingroup udd_group
* \defgroup udd_xmega_usb_group Xmega USB Device Driver
*
* \section USBB_CONF USBB Custom configuration
* The following USBB driver configuration must be included in the conf_usb.h
* file of the application.
*
* UDD_USB_INT_LEVEL & lt; br & gt;
* Option to change the interrupt priority (USB_INTLVL_x_gc)
* by default USB_INTLVL_LO_gc (recommended).
*
* \section Callbacks management
* The USB driver is fully managed by interrupt and does not request periodic
* task. Thereby, the USB events use callbacks to transfer the information.
* The callbacks are declared in static during compilation or in variable during
* code execution.
*
* Static declarations defined in conf_usb.h:
* - UDC_VBUS_EVENT(bool b_present) & lt; br & gt;
* To signal Vbus level change
* - UDC_SUSPEND_EVENT() & lt; br & gt;
* Called when USB bus enter in suspend mode
* - UDC_RESUME_EVENT() & lt; br & gt;
* Called when USB bus is wakeup
* - UDC_SOF_EVENT() & lt; br & gt;
* Called for each received SOF, Note: Each 1ms in HS/FS mode only.
*
* Dynamic callbacks, called " endpoint job " , are registered
* in udd_ep_job_t structure via the following functions:
* - udd_ep_run() & lt; br & gt;
* To call it when a transfer is finish
* - udd_ep_wait_stall_clear() & lt; br & gt;
* To call it when a endpoint halt is disabled
*
* \section Power mode management
* The Sleep modes authorized :
* - in USB IDLE state, the USB needs of USB clock and authorizes up to IDLE mode
* - in USB SUSPEND state, the USB no needs USB clock but requests a minimum
* clock restart timing. Thus, it authorizes up to POWER_DOWN or STANDBY mode.
*
* The USB_SLEEP_MODE_USB_IDLE equals SLEEPMGR_IDLE.
*
* The USB_SLEEP_MODE_USB_SUSPEND depends on USB clock startup timing:
* | Clock Startup | Sleep mode authorized |
* | & gt; 10ms | SLEEPMGR_STDBY |
* | & lt; =10ms | SLEEPMGR_PDOWN |
*
* @{
*/


// Check USB Device configuration
#ifndef USB_DEVICE_EP_CTRL_SIZE
# error USB_DEVICE_EP_CTRL_SIZE not defined
#endif
#ifndef USB_DEVICE_MAX_EP
# error USB_DEVICE_MAX_EP not defined
#endif


/**
* \name Power management routine.
*/
//@{


#ifndef UDD_NO_SLEEP_MGR

//! Definition of sleep levels
#if ((defined USB_DEVICE_HS_SUPPORT) & & (USBCLK_STARTUP_TIMEOUT & gt; 3000)) \
|| ((!defined USB_DEVICE_HS_SUPPORT) & & (USBCLK_STARTUP_TIMEOUT & gt; 10000))
# define USBC_SLEEP_MODE_USB_SUSPEND SLEEPMGR_IDLE
#else
# define USBC_SLEEP_MODE_USB_SUSPEND SLEEPMGR_PDOWN
#endif
#define USBC_SLEEP_MODE_USB_IDLE SLEEPMGR_IDLE

//! State of USB line
static bool udd_b_idle;


/*! \brief Authorize or not the CPU powerdown mode
*
* \param b_enable true to authorize powerdown mode
*/
static void udd_sleep_mode(bool b_idle)
{
if (!b_idle & & udd_b_idle) {
sleepmgr_unlock_mode(USBC_SLEEP_MODE_USB_IDLE);
}
if (b_idle & & !udd_b_idle) {
sleepmgr_lock_mode(USBC_SLEEP_MODE_USB_IDLE);
}
udd_b_idle = b_idle;
}
#else

static void udd_sleep_mode(bool b_idle) {
}
#endif // UDD_NO_SLEEP_MGR

//@}

/**
* \brief USB SRAM data about fifo, endpoint descriptor table and frame number
*
* The content of the USB SRAM can be:
* - modified by USB hardware by interface to signal endpoint status.
* Thereby, it is read by software.
* - modified by USB software to control endpoint.
* Thereby, it is read by hardware.
* This data section is volatile and the specific opcode read/modify/write must be used.
*
* @{
*/
struct udd_sram_data {
#if XMEGA_A1U
# if (0!=((USB_DEVICE_MAX_EP+1)%4))
uint8_t padding_align[16 - ((USB_DEVICE_MAX_EP + 1) *
sizeof(uint32_t)) % 16];
# endif
#endif
uint32_t fifo[USB_DEVICE_MAX_EP + 1];
USB_EP_t ep_ctrl[2 * (USB_DEVICE_MAX_EP + 1)];
uint16_t frame_number;
};
#if XMEGA_A1U
COMPILER_ALIGNED(16)
#else
COMPILER_ALIGNED(4) //! Caution seems GCC does not handle 2 alignment properly
#endif
static volatile struct udd_sram_data udd_sram;
#define UDD_EP_t USB_EP_t volatile

// @}

/**
* \name initialization of endpoint
*/
//@{
/**
* \brief Configures and enables an endpoint
*
* \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT).
* \param bmAttributes Attribute of endpoint declared in descriptor.
* \param MaxEndpointSize Endpoint size maximum
*/
static void udd_ep_init(udd_ep_id_t ep, uint8_t bmAttributes,
uint16_t MaxEndpointSize);

/**
* \brief Returns a pointer on endpoint control SRAM corresponding at endpoint number
*
* \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT).
*
* \return endpoint descriptor index
*/
static UDD_EP_t *udd_ep_get_ctrl(udd_ep_id_t ep);
//@}


/**
* \name Control endpoint low level management routine.
*
* This function performs control endpoint management.
* It handle the SETUP/DATA/HANDSHAKE phases of a control transaction.
*/
//@{

//! Global variable to give and record information about setup request management
udd_ctrl_request_t udd_g_ctrlreq;

//! Bit definitions about endpoint control state machine for udd_ep_control_state
typedef enum {
UDD_EPCTRL_SETUP = 0, //! & lt; Wait a SETUP packet
UDD_EPCTRL_DATA_OUT = 1, //! & lt; Wait a OUT data packet
UDD_EPCTRL_DATA_IN = 2, //! & lt; Wait a IN data packet
UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP = 3, //! & lt; Wait a IN ZLP packet
UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP = 4, //! & lt; Wait a OUT ZLP packet
UDD_EPCTRL_STALL_REQ = 5, //! & lt; STALL enabled on IN & OUT packet
} udd_ctrl_ep_state_t;

//! State of the endpoint control management
static udd_ctrl_ep_state_t udd_ep_control_state;
//! Total number of data received/sent during data packet phase with previous payload buffers
static uint16_t udd_ctrl_prev_payload_nb_trans;
//! Number of data received/sent to/from udd_g_ctrlreq.payload buffer
static uint16_t udd_ctrl_payload_nb_trans;

/**
* \brief Buffer to store the data received on control endpoint (SETUP/OUT endpoint 0)
*
* Used to avoid a RAM buffer overflow in case of the payload buffer
* is smaller than control endpoint size
*/
static uint8_t udd_ctrl_buffer[USB_DEVICE_EP_CTRL_SIZE];

/**
* \brief Reset control endpoint management
*
* Called after a USB line reset or at the end of SETUP request (after ZLP)
*/
static void udd_ctrl_init(void);

//! \brief Managed reception of SETUP packet on control endpoint
static void udd_ctrl_setup_received(void);

//! \brief Managed reception of IN packet on control endpoint
static void udd_ctrl_in_sent(void);

//! \brief Managed reception of OUT packet on control endpoint
static void udd_ctrl_out_received(void);

//! \brief Managed underflow event of IN packet on control endpoint
//! It is used to detect a DATA phase stopped by the host via a ZLP request.
//! This is mandatory for chapter 8 compliance
static void udd_ctrl_underflow(void);

//! \brief Managed overflow event of OUT packet on control endpoint
//! It is used to detect a DATA phase stopped by the host via a ZLP request.
//! This is mandatory for chapter 8 compliance
static void udd_ctrl_overflow(void);

//! \brief Managed stall event of IN/OUT packet on control endpoint
static void udd_ctrl_stall_data(void);

//! \brief Send a ZLP IN on control endpoint
static void udd_ctrl_send_zlp_in(void);

//! \brief Send a ZLP OUT on control endpoint
static void udd_ctrl_send_zlp_out(void);

//! \brief Call callback associated to setup request
static void udd_ctrl_endofrequest(void);

/**
* \brief Sub interrupt routine to manage error on control endpoint
*
* \return \c 1 if an error about control endpoint is occurred, otherwise \c 0.
*/
static bool udd_ctrl_interrupt_error(void);

/**
* \brief Sub interrupt routine to manage a SETUP transfer complete on control endpoint
*
* \return \c 1 if an SETUP transfer complete about control endpoint is occurred,
* otherwise \c 0.
*/
static bool udd_ctrl_interrupt_tc_setup(void);

//@}


/**
* \name Management of bulk/interrupt/isochronous endpoints
*
* The UDD manages the data transfer on endpoints:
* - Start data transfer on endpoint with USB Device DMA
* - Send a ZLP packet if requested
* - Call callback registered to signal end of transfer
* The transfer abort and stall feature are supported.
*/
//@{
#if (0!=USB_DEVICE_MAX_EP)

//! Structure definition about job registered on an endpoint
typedef struct {
//! A job is registered on this endpoint
uint8_t busy:1;
//! A short packet is requested for this job on endpoint IN
uint8_t b_shortpacket:1;
//! The cache buffer is currently used on endpoint OUT
uint8_t b_use_out_cache_buffer:1;
//! Buffer located in internal RAM to send or fill during job
uint8_t *buf;
//! Size of buffer to send or fill
iram_size_t buf_size;
//! Total number of data transfered on endpoint
iram_size_t nb_trans;
union {
//! Callback to call at the end of transfer
udd_callback_trans_t call_trans;
//! Callback to call when the endpoint halt is cleared
udd_callback_halt_cleared_t call_nohalt;
};
} udd_ep_job_t;

//! Array to register a job on bulk/interrupt/isochronous endpoint
static udd_ep_job_t udd_ep_job[USB_DEVICE_MAX_EP * 2];

/**
* \brief Buffer to store the data received on bulk/interrupt endpoints
*
* Used to avoid a RAM buffer overflow in case of the user buffer
* is smaller than endpoint size
*
* \warning The isochronous endpoint is not protected by this system
* and the user must always use a buffer corresponding at endpoint size
*/
#ifdef USB_DEVICE_LOW_SPEED
static uint8_t udd_ep_out_cache_buffer[USB_DEVICE_MAX_EP][8];
#else
static uint8_t udd_ep_out_cache_buffer[USB_DEVICE_MAX_EP][64];
#endif


/**
* \brief Checks endpoint number
*
* \param ep endpoint number
*/
bool udd_ep_is_valid(udd_ep_id_t ep);

/**
* \brief Manages transfer complete on bulk/interrupt/isochronous endpoints
*
* \param ep endpoint number to manage
*/
static void udd_ep_trans_complet(udd_ep_id_t ep);

/**
* \brief Returns the size of endpoint
*
* \return the size of current selected endpoint
*/
static uint16_t udd_ep_get_size(UDD_EP_t * ep_ctrl);

/**
* \brief Returns a pointer on endpoint job corresponding at endpoint number
*
* \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT).
*/
static udd_ep_job_t *udd_ep_get_job(udd_ep_id_t ep);

#endif // (0!=USB_DEVICE_MAX_EP)
//@}


void udd_enable(void)
{
uint8_t i;
irqflags_t flags;

// Sanity check Silicon revision
#if AVR8_PART_IS_DEFINED(ATxmega128A1U)
// The part ATxmega128A1U Rev. J is not supported, please use new silicon revision.
Assert(!(MCU_REVID & lt; 0x0A));
#endif

#ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
# if CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC == OSC_ID_USBSOF
// RC oscillator calibration via USB Start Of Frame is not available
// in low speed mode.
// Thus, the calibration is disabled
// when USB interface start in low speed mode
DFLLRC32M.CTRL = 0;
# endif
#endif

#ifdef USB_DEVICE_LOW_SPEED
// The USB hardware need of 6MHz in low speed mode
sysclk_enable_usb(6);
udd_set_low_speed();
#else
// The USB hardware need of 48MHz in full speed mode
sysclk_enable_usb(48);
udd_set_full_speed();
#endif

// The XMEGA_A1U does not support the RC calibration through Keepalive (Low speed).
#if (!defined USB_DEVICE_LOW_SPEED) || (!XMEGA_A1U)
# ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
# if CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC == OSC_ID_USBSOF
// The SOF calibration can be enabled
DFLLRC32M.CTRL = DFLL_ENABLE_bm;
# endif
# endif
#endif

flags = cpu_irq_save();

// Reset endpoints table
for (i = 0; i & lt; ((USB_DEVICE_MAX_EP + 1) * 2); i++) {
udd_sram.ep_ctrl[i].CTRL = 0;
}
#if (0!=USB_DEVICE_MAX_EP)
// Reset internal variables
for (i = 0; i & lt; (USB_DEVICE_MAX_EP * 2); i++) {
udd_ep_job[i].busy = false;
}
#endif

//** Enable USB hardware
usb_pad_init();
udd_set_nb_max_ep(USB_DEVICE_MAX_EP);
udd_enable_interface();
udd_enable_store_frame_number();
#if XMEGA_A1U
Assert(((uint16_t)( & udd_sram) & 0x0F) == 0); /* check align on 16bit */
#else
Assert(((uint16_t)( & udd_sram) & 0x01) == 0); /* check align on WORD */
#endif
udd_set_ep_table_addr(udd_sram.ep_ctrl);
// Enable TC fifo management
udd_enable_fifo();
udd_reset_fifo();
// Enable Interrupt USB Device
udd_enable_interrupt(UDD_USB_INT_LEVEL);

#ifndef UDD_NO_SLEEP_MGR
// Initialize the sleep mode authorized for the USB suspend mode
udd_b_idle = false;
sleepmgr_lock_mode(USBC_SLEEP_MODE_USB_SUSPEND);
#endif

#ifndef USB_DEVICE_ATTACH_AUTO_DISABLE
udd_attach();
#endif
cpu_irq_restore(flags);
}


void udd_disable(void)
{
irqflags_t flags;
flags = cpu_irq_save();
udd_detach_device();
// Disable interface
USB_CTRLA = 0;
USB_CTRLB = 0;
sysclk_disable_usb();
udd_sleep_mode(false);
#ifndef UDD_NO_SLEEP_MGR
sleepmgr_unlock_mode(USBC_SLEEP_MODE_USB_SUSPEND);
#endif
cpu_irq_restore(flags);
}

bool udd_include_vbus_monitoring(void)
{
return false; // No Vbus monitoring
}

void udd_attach(void)
{
irqflags_t flags;
flags = cpu_irq_save();

// At startup the USB bus state is unknown,
// therefore the state is considered IDLE to not miss any USB event
udd_sleep_mode(true);

udd_ack_suspend_event();
udd_ack_resume_event();
udd_attach_device();
// Enable main USB interrupts
udd_enable_tc_interrupt();
udd_enable_busevt_interrupt();
udd_enable_setup_interrupt();
udd_enable_start_of_frame_interrupt();

cpu_irq_restore(flags);
}

void udd_detach(void)
{
// Detach device from the bus
udd_detach_device();
}

bool udd_is_high_speed(void)
{
return false;
}

void udd_set_address(uint8_t address)
{
udd_set_device_address(address);
}

uint8_t udd_getaddress(void)
{
return udd_get_device_address();
}

uint16_t udd_get_frame_number(void)
{
return udd_sram.frame_number;
}

uint16_t udd_get_micro_frame_number(void)
{
return 0;
}

void udd_send_remotewakeup(void)
{
#ifndef UDD_NO_SLEEP_MGR
if (!udd_b_idle)
#endif
{
udd_sleep_mode(true); // Enter in IDLE mode
udd_send_remote_wake_up();
}
}

void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size )
{
udd_g_ctrlreq.payload = payload;
udd_g_ctrlreq.payload_size = payload_size;
}

#if (0!=USB_DEVICE_MAX_EP)
bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
uint16_t MaxEndpointSize)
{
UDD_EP_t *ep_ctrl;
Assert(udd_ep_is_valid(ep));

ep_ctrl = udd_ep_get_ctrl(ep);
if (udd_endpoint_is_enable(ep_ctrl)) {
return false; // Already allocated
}
udd_ep_init(ep, bmAttributes, MaxEndpointSize);

// Do not use multipacket mode with isochronous 1023 bytes endpoint
if (udd_endpoint_get_type(ep_ctrl)==USB_EP_TYPE_ISOCHRONOUS_gc
& & (udd_endpoint_get_size_field(ep_ctrl)
==USB_EP_BUFSIZE_1023_gc)) {
return true;
}

udd_endpoint_set_multipacket(ep_ctrl);
return true;
}

void udd_ep_free(udd_ep_id_t ep)
{
UDD_EP_t *ep_ctrl;
Assert(udd_ep_is_valid(ep));

udd_ep_abort(ep);
ep_ctrl = udd_ep_get_ctrl(ep);
udd_endpoint_disable(ep_ctrl);
}

bool udd_ep_is_halted(udd_ep_id_t ep)
{
UDD_EP_t *ep_ctrl;
Assert(udd_ep_is_valid(ep));

ep_ctrl = udd_ep_get_ctrl(ep);
return (udd_endpoint_is_stall(ep_ctrl));
}

bool udd_ep_set_halt(udd_ep_id_t ep)
{
UDD_EP_t *ep_ctrl;
Assert(udd_ep_is_valid(ep));

ep_ctrl = udd_ep_get_ctrl(ep);
udd_endpoint_enable_stall(ep_ctrl);
udd_endpoint_clear_dtgl(ep_ctrl);

udd_ep_abort(ep);
return true;
}

bool udd_ep_clear_halt(udd_ep_id_t ep)
{
udd_ep_job_t *ptr_job;
UDD_EP_t *ep_ctrl;
Assert(udd_ep_is_valid(ep));

ep_ctrl = udd_ep_get_ctrl(ep);
if (!udd_endpoint_is_stall(ep_ctrl)) {
return true; // No stall on going
}
udd_endpoint_disable_stall(ep_ctrl);

// If a job is register on clear halt action
// then execute callback
ptr_job = udd_ep_get_job(ep);
if (ptr_job- & gt; busy == true) {
ptr_job- & gt; busy = false;
ptr_job- & gt; call_nohalt();
}
return true;
}

bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, uint8_t * buf,
iram_size_t buf_size, udd_callback_trans_t callback)
{
udd_ep_job_t *ptr_job;
irqflags_t flags;
UDD_EP_t *ep_ctrl;

Assert(udd_ep_is_valid(ep));

// Get control & job about this endpoint
ptr_job = udd_ep_get_job(ep);
ep_ctrl = udd_ep_get_ctrl(ep);

if (!udd_endpoint_is_enable(ep_ctrl)) {
return false; // Endpoint not allocated
}
if (udd_endpoint_get_type(ep_ctrl)!=USB_EP_TYPE_ISOCHRONOUS_gc
& & udd_endpoint_is_stall(ep_ctrl)) {
return false; // Endpoint is halted
}
flags = cpu_irq_save();
if (ptr_job- & gt; busy == true) {
cpu_irq_restore(flags);
return false; // Job already on going
}
ptr_job- & gt; busy = true;
cpu_irq_restore(flags);


// Update Job information
ptr_job- & gt; buf = buf;
ptr_job- & gt; buf_size = buf_size;
ptr_job- & gt; nb_trans = 0;
ptr_job- & gt; call_trans = callback;
// Need to enable shortpacket to send a ZLP (buf_size==0)
ptr_job- & gt; b_shortpacket = b_shortpacket || (buf_size==0);
ptr_job- & gt; b_use_out_cache_buffer = false;

// Initialize value to simulate a empty transfer
if (USB_EP_DIR_IN == (ep & USB_EP_DIR_IN)) {
udd_endpoint_in_reset_nb_sent(ep_ctrl);
}
else
{
if ((USB_EP_TYPE_ISOCHRONOUS_gc == udd_endpoint_get_type(ep_ctrl))
& & (0 != (buf_size % udd_ep_get_size(ep_ctrl)))) {
// The user must use a buffer size modulo endpoint size
ptr_job- & gt; busy = false;
return false;
}
udd_endpoint_out_reset_nb_received(ep_ctrl);
udd_endpoint_out_set_nbbyte(ep_ctrl, 0);
}
// Request next transfer
udd_ep_trans_complet(ep);
return true;
}

void udd_ep_abort(udd_ep_id_t ep)
{
UDD_EP_t *ep_ctrl;
udd_ep_job_t *ptr_job;
Assert(udd_ep_is_valid(ep));

ep_ctrl = udd_ep_get_ctrl(ep);
ptr_job = udd_ep_get_job(ep);

// Stop transfer
udd_endpoint_set_NACK0(ep_ctrl);
if (ptr_job- & gt; busy == false) {
return; // No job on going
}
ptr_job- & gt; busy = false;
if (NULL != ptr_job- & gt; call_trans) {
ptr_job- & gt; call_trans(UDD_EP_TRANSFER_ABORT,
(ep & USB_EP_DIR_IN) ?
udd_endpoint_in_nb_sent(ep_ctrl)
: udd_endpoint_out_nb_receiv(ep_ctrl),
ep);
}
}

bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
udd_callback_halt_cleared_t callback)
{
udd_ep_job_t *ptr_job;
UDD_EP_t *ep_ctrl;
Assert(udd_ep_is_valid(ep));

ep_ctrl = udd_ep_get_ctrl(ep);
ptr_job = udd_ep_get_job(ep);

if (udd_endpoint_is_stall(ep_ctrl)) {
// Wait clear halt endpoint
if (ptr_job- & gt; busy == true) {
return false; // Job already on going
}
ptr_job- & gt; busy = true;
ptr_job- & gt; call_nohalt = callback;
} else {
// endpoint not halted then call directly callback
callback();
}
return true;
}
#endif // (0!=USB_DEVICE_MAX_EP)

//--------------------------------------------------------
//--- INTERNAL ROUTINES TO MANAGED GLOBAL EVENTS

/**
* \internal
* \brief Function called by USB bus event interrupt
*
* USB bus event interrupt includes :
* - USB line events SOF, reset, suspend, resume, wakeup
* - endpoint control errors underflow, overflow, stall
*/
ISR(USB_BUSEVENT_vect)
{
if (udd_is_start_of_frame_event()) {
udd_ack_start_of_frame_event();
udc_sof_notify();
#ifdef UDC_SOF_EVENT
UDC_SOF_EVENT();
#endif
goto udd_interrupt_bus_event_end;
}

if (udd_ctrl_interrupt_error()) {
goto udd_interrupt_bus_event_end;
}
if (udd_is_reset_event()) {
udd_ack_reset_event();
#if (0!=USB_DEVICE_MAX_EP)
// Abort all endpoint jobs on going
uint8_t i;
for (i = 1; i & lt; USB_DEVICE_MAX_EP; i++) {
udd_ep_abort(i);
udd_ep_abort(i | USB_EP_DIR_IN);
}
#endif
udc_reset();

// Reset USB address to 0
udd_set_device_address(0);
// Alloc and configure control endpoint
udd_ep_init(0, USB_EP_TYPE_CONTROL, USB_DEVICE_EP_CTRL_SIZE);
udd_ep_init(0 | USB_EP_DIR_IN, USB_EP_TYPE_CONTROL,
USB_DEVICE_EP_CTRL_SIZE);
udd_control_out_set_buf( & udd_ctrl_buffer);
// Reset endpoint control management
udd_ctrl_init();
goto udd_interrupt_bus_event_end;
}

if (udd_is_suspend_event()) {
udd_ack_suspend_event();
udd_sleep_mode(false); // Enter in SUSPEND mode
#ifdef UDC_SUSPEND_EVENT
UDC_SUSPEND_EVENT();
#endif
goto udd_interrupt_bus_event_end;
}

if (udd_is_resume_event()) {
udd_ack_resume_event();
udd_sleep_mode(true); // Enter in power reduction mode
#ifdef UDC_RESUME_EVENT
UDC_RESUME_EVENT();
#endif
goto udd_interrupt_bus_event_end;
}

udd_interrupt_bus_event_end:
return;
}

/**
* \internal
* \brief Function called by USB transfer complete interrupt
*
* USB transfer complete interrupt includes events about endpoint transfer on all endpoints.
*/
ISR(USB_TRNCOMPL_vect)
{
#if (0!=USB_DEVICE_MAX_EP)
uint8_t ep_index;
uint8_t i_fifo;
uint16_t ad;
uint16_t *p_ad;
int8_t rp;
UDD_EP_t *ep_ctrl;
udd_ep_id_t ep;
#endif

if (!udd_is_tc_event()) {
// If no other transfer complete
// then check reception of SETUP packet on control endpoint
if (udd_ctrl_interrupt_tc_setup()) {
// Interrupt acked by control endpoint managed
goto udd_interrupt_tc_end;
}
Assert(false);
}
// Check IN/OUT transfer complete on all endpoints
udd_ack_tc_event();

#if (0!=USB_DEVICE_MAX_EP)
//** Decode TC FIFO
// Compute ep addr
rp = udd_get_fifo_rp();
i_fifo = 2 * (1 + ~rp);
ad = ((uint16_t) udd_sram.ep_ctrl) - i_fifo;
p_ad = (uint16_t *) ad;
// Compute ep
ep_index = (((uint16_t) * p_ad - ((uint16_t) udd_sram.ep_ctrl)) & gt; & gt; 3);
ep = (ep_index / 2) + ((ep_index & 1) ? USB_EP_DIR_IN : 0);
Assert(USB_DEVICE_MAX_EP & gt; = (ep & USB_EP_ADDR_MASK));

// Ack IT TC of endpoint
ep_ctrl = udd_ep_get_ctrl(ep);
if (!udd_endpoint_transfer_complete(ep_ctrl)) {
return; // Error, TC is generated by Multipacket transfer
}
udd_endpoint_ack_transfer_complete(ep_ctrl);

// Check status on control endpoint
if (ep == 0) {
udd_ctrl_out_received();
goto udd_interrupt_tc_end; // Interrupt acked by control endpoint managed
}
if (ep == (0 | USB_EP_DIR_IN)) {
udd_ctrl_in_sent();
goto udd_interrupt_tc_end; // Interrupt acked by control endpoint managed
}
Assert(udd_ep_is_valid(ep));
// Manage end of transfer on endpoint bulk/interrupt/isochronous
udd_ep_trans_complet(ep);

#else

udd_get_fifo_rp();
if (udd_endpoint_transfer_complete(udd_ep_get_ctrl(0))) {
udd_endpoint_ack_transfer_complete(udd_ep_get_ctrl(0));
udd_ctrl_out_received();
}else{
udd_endpoint_ack_transfer_complete(udd_ep_get_ctrl(0 | USB_EP_DIR_IN));
udd_ctrl_in_sent();
}
#endif

udd_interrupt_tc_end:
return;
}

//--------------------------------------------------------
//--- INTERNAL ROUTINES TO INITIALIZE ENDPOINT

static void udd_ep_init(udd_ep_id_t ep, uint8_t bmAttributes,
uint16_t MaxEndpointSize)
{
USB_EP_TYPE_t type;
USB_EP_BUFSIZE_t size;
UDD_EP_t *ep_ctrl;

#if (0!=USB_DEVICE_MAX_EP)
// Translate USB attribute to hardware defines
switch (bmAttributes & USB_EP_TYPE_MASK) {
case USB_EP_TYPE_CONTROL:
type = USB_EP_TYPE_CONTROL_gc;
break;
case USB_EP_TYPE_ISOCHRONOUS:
type = USB_EP_TYPE_ISOCHRONOUS_gc;
break;
case USB_EP_TYPE_BULK:
case USB_EP_TYPE_INTERRUPT: //interrupt behaves as bulk
type = USB_EP_TYPE_BULK_gc;
break;
default:
Assert(false); // Wrong value
return;
}
#else
type = USB_EP_TYPE_CONTROL_gc;
#endif

// Translate USB endpoint size to hardware defines
switch (MaxEndpointSize) {
default:
Assert(false); // Wrong value
case 8:
size = USB_EP_BUFSIZE_8_gc;
break;
case 16:
size = USB_EP_BUFSIZE_16_gc;
break;
case 32:
size = USB_EP_BUFSIZE_32_gc;
break;
case 64:
size = USB_EP_BUFSIZE_64_gc;
break;
#if (0!=USB_DEVICE_MAX_EP)
case 128:
size = USB_EP_BUFSIZE_128_gc;
break;
case 256:
size = USB_EP_BUFSIZE_256_gc;
break;
case 512:
size = USB_EP_BUFSIZE_512_gc;
break;
case 1023:
size =USB_EP_BUFSIZE_1023_gc;
break;
#endif
}

// Enable endpoint
ep_ctrl = udd_ep_get_ctrl(ep);
udd_endpoint_disable(ep_ctrl);
udd_endpoint_clear_status(ep_ctrl);
udd_endpoint_set_control(ep_ctrl, (uint8_t) type | (uint8_t) size);
}

static UDD_EP_t *udd_ep_get_ctrl(udd_ep_id_t ep)
{
return & udd_sram.ep_ctrl[(2 * (ep & USB_EP_ADDR_MASK) +
((ep & USB_EP_DIR_IN) ? 1 : 0))];
}


//--------------------------------------------------------
//--- INTERNAL ROUTINES TO MANAGED THE CONTROL ENDPOINT

static void udd_ctrl_init(void)
{
udd_disable_overflow_interrupt();
udd_disable_underflow_interrupt();

// Clear status flag from control endpoints
// Mandatory for ATxmega128A1 Rev. K
udd_control_in_set_NACK0();
udd_control_in_set_bytecnt(0);
udd_control_in_ack_tc();
udd_control_ack_in_underflow();
udd_control_out_ack_tc();
udd_control_ack_out_overflow();

udd_g_ctrlreq.callback = NULL;
udd_g_ctrlreq.over_under_run = NULL;
udd_g_ctrlreq.payload_size = 0;
udd_ep_control_state = UDD_EPCTRL_SETUP;
}

static void udd_ctrl_setup_received(void)
{
if (UDD_EPCTRL_SETUP != udd_ep_control_state) {
if ((UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state)
|| (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state)) {
// Accept that ZLP event can be hidden by setup packet event
// in case of setup packet sending quickly after a ZLP
udd_ctrl_endofrequest();
}
// Reinitializes control endpoint management
udd_ctrl_init();
}
// Fill setup request structure
if (8 != udd_control_out_get_bytecnt())
return; // Error data number don't correspond to SETUP packet
memcpy((uint8_t *) & udd_g_ctrlreq.req, udd_ctrl_buffer, 8);

// To detect a protocol error on setup, enable nak interrupt on IN/OUT of control endpoint
udd_enable_overflow_interrupt();
udd_enable_underflow_interrupt();

// Decode setup request
if (udc_process_setup() == false) {
// Setup request unknown then stall it
udd_ctrl_stall_data();
return;
}

if (Udd_setup_is_in()) {
udd_ctrl_prev_payload_nb_trans = 0;
udd_ctrl_payload_nb_trans = 0;
udd_ep_control_state = UDD_EPCTRL_DATA_IN;
udd_ctrl_in_sent(); // Send first data transfer
} else {
if (0 == udd_g_ctrlreq.req.wLength) {
// No data phase requested
// Send IN ZLP to ACK setup request
udd_ctrl_send_zlp_in();
return;
}
// OUT data phase requested
udd_ctrl_prev_payload_nb_trans = 0;
udd_ctrl_payload_nb_trans = 0;
udd_ep_control_state = UDD_EPCTRL_DATA_OUT;
// Clear packet to receive first packet
udd_control_out_clear_NACK0();
}
}

static void udd_ctrl_in_sent(void)
{
static bool b_shortpacket = false;
uint16_t nb_remain;

if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) {
// ZLP on IN is sent, then valid end of setup request
udd_ctrl_endofrequest();
// Reinitializes control endpoint management
udd_ctrl_init();
return;
}
Assert(udd_ep_control_state == UDD_EPCTRL_DATA_IN);

nb_remain = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans;
if (0 == nb_remain) {
// Update number of total data sending by previous playload buffer
udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans;
if ((udd_g_ctrlreq.req.wLength == udd_ctrl_prev_payload_nb_trans)
|| b_shortpacket) {
// All data requested are transfered or a short packet has been sent
// then it is the end of data phase.
// Generate an OUT ZLP for handshake phase.
udd_ctrl_send_zlp_out();
return;
}
// Need of new buffer because the data phase is not complete
if ((!udd_g_ctrlreq.over_under_run)
|| (!udd_g_ctrlreq.over_under_run())) {
// Underrun then send zlp on IN
// nb_remain == 0 allows to send a IN ZLP
} else {
// A new payload buffer is given
udd_ctrl_payload_nb_trans = 0;
nb_remain = udd_g_ctrlreq.payload_size;
}
}
// Continue transfer an send next data
if (nb_remain & gt; = USB_DEVICE_EP_CTRL_SIZE) {
nb_remain = USB_DEVICE_EP_CTRL_SIZE;
b_shortpacket = false;
} else {
b_shortpacket = true;
}
udd_control_in_set_bytecnt(nb_remain);

// Link payload buffer directly on USB hardware
udd_control_in_set_buf(udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans);
udd_ctrl_payload_nb_trans += nb_remain;

// Valid and sent the data available in control endpoint buffer
udd_control_in_clear_NACK0();
}

static void udd_ctrl_out_received(void)
{
uint16_t nb_data;

if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) {
// Valid end of setup request
udd_ctrl_endofrequest();
// Reinitializes control endpoint management
udd_ctrl_init();
return;
}
Assert(udd_ep_control_state == UDD_EPCTRL_DATA_OUT);

// Read data received during OUT phase
nb_data = udd_control_out_get_bytecnt();

if (udd_g_ctrlreq.payload_size & lt; (udd_ctrl_payload_nb_trans + nb_data)) {
// Payload buffer too small, ignore data remaining
nb_data = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans;
}

memcpy((uint8_t *) (udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans),
udd_ctrl_buffer, nb_data);
udd_ctrl_payload_nb_trans += nb_data;

if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) || (udd_g_ctrlreq.req.wLength
& lt; = (udd_ctrl_prev_payload_nb_trans
+ udd_ctrl_payload_nb_trans))) {
// End of reception because it is a short packet
// or all data are transfered

// Before send ZLP, call intermediate callback
// in case of data receive generate a stall
udd_g_ctrlreq.payload_size = udd_ctrl_payload_nb_trans;
if (NULL != udd_g_ctrlreq.over_under_run) {
if (!udd_g_ctrlreq.over_under_run()) {
// Stall ZLP
udd_ctrl_stall_data();
return;
}
}
// Send IN ZLP to ACK setup request
udd_ctrl_send_zlp_in();
return;
}

if (udd_g_ctrlreq.payload_size == udd_ctrl_payload_nb_trans) {
// Overrun then request a new payload buffer
if (!udd_g_ctrlreq.over_under_run) {
// No callback available to request a new payload buffer
udd_ctrl_stall_data();
return;
}
if (!udd_g_ctrlreq.over_under_run()) {
// No new payload buffer delivered
udd_ctrl_stall_data();
return;
}
// New payload buffer available
// Update number of total data received
udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans;
// Reinit reception on payload buffer
udd_ctrl_payload_nb_trans = 0;
}
// Free buffer of OUT control endpoint to authorize next reception
udd_control_out_clear_NACK0();
}

static void udd_ctrl_underflow(void)
{
if (udd_is_tc_event() || udd_ctrl_interrupt_tc_setup()) {
return; // underflow ignored if a transfer complete has been no processed
}
if (UDD_EPCTRL_DATA_OUT == udd_ep_control_state) {
// Host want to stop OUT transaction
// then stop to wait OUT data phase and wait IN ZLP handshake
udd_ctrl_send_zlp_in();
} else if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) {
// A OUT handshake is waiting by device,
// but host want extra IN data then stall extra IN data and following status stage
udd_control_in_enable_stall();
udd_control_out_enable_stall();
}
}

static void udd_ctrl_overflow(void)
{
if (udd_is_tc_event() || udd_ctrl_interrupt_tc_setup()) {
return; // overflow ignored if a transfer complete has been no processed
}
if (UDD_EPCTRL_DATA_IN == udd_ep_control_state) {
// Host want to stop IN transaction
// then stop to wait IN data phase and wait OUT ZLP handshake
udd_ctrl_send_zlp_out();
} else if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) {
// A IN handshake is waiting by device,
// but host want extra OUT data then stall extra OUT data and following status stage
udd_control_in_enable_stall();
udd_control_out_enable_stall();
}
}

static void udd_ctrl_stall_data(void)
{
// Stall all packets on IN & OUT control endpoint
udd_ep_control_state = UDD_EPCTRL_STALL_REQ;
udd_control_in_enable_stall();
udd_control_out_enable_stall();
}

static void udd_ctrl_send_zlp_in(void)
{
udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP;
// Valid and sent empty IN packet on control endpoint
udd_control_in_set_bytecnt(0);
udd_control_in_clear_NACK0();
}

static void udd_ctrl_send_zlp_out(void)
{
udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP;
// Valid reception of OUT packet on control endpoint
udd_control_out_clear_NACK0();
}

static void udd_ctrl_endofrequest(void)
{
// If a callback is registered then call it
if (udd_g_ctrlreq.callback) {
udd_g_ctrlreq.callback();
}
}

static bool udd_ctrl_interrupt_error(void)
{
// Underflow only managed for control endpoint
if (udd_is_underflow_event()) {
udd_ack_underflow_event();
if (udd_control_in_underflow()) {
udd_ctrl_underflow();
}
return true;
}
// Overflow only managed for control endpoint
if (udd_is_overflow_event()) {
udd_ack_overflow_event();
if (udd_control_out_overflow()) {
udd_ctrl_overflow();
}
return true;
}
return false;
}

static bool udd_ctrl_interrupt_tc_setup(void)
{
if (!udd_is_setup_event()) {
return false;
}
udd_ack_setup_event();

// Clear eventually previous stall events
udd_control_out_ack_stall();
udd_control_in_ack_stall();
udd_ack_stall_event();

Assert(udd_control_setup()); // A setup must be received on control endpoint

// Ack SETUP packet and decode request
udd_control_ack_setup();
udd_ctrl_setup_received();
return true;
}


//--------------------------------------------------------
//--- INTERNAL ROUTINES TO MANAGED THE BULK/INTERRUPT/ISOCHRONOUS ENDPOINTS

#if (0!=USB_DEVICE_MAX_EP)

static uint16_t udd_ep_get_size(UDD_EP_t * ep_ctrl)
{
// Translate hardware defines to USB endpoint size
switch (udd_endpoint_get_size_field(ep_ctrl)) {
default:
case USB_EP_BUFSIZE_8_gc:
return 8;
case USB_EP_BUFSIZE_16_gc:
return 16;
case USB_EP_BUFSIZE_32_gc:
return 32;
case USB_EP_BUFSIZE_64_gc:
return 64;
case USB_EP_BUFSIZE_128_gc:
return 128;
case USB_EP_BUFSIZE_256_gc:
return 256;
case USB_EP_BUFSIZE_512_gc:
return 512;
case USB_EP_BUFSIZE_1023_gc:
return 1023;
}
}

static udd_ep_job_t *udd_ep_get_job(udd_ep_id_t ep)
{
return & udd_ep_job[(2 * (ep & USB_EP_ADDR_MASK) +
((ep & USB_EP_DIR_IN) ? 1 : 0)) - 2];
}

bool udd_ep_is_valid(udd_ep_id_t ep)
{
ep & = USB_EP_ADDR_MASK;
if (ep == 0) {
return false;
}
return (USB_DEVICE_MAX_EP & gt; = ep);
}

static void udd_ep_trans_complet(udd_ep_id_t ep)
{
UDD_EP_t *ep_ctrl;
udd_ep_job_t *ptr_job;
uint16_t ep_size, nb_trans;
iram_size_t next_trans;

ptr_job = udd_ep_get_job(ep);
ep_ctrl = udd_ep_get_ctrl(ep);
ep_size = udd_ep_get_size(ep_ctrl);

if (USB_EP_DIR_IN == (ep & USB_EP_DIR_IN)) {
// Transfer complete on IN
nb_trans = udd_endpoint_in_nb_sent(ep_ctrl);

// Update number of data transfered
ptr_job- & gt; nb_trans += nb_trans;

// Need to send other data
if (ptr_job- & gt; nb_trans != ptr_job- & gt; buf_size) {
next_trans = ptr_job- & gt; buf_size - ptr_job- & gt; nb_trans;
if (UDD_ENDPOINT_MAX_TRANS & lt; next_trans) {
// The USB hardware support a maximum
// transfer size of UDD_ENDPOINT_MAX_TRANS Bytes
next_trans = UDD_ENDPOINT_MAX_TRANS -
(UDD_ENDPOINT_MAX_TRANS % ep_size);
}
// Need ZLP, if requested and last packet is not a short packet
ptr_job- & gt; b_shortpacket = ptr_job- & gt; b_shortpacket
& & (0==(next_trans % ep_size));
udd_endpoint_in_reset_nb_sent(ep_ctrl);
udd_endpoint_in_set_bytecnt(ep_ctrl, next_trans);
// Link the user buffer directly on USB hardware DMA
udd_endpoint_set_buf(ep_ctrl, & ptr_job- & gt; buf[ptr_job- & gt; nb_trans]);
udd_endpoint_clear_NACK0(ep_ctrl);
return;
}

// Need to send a ZLP after all data transfer
if (ptr_job- & gt; b_shortpacket) {
ptr_job- & gt; b_shortpacket = false;
udd_endpoint_in_reset_nb_sent(ep_ctrl);
udd_endpoint_in_set_bytecnt(ep_ctrl, 0);
udd_endpoint_clear_NACK0(ep_ctrl);
return;
}
}
else
{
// Transfer complete on OUT
nb_trans = udd_endpoint_out_nb_receiv(ep_ctrl);

// Can be necessary to copy data receive from cache buffer to user buffer
if (ptr_job- & gt; b_use_out_cache_buffer) {
memcpy( & ptr_job- & gt; buf[ptr_job- & gt; nb_trans]
, udd_ep_out_cache_buffer[ep - 1]
, ptr_job- & gt; buf_size % ep_size);
}

// Update number of data transfered
ptr_job- & gt; nb_trans += nb_trans;
if (ptr_job- & gt; nb_trans & gt; ptr_job- & gt; buf_size) {
ptr_job- & gt; nb_trans = ptr_job- & gt; buf_size;
}

// If all previous data requested are received and user buffer not full
// then need to receive other data
if ((nb_trans == udd_endpoint_out_get_nbbyte_requested(ep_ctrl))
& & (ptr_job- & gt; nb_trans != ptr_job- & gt; buf_size)) {
next_trans = ptr_job- & gt; buf_size - ptr_job- & gt; nb_trans;
if (UDD_ENDPOINT_MAX_TRANS & lt; next_trans) {
// The USB hardware support a maximum transfer size
// of UDD_ENDPOINT_MAX_TRANS Bytes
next_trans = UDD_ENDPOINT_MAX_TRANS
- (UDD_ENDPOINT_MAX_TRANS % ep_size);
} else {
next_trans -= next_trans % ep_size;
}

udd_endpoint_out_reset_nb_received(ep_ctrl);
if (next_trans & lt; ep_size) {
// Use the cache buffer for Bulk or Interrupt size endpoint
ptr_job- & gt; b_use_out_cache_buffer = true;
udd_endpoint_set_buf( ep_ctrl,
udd_ep_out_cache_buffer[ep - 1]);
udd_endpoint_out_set_nbbyte(ep_ctrl, ep_size);
} else {
// Link the user buffer directly on USB hardware DMA
udd_endpoint_set_buf(ep_ctrl, & ptr_job- & gt; buf[ptr_job- & gt; nb_trans]);
udd_endpoint_out_set_nbbyte(ep_ctrl, next_trans);
}
// Start transfer
udd_endpoint_clear_NACK0(ep_ctrl);
return;
}
}

// Job complete then call callback
if (ptr_job- & gt; busy) {
ptr_job- & gt; busy = false;
if (NULL != ptr_job- & gt; call_trans) {
ptr_job- & gt; call_trans(UDD_EP_TRANSFER_OK,
ptr_job- & gt; nb_trans,
ep);
}
}
return;
}
#endif // (0!=USB_DEVICE_MAX_EP)
//@}


Motofocuser.rar > usb_device.h

/**
* \file
*
* \brief USB Driver header file for XMEGA products including USB interface.
*
* Copyright (c) 2011-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _USB_DEVICE_H_
#define _USB_DEVICE_H_

#include & lt; nvm.h & gt;

/**
* \ingroup udd_group
* \defgroup udd_xmega_usb_group Xmega USB Device Driver
* USBC low-level driver for USB Device mode
*
*
* @{
*/

//! @name USB Device main management
//! @{

/**
* \brief Initializes the USB DP/DM buffers
*
* This functions initializes the USB buffer using the calibration value
* stored in production raw.
* If the calibration value is not found (0xFF) value, a default typical
* value is applied.
* Alternatively user can force calibration values using USB_PAD_USER_CAL0
* and USB_PAD_USER_CAL1
*
*/
static inline void usb_pad_init(void)
{
uint8_t cal;

#ifdef USB_PAD_USER_CAL0
USB_CAL0 = USB_PAD_USER_CAL0;
#else
cal = nvm_read_production_signature_row
(nvm_get_production_signature_row_offset(USBCAL0));
if (cal != 0xFF) {
USB_CAL0 = cal;
} else {
USB_CAL0 = 0x1F;
}
#endif

#ifdef USB_PAD_USER_CAL1
USB_CAL1 = USB_PAD_USER_CAL1;
#else
cal = nvm_read_production_signature_row
(nvm_get_production_signature_row_offset(USBCAL1));
if (cal != 0xFF) {
USB_CAL1 = cal;
} else {
USB_CAL1 = 0x1F;
}
#endif
}

#define udd_enable_interface() (USB_CTRLA |= USB_ENABLE_bm)
#define udd_disable_interface() (USB_CTRLA & = ~USB_ENABLE_bm)
#define udd_attach_device() (USB_CTRLB |= USB_ATTACH_bm)
#define udd_detach_device() (USB_CTRLB & = ~USB_ATTACH_bm)
#define udd_gnak_disable() (USB_CTRLB & = ~USB_GNACK_bm)
#define udd_gnak_enable() (USB_CTRLB |= USB_GNACK_bm)
#define udd_gnak_is_enable() (USB_CTRLB & USB_GNACK_bm)
#define udd_set_nb_max_ep(n) (USB_CTRLA |= n)
#define udd_enable_store_frame_number() (USB_CTRLA |= USB_STFRNUM_bm)
#define udd_disable_store_frame_number() (USB_CTRLA & = ~USB_STFRNUM_bm)
#define udd_set_full_speed() (USB_CTRLA |= USB_SPEED_bm)
#define udd_set_low_speed() (USB_CTRLA & = ~USB_SPEED_bm)
#define udd_set_ep_table_addr(n) (USB.EPPTR = (uint16_t)n)
#define udd_get_ep_table_addr() (USB.EPPTR)
#define udd_get_fifo_rp() (USB_FIFORP)
#define udd_reset_fifo() (USB_FIFORP=0xFF)
#define udd_enable_interrupt(level) (USB_INTCTRLA |= level & (USB_INTLVL1_bm|USB_INTLVL0_bm))

#define udd_set_device_address(n) (USB_ADDR=n)
#define udd_get_device_address() (USB_ADDR)
#define udd_enable_fifo() (USB_CTRLA |= USB_FIFOEN_bm)
#define udd_disable_fifo() (USB_CTRLA & = ~USB_FIFOEN_bm)

#define udd_send_remote_wake_up() (USB_CTRLB & = ~USB_RWAKEUP_bm, USB_CTRLB |= USB_RWAKEUP_bm)
#define udd_set_global_nack() (USB_CTRLB |= USB_GNACK_bm)
#define udd_is_crc_event() (USB_INTFLAGSASET & USB_CRCIF_bm ? true : false)
#define udd_ack_crc_event() (USB_INTFLAGSACLR = USB_CRCIF_bm)
#define udd_set_crc_event() (USB_INTFLAGSASET = USB_CRCIF_bm)
#define udd_enable_crc_interrupt() (USB_INTCTRLA |= USB_CRCIE_bm)
#define udd_disable_crc_interrupt() (USB_INTCTRLA & = ~USB_CRCIE_bm)

#define udd_is_start_of_frame_event() (USB_INTFLAGSASET & USB_SOFIF_bm ? true : false)
#define udd_ack_start_of_frame_event() (USB_INTFLAGSACLR = USB_SOFIF_bm)
#define udd_set_start_of_frame_event() (USB_INTFLAGSASET = USB_SOFIF_bm)
#define udd_enable_start_of_frame_interrupt() (USB_INTCTRLA |= USB_SOFIE_bm)
#define udd_disable_start_of_frame_interrupt() (USB_INTCTRLA & = ~USB_SOFIE_bm)
#define udd_is_enable_start_of_frame_interrupt() (0!=(USB_INTCTRLA|USB_SOFIE_bm))

#define udd_is_reset_event() (USB_INTFLAGSASET & USB_RSTIF_bm ? true : false)
#define udd_ack_reset_event() (USB_INTFLAGSACLR = USB_RSTIF_bm)
#define udd_set_reset_event() (USB_INTFLAGSASET = USB_RSTIF_bm)

#define udd_is_suspend_event() (USB_INTFLAGSASET & USB_SUSPENDIF_bm ? true : false)
#define udd_ack_suspend_event() (USB_INTFLAGSACLR = USB_SUSPENDIF_bm)
#define udd_set_suspend_event() (USB_INTFLAGSASET = USB_SUSPENDIF_bm)

#define udd_is_resume_event() (USB_INTFLAGSASET & USB_RESUMEIF_bm ? true : false)
#define udd_ack_resume_event() (USB_INTFLAGSACLR = USB_RESUMEIF_bm)
#define udd_set_resume_event() (USB_INTFLAGSASET = USB_RESUMEIF_bm)

#define udd_enable_busevt_interrupt() (USB_INTCTRLA |= USB_BUSEVIE_bm)
#define udd_disable_busevt_interrupt() (USB_INTCTRLA & = ~USB_BUSEVIE_bm)

#define udd_is_setup_event() (USB_INTFLAGSBCLR & USB_SETUPIF_bm ? true : false)
#define udd_ack_setup_event() (USB_INTFLAGSBCLR = USB_SETUPIF_bm)
#define udd_set_setup_event() (USB_INTFLAGSBSET = USB_SETUPIF_bm)
#define udd_enable_setup_interrupt() (USB_INTCTRLB |= USB_SETUPIE_bm)
#define udd_disable_setup_interrupt() (USB_INTCTRLB & = ~USB_SETUPIE_bm)

#define udd_is_tc_event() (USB_INTFLAGSBCLR & USB_TRNIF_bm ? true : false)
#define udd_ack_tc_event() (USB_INTFLAGSBCLR = USB_TRNIF_bm)
#define udd_set_tc_event() (USB_INTFLAGSBSET = USB_TRNIF_bm)
#define udd_enable_tc_interrupt() (USB_INTCTRLB |= USB_TRNIE_bm)
#define udd_disable_tc_interrupt() (USB_INTCTRLB & = ~USB_TRNIE_bm)

#define udd_is_overflow_event() (USB_INTFLAGSASET & USB_OVFIF_bm ? true : false)
#define udd_ack_overflow_event() (USB_INTFLAGSACLR = USB_OVFIF_bm)
#define udd_set_overflow_event() (USB_INTFLAGSASET = USB_OVFIF_bm)
#define udd_enable_overflow_interrupt() (USB_INTCTRLA |= USB_BUSERRIE_bm)
#define udd_disable_overflow_interrupt() (USB_INTCTRLA & = ~USB_BUSERRIE_bm)
#define udd_is_enable_overflow_interrupt() (USB_INTCTRLA & USB_BUSERRIE_bm ? true : false)

#define udd_is_underflow_event() (USB_INTFLAGSASET & USB_UNFIF_bm ? true : false)
#define udd_ack_underflow_event() (USB_INTFLAGSACLR = USB_UNFIF_bm)
#define udd_set_underflow_event() (USB_INTFLAGSASET = USB_UNFIF_bm)
#define udd_enable_underflow_interrupt() (USB_INTCTRLA |= USB_BUSERRIE_bm)
#define udd_disable_underflow_interrupt() (USB_INTCTRLA & = ~USB_BUSERRIE_bm)
#define udd_is_enable_underflow_interrupt() (USB_INTCTRLA & USB_BUSERRIE_bm ? true : false)

#define udd_is_stall_event() (USB_INTFLAGSASET & USB_STALLIF_bm ? true : false)
#define udd_ack_stall_event() (USB_INTFLAGSACLR = USB_STALLIF_bm)
#define udd_set_stall_event() (USB_INTFLAGSASET = USB_STALLIF_bm)
#define udd_enable_stall_interrupt() (USB_INTCTRLA |= USB_STALLIE_bm)
#define udd_disable_stall_interrupt() (USB_INTCTRLA & = ~USB_STALLIE_bm)
#define udd_is_enable_stall_interrupt() (USB_INTCTRLA & USB_STALLIE_bm ? true : false)
//! @}

//! @name USB Device read/modify/write management
//! @{
#ifndef USB_WORKAROUND_DO_NOT_USE_RMW
/*
* Read modify write new instructions for Xmega
* inline asm implementation with R16 register.
* This should be removed later on when the new instructions
* will be available within the compiler.
*
*/
// Load and Clear
#ifdef __GNUC__
#define LACR16(addr,msk) \
__asm__ __volatile__ ( \
" ldi r16, %1 " " \n\t " \
" .dc.w 0x9306 " " \n\t " \
:: " z " (addr), " M " (msk): " r16 " )
#else
#define LACR16(addr,msk) __lac((unsigned char)msk,(unsigned char*)addr)
#endif

// Load and Set
#ifdef __GNUC__
#define LASR16(addr,msk) \
__asm__ __volatile__ ( \
" ldi r16, %1 " " \n\t " \
" .dc.w 0x9305 " " \n\t " \
:: " z " (addr), " M " (msk): " r16 " )
#else
#define LASR16(addr,msk) __las((unsigned char)msk,(unsigned char*)addr)
#endif

// Exchange
#ifdef __GNUC__
#define XCHR16(addr,msk) \
__asm__ __volatile__ ( \
" ldi r16, %1 " " \n\t " \
" .dc.w 0x9304 " " \n\t " \
:: " z " (addr), " M " (msk): " r16 " )
#else
#define XCHR16(addr,msk) __xch(msk,addr)
#endif

// Load and toggle
#ifdef __GNUC__
#define LATR16(addr,msk) \
__asm__ __volatile__ ( \
" ldi r16, %1 " " \n\t " \
" .dc.w 0x9307 " " \n\t " \
:: " z " (addr), " M " (msk): " r16 " )
#else
#define LATR16(addr,msk) __lat(msk,addr)
#endif

#else

// Load and Clear
#define LACR16(addr,msk) (*addr & = ~msk)
// Load and Set
#define LASR16(addr,msk)(*addr |= msk)

#endif
//! @}


//! @name USB Device endpoints table management
//! @{

#define udd_endpoint_set_control(ep_ctrl,val) (ep_ctrl- & gt; CTRL=val)
#define udd_endpoint_get_control(ep_ctrl) (ep_ctrl- & gt; CTRL)

#define udd_endpoint_disable(ep_ctrl) udd_endpoint_set_control(ep_ctrl,0)
#define udd_endpoint_is_enable(ep_ctrl) (USB_EP_TYPE_DISABLE_gc!=udd_endpoint_get_type(ep_ctrl))


#define udd_endpoint_enable_stall(ep_ctrl) (ep_ctrl- & gt; CTRL |= USB_EP_STALL_bm)
#define udd_endpoint_disable_stall(ep_ctrl) (ep_ctrl- & gt; CTRL & = ~USB_EP_STALL_bm)
#define udd_endpoint_is_stall(ep_ctrl) (ep_ctrl- & gt; CTRL & USB_EP_STALL_bm ? true : false)
#define udd_endpoint_set_multipacket(ep_ctrl) (ep_ctrl- & gt; CTRL |= USB_EP_MULTIPKT_bm)
#define udd_endpoint_TC_int_disable(ep_ctrl) (ep_ctrl- & gt; CTRL |= USB_EP_INTDSBL_bm)
#define udd_endpoint_set_pingpong(ep_ctrl) (ep_ctrl- & gt; CTRL |= USB_EP_PINGPONG_bm)
#define udd_endpoint_get_size_field(ep_ctrl) (ep_ctrl- & gt; CTRL & USB_EP_BUFSIZE_gm)
#define udd_endpoint_get_type(ep_ctrl) (ep_ctrl- & gt; CTRL & USB_EP_TYPE_gm)

#define udd_endpoint_get_status(ep_ctrl) (ep_ctrl- & gt; STATUS)
#define udd_endpoint_clear_status(ep_ctrl) (ep_ctrl- & gt; STATUS=USB_EP_BUSNACK0_bm|USB_EP_BUSNACK1_bm)

#define udd_endpoint_setup_received(ep_ctrl) (ep_ctrl- & gt; STATUS & USB_EP_SETUP_bm ? true : false)
#define udd_endpoint_ack_setup_received(ep_ctrl) LACR16( & ep_ctrl- & gt; STATUS, USB_EP_SETUP_bm)

#define udd_endpoint_transfer_complete(ep_ctrl) (ep_ctrl- & gt; STATUS & USB_EP_TRNCOMPL0_bm ? true : false)
#define udd_endpoint_ack_transfer_complete(ep_ctrl) LACR16( & (ep_ctrl- & gt; STATUS), USB_EP_TRNCOMPL0_bm)
#define udd_endpoint_transfer_complete_bank0(ep_ctrl) (ep_ctrl- & gt; STATUS & USB_EP_TRNCOMPL0_bm ? true : false)
#define udd_endpoint_ack_transfer_complete_bankO(ep_ctrl) LACR16( & ep_ctrl- & gt; STATUS, USB_EP_TRNCOMPL0_bm)
#define udd_endpoint_transfer_complete_bank1(ep_ctrl) (ep_ctrl- & gt; STATUS & USB_EP_SETUP_bm ? true : false)
#define udd_endpoint_ack_transfer_complete_bank1(ep_ctrl) LACR16( & ep_ctrl- & gt; STATUS, USB_EP_SETUP_bm)

#define udd_endpoint_get_bank(ep_ctrl) (ep_ctrl- & gt; STATUS & USB_EP_BANK_bm ? true : false)
#define udd_endpoint_set_bank(ep_ctrl) LASR16( & ep_ctrl- & gt; STATUS, USB_EP_BANK_bm)
#define udd_endpoint_clear_bank(ep_ctrl) LACR16( & ep_ctrl- & gt; STATUS, USB_EP_BANK_bm)

#define udd_endpoint_set_dtgl(ep_ctrl) LASR16( & ep_ctrl- & gt; STATUS,USB_EP_TOGGLE_bm)
#define udd_endpoint_clear_dtgl(ep_ctrl) LACR16( & ep_ctrl- & gt; STATUS, USB_EP_TOGGLE_bm )
#define udd_endpoint_get_dtgl(ep_ctrl) ((ep_ctrl- & gt; STATUS) & USB_EP_TOGGLE_bm ? true : false)
#define udd_endpoint_toggle_dtgl(ep_ctrl) LATR16( & ep_ctrl- & gt; STATUS, USB_EP_TOGGLE_bm)

#define udd_endpoint_set_NACK0(ep_ctrl) LASR16( & ep_ctrl- & gt; STATUS,USB_EP_BUSNACK0_bm)
#define udd_endpoint_set_NACK1(ep_ctrl) LASR16( & ep_ctrl- & gt; STATUS,USB_EP_BUSNACK1_bm)
#define udd_endpoint_clear_NACK0(ep_ctrl) LACR16( & ep_ctrl- & gt; STATUS, USB_EP_BUSNACK0_bm)
#define udd_endpoint_clear_NACK1(ep_ctrl) LACR16( & ep_ctrl- & gt; STATUS, USB_EP_BUSNACK1_bm)
#define udd_endpoint_get_NACK1(ep_ctrl) ((ep_ctrl- & gt; STATUS & USB_EP_BUSNACK1_bm) ? true : false)
#define udd_endpoint_get_NACK0(ep_ctrl) ((ep_ctrl- & gt; STATUS & USB_EP_BUSNACK0_bm) ? true : false)
#define udd_endpoint_overflow(ep_ctrl) (ep_ctrl- & gt; STATUS & USB_EP_OVF_bm ? true : false)
#define udd_endpoint_underflow(ep_ctrl) (ep_ctrl- & gt; STATUS & USB_EP_UNF_bm ? true : false)

#define UDD_ENDPOINT_MAX_TRANS (0x3FF)

#define udd_endpoint_out_nb_receiv(ep_ctrl) (ep_ctrl- & gt; CNT)
#define udd_endpoint_out_reset_nb_received(ep_ctrl) (ep_ctrl- & gt; CNT = 0)
#define udd_endpoint_in_set_bytecnt(ep_ctrl,n) (ep_ctrl- & gt; CNT = n)
#define udd_endpoint_set_azlp(ep_ctrl) (ep_ctrl- & gt; CNT |= 0x8000)
#define udd_endpoint_clear_azlp(ep_ctrl) (ep_ctrl- & gt; CNT & = ~0x8000)

#define udd_endpoint_set_buf(ep_ctrl,buf) (ep_ctrl- & gt; DATAPTR = (uint16_t) buf)

#define udd_endpoint_in_nb_sent(ep_ctrl) (ep_ctrl- & gt; AUXDATA)
#define udd_endpoint_in_reset_nb_sent(ep_ctrl) (ep_ctrl- & gt; AUXDATA = 0)
#define udd_endpoint_out_set_nbbyte(ep_ctrl,nb) (ep_ctrl- & gt; AUXDATA = nb)
#define udd_endpoint_out_get_nbbyte_requested(ep_ctrl) (ep_ctrl- & gt; AUXDATA)
#define udd_endpoint_set_aux(ep_ctrl,buf) (ep_ctrl- & gt; AUXDATA = (uint16_t) buf)
//! @}


//! @name USB Device endpoint control field management
//! @{

//! @name USB Device endpoint control setup field management
//! @{
#define udd_control_setup() (udd_sram.ep_ctrl[0].STATUS & USB_EP_SETUP_bm ? true : false)
#define udd_control_ack_setup() LACR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_SETUP_bm)
//! @}

//! @name USB Device endpoint control OUT field management
//! @{
#define udd_control_out_is_enable_stall() (udd_sram.ep_ctrl[0].CTRL & USB_EP_STALL_bm ? true : false)
#define udd_control_out_enable_stall() LASR16( & udd_sram.ep_ctrl[0].CTRL,USB_EP_STALL_bm)
#define udd_control_out_disable_stall() LACR16( & udd_sram.ep_ctrl[0].CTRL,USB_EP_STALL_bm)
#define udd_control_out_is_stalled() (udd_sram.ep_ctrl[0].STATUS & USB_EP_STALLF_bm ? true : false)
#define udd_control_out_ack_stall() LACR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_STALLF_bm)
#define udd_control_out_set_NACK0() LASR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_BUSNACK0_bm)
#define udd_control_out_clear_NACK0() LACR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_BUSNACK0_bm)

#define udd_control_out_overflow() (udd_sram.ep_ctrl[0].STATUS & USB_EP_OVF_bm ? true : false)
#define udd_control_ack_out_overflow() LACR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_OVF_bm)

#define udd_control_out_tc() (udd_sram.ep_ctrl[0].STATUS & USB_EP_TRNCOMPL0_bm ? true : false)
#define udd_control_out_ack_tc() LACR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_TRNCOMPL0_bm)
#define udd_control_out_set_tc() LASR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_TRNCOMPL0_bm)

#define udd_control_out_dt_get() (udd_sram.ep_ctrl[0].STATUS & USB_EP_TOGGLE_bm ? true : false)
#define udd_control_out_dt_set() LASR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_TOGGLE_bm )
#define udd_control_out_dt_clear() LACR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_TOGGLE_bm )
#define udd_control_out_dt_toggle() LATR16( & udd_sram.ep_ctrl[0].STATUS,USB_EP_TOGGLE_bm)

#define udd_control_out_set_buf(buf) (udd_sram.ep_ctrl[0].DATAPTR = (uint16_t) buf)

#define udd_control_out_get_bytecnt() (udd_sram.ep_ctrl[0].CNT)
//! @}

//! @name USB Device endpoint control IN field management
//! @{
#define udd_control_in_is_enable_stall() (udd_sram.ep_ctrl[1].CTRL & USB_EP_STALL_bm ? true : false)
#define udd_control_in_enable_stall() LASR16( & udd_sram.ep_ctrl[1].CTRL,USB_EP_STALL_bm)
#define udd_control_in_disable_stall() LACR16( & udd_sram.ep_ctrl[1].CTRL,USB_EP_STALL_bm)
#define udd_control_in_is_stalled() (udd_sram.ep_ctrl[1].STATUS & USB_EP_STALLF_bm ? true : false)
#define udd_control_in_ack_stall() LACR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_STALLF_bm)
#define udd_control_in_set_NACK0() LASR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_BUSNACK0_bm)
#define udd_control_in_clear_NACK0() LACR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_BUSNACK0_bm)

#define udd_control_in_underflow() (udd_sram.ep_ctrl[1].STATUS & USB_EP_UNF_bm ? true : false)
#define udd_control_ack_in_underflow() LACR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_UNF_bm)

#define udd_control_in_tc() (udd_sram.ep_ctrl[1].STATUS & USB_EP_TRNCOMPL0_bm ? true : false)
#define udd_control_in_ack_tc() LACR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_TRNCOMPL0_bm)
#define udd_control_in_set_tc() LASR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_TRNCOMPL0_bm)

#define udd_control_in_dt_get() (udd_sram.ep_ctrl[1].STATUS & USB_EP_TOGGLE_bm ? true : false)
#define udd_control_in_dt_set() LASR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_TOGGLE_bm )
#define udd_control_in_dt_clear() LACR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_TOGGLE_bm )
#define udd_control_in_dt_toggle() LATR16( & udd_sram.ep_ctrl[1].STATUS,USB_EP_TOGGLE_bm)

#define udd_control_in_set_buf(buf) (udd_sram.ep_ctrl[1].DATAPTR = (uint16_t) buf)

#define udd_control_in_set_bytecnt(n) (udd_sram.ep_ctrl[1].CNT = n)
//! @}
//! @}

//! @}

#endif // _USB_DEVICE_H_


Motofocuser.rar > nvm.c

/**
* \file
*
* \brief Non Volatile Memory controller driver
*
* Copyright (C) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#include " compiler.h "
#include " ccp.h "
#include " nvm.h "
#include & lt; string.h & gt;

/**
* \weakgroup nvm_signature_group
* @{
*/

/**
* \brief Read the device serial
*
* This function returns the device serial stored in the device.
*
* \note This function is modifying the NVM.CMD register.
* If the application are using program space access in interrupts
* (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts
* needs to be disabled when running EEPROM access functions. If not
* the program space reads will be corrupted.
*
* \retval storage Pointer to the structure where to store the device serial
*/
void nvm_read_device_serial(struct nvm_device_serial *storage)
{
storage- & gt; lotnum0 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(LOTNUM0));
storage- & gt; lotnum1 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(LOTNUM1));
storage- & gt; lotnum2 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(LOTNUM2));
storage- & gt; lotnum3 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(LOTNUM3));
storage- & gt; lotnum4 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(LOTNUM4));
storage- & gt; lotnum5 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(LOTNUM5));

storage- & gt; wafnum = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(WAFNUM));

storage- & gt; coordx0 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(COORDX0));
storage- & gt; coordx1 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(COORDX1));
storage- & gt; coordy0 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(COORDY0));
storage- & gt; coordy1 = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(COORDY1));
}

//! @}

/**
* \weakgroup nvm_eeprom_group
* @{
*/

/**
* \brief Read one byte from EEPROM using mapped access.
*
* This function reads one byte from EEPROM using mapped access.
*
* \param addr EEPROM address, between 0 and EEPROM_SIZE
*
* \return Byte value read from EEPROM.
*/
uint8_t nvm_eeprom_read_byte(eeprom_addr_t addr)
{
uint8_t data;
Assert(addr & lt; = EEPROM_SIZE);

/* Wait until NVM is ready */
nvm_wait_until_ready();
eeprom_enable_mapping();
data = *(uint8_t*)(addr + MAPPED_EEPROM_START),
eeprom_disable_mapping();
return data;
}

/**
* \brief Read buffer within the eeprom
*
* \param address the address to where to read
* \param buf pointer to the data
* \param len the number of bytes to read
*/
void nvm_eeprom_read_buffer(eeprom_addr_t address, void *buf, uint16_t len)
{
nvm_wait_until_ready();
eeprom_enable_mapping();
memcpy( buf,(void*)(address+MAPPED_EEPROM_START), len );
eeprom_disable_mapping();
}


/**
* \brief Write one byte to EEPROM using IO mapping.
*
* This function writes one byte to EEPROM using IO-mapped access.
* This function will cancel all ongoing EEPROM page buffer loading
* operations, if any.
*
* \param address EEPROM address (max EEPROM_SIZE)
* \param value Byte value to write to EEPROM.
*/
void nvm_eeprom_write_byte(eeprom_addr_t address, uint8_t value)
{
uint8_t old_cmd;

Assert(address & lt; = EEPROM_SIZE);
/* Flush buffer to make sure no unintentional data is written and load
* the " Page Load " command into the command register.
*/
old_cmd = NVM.CMD;
nvm_eeprom_flush_buffer();
// Wait until NVM is ready
nvm_wait_until_ready();
nvm_eeprom_load_byte_to_buffer(address, value);

// Set address to write to
NVM.ADDR2 = 0x00;
NVM.ADDR1 = (address & gt; & gt; 8) & 0xFF;
NVM.ADDR0 = address & 0xFF;

/* Issue EEPROM Atomic Write (Erase & Write) command. Load command, write
* the protection signature and execute command.
*/
NVM.CMD = NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc;
nvm_exec();
NVM.CMD = old_cmd;
}

/**
* \brief Write buffer within the eeprom
*
* \param address the address to where to write
* \param buf pointer to the data
* \param len the number of bytes to write
*/
void nvm_eeprom_erase_and_write_buffer(eeprom_addr_t address, const void *buf, uint16_t len)
{
while (len) {
if (((address%EEPROM_PAGE_SIZE)==0) & & (len & gt; =EEPROM_PAGE_SIZE)) {
// A full page can be written
nvm_eeprom_load_page_to_buffer((uint8_t*)buf);
nvm_eeprom_atomic_write_page(address/EEPROM_PAGE_SIZE);
address += EEPROM_PAGE_SIZE;
buf = (uint8_t*)buf + EEPROM_PAGE_SIZE;
len -= EEPROM_PAGE_SIZE;
} else {
nvm_eeprom_write_byte(address++, *(uint8_t*)buf);
buf = (uint8_t*)buf + 1;
len--;
}
}
}


/**
* \brief Flush temporary EEPROM page buffer.
*
* This function flushes the EEPROM page buffers. This function will cancel
* any ongoing EEPROM page buffer loading operations, if any.
* This function also works for memory mapped EEPROM access.
*
* \note An EEPROM write operations will automatically flush the buffer for you.
* \note The function does not preserve the value of the NVM.CMD register
*/
void nvm_eeprom_flush_buffer(void)
{
// Wait until NVM is ready
nvm_wait_until_ready();

// Flush EEPROM page buffer if necessary
if ((NVM.STATUS & NVM_EELOAD_bm) != 0) {
NVM.CMD = NVM_CMD_ERASE_EEPROM_BUFFER_gc;
nvm_exec();
}
}

/**
* \brief Load single byte into temporary page buffer.
*
* This function loads one byte into the temporary EEPROM page buffers.
* If memory mapped EEPROM is enabled, this function will not work.
* Make sure that the buffer is flushed before starting to load bytes.
* Also, if multiple bytes are loaded into the same location, they will
* be ANDed together, thus 0x55 and 0xAA will result in 0x00 in the buffer.
*
* \note Only one page buffer exist, thus only one page can be loaded with
* data and programmed into one page. If data needs to be written to
* different pages, the loading and writing needs to be repeated.
*
* \param byte_addr EEPROM Byte address, between 0 and EEPROM_PAGE_SIZE.
* \param value Byte value to write to buffer.
*/
void nvm_eeprom_load_byte_to_buffer(uint8_t byte_addr, uint8_t value)
{
// Wait until NVM is ready
nvm_wait_until_ready();

eeprom_enable_mapping();
*(uint8_t*)(byte_addr + MAPPED_EEPROM_START) = value;
eeprom_disable_mapping();
}


/**
* \brief Load entire page into temporary EEPROM page buffer.
*
* This function loads an entire EEPROM page from an SRAM buffer to
* the EEPROM page buffers. If memory mapped EEPROM is enabled, this
* function will not work. Make sure that the buffer is flushed before
* starting to load bytes.
*
* \note Only the lower part of the address is used to address the buffer.
* Therefore, no address parameter is needed. In the end, the data
* is written to the EEPROM page given by the address parameter to the
* EEPROM write page operation.
*
* \param values Pointer to SRAM buffer containing an entire page.
*/
void nvm_eeprom_load_page_to_buffer(const uint8_t *values)
{
// Wait until NVM is ready
nvm_wait_until_ready();

// Load multiple bytes into page buffer
uint8_t i;
for (i = 0; i & lt; EEPROM_PAGE_SIZE; ++i) {
nvm_eeprom_load_byte_to_buffer(i, *values);
++values;
}
}

/**
* \brief Erase and write bytes from page buffer into EEPROM.
*
* This function writes the contents of an already loaded EEPROM page
* buffer into EEPROM memory.
*
* As this is an atomic write, the page in EEPROM will be erased
* automatically before writing. Note that only the page buffer locations
* that have been loaded will be used when writing to EEPROM. Page buffer
* locations that have not been loaded will be left untouched in EEPROM.
*
* \param page_addr EEPROM Page address, between 0 and EEPROM_SIZE/EEPROM_PAGE_SIZE
*/
void nvm_eeprom_atomic_write_page(uint8_t page_addr)
{
// Wait until NVM is ready
nvm_wait_until_ready();

// Calculate page address
uint16_t address = (uint16_t)(page_addr * EEPROM_PAGE_SIZE);

Assert(address & lt; = EEPROM_SIZE);

// Set address
NVM.ADDR2 = 0x00;
NVM.ADDR1 = (address & gt; & gt; 8) & 0xFF;
NVM.ADDR0 = address & 0xFF;

// Issue EEPROM Atomic Write (Erase & Write) command
nvm_issue_command(NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc);
}

/**
* \brief Write (without erasing) EEPROM page.
*
* This function writes the contents of an already loaded EEPROM page
* buffer into EEPROM memory.
*
* As this is a split write, the page in EEPROM will _not_ be erased
* before writing.
*
* \param page_addr EEPROM Page address, between 0 and EEPROM_SIZE/EEPROM_PAGE_SIZE
*/
void nvm_eeprom_split_write_page(uint8_t page_addr)
{
// Wait until NVM is ready
nvm_wait_until_ready();

// Calculate page address
uint16_t address = (uint16_t)(page_addr * EEPROM_PAGE_SIZE);

Assert(address & lt; = EEPROM_SIZE);

// Set address
NVM.ADDR2 = 0x00;
NVM.ADDR1 = (address & gt; & gt; 8) & 0xFF;
NVM.ADDR0 = address & 0xFF;

// Issue EEPROM Split Write command
nvm_issue_command(NVM_CMD_WRITE_EEPROM_PAGE_gc);
}

/**
* \brief Fill temporary EEPROM page buffer with value.
*
* This fills the the EEPROM page buffers with a given value.
* If memory mapped EEPROM is enabled, this function will not work.
*
* \note Only the lower part of the address is used to address the buffer.
* Therefore, no address parameter is needed. In the end, the data
* is written to the EEPROM page given by the address parameter to the
* EEPROM write page operation.
*
* \param value Value to copy to the page buffer.
*/
void nvm_eeprom_fill_buffer_with_value(uint8_t value)
{
nvm_eeprom_flush_buffer();
// Wait until NVM is ready
nvm_wait_until_ready();
// Load multiple bytes into page buffer
uint8_t i;
for (i = 0; i & lt; EEPROM_PAGE_SIZE; ++i) {
nvm_eeprom_load_byte_to_buffer(i, value);
}
}

/**
* \brief Erase bytes from EEPROM page.
*
* This function erases bytes from one EEPROM page, so that every location
* written to in the page buffer reads 0xFF.
*
* \param page_addr EEPROM Page address, between 0 and EEPROM_SIZE/EEPROM_PAGE_SIZE
*/
void nvm_eeprom_erase_bytes_in_page(uint8_t page_addr)
{
// Wait until NVM is ready
nvm_wait_until_ready();

// Calculate page address
uint16_t address = (uint16_t)(page_addr * EEPROM_PAGE_SIZE);

Assert(address & lt; = EEPROM_SIZE);

// Set address
NVM.ADDR2 = 0x00;
NVM.ADDR1 = (address & gt; & gt; 8) & 0xFF;
NVM.ADDR0 = address & 0xFF;

// Issue EEPROM Erase command
nvm_issue_command(NVM_CMD_ERASE_EEPROM_PAGE_gc);
}

/**
* \brief Erase EEPROM page.
*
* This function erases one EEPROM page, so that every location reads 0xFF.
*
* \param page_addr EEPROM Page address, between 0 and EEPROM_SIZE/EEPROM_PAGE_SIZE
*/
void nvm_eeprom_erase_page(uint8_t page_addr)
{
// Mark all addresses to be deleted
nvm_eeprom_fill_buffer_with_value(0xff);
// Erase bytes
nvm_eeprom_erase_bytes_in_page(page_addr);
}


/**
* \brief Erase bytes from all EEPROM pages.
*
* This function erases bytes from all EEPROM pages, so that every location
* written to in the page buffer reads 0xFF.
*/
void nvm_eeprom_erase_bytes_in_all_pages(void)
{
// Wait until NVM is ready
nvm_wait_until_ready();

// Issue EEPROM Erase All command
nvm_issue_command(NVM_CMD_ERASE_EEPROM_gc);
}

/**
* \brief Erase entire EEPROM memory.
*
* This function erases the entire EEPROM memory block to 0xFF.
*/
void nvm_eeprom_erase_all(void)
{
// Mark all addresses to be deleted
nvm_eeprom_fill_buffer_with_value(0xff);
// Erase all pages
nvm_eeprom_erase_bytes_in_all_pages();
}

//! @}


//! @}


/**
* \weakgroup nvm_flash_group
* @{
*/

/**
* \brief Issue flash range CRC command
*
* This function sets the FLASH range CRC command in the NVM.CMD register.
* It then loads the start and end byte address of the part of FLASH to
* generate a CRC-32 for into the ADDR and DATA registers and finally performs
* the execute command.
*
* \note Should only be called from the CRC module. The function saves and
* restores the NVM.CMD register, but if this
* function is called from an interrupt, interrupts must be disabled
* before this function is called.
*
* \param start_addr end byte address
* \param end_addr start byte address
*/
void nvm_issue_flash_range_crc(flash_addr_t start_addr, flash_addr_t end_addr)
{
uint8_t old_cmd;
// Save current nvm command
old_cmd = NVM.CMD;

// Load the NVM CMD register with the Flash Range CRC command
NVM.CMD = NVM_CMD_FLASH_RANGE_CRC_gc;

// Load the start byte address in the NVM Address Register
NVM.ADDR0 = start_addr & 0xFF;
NVM.ADDR1 = (start_addr & gt; & gt; 8) & 0xFF;
#if (FLASH_SIZE & gt; = 0x10000UL)
NVM.ADDR2 = (start_addr & gt; & gt; 16) & 0xFF;
#endif

// Load the end byte address in NVM Data Register
NVM.DATA0 = end_addr & 0xFF;
NVM.DATA1 = (end_addr & gt; & gt; 8) & 0xFF;
#if (FLASH_SIZE & gt; = 0x10000UL)
NVM.DATA2 = (end_addr & gt; & gt; 16) & 0xFF;
#endif

// Execute command
ccp_write_io((uint8_t *) & NVM.CTRLA, NVM_CMDEX_bm);

// Restore command register
NVM.CMD = old_cmd;
}

/**
* \brief Read buffer within the application section
*
* \param address the address to where to read
* \param buf pointer to the data
* \param len the number of bytes to read
*/
void nvm_flash_read_buffer(flash_addr_t address, void *buf, uint16_t len)
{
#if (FLASH_SIZE & gt; 0x10000)
uint32_t opt_address = address;
#else
uint16_t opt_address = (uint16_t)address;
#endif
nvm_wait_until_ready();
while ( len ) {
*(uint8_t*)buf = nvm_flash_read_byte(opt_address);
buf=(uint8_t*)buf+1;
opt_address++;
len--;
}
}

/**
* \brief Read buffer within the user section
*
* \param address the address to where to read
* \param buf pointer to the data
* \param len the number of bytes to read
*/
void nvm_user_sig_read_buffer(flash_addr_t address, void *buf, uint16_t len)
{
uint16_t opt_address = (uint16_t)address & (FLASH_PAGE_SIZE-1);
while ( len ) {
*(uint8_t*)buf = nvm_read_user_signature_row(opt_address);
buf=(uint8_t*)buf+1;
opt_address++;
len--;
}
}

/**
* \brief Write specific parts of user flash section
*
* \param address the address to where to write
* \param buf pointer to the data
* \param len the number of bytes to write
* \param b_blank_check if True then the page flash is checked before write
* to run or not the erase page command.
*
* Set b_blank_check to false if all application flash is erased before.
*/
void nvm_user_sig_write_buffer(flash_addr_t address, const void *buf,
uint16_t len, bool b_blank_check)
{
uint16_t w_value;
uint16_t page_pos;
uint16_t opt_address = (uint16_t)address;
bool b_flag_erase = false;

while ( len ) {
for (page_pos=0; page_pos & lt; FLASH_PAGE_SIZE; page_pos+=2 ) {
if (b_blank_check) {
// Read flash to know if the erase command is mandatory
LSB(w_value) = nvm_read_user_signature_row(page_pos);
MSB(w_value) = nvm_read_user_signature_row(page_pos+1);
if (w_value!=0xFFFF) {
b_flag_erase = true; // The page is not empty
}
}else{
w_value = 0xFFFF;
}
// Update flash buffer
if (len) {
if (opt_address == page_pos) {
// The MSB of flash word must be changed
// because the address is even
len--;
opt_address++;
LSB(w_value)=*(uint8_t*)buf;
buf=(uint8_t*)buf+1;
}
}
if (len) {
if (opt_address == (page_pos+1)) {
// The LSB of flash word must be changed
// because the user buffer is not empty
len--;
opt_address++;
MSB(w_value)=*(uint8_t*)buf;
buf=(uint8_t*)buf+1;
}
}
// Load flash buffer
nvm_flash_load_word_to_buffer(page_pos,w_value);
}
}
// Write flash buffer
if (b_flag_erase) {
nvm_flash_erase_user_section();
}
nvm_flash_write_user_page();
}

/**
* \brief Erase and write specific parts of application flash section
*
* \param address the address to where to write
* \param buf pointer to the data
* \param len the number of bytes to write
* \param b_blank_check if True then the page flash is checked before write
* to run or not the erase page command.
*
* Set b_blank_check to false if all application flash is erased before.
*/
void nvm_flash_erase_and_write_buffer(flash_addr_t address, const void *buf,
uint16_t len, bool b_blank_check)
{
uint16_t w_value;
uint16_t page_pos;
bool b_flag_erase;
#if (FLASH_SIZE & gt; 0x10000)
uint32_t page_address;
uint32_t opt_address = address;
#else
uint16_t page_address;
uint16_t opt_address = (uint16_t)address;
#endif

// Compute the start of the page to be modified
page_address = opt_address-(opt_address%FLASH_PAGE_SIZE);

// For each page
while ( len ) {
b_flag_erase = false;

nvm_wait_until_ready();
for (page_pos=0; page_pos & lt; FLASH_PAGE_SIZE; page_pos+=2 ) {
if (b_blank_check) {
// Read flash to know if the erase command is mandatory
w_value = nvm_flash_read_word(page_address);
if (w_value!=0xFFFF) {
b_flag_erase = true; // The page is not empty
}
}else{
w_value = 0xFFFF;
}

// Update flash buffer
if (len) {
if (opt_address == page_address) {
// The MSB of flash word must be changed
// because the address is even
len--;
opt_address++;
LSB(w_value)=*(uint8_t*)buf;
buf=(uint8_t*)buf+1;
}
}
if (len) {
if (opt_address == (page_address+1)) {
// The LSB of flash word must be changed
// because the user buffer is not empty
len--;
opt_address++;
MSB(w_value)=*(uint8_t*)buf;
buf=(uint8_t*)buf+1;
}
}
// Load flash buffer
nvm_flash_load_word_to_buffer(page_address,w_value);
page_address+=2;
}

// Write flash buffer
if (b_flag_erase) {
nvm_flash_atomic_write_app_page(page_address-FLASH_PAGE_SIZE);
}else{
nvm_flash_split_write_app_page(page_address-FLASH_PAGE_SIZE);
}
}
}

//! @}

/**
* \weakgroup nvm_fuse_lock_group
* @{
*/

/**
* \brief Read a fuse byte.
*
* This function reads and returns the value of a given fuse byte.
*
* \param fuse Fuse byte to read.
*
* \return Byte value of fuse.
*/
uint8_t nvm_fuses_read(enum fuse_byte_t fuse)
{
// Wait until NVM is ready
nvm_wait_until_ready();

// Set address
NVM.ADDR0 = fuse;

// Issue READ_FUSES command
nvm_issue_command(NVM_CMD_READ_FUSES_gc);

return NVM.DATA0;
}

//! @}


Motofocuser.rar > nvm.h

/**
* \file
*
* \brief Non Volatile Memory controller driver
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef NVM_H
#define NVM_H

#include & lt; compiler.h & gt;
#include & lt; ccp.h & gt;

#ifdef __cplusplus
extern " C " {
#endif

/**
* \defgroup nvm_group NVM driver
*
* See \ref xmega_nvm_quickstart
*
* \brief Low-level driver implementation for the AVR XMEGA Non Volatile
* Memory Controller (NVM).
*
* The XMEGA NVM controller interfaces the internal non-volatile memories
* in the XMEGA devices. Program memory, EEPROM and signature row is can be
* interfaced by the module. See the documentation of each sub-module for
* more information.
*
* \note If using GCC and the flash sub-module, remember to configure
* the boot section in the make file. More information in the sub-module
* documentation.
*
* \section xmega_nvm_quickstart_section Quick Start Guide
* See \ref xmega_nvm_quickstart
*/

/**
* \defgroup nvm_generic_group NVM driver generic module handling
* \ingroup nvm_group
* \brief Support functions for the NVM driver.
*
* These functions are helper functions for the functions of the
* \ref nvm_group " NVM driver " .
*
* @{
*/

/**
* \brief Wait for any NVM access to finish.
*
* This function is blocking and waits for any NVM access to finish.
* Use this function before any NVM accesses, if you are not certain that
* any previous operations are finished yet.
*/
static inline void nvm_wait_until_ready( void )
{
do {
// Block execution while waiting for the NVM to be ready
} while ((NVM.STATUS & NVM_NVMBUSY_bm) == NVM_NVMBUSY_bm);
}

/**
* \brief Non-Volatile Memory Execute Command
*
* This function sets the CCP register before setting the CMDEX bit in the
* NVM.CTRLA register.
*
* \note The correct NVM command must be set in the NVM.CMD register before
* calling this function.
*/
static inline void nvm_exec(void)
{
ccp_write_io((uint8_t *) & NVM.CTRLA, NVM_CMDEX_bm);
}

/**
* \brief Non-Volatile Memory Execute Specific Command
*
* This function sets a command in the NVM.CMD register, then performs an
* execute command by writing the CMDEX bit to the NVM.CTRLA register.
*
* \note The function saves and restores the NVM.CMD register, but if this
* function is called from an interrupt, interrupts must be disabled
* before this function is called.
*
* \param nvm_command NVM Command to execute.
*/
static inline void nvm_issue_command(NVM_CMD_t nvm_command)
{
uint8_t old_cmd;

old_cmd = NVM.CMD;
NVM.CMD = nvm_command;
ccp_write_io((uint8_t *) & NVM.CTRLA, NVM_CMDEX_bm);
NVM.CMD = old_cmd;
}

/**
* \brief Read one byte using the LDI instruction
* \internal
*
* This function sets the specified NVM_CMD, reads one byte using at the
* specified byte address with the LPM instruction. NVM_CMD is restored after
* use.
*
* \note Interrupts should be disabled before running this function
* if program memory/NVM controller is accessed from ISRs.
*
* \param nvm_cmd NVM command to load before running LPM
* \param address Byte offset into the signature row
*/
uint8_t nvm_read_byte(uint8_t nvm_cmd, uint16_t address);


/**
* \brief Perform SPM write
* \internal
*
* This function sets the specified NVM_CMD, sets CCP and then runs the SPM
* instruction to write to flash.
*
* \note Interrupts should be disabled before running this function
* if program memory/NVM controller is accessed from ISRs.
*
* \param addr Address to perform the SPM on.
* \param nvm_cmd NVM command to use in the NVM_CMD register
*/
void nvm_common_spm(uint32_t addr, uint8_t nvm_cmd);

//! @}

/**
* \defgroup nvm_signature_group NVM driver signature handling
* \ingroup nvm_group
* \brief Handling of signature rows
*
* Functions for handling signature rows. The following is supported:
* - Reading values from production and user signature row
* - Reading device id
* - Reading device revision
* - Reading device serial
*
* \note Some of these functions are modifying the NVM.CMD register.
* If the application are using program space access in interrupts
* (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts
* needs to be disabled when running EEPROM access functions. If not,
* the program space reads will be corrupted. See documentation for
* each individual function.
* \note Do not use the functions of this module in an interrupt service
* routine (ISR), since the functions can take several milliseconds to
* complete and hence block the interrupt for several milliseconds.
* In addition the functions of this module are modifying the page buffer
* which will corrupt any ongoing EEPROM handing used outside an ISR.
* @{
*/

/**
* \brief Structure containing the device ID
*
* This structure can be used to store the device ID of a device.
*/
struct nvm_device_id {
union {
struct {
uint8_t devid0;
uint8_t devid1;
uint8_t devid2;
};
uint8_t byte[3];
};
};

/**
* \brief Structure containing the device serial
*
* This structure can be used to store the serial number of a device.
*/
struct nvm_device_serial {
union {
struct {
uint8_t lotnum0;
uint8_t lotnum1;
uint8_t lotnum2;
uint8_t lotnum3;
uint8_t lotnum4;
uint8_t lotnum5;
uint8_t wafnum;
uint8_t coordx0;
uint8_t coordx1;
uint8_t coordy0;
uint8_t coordy1;
};
uint8_t byte[11];
};
};

/**
* \brief Get offset of calibration bytes in the production signature row
*
* \param regname Name of register within the production signature row
* \retval Offset of register into the production signature row
*/
#if defined(__GNUC__)
# define nvm_get_production_signature_row_offset(regname) \
offsetof(NVM_PROD_SIGNATURES_t, regname)
#elif defined(__ICCAVR__)
# define nvm_get_production_signature_row_offset(regname) (regname##_offset)
#else
# error Unknown compiler
#endif


/**
* \brief Read one byte from the production signature row
*
* This function reads one byte from the production signature row of the device
* at the given address.
*
* \note This function is modifying the NVM.CMD register.
* If the application are using program space access in interrupts
* (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts
* needs to be disabled when running EEPROM access functions. If not
* the program space reads will be corrupted.
*
* \param address Byte offset into the signature row
*/
static inline uint8_t nvm_read_production_signature_row(uint8_t address)
{
return nvm_read_byte(NVM_CMD_READ_CALIB_ROW_gc, address);
}

/**
* \brief Read one byte from the user signature row
*
* This function reads one byte from the user signature row of the device
* at the given address.
*
* \note This function is modifying the NVM.CMD register.
* If the application are using program space access in interrupts
* (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts
* needs to be disabled when running EEPROM access functions. If not
* the program space reads will be corrupted.
*
* \param address Byte offset into the signature row
*/
static inline uint8_t nvm_read_user_signature_row(uint16_t address)
{
return nvm_read_byte(NVM_CMD_READ_USER_SIG_ROW_gc, address);
}

/**
* \brief Read the device id
*
* This function returns the device ID stored in the device.
*
* \retval storage Pointer to the structure where to store the device id
*/
static inline void nvm_read_device_id(struct nvm_device_id *storage)
{
storage- & gt; devid0 = MCU.DEVID0;
storage- & gt; devid1 = MCU.DEVID1;
storage- & gt; devid2 = MCU.DEVID2;
}

/**
* \brief Read the device revision
*
* This function returns the device revision stored in the device.
*
* \retval unsigned 8 bit value with the current device revision.
*/
static inline uint8_t nvm_read_device_rev(void)
{
return MCU.REVID;
}

void nvm_read_device_serial(struct nvm_device_serial *storage);

//! @}


/**
* \defgroup nvm_eeprom_group NVM driver EEPROM handling
* \ingroup nvm_group
* \brief Functions for handling internal EEPROM memory.
*
* The internal EEPROM can be used to store data that will persist after
* power is removed. This can typically be used to store calibration data,
* application state, encryption keys or other data that need to be preserved
* when power is removed.
*
* The functions in this module uses IO register access to manipulate the
* EEPROM.
*
* \note The functions in this module are modifying the NVM.CMD register.
* If the application are using program space access in interrupts
* (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts
* needs to be disabled when running EEPROM access functions. If not
* the program space reads will be corrupted.
* @{
*/

#ifndef EEPROM_PAGE_SIZE
# if XMEGA_A || XMEGA_AU || XMEGA_B || XMEGA_C || XMEGA_D || XMEGA_E
# define EEPROM_PAGE_SIZE 32
# else
# error Unknown EEPROM page size
# endif
#endif

#ifndef CONFIG_NVM_IGNORE_XMEGA_A3_D3_REVB_ERRATA
# if XMEGA_A3 || XMEGA_D3
# error This NVM driver does not support rev B of XMEGA A3/D3 devices. \
Set CONFIG_NVM_IGNORE_XMEGA_A3_D3_REVB_ERRATA to disable this message
# endif
#endif

/**
* Data type for holding eeprom memory addresses.
*/
typedef uint16_t eeprom_addr_t;


/*! \brief Enable EEPROM mapping into data space.
*
* This macro enables mapping of EEPROM into data space.
* EEPROM starts at EEPROM_START in data memory. Read access
* can be done similar to ordinary SRAM access.
*
* \note This disables IO-mapped access to EEPROM, although page erase and
* write operations still needs to be done through IO register.
*/
static inline void eeprom_enable_mapping(void)
{
#if !XMEGA_E
NVM_CTRLB = NVM_CTRLB | NVM_EEMAPEN_bm;
#endif
}


/*! \brief Disable EEPROM mapping into data space.
*
* This macro disables mapping of EEPROM into data space.
* IO mapped access is now enabled.
*/
static inline void eeprom_disable_mapping(void)
{
#if !XMEGA_E
NVM_CTRLB = NVM_CTRLB & ~NVM_EEMAPEN_bm;
#endif
}


uint8_t nvm_eeprom_read_byte(eeprom_addr_t addr);
void nvm_eeprom_write_byte(eeprom_addr_t address, uint8_t value);
void nvm_eeprom_read_buffer(eeprom_addr_t address, void *buf, uint16_t len);
void nvm_eeprom_erase_and_write_buffer(eeprom_addr_t address, const void *buf, uint16_t len);

void nvm_eeprom_flush_buffer(void);
void nvm_eeprom_load_byte_to_buffer(uint8_t byte_addr, uint8_t value);
void nvm_eeprom_load_page_to_buffer(const uint8_t *values);
void nvm_eeprom_atomic_write_page(uint8_t page_addr);
void nvm_eeprom_split_write_page(uint8_t page_addr);
void nvm_eeprom_fill_buffer_with_value(uint8_t value);
void nvm_eeprom_erase_bytes_in_page(uint8_t page_addr);
void nvm_eeprom_erase_page(uint8_t page_addr);
void nvm_eeprom_erase_bytes_in_all_pages(void);
void nvm_eeprom_erase_all(void);

//! @}

/**
* \defgroup nvm_flash_group NVM driver flash handling
* \ingroup nvm_group
* \brief Functions for handling internal flash memory.
*
* The internal flash memory on the XMEGA devices consists of the application
* section, the application table section and the bootloader section.
* All these sections can store program code for the MCU, but if there is
* available space, they can be used for storing other persistent data.
*
* Writing the flash memory can only be done one page at a time. It consists
* of loading the data to the internal page buffer and then running one of
* the write commands. If the page has not been erased before writing, the
* data will not be written correctly.
*
* In order to be able to write to flash memory the programming commands need
* to be run from the boot section.
* - When using IAR this is handled automatically by the linker script.
* - When using GCC this needs to be specified manually in the make files. For
* example the ATxmega128A1 has the boot section at the word address 0x10000
* the corresponding byte address of 0x20000 needs to be added to the
* config.mk makefile:
* LDFLAGS += -Wl,--section-start=.BOOT=0x20000
* See the device datasheet for the correct address for other devices.
*
* \note If using GCC and the flash sub-module, remember to configure
* the boot section in the make file.
*
* \note The functions in this module are modifying the NVM.CMD register.
* If the application are using program space access in interrupts
* (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts
* needs to be disabled when running EEPROM access functions. If not
* the program space reads will be corrupted.
* @{
*/

/**
* \brief Size of a flash page in bytes
*
* The page size in bytes taken from the toolchain header files.
*
* \note Page size is currently missing from the IAR header files, so it needs
* to be defined in the driver until it is fixed.
*/
#ifdef __DOXYGEN__
# define FLASH_SIZE
# define FLASH_PAGE_SIZE
#else

// 8K devices
# if AVR8_PART_IS_DEFINED(ATxmega8E5)
# define FLASH_SIZE (8*1024L)
# define FLASH_PAGE_SIZE (128)

// 16K devices
# elif AVR8_PART_IS_DEFINED(ATxmega16A4) | \
AVR8_PART_IS_DEFINED(ATxmega16A4U) | \
AVR8_PART_IS_DEFINED(ATxmega16D4) | \
AVR8_PART_IS_DEFINED(ATxmega16C4)
# define FLASH_SIZE (16*1024L)
# define FLASH_PAGE_SIZE (256)

# elif AVR8_PART_IS_DEFINED(ATxmega16E5)
# define FLASH_SIZE (16*1024L)
# define FLASH_PAGE_SIZE (128)

// 32K devices
# elif AVR8_PART_IS_DEFINED(ATxmega32A4) | \
AVR8_PART_IS_DEFINED(ATxmega32A4U) | \
AVR8_PART_IS_DEFINED(ATxmega32D4) | \
AVR8_PART_IS_DEFINED(ATxmega32C4)
# define FLASH_SIZE (32*1024L)
# define FLASH_PAGE_SIZE (256)

# elif AVR8_PART_IS_DEFINED(ATxmega32E5)
# define FLASH_SIZE (32*1024L)
# define FLASH_PAGE_SIZE (128)

// 64K devices
# elif AVR8_PART_IS_DEFINED(ATxmega64A1) | \
AVR8_PART_IS_DEFINED(ATxmega64A1U) | \
AVR8_PART_IS_DEFINED(ATxmega64A3) | \
AVR8_PART_IS_DEFINED(ATxmega64A3U) | \
AVR8_PART_IS_DEFINED(ATxmega64A4U) | \
AVR8_PART_IS_DEFINED(ATxmega64B1) | \
AVR8_PART_IS_DEFINED(ATxmega64B3) | \
AVR8_PART_IS_DEFINED(ATxmega64C3) | \
AVR8_PART_IS_DEFINED(ATxmega64D3) | \
AVR8_PART_IS_DEFINED(ATxmega64D4)
# define FLASH_SIZE (64*1024L)
# define FLASH_PAGE_SIZE (256)

// 128K devices
# elif AVR8_PART_IS_DEFINED(ATxmega128A1) | \
AVR8_PART_IS_DEFINED(ATxmega128A1U) | \
AVR8_PART_IS_DEFINED(ATxmega128A3) | \
AVR8_PART_IS_DEFINED(ATxmega128A3U) | \
AVR8_PART_IS_DEFINED(ATxmega128C3) | \
AVR8_PART_IS_DEFINED(ATxmega128D3) | \
AVR8_PART_IS_DEFINED(ATxmega128D4)
# define FLASH_SIZE (128*1024L)
# define FLASH_PAGE_SIZE (512)

# elif AVR8_PART_IS_DEFINED(ATxmega128A4U) | \
AVR8_PART_IS_DEFINED(ATxmega128B1) | \
AVR8_PART_IS_DEFINED(ATxmega128B3)
# define FLASH_SIZE (128*1024L)
# define FLASH_PAGE_SIZE (256)

// 192K devices
# elif AVR8_PART_IS_DEFINED(ATxmega192A3U) | \
AVR8_PART_IS_DEFINED(ATxmega192C3) | \
AVR8_PART_IS_DEFINED(ATxmega192D3)
# define FLASH_SIZE (192*1024L)
# define FLASH_PAGE_SIZE (512)

// 256K devices
# elif AVR8_PART_IS_DEFINED(ATxmega256A3) | \
AVR8_PART_IS_DEFINED(ATxmega256A3U) | \
AVR8_PART_IS_DEFINED(ATxmega256A3B) | \
AVR8_PART_IS_DEFINED(ATxmega256A3BU) | \
AVR8_PART_IS_DEFINED(ATxmega256C3) | \
AVR8_PART_IS_DEFINED(ATxmega256D3)
# define FLASH_SIZE (256*1024L)
# define FLASH_PAGE_SIZE (512)

// 384K devices
# elif AVR8_PART_IS_DEFINED(ATxmega384C3)
# define FLASH_SIZE (384*1024L)
# define FLASH_PAGE_SIZE (512)
# elif AVR8_PART_IS_DEFINED(ATxmega384D3)
# define FLASH_SIZE (384*1024L)
# define FLASH_PAGE_SIZE (512)
# else
# error Flash page size needs to be defined.
# endif
#endif

/**
* Data type for holding flash memory addresses.
*
*/
#if (FLASH_SIZE & gt; = 0x10000UL) // Note: Xmega with 64KB of flash have 4KB boot flash
typedef uint32_t flash_addr_t;
#else
typedef uint16_t flash_addr_t;
#endif

/**
* Flash pointer type to use for accessing flash memory with IAR
*/
#if (FLASH_SIZE & gt; = 0x10000UL) // Note: Xmega with 64KB of flash have 4KB boot flash
# define IAR_FLASH_PTR __farflash
#else
# define IAR_FLASH_PTR __flash
#endif

/**
* \brief Load byte from flash memory
*
* Load one word of flash using byte addressing. IAR has __flash pointers
* and GCC have pgm_read_byte_xx functions which load data from flash memory.
* This function used for compatibility between the compilers.
*
* \param addr Byte address to load
* \return Byte from program memory
*/
static inline uint8_t nvm_flash_read_byte(flash_addr_t addr)
{
#if defined(__GNUC__)
return pgm_read_byte_far(addr);
#elif defined(__ICCAVR__)
uint8_t IAR_FLASH_PTR *flashptr = (uint8_t IAR_FLASH_PTR *)addr;
return *flashptr;
#else
# error Unknown compiler
#endif
}

/**
* \brief Load word from flash memory
*
* Load one word of flash using byte addressing. IAR has __flash pointers
* and GCC have pgm_read_byte_xx functions which load data from flash memory.
* This function used for compatibility between the compilers.
*
* \param addr Byte address to load (last bit is ignored)
* \return Word from program memory
*/
static inline uint16_t nvm_flash_read_word(flash_addr_t addr)
{
#if defined(__GNUC__)
return pgm_read_word_far(addr);
#elif defined(__ICCAVR__)
uint16_t IAR_FLASH_PTR *flashptr = (uint16_t IAR_FLASH_PTR *)addr;
return *flashptr;
#endif
}


/**
* \brief Flush flash page buffer
*
* Clear the NVM controller page buffer for flash. This needs to be called
* before using \ref nvm_flash_load_word_to_buffer if it has not already been
* cleared.
*
*/
static inline void nvm_flash_flush_buffer(void)
{
nvm_wait_until_ready();
nvm_common_spm(0, NVM_CMD_ERASE_FLASH_BUFFER_gc);
}


/**
* \brief Load word into flash page buffer
*
* Clear the NVM controller page buffer for flash. This needs to be called
* before using \ref nvm_flash_load_word_to_buffer if it has not already been
* cleared.
*
* \param word_addr Address to store data. The upper bits beyond the page size
* is ignored. \ref FLASH_PAGE_SIZE
* \param data Data word to load into the page buffer
*/
void nvm_flash_load_word_to_buffer(uint32_t word_addr, uint16_t data);


/**
* \brief Erase entire application section
*
* Erase all of the application section.
*/
static inline void nvm_flash_erase_app(void)
{
nvm_wait_until_ready();
nvm_common_spm(0, NVM_CMD_ERASE_APP_gc);
}

/**
* \brief Erase a page within the application section
*
* Erase one page within the application section
*
* \param page_addr Byte address to the page to delete
*/
static inline void nvm_flash_erase_app_page(flash_addr_t page_addr)
{
nvm_wait_until_ready();
nvm_common_spm(page_addr, NVM_CMD_ERASE_APP_PAGE_gc);
}

/**
* \brief Write a page within the application section
*
* Write a page within the application section with the data stored in the
* page buffer. The page needs to be erased before the write to avoid
* corruption of the data written.
*
* \param page_addr Byte address to the page to delete
*/
static inline void nvm_flash_split_write_app_page(flash_addr_t page_addr)
{
nvm_wait_until_ready();
nvm_common_spm(page_addr, NVM_CMD_WRITE_APP_PAGE_gc);
}

/**
* \brief Erase and write a page within the application section
*
* Erase and the write a page within the application section with the data
* stored in the page buffer. Erase and write is done in an atomic operation.
*
* \param page_addr Byte address to the page to delete
*/
static inline void nvm_flash_atomic_write_app_page(flash_addr_t page_addr)
{
nvm_wait_until_ready();
nvm_common_spm(page_addr, NVM_CMD_ERASE_WRITE_APP_PAGE_gc);
}

void nvm_issue_flash_range_crc(flash_addr_t start_addr, flash_addr_t end_addr);

void nvm_flash_read_buffer(flash_addr_t address, void *buf, uint16_t len);

void nvm_flash_erase_and_write_buffer(flash_addr_t address, const void *buf,
uint16_t len, bool b_blank_check);

/**
* \brief Erase a page within the boot section
*
* Erase one page within the boot section
*
* \param page_addr Byte address to the page to delete
*/
static inline void nvm_flash_erase_boot_page(flash_addr_t page_addr)
{
nvm_wait_until_ready();
nvm_common_spm(page_addr, NVM_CMD_ERASE_BOOT_PAGE_gc);
}

/**
* \brief Write a page within the boot section
*
* Write a page within the boot section with the data stored in the
* page buffer. The page needs to be erased before the write to avoid
* corruption of the data written.
*
* \param page_addr Byte address to the page to delete
*/
static inline void nvm_flash_split_write_boot_page(flash_addr_t page_addr)
{
nvm_wait_until_ready();
nvm_common_spm(page_addr, NVM_CMD_WRITE_BOOT_PAGE_gc);
}

/**
* \brief Erase and write a page within the boot section
*
* Erase and the write a page within the boot section with the data
* stored in the page buffer. Erase and write is done in an atomic operation.
*
* \param page_addr Byte address to the page to delete
*/
static inline void nvm_flash_atomic_write_boot_page(flash_addr_t page_addr)
{
nvm_wait_until_ready();
nvm_common_spm(page_addr, NVM_CMD_ERASE_WRITE_BOOT_PAGE_gc);
}

void nvm_user_sig_read_buffer(flash_addr_t address, void *buf, uint16_t len);
void nvm_user_sig_write_buffer(flash_addr_t address, const void *buf,
uint16_t len, bool b_blank_check);

/**
* \brief Erase the user calibration section page
*
* Erase the user calibration section page. There is only one page, so no
* parameters are needed.
*/
static inline void nvm_flash_erase_user_section(void)
{
nvm_wait_until_ready();
nvm_common_spm(0, NVM_CMD_ERASE_USER_SIG_ROW_gc);
}

/**
* \brief Write the user calibration section page
*
* Write a the user calibration section page with the data stored in the
* page buffer. The page needs to be erased before the write to avoid
* corruption of the data written. There is only one page, so no
* parameters are needed.
*/
static inline void nvm_flash_write_user_page(void)
{
nvm_wait_until_ready();
nvm_common_spm(0, NVM_CMD_WRITE_USER_SIG_ROW_gc);
}

//! @}

/**
* \defgroup nvm_fuse_lock_group NVM driver fuse and lock bits handling
* \ingroup nvm_group
* \brief Functions for reading fuses and writing lock bits.
*
* The Fuses are used to set important system functions and can only be written
* from an external programming interface. The application software can read
* the fuses. The fuses are used to configure reset sources such as Brown-out
* Detector and Watchdog, Start-up configuration, JTAG enable and JTAG user ID.
*
* The Lock bits are used to set protection level on the different flash
* sections. They are used to block read and/or write on the different flash
* sections. Lock bits can be written from en external programmer and from the
* application software to set a more strict protection level, but not to set a
* less strict protection level. Chip erase is the only way to erase the lock
* bits. The lock bits are erased after the rest of the flash memory is erased.
* An unprogrammed fuse or lock bit will have the value one, while a programmed
* fuse or lock bit will have the value zero.
* Both fuses and lock bits are reprogrammable like the Flash Program memory.
*
* \note The functions in this module are modifying the NVM.CMD register.
* If the application are using program space access in interrupts
* (__flash pointers in IAR EW or pgm_read_byte in GCC) interrupts
* needs to be disabled when running EEPROM access functions. If not
* the program space reads will be corrupted.
* @{
*/

// The different fuse bytes
enum fuse_byte_t {
FUSEBYTE0 = 0,
FUSEBYTE1 = 1,
FUSEBYTE2 = 2,
FUSEBYTE3 = 3, // not used on current devices
FUSEBYTE4 = 4,
FUSEBYTE5 = 5,
};

uint8_t nvm_fuses_read(enum fuse_byte_t fuse);

/**
* \brief Program the lock bits.
*
* Program the lock bits to the given values. Lock bits can only be programmed
* to a more secure setting than previously programmed. To clear lock bits, a
* flash erase has to be issued.
*
* \param blbb_lock Boot loader section lock bits to program
* \param blba_lock Application section lock bits to program
* \param blbat_lock Application table section lock bits to program
* \param lb_lock Flash/eeprom lock bits to program
*/
static inline void nvm_lock_bits_write(enum NVM_BLBB_enum blbb_lock,
enum NVM_BLBA_enum blba_lock, enum NVM_BLBAT_enum blbat_lock,
enum NVM_LB_enum lb_lock)
{
nvm_wait_until_ready();
NVM.DATA0 = (uint8_t)blbb_lock | (uint8_t)blba_lock | (uint8_t)blbat_lock |
(uint8_t)lb_lock;
nvm_issue_command(NVM_CMD_WRITE_LOCK_BITS_gc);
}

/**
* \brief Program the BLBB lock bits.
*
* Program the lock bits for the boot loader section (BLBB). Other lock bits
* (BLBA, BLBAT and LB) are not altered (ie. programmed to NOLOCK).
*
* \param blbb_lock Boot loader section lock bits to program
*/
static inline void nvm_blbb_lock_bits_write(enum NVM_BLBB_enum blbb_lock)
{
nvm_lock_bits_write(blbb_lock, NVM_BLBA_NOLOCK_gc, NVM_BLBAT_NOLOCK_gc,
NVM_LB_NOLOCK_gc);
}

/**
* \brief Program the BLBA lock bits.
*
* Program the lock bits for the application section (BLBA). Other lock bits
* (BLBB, BLBAT and LB) are not altered (ie. programmed to NOLOCK).
*
* \param blba_lock Application section lock bits to program
*/
static inline void nvm_blba_lock_bits_write(enum NVM_BLBA_enum blba_lock)
{
nvm_lock_bits_write(NVM_BLBB_NOLOCK_gc, blba_lock, NVM_BLBAT_NOLOCK_gc,
NVM_LB_NOLOCK_gc);
}

/**
* \brief Program the BLBAT lock bits.
*
* Program the lock bits for the application table section (BLBAT). Other lock
* bits (BLBB, BLBA and LB) are not altered (ie. programmed to NOLOCK).
*
* \param blbat_lock Application table section lock bits to program
*/
static inline void nvm_blbat_lock_bits_write(enum NVM_BLBAT_enum blbat_lock)
{
nvm_lock_bits_write(NVM_BLBB_NOLOCK_gc, NVM_BLBA_NOLOCK_gc, blbat_lock,
NVM_LB_NOLOCK_gc);
}

/**
* \brief Program the LB lock bits.
*
* Program the lock bits for the flash and eeprom (LB). Other lock bits
* (BLBB, BLBA and BLBAT) are not altered (ie. programmed to NOLOCK).
*
* \param lb_lock Flash/eeprom lock bits to program
*/
static inline void nvm_lb_lock_bits_write(enum NVM_LB_enum lb_lock)
{
nvm_lock_bits_write(NVM_BLBB_NOLOCK_gc, NVM_BLBA_NOLOCK_gc,
NVM_BLBAT_NOLOCK_gc, lb_lock);
}

//! @}

/**
* \page xmega_nvm_quickstart Quick Start Guide for the XMEGA NVM Driver
*
* This is the quick start guide for the \ref nvm_group " NVM Driver " , with
* step-by-step instructions on how to configure and use the driver for
* specific use cases.
*
* The section described below can be compiled into e.g. the main application
* loop or any other function that will need to interface non-volatile memory.
*
* \section xmega_nvm_quickstart_basic Basic usage of the NVM driver
* This section will present three use cases of the NVM driver. The first will
* write a page to EEPROM and verify that it has been written, the second will
* access the BOD-level fuse to verify that the level is correctly set, and the
* third will read a chunk from the user signature row.
*
* \section xmega_nvm_quickstart_eeprom_case Use case 1: EEPROM
*
* The NVM driver has functions for interfacing many types of non-volatile
* memory, including flash, EEPROM, fuses and lock bits. The example code
* below will write a page to the internal EEPROM, and read it back to verify,
* using memory mapped I/O.
*
* \section xmega_nvm_quickstart_eeprom_case_setup_steps Setup steps
* There are no setup steps required for this use case.
*
* \subsection nvm_quickstart_eeprom_case_example_code Example code
*
* \code
#define EXAMPLE_PAGE 2
#define EXAMPLE_ADDR EXAMPLE_PAGE * EEPROM_PAGE_SIZE

uint8_t write_page[EEPROM_PAGE_SIZE];
uint8_t read_page[EEPROM_PAGE_SIZE];

fill_page_with_known_data(write_page);
fill_page_with_zeroes(read_page);

nvm_eeprom_load_page_to_buffer(write_page);
nvm_eeprom_atomic_write_page(EXAMPLE_PAGE);

nvm_eeprom_read_buffer(EXAMPLE_ADDR,
read_page, EEPROM_PAGE_SIZE);

check_if_pages_are_equal(write_page, read_page);
\endcode
*
* \subsection nvm_quickstart_eeprom_case_workflow Workflow
*
* -# We define where we would like to store our data, and we arbitrarily
* choose page 2 of EEPROM:
* - \code
#define EXAMPLE_PAGE 2
#define EXAMPLE_ADDR EXAMPLE_PAGE * EEPROM_PAGE_SIZE
\endcode
* -# Define two tables, one which contains the data which we will write,
* and one which we will read the data into:
* - \code
uint8_t write_page[EEPROM_PAGE_SIZE];
uint8_t read_page[EEPROM_PAGE_SIZE];
\endcode
* -# Fill the tables with our data, and zero out the read table:
* - \code
fill_page_with_known_data(write_page);
fill_page_with_zeroes(read_page);
\endcode
* - \note These functions are undeclared, you should replace them with
* your own appropriate functions.
* -# We load our page into a temporary EEPROM page buffer:
* - \code
nvm_eeprom_load_page_to_buffer(write_page);
\endcode
* - \attention The function used above will not work if memory mapping
* is enabled.
* -# Do an atomic write of the page from buffer into the specified page:
* - \code
nvm_eeprom_atomic_write_page(EXAMPLE_PAGE);
\endcode
* - \note The function \ref nvm_eeprom_atomic_write_page() erases the
* page before writing the new one. For non-atomic (split)
* writing without deleting, see \ref nvm_eeprom_split_write_page()
* -# Read the page back into our read_page[] table:
* - \code
nvm_eeprom_read_buffer(EXAMPLE_ADDR,
read_page, EEPROM_PAGE_SIZE);
\endcode
* -# Verify that the page is equal to the one that was written earlier:
* - \code
check_if_pages_are_equal(write_page, read_page);
\endcode
* - \note This function is not declared, you should replace it with your
* own appropriate function.
*
* \section xmega_nvm_quickstart_fuse_case Use case 2: Fuses
*
* The NVM driver has functions for reading fuses.
* See \ref nvm_fuse_lock_group.
*
* We would like to check whether the Brown-out Detection level is set to
* 2.1V. This is set by programming the fuses when the chip is connected
* to a suitable programmer. The fuse is a part of FUSEBYTE5. If the BODLVL
* is correct, we turn on LED0.
*
* \section xmega_nvm_quickstart_fuse_case_setup_steps Setup steps
* There are no setup steps required for this use case.
*
* \subsection nvm_quickstart_fuse_case_example_code Example code
* \code
uint8_t fuse_value;
fuse_value = nvm_fuses_read(FUSEBYTE5);

if ((fuse_value & NVM_FUSES_BODLVL_gm) == BODLVL_2V1_gc) {
gpio_set_pin_low(LED0_GPIO);
}
\endcode
*
* \subsection nvm_quickstart_fuse_case_workflow Workflow
*
* -# Create a variable to store the fuse contents:
* - \code
uint8_t fuse_value;
\endcode
* -# The fuse value we are interested in, BODLVL, is stored in FUSEBYTE5.
* We call the function \ref nvm_fuses_read() to read the fuse into our
* variable:
* - \code
fuse_value = nvm_fuses_read(FUSEBYTE5);
\endcode
* -# This ends the reading portion, but we would like to see whether the
* BOD-level is correct, and if it is, light up an LED:
* - \code
if ((fuse_value & NVM_FUSES_BODLVL_gm) == BODLVL_2V1_gc) {
gpio_set_pin_low(LED0_GPIO);
}
\endcode
*
* \section xmega_nvm_quickstart_signature_case Use case 3: Signature row
*
* The NVM driver has functions for reading the signature row of the device.
* Here we will simply read 16 bytes from the user signature row, assuming
* we need what is stored there.
*
* \section xmega_nvm_quickstart_signature_row_setup_steps Setup steps
* There are no setup steps required for this use case.
*
* \subsection xmega_nvm_quickstart_signature_row_example_code Example code
*
* \code
#define START_ADDR 0x10
#define DATA_LENGTH 16

uint8_t values[LENGTH];
uint8_t i;

for (i = 0; i & lt; DATA_LENGTH; i++) {
values[i] = nvm_read_user_signature_row(START_ADDR + i);
}
\endcode
*
* \subsection nvm_quickstart_signature_case_workflow Workflow
*
* -# Define starting address and length of data segment, and create
* variables needed to store and process the data:
* - \code
#define START_ADDR 0x10
#define DATA_LENGTH 16

uint8_t values[LENGTH];
uint8_t i;
\endcode
* -# Iterate through the user signature row, and store our desired data:
* - \code
for (i = 0; i & lt; DATA_LENGTH; i++) {
values[i] = nvm_read_user_signature_row(START_ADDR + i);
}
\endcode
*
*/

#ifdef __cplusplus
}
#endif

#endif /* NVM_H */


Motofocuser.rar > sleep.h

/**
* \file
*
* \brief Sleep controller driver
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef SLEEP_H
#define SLEEP_H

#include & lt; compiler.h & gt;

/**
* \defgroup sleep_group Sleep controller driver
*
* This is a low-level driver implementation for the AVR XMEGA sleep controller.
*
* \note To minimize the code overhead, these functions do not feature
* interrupt-protected access since they are likely to be called inside
* interrupt handlers or in applications where such protection is not
* necessary. If such protection is needed, it must be ensured by the calling
* code.
*
* \section xmega_sleep_quickstart_section Quick Start Guide
* See \ref xmega_sleep_quickstart
* @{
*/

#if defined(__ICCAVR__) || defined(__DOXYGEN__)
# include & lt; intrinsics.h & gt;
//! Macro for issuing the sleep instruction.
# define sleep_enter() __sleep()

/**
* \brief Enable sleep
*/
static inline void sleep_enable(void)
{
SLEEP.CTRL |= SLEEP_SEN_bm;
}

/**
* \brief Disable sleep
*/
static inline void sleep_disable(void)
{
SLEEP.CTRL & = ~SLEEP_SEN_bm;
}

#elif defined(__GNUC__)
# include & lt; avr/sleep.h & gt;
# define sleep_enter() sleep_cpu()

#else
# error Unsupported compiler.
#endif

/**
* \brief Set new sleep mode
*
* \param mode Sleep mode, from the device IO header file.
*/
static inline void sleep_set_mode(enum SLEEP_SMODE_enum mode)
{
SLEEP.CTRL = mode | (SLEEP.CTRL & ~SLEEP_SMODE_gm);
}

//! @}

/**
* \page xmega_sleep_quickstart Quick Start Guide for the XMEGA Sleep Driver
*
* This is the quick start guide for the \ref sleep_group " Sleep Driver " , with
* step-by-step instructions on how to configure and use the driver for a
* specific use case.
*
* The section described below can be copied into, e.g. the main application
* loop or any other function that will need to control and execute different
* sleep modes on the device.
*
* \section xmega_sleep_quickstart_basic Basic usage of the sleep driver
* This use case will prepare the device to enter the Power Down sleep mode and
* then enter the sleep mode. After waking up it will disable sleep.
*
* \section xmega_sleep_basic_usage Usage steps
* \subsection xmega_sleep_basic_usage_code Example code
* Add to, e.g., the main loop in the application C-file:
* \code
sleep_set_mode(SLEEP_SMODE_PDOWN_gc);
sleep_enable();
sleep_enter();
sleep_disable();
\endcode
*
* \subsection xmega_sleep_basic_usage Workflow
* -# Set what sleep mode to use, the different sleep modes can be found in the
* device header file under the enum definition SLEEP_SMODE_enum:
* - \code sleep_set_mode(SLEEP_SMODE_PDOWN_gc); \endcode
* -# Enable that the device are allowed to go to sleep:
* - \code sleep_enable(); \endcode
* - \note This function has to be called in order for the device to go to
* sleep. This is a safety feature to stop the device to go to sleep
* unintentionally, even though it is possible to have this enabled at all times
* it is recommended to enable sleep mode only when you intend to go to sleep
* within a few clock cycles.
* -# Enter sleep mode:
* - \code sleep_enter(); \endcode
* - \attention Make sure to enable global interrupt and the interrupt you
* plan to use as wake-up source for your device, do also pay special
* attention to what wake-up sources are available for the different sleep
* modes. Failing to enable interrupts may result in indefinite sleep until
* power is cycled!
* -# When the device is woken from sleep it will execute the interrupt handler
* related to the wakeup-source (interrupt source) and continue on the next line
* of code after the \ref sleep_enter() call. Make sure to disable sleep when
* waking up.
* - \code sleep_disable(); \endcode
*
* \subsection xmega_sleep_basic_sleep_modes Sleep Modes
* Possible sleep modes depend on the device that is used. Please refer to the
* device datasheet and header file to find these definitions.
*
* As an example the ATxmega32A4U device has the following sleep modes:
* - Idle sleep: SLEEP_SMODE_IDLE_gc
* - Power Down: SLEEP_SMODE_PDOWN_gc
* - Power Save: SLEEP_SMODE_PSAVE_gc
* - Standby: SLEEP_SMODE_STDBY_gc
* - Extended standby: SLEEP_SMODE_ESTDBY_gc
*/

#endif /* SLEEP_H */


Motofocuser.rar > ccp.h

/**
* \file
*
* \brief Configuration Change Protection write functions
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef CPU_CCP_H
#define CPU_CCP_H
#include & lt; compiler.h & gt;

/**
* \defgroup ccp_group Configuration Change Protection
*
* See \ref xmega_ccp_quickstart.
*
* Function for writing to protected IO registers.
* @{
*/

#if defined(__DOXYGEN__)
//! \name IAR Memory Model defines.
//@{

/**
* \def CONFIG_MEMORY_MODEL_TINY
* \brief Configuration symbol to enable 8 bit pointers.
*
*/
# define CONFIG_MEMORY_MODEL_TINY

/**
* \def CONFIG_MEMORY_MODEL_SMALL
* \brief Configuration symbol to enable 16 bit pointers.
* \note If no memory model is defined, SMALL is default.
*
*/
# define CONFIG_MEMORY_MODEL_SMALL


/**
* \def CONFIG_MEMORY_MODEL_LARGE
* \brief Configuration symbol to enable 24 bit pointers.
*
*/
# define CONFIG_MEMORY_MODEL_LARGE

//@}
#endif


/**
* \brief Write to a CCP-protected 8-bit I/O register
*
* \param addr Address of the I/O register
* \param value Value to be written
*
* \note Using IAR Embedded workbench, the choice of memory model has an impact
* on calling convention. The memory model is not visible to the
* preprocessor, so it must be defined in the Assembler preprocessor directives.
*/
extern void ccp_write_io(void *addr, uint8_t value);

/** @} */

/**
* \page xmega_ccp_quickstart Quick start guide for CCP driver
*
* This is the quick start guide for the \ref ccp_group
* " Configuration Change Protection (CCP) driver " , with step-by-step
* instructions on how to use the driver.
*
* The use case contains a code fragment, and this can be copied into, e.g.,
* the main application function.
*
* \section ccp_basic_use_case Basic use case
* In this use case, the CCP is used to write to the protected XMEGA Clock
* Control register.
*
* \subsection ccp_basic_use_case_setup_flow Workflow
* -# call CCP write io to change system clock selection:
* - \code ccp_write_io((uint8_t *) & CLK.CTRL, CLK_SCLKSEL_RC32M_gc); \endcode
*/

#endif /* CPU_CCP_H */


Motofocuser.rar > xmega_reset_cause.h

/**
* \file
*
* \brief Chip-specific reset cause functions
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef XMEGA_DRIVERS_CPU_RESET_CAUSE_H
#define XMEGA_DRIVERS_CPU_RESET_CAUSE_H

#include " compiler.h "
#include " ccp.h "

/**
* \ingroup reset_cause_group
* \defgroup xmega_reset_cause_group XMEGA reset cause
*
* See \ref reset_cause_quickstart
*
* @{
*/

/**
* \brief Chip-specific reset cause type capable of holding all chip reset
* causes. Typically reflects the size of the reset cause register.
*/
typedef uint8_t reset_cause_t;

//! \internal \name Chip-specific reset causes
//@{
//! \internal External reset cause
#define CHIP_RESET_CAUSE_EXTRST RST_EXTRF_bm
//! \internal brown-out detected reset cause, same as for CPU
#define CHIP_RESET_CAUSE_BOD_IO RST_BORF_bm
//! \internal Brown-out detected reset cause, same as for I/O
#define CHIP_RESET_CAUSE_BOD_CPU RST_BORF_bm
//! \internal On-chip debug system reset cause
#define CHIP_RESET_CAUSE_OCD RST_PDIRF_bm
//! \internal Power-on-reset reset cause
#define CHIP_RESET_CAUSE_POR RST_PORF_bm
//! \internal Software reset reset cause
#define CHIP_RESET_CAUSE_SOFT RST_SRF_bm
//! \internal Spike detected reset cause
#define CHIP_RESET_CAUSE_SPIKE RST_SDRF_bm
//! \internal Watchdog timeout reset cause
#define CHIP_RESET_CAUSE_WDT RST_WDRF_bm
//@}

static inline reset_cause_t reset_cause_get_causes(void)
{
return (reset_cause_t)RST.STATUS;
}

static inline void reset_cause_clear_causes(reset_cause_t causes)
{
RST.STATUS = causes;
}

static inline void reset_do_soft_reset(void)
{
ccp_write_io((void *) & RST.CTRL, RST_SWRST_bm);

while (1) {
/* Intentionally empty. */
}
}

//! @}

#endif /* XMEGA_DRIVERS_CPU_RESET_CAUSE_H */


Motofocuser.rar > interrupt.h

/**
* \file
*
* \brief Global interrupt management for 8- and 32-bit AVR
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef UTILS_INTERRUPT_H
#define UTILS_INTERRUPT_H

#include & lt; parts.h & gt;

#if XMEGA || MEGA || TINY
# include " interrupt/interrupt_avr8.h "
#elif UC3
# include " interrupt/interrupt_avr32.h "
#elif SAM
# include " interrupt/interrupt_sam_nvic.h "
#else
# error Unsupported device.
#endif

/**
* \defgroup interrupt_group Global interrupt management
*
* This is a driver for global enabling and disabling of interrupts.
*
* @{
*/

#if defined(__DOXYGEN__)
/**
* \def CONFIG_INTERRUPT_FORCE_INTC
* \brief Force usage of the ASF INTC driver
*
* Predefine this symbol when preprocessing to force the use of the ASF INTC driver.
* This is useful to ensure compatibility across compilers and shall be used only when required
* by the application needs.
*/
# define CONFIG_INTERRUPT_FORCE_INTC
#endif

//! \name Global interrupt flags
//@{
/**
* \typedef irqflags_t
* \brief Type used for holding state of interrupt flag
*/

/**
* \def cpu_irq_enable
* \brief Enable interrupts globally
*/

/**
* \def cpu_irq_disable
* \brief Disable interrupts globally
*/

/**
* \fn irqflags_t cpu_irq_save(void)
* \brief Get and clear the global interrupt flags
*
* Use in conjunction with \ref cpu_irq_restore.
*
* \return Current state of interrupt flags.
*
* \note This function leaves interrupts disabled.
*/

/**
* \fn void cpu_irq_restore(irqflags_t flags)
* \brief Restore global interrupt flags
*
* Use in conjunction with \ref cpu_irq_save.
*
* \param flags State to set interrupt flag to.
*/

/**
* \fn bool cpu_irq_is_enabled_flags(irqflags_t flags)
* \brief Check if interrupts are globally enabled in supplied flags
*
* \param flags Currents state of interrupt flags.
*
* \return True if interrupts are enabled.
*/

/**
* \def cpu_irq_is_enabled
* \brief Check if interrupts are globally enabled
*
* \return True if interrupts are enabled.
*/
//@}

//! @}

/**
* \ingroup interrupt_group
* \defgroup interrupt_deprecated_group Deprecated interrupt definitions
*/

#endif /* UTILS_INTERRUPT_H */


Motofocuser.rar > interrupt_avr8.h

/**
* \file
*
* \brief Global interrupt management for 8-bit AVR
*
* Copyright (C) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef UTILS_INTERRUPT_INTERRUPT_H
#define UTILS_INTERRUPT_INTERRUPT_H

#include & lt; compiler.h & gt;
#include & lt; parts.h & gt;

/**
* \weakgroup interrupt_group
*
* @{
*/

#ifdef ISR_CUSTOM_H
# include ISR_CUSTOM_H
#else

/**
* \def ISR
* \brief Define service routine for specified interrupt vector
*
* Usage:
* \code
ISR(FOO_vect)
{
...
}
\endcode
*
* \param vect Interrupt vector name as found in the device header files.
*/
#if defined(__DOXYGEN__)
# define ISR(vect)
#elif defined(__GNUC__)
# include & lt; avr/interrupt.h & gt;
#elif defined(__ICCAVR__)
# define __ISR(x) _Pragma(#x)
# define ISR(vect) __ISR(vector=vect) __interrupt void handler_##vect(void)
#endif
#endif // ISR_CUSTOM_H

#if XMEGA
/**
* \brief Initialize interrupt vectors
* Enables all interrupt levels, with vectors located in the application section
* and fixed priority scheduling.
*/
#define irq_initialize_vectors() \
PMIC.CTRL = PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
#elif MEGA_RF
#define irq_initialize_vectors()
#endif

#ifdef __GNUC__
# define cpu_irq_enable() sei()
# define cpu_irq_disable() cli()
#else
# define cpu_irq_enable() __enable_interrupt()
# define cpu_irq_disable() __disable_interrupt()
#endif

typedef uint8_t irqflags_t;

static inline irqflags_t cpu_irq_save(void)
{
irqflags_t flags = SREG;
cpu_irq_disable();
return flags;
}

static inline void cpu_irq_restore(irqflags_t flags)
{
barrier();
SREG = flags;
}

static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
{
#if XMEGA
# ifdef __GNUC__
return flags & CPU_I_bm;
# else
return flags & I_bm;
# endif
#elif MEGA || TINY
return flags & (1 & lt; & lt; SREG_I);
#endif
}

#define cpu_irq_is_enabled() cpu_irq_is_enabled_flags(SREG)

//! @}

/**
* \weakgroup interrupt_deprecated_group
* @{
*/
// Deprecated definitions.
#define Enable_global_interrupt() cpu_irq_enable()
#define Disable_global_interrupt() cpu_irq_disable()
#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
//! @}

#endif /* UTILS_INTERRUPT_INTERRUPT_H */


Motofocuser.rar > parts.h

/**
* \file
*
* \brief Atmel part identification macros
*
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef ATMEL_PARTS_H
#define ATMEL_PARTS_H

/**
* \defgroup part_macros_group Atmel part identification macros
*
* This collection of macros identify which series and families that the various
* Atmel parts belong to. These can be used to select part-dependent sections of
* code at compile time.
*
* @{
*/

/**
* \name Convenience macros for part checking
* @{
*/
/* ! Check GCC and IAR part definition for 8-bit AVR */
#define AVR8_PART_IS_DEFINED(part) \
(defined(__ ## part ## __) || defined(__AVR_ ## part ## __))

/* ! Check GCC and IAR part definition for 32-bit AVR */
#define AVR32_PART_IS_DEFINED(part) \
(defined(__AT32 ## part ## __) || defined(__AVR32_ ## part ## __))

/* ! Check GCC and IAR part definition for SAM */
#define SAM_PART_IS_DEFINED(part) (defined(__ ## part ## __))
/** @} */

/**
* \defgroup uc3_part_macros_group AVR UC3 parts
* @{
*/

/**
* \name AVR UC3 A series
* @{
*/
#define UC3A0 ( \
AVR32_PART_IS_DEFINED(UC3A0128) || \
AVR32_PART_IS_DEFINED(UC3A0256) || \
AVR32_PART_IS_DEFINED(UC3A0512) \
)

#define UC3A1 ( \
AVR32_PART_IS_DEFINED(UC3A1128) || \
AVR32_PART_IS_DEFINED(UC3A1256) || \
AVR32_PART_IS_DEFINED(UC3A1512) \
)

#define UC3A3 ( \
AVR32_PART_IS_DEFINED(UC3A364) || \
AVR32_PART_IS_DEFINED(UC3A364S) || \
AVR32_PART_IS_DEFINED(UC3A3128) || \
AVR32_PART_IS_DEFINED(UC3A3128S) || \
AVR32_PART_IS_DEFINED(UC3A3256) || \
AVR32_PART_IS_DEFINED(UC3A3256S) \
)

#define UC3A4 ( \
AVR32_PART_IS_DEFINED(UC3A464) || \
AVR32_PART_IS_DEFINED(UC3A464S) || \
AVR32_PART_IS_DEFINED(UC3A4128) || \
AVR32_PART_IS_DEFINED(UC3A4128S) || \
AVR32_PART_IS_DEFINED(UC3A4256) || \
AVR32_PART_IS_DEFINED(UC3A4256S) \
)
/** @} */

/**
* \name AVR UC3 B series
* @{
*/
#define UC3B0 ( \
AVR32_PART_IS_DEFINED(UC3B064) || \
AVR32_PART_IS_DEFINED(UC3B0128) || \
AVR32_PART_IS_DEFINED(UC3B0256) || \
AVR32_PART_IS_DEFINED(UC3B0512) \
)

#define UC3B1 ( \
AVR32_PART_IS_DEFINED(UC3B164) || \
AVR32_PART_IS_DEFINED(UC3B1128) || \
AVR32_PART_IS_DEFINED(UC3B1256) || \
AVR32_PART_IS_DEFINED(UC3B1512) \
)
/** @} */

/**
* \name AVR UC3 C series
* @{
*/
#define UC3C0 ( \
AVR32_PART_IS_DEFINED(UC3C064C) || \
AVR32_PART_IS_DEFINED(UC3C0128C) || \
AVR32_PART_IS_DEFINED(UC3C0256C) || \
AVR32_PART_IS_DEFINED(UC3C0512C) \
)

#define UC3C1 ( \
AVR32_PART_IS_DEFINED(UC3C164C) || \
AVR32_PART_IS_DEFINED(UC3C1128C) || \
AVR32_PART_IS_DEFINED(UC3C1256C) || \
AVR32_PART_IS_DEFINED(UC3C1512C) \
)

#define UC3C2 ( \
AVR32_PART_IS_DEFINED(UC3C264C) || \
AVR32_PART_IS_DEFINED(UC3C2128C) || \
AVR32_PART_IS_DEFINED(UC3C2256C) || \
AVR32_PART_IS_DEFINED(UC3C2512C) \
)
/** @} */

/**
* \name AVR UC3 D series
* @{
*/
#define UC3D3 ( \
AVR32_PART_IS_DEFINED(UC64D3) || \
AVR32_PART_IS_DEFINED(UC128D3) \
)

#define UC3D4 ( \
AVR32_PART_IS_DEFINED(UC64D4) || \
AVR32_PART_IS_DEFINED(UC128D4) \
)
/** @} */

/**
* \name AVR UC3 L series
* @{
*/
#define UC3L0 ( \
AVR32_PART_IS_DEFINED(UC3L016) || \
AVR32_PART_IS_DEFINED(UC3L032) || \
AVR32_PART_IS_DEFINED(UC3L064) \
)

#define UC3L0128 ( \
AVR32_PART_IS_DEFINED(UC3L0128) \
)

#define UC3L0256 ( \
AVR32_PART_IS_DEFINED(UC3L0256) \
)

#define UC3L3 ( \
AVR32_PART_IS_DEFINED(UC64L3U) || \
AVR32_PART_IS_DEFINED(UC128L3U) || \
AVR32_PART_IS_DEFINED(UC256L3U) \
)

#define UC3L4 ( \
AVR32_PART_IS_DEFINED(UC64L4U) || \
AVR32_PART_IS_DEFINED(UC128L4U) || \
AVR32_PART_IS_DEFINED(UC256L4U) \
)

#define UC3L3_L4 (UC3L3 || UC3L4)
/** @} */

/**
* \name AVR UC3 families
* @{
*/
/** AVR UC3 A family */
#define UC3A (UC3A0 || UC3A1 || UC3A3 || UC3A4)

/** AVR UC3 B family */
#define UC3B (UC3B0 || UC3B1)

/** AVR UC3 C family */
#define UC3C (UC3C0 || UC3C1 || UC3C2)

/** AVR UC3 D family */
#define UC3D (UC3D3 || UC3D4)

/** AVR UC3 L family */
#define UC3L (UC3L0 || UC3L0128 || UC3L0256 || UC3L3_L4)
/** @} */

/** AVR UC3 product line */
#define UC3 (UC3A || UC3B || UC3C || UC3D || UC3L)

/** @} */

/**
* \defgroup xmega_part_macros_group AVR XMEGA parts
* @{
*/

/**
* \name AVR XMEGA A series
* @{
*/
#define XMEGA_A1 ( \
AVR8_PART_IS_DEFINED(ATxmega64A1) || \
AVR8_PART_IS_DEFINED(ATxmega128A1) \
)

#define XMEGA_A3 ( \
AVR8_PART_IS_DEFINED(ATxmega64A3) || \
AVR8_PART_IS_DEFINED(ATxmega128A3) || \
AVR8_PART_IS_DEFINED(ATxmega192A3) || \
AVR8_PART_IS_DEFINED(ATxmega256A3) \
)

#define XMEGA_A3B ( \
AVR8_PART_IS_DEFINED(ATxmega256A3B) \
)

#define XMEGA_A4 ( \
AVR8_PART_IS_DEFINED(ATxmega16A4) || \
AVR8_PART_IS_DEFINED(ATxmega32A4) \
)
/** @} */

/**
* \name AVR XMEGA AU series
* @{
*/
#define XMEGA_A1U ( \
AVR8_PART_IS_DEFINED(ATxmega64A1U) || \
AVR8_PART_IS_DEFINED(ATxmega128A1U) \
)

#define XMEGA_A3U ( \
AVR8_PART_IS_DEFINED(ATxmega64A3U) || \
AVR8_PART_IS_DEFINED(ATxmega128A3U) || \
AVR8_PART_IS_DEFINED(ATxmega192A3U) || \
AVR8_PART_IS_DEFINED(ATxmega256A3U) \
)

#define XMEGA_A3BU ( \
AVR8_PART_IS_DEFINED(ATxmega256A3BU) \
)

#define XMEGA_A4U ( \
AVR8_PART_IS_DEFINED(ATxmega16A4U) || \
AVR8_PART_IS_DEFINED(ATxmega32A4U) || \
AVR8_PART_IS_DEFINED(ATxmega64A4U) || \
AVR8_PART_IS_DEFINED(ATxmega128A4U) \
)
/** @} */

/**
* \name AVR XMEGA B series
* @{
*/
#define XMEGA_B1 ( \
AVR8_PART_IS_DEFINED(ATxmega64B1) || \
AVR8_PART_IS_DEFINED(ATxmega128B1) \
)

#define XMEGA_B3 ( \
AVR8_PART_IS_DEFINED(ATxmega64B3) || \
AVR8_PART_IS_DEFINED(ATxmega128B3) \
)
/** @} */

/**
* \name AVR XMEGA C series
* @{
*/
#define XMEGA_C3 ( \
AVR8_PART_IS_DEFINED(ATxmega384C3) || \
AVR8_PART_IS_DEFINED(ATxmega256C3) || \
AVR8_PART_IS_DEFINED(ATxmega192C3) || \
AVR8_PART_IS_DEFINED(ATxmega128C3) || \
AVR8_PART_IS_DEFINED(ATxmega64C3) || \
AVR8_PART_IS_DEFINED(ATxmega32C3) \
)

#define XMEGA_C4 ( \
AVR8_PART_IS_DEFINED(ATxmega32C4) || \
AVR8_PART_IS_DEFINED(ATxmega16C4) \
)
/** @} */

/**
* \name AVR XMEGA D series
* @{
*/
#define XMEGA_D3 ( \
AVR8_PART_IS_DEFINED(ATxmega32D3) || \
AVR8_PART_IS_DEFINED(ATxmega64D3) || \
AVR8_PART_IS_DEFINED(ATxmega128D3) || \
AVR8_PART_IS_DEFINED(ATxmega192D3) || \
AVR8_PART_IS_DEFINED(ATxmega256D3) || \
AVR8_PART_IS_DEFINED(ATxmega384D3) \
)

#define XMEGA_D4 ( \
AVR8_PART_IS_DEFINED(ATxmega16D4) || \
AVR8_PART_IS_DEFINED(ATxmega32D4) || \
AVR8_PART_IS_DEFINED(ATxmega64D4) || \
AVR8_PART_IS_DEFINED(ATxmega128D4) \
)
/** @} */

/**
* \name AVR XMEGA E series
* @{
*/
#define XMEGA_E5 ( \
AVR8_PART_IS_DEFINED(ATxmega8E5) || \
AVR8_PART_IS_DEFINED(ATxmega16E5) || \
AVR8_PART_IS_DEFINED(ATxmega32E5) \
)
/** @} */


/**
* \name AVR XMEGA families
* @{
*/
/** AVR XMEGA A family */
#define XMEGA_A (XMEGA_A1 || XMEGA_A3 || XMEGA_A3B || XMEGA_A4)

/** AVR XMEGA AU family */
#define XMEGA_AU (XMEGA_A1U || XMEGA_A3U || XMEGA_A3BU || XMEGA_A4U)

/** AVR XMEGA B family */
#define XMEGA_B (XMEGA_B1 || XMEGA_B3)

/** AVR XMEGA C family */
#define XMEGA_C (XMEGA_C3 || XMEGA_C4)

/** AVR XMEGA D family */
#define XMEGA_D (XMEGA_D3 || XMEGA_D4)

/** AVR XMEGA E family */
#define XMEGA_E (XMEGA_E5)
/** @} */


/** AVR XMEGA product line */
#define XMEGA (XMEGA_A || XMEGA_AU || XMEGA_B || XMEGA_C || XMEGA_D || XMEGA_E)

/** @} */

/**
* \defgroup mega_part_macros_group megaAVR parts
*
* \note These megaAVR groupings are based on the groups in AVR Libc for the
* part header files. They are not names of official megaAVR device series or
* families.
*
* @{
*/

/**
* \name ATmegaxx0/xx1 subgroups
* @{
*/
#define MEGA_XX0 ( \
AVR8_PART_IS_DEFINED(ATmega640) || \
AVR8_PART_IS_DEFINED(ATmega1280) || \
AVR8_PART_IS_DEFINED(ATmega2560) \
)

#define MEGA_XX1 ( \
AVR8_PART_IS_DEFINED(ATmega1281) || \
AVR8_PART_IS_DEFINED(ATmega2561) \
)
/** @} */

/**
* \name megaAVR groups
* @{
*/
/** ATmegaxx0/xx1 group */
#define MEGA_XX0_1 (MEGA_XX0 || MEGA_XX1)

/** ATmegaxx4 group */
#define MEGA_XX4 ( \
AVR8_PART_IS_DEFINED(ATmega164A) || \
AVR8_PART_IS_DEFINED(ATmega164PA) || \
AVR8_PART_IS_DEFINED(ATmega324A) || \
AVR8_PART_IS_DEFINED(ATmega324PA) || \
AVR8_PART_IS_DEFINED(ATmega644) || \
AVR8_PART_IS_DEFINED(ATmega644A) || \
AVR8_PART_IS_DEFINED(ATmega644PA) || \
AVR8_PART_IS_DEFINED(ATmega1284P) || \
AVR8_PART_IS_DEFINED(ATmega128RFA1) \
)

/** ATmegaxx4 group */
#define MEGA_XX4_A ( \
AVR8_PART_IS_DEFINED(ATmega164A) || \
AVR8_PART_IS_DEFINED(ATmega164PA) || \
AVR8_PART_IS_DEFINED(ATmega324A) || \
AVR8_PART_IS_DEFINED(ATmega324PA) || \
AVR8_PART_IS_DEFINED(ATmega644A) || \
AVR8_PART_IS_DEFINED(ATmega644PA) || \
AVR8_PART_IS_DEFINED(ATmega1284P) \
)

/** ATmegaxx8 group */
#define MEGA_XX8 ( \
AVR8_PART_IS_DEFINED(ATmega48) || \
AVR8_PART_IS_DEFINED(ATmega48A) || \
AVR8_PART_IS_DEFINED(ATmega48PA) || \
AVR8_PART_IS_DEFINED(ATmega88) || \
AVR8_PART_IS_DEFINED(ATmega88A) || \
AVR8_PART_IS_DEFINED(ATmega88PA) || \
AVR8_PART_IS_DEFINED(ATmega168) || \
AVR8_PART_IS_DEFINED(ATmega168A) || \
AVR8_PART_IS_DEFINED(ATmega168PA) || \
AVR8_PART_IS_DEFINED(ATmega328) || \
AVR8_PART_IS_DEFINED(ATmega328P) \
)

/** ATmegaxx8A/P/PA group */
#define MEGA_XX8_A ( \
AVR8_PART_IS_DEFINED(ATmega48A) || \
AVR8_PART_IS_DEFINED(ATmega48PA) || \
AVR8_PART_IS_DEFINED(ATmega88A) || \
AVR8_PART_IS_DEFINED(ATmega88PA) || \
AVR8_PART_IS_DEFINED(ATmega168A) || \
AVR8_PART_IS_DEFINED(ATmega168PA) || \
AVR8_PART_IS_DEFINED(ATmega328P) \
)

/** ATmegaxx group */
#define MEGA_XX ( \
AVR8_PART_IS_DEFINED(ATmega16) || \
AVR8_PART_IS_DEFINED(ATmega16A) || \
AVR8_PART_IS_DEFINED(ATmega32) || \
AVR8_PART_IS_DEFINED(ATmega32A) || \
AVR8_PART_IS_DEFINED(ATmega64) || \
AVR8_PART_IS_DEFINED(ATmega64A) || \
AVR8_PART_IS_DEFINED(ATmega128) || \
AVR8_PART_IS_DEFINED(ATmega128A) \
)

/** ATmegaxxA/P/PA group */
#define MEGA_XX_A ( \
AVR8_PART_IS_DEFINED(ATmega16A) || \
AVR8_PART_IS_DEFINED(ATmega32A) || \
AVR8_PART_IS_DEFINED(ATmega64A) || \
AVR8_PART_IS_DEFINED(ATmega128A) \
)
/** ATmegaxxRFA1 group */
#define MEGA_RFA1 ( \
AVR8_PART_IS_DEFINED(ATmega128RFA1) \
)

/** ATmegaxxRFR2 group */
#define MEGA_RFR2 ( \
AVR8_PART_IS_DEFINED(ATmega64RFR2) || \
AVR8_PART_IS_DEFINED(ATmega128RFR2) || \
AVR8_PART_IS_DEFINED(ATmega256RFR2) || \
AVR8_PART_IS_DEFINED(ATmega644RFR2) || \
AVR8_PART_IS_DEFINED(ATmega1284RFR2) || \
AVR8_PART_IS_DEFINED(ATmega2564RFR2) \
)


/** ATmegaxxRFxx group */
#define MEGA_RF (MEGA_RFA1 || MEGA_RFR2)

/**
* \name ATmegaxx_un0/un1/un2 subgroups
* @{
*/
#define MEGA_XX_UN0 ( \
AVR8_PART_IS_DEFINED(ATmega16) || \
AVR8_PART_IS_DEFINED(ATmega16A) || \
AVR8_PART_IS_DEFINED(ATmega32) || \
AVR8_PART_IS_DEFINED(ATmega32A) \
)

/** ATmegaxx group without power reduction and
* And interrupt sense register.
*/
#define MEGA_XX_UN1 ( \
AVR8_PART_IS_DEFINED(ATmega64) || \
AVR8_PART_IS_DEFINED(ATmega64A) || \
AVR8_PART_IS_DEFINED(ATmega128) || \
AVR8_PART_IS_DEFINED(ATmega128A) \
)

/** ATmegaxx group without power reduction and
* And interrupt sense register.
*/
#define MEGA_XX_UN2 ( \
AVR8_PART_IS_DEFINED(ATmega169P) || \
AVR8_PART_IS_DEFINED(ATmega169PA) || \
AVR8_PART_IS_DEFINED(ATmega329P) || \
AVR8_PART_IS_DEFINED(ATmega329PA) \
)

/** Devices added to complete megaAVR offering.
* Please do not use this group symbol as it is not intended
* to be permanent: the devices should be regrouped.
*/
#define MEGA_UNCATEGORIZED ( \
AVR8_PART_IS_DEFINED(AT90CAN128) || \
AVR8_PART_IS_DEFINED(AT90CAN32) || \
AVR8_PART_IS_DEFINED(AT90CAN64) || \
AVR8_PART_IS_DEFINED(AT90PWM1) || \
AVR8_PART_IS_DEFINED(AT90PWM216) || \
AVR8_PART_IS_DEFINED(AT90PWM2B) || \
AVR8_PART_IS_DEFINED(AT90PWM316) || \
AVR8_PART_IS_DEFINED(AT90PWM3B) || \
AVR8_PART_IS_DEFINED(AT90PWM81) || \
AVR8_PART_IS_DEFINED(AT90USB1286) || \
AVR8_PART_IS_DEFINED(AT90USB1287) || \
AVR8_PART_IS_DEFINED(AT90USB162) || \
AVR8_PART_IS_DEFINED(AT90USB646) || \
AVR8_PART_IS_DEFINED(AT90USB647) || \
AVR8_PART_IS_DEFINED(AT90USB82) || \
AVR8_PART_IS_DEFINED(ATmega1284) || \
AVR8_PART_IS_DEFINED(ATmega162) || \
AVR8_PART_IS_DEFINED(ATmega164P) || \
AVR8_PART_IS_DEFINED(ATmega165A) || \
AVR8_PART_IS_DEFINED(ATmega165P) || \
AVR8_PART_IS_DEFINED(ATmega165PA) || \
AVR8_PART_IS_DEFINED(ATmega168P) || \
AVR8_PART_IS_DEFINED(ATmega169A) || \
AVR8_PART_IS_DEFINED(ATmega16M1) || \
AVR8_PART_IS_DEFINED(ATmega16U2) || \
AVR8_PART_IS_DEFINED(ATmega16U4) || \
AVR8_PART_IS_DEFINED(ATmega256RFA2) || \
AVR8_PART_IS_DEFINED(ATmega324P) || \
AVR8_PART_IS_DEFINED(ATmega325) || \
AVR8_PART_IS_DEFINED(ATmega3250) || \
AVR8_PART_IS_DEFINED(ATmega3250A) || \
AVR8_PART_IS_DEFINED(ATmega3250P) || \
AVR8_PART_IS_DEFINED(ATmega3250PA) || \
AVR8_PART_IS_DEFINED(ATmega325A) || \
AVR8_PART_IS_DEFINED(ATmega325P) || \
AVR8_PART_IS_DEFINED(ATmega325PA) || \
AVR8_PART_IS_DEFINED(ATmega329) || \
AVR8_PART_IS_DEFINED(ATmega3290) || \
AVR8_PART_IS_DEFINED(ATmega3290A) || \
AVR8_PART_IS_DEFINED(ATmega3290P) || \
AVR8_PART_IS_DEFINED(ATmega3290PA) || \
AVR8_PART_IS_DEFINED(ATmega329A) || \
AVR8_PART_IS_DEFINED(ATmega32M1) || \
AVR8_PART_IS_DEFINED(ATmega32U2) || \
AVR8_PART_IS_DEFINED(ATmega32U4) || \
AVR8_PART_IS_DEFINED(ATmega48P) || \
AVR8_PART_IS_DEFINED(ATmega644P) || \
AVR8_PART_IS_DEFINED(ATmega645) || \
AVR8_PART_IS_DEFINED(ATmega6450) || \
AVR8_PART_IS_DEFINED(ATmega6450A) || \
AVR8_PART_IS_DEFINED(ATmega6450P) || \
AVR8_PART_IS_DEFINED(ATmega645A) || \
AVR8_PART_IS_DEFINED(ATmega645P) || \
AVR8_PART_IS_DEFINED(ATmega649) || \
AVR8_PART_IS_DEFINED(ATmega6490) || \
AVR8_PART_IS_DEFINED(ATmega6490A) || \
AVR8_PART_IS_DEFINED(ATmega6490P) || \
AVR8_PART_IS_DEFINED(ATmega649A) || \
AVR8_PART_IS_DEFINED(ATmega649P) || \
AVR8_PART_IS_DEFINED(ATmega64M1) || \
AVR8_PART_IS_DEFINED(ATmega64RFA2) || \
AVR8_PART_IS_DEFINED(ATmega8) || \
AVR8_PART_IS_DEFINED(ATmega8515) || \
AVR8_PART_IS_DEFINED(ATmega8535) || \
AVR8_PART_IS_DEFINED(ATmega88P) || \
AVR8_PART_IS_DEFINED(ATmega8A) || \
AVR8_PART_IS_DEFINED(ATmega8U2) \
)

/** Unspecified group */
#define MEGA_UNSPECIFIED (MEGA_XX_UN0 || MEGA_XX_UN1 || MEGA_XX_UN2 || \
MEGA_UNCATEGORIZED)

/** @} */

/** megaAVR product line */
#define MEGA (MEGA_XX0_1 || MEGA_XX4 || MEGA_XX8 || MEGA_XX || MEGA_RF || \
MEGA_UNSPECIFIED)

/** @} */

/**
* \defgroup tiny_part_macros_group tinyAVR parts
*
* @{
*/

/**
* \name tinyAVR groups
* @{
*/

/** Devices added to complete tinyAVR offering.
* Please do not use this group symbol as it is not intended
* to be permanent: the devices should be regrouped.
*/
#define TINY_UNCATEGORIZED ( \
AVR8_PART_IS_DEFINED(ATtiny10) || \
AVR8_PART_IS_DEFINED(ATtiny13) || \
AVR8_PART_IS_DEFINED(ATtiny13A) || \
AVR8_PART_IS_DEFINED(ATtiny1634) || \
AVR8_PART_IS_DEFINED(ATtiny167) || \
AVR8_PART_IS_DEFINED(ATtiny20) || \
AVR8_PART_IS_DEFINED(ATtiny2313) || \
AVR8_PART_IS_DEFINED(ATtiny2313A) || \
AVR8_PART_IS_DEFINED(ATtiny24) || \
AVR8_PART_IS_DEFINED(ATtiny24A) || \
AVR8_PART_IS_DEFINED(ATtiny25) || \
AVR8_PART_IS_DEFINED(ATtiny26) || \
AVR8_PART_IS_DEFINED(ATtiny261) || \
AVR8_PART_IS_DEFINED(ATtiny261A) || \
AVR8_PART_IS_DEFINED(ATtiny4) || \
AVR8_PART_IS_DEFINED(ATtiny40) || \
AVR8_PART_IS_DEFINED(ATtiny4313) || \
AVR8_PART_IS_DEFINED(ATtiny43U) || \
AVR8_PART_IS_DEFINED(ATtiny44) || \
AVR8_PART_IS_DEFINED(ATtiny44A) || \
AVR8_PART_IS_DEFINED(ATtiny45) || \
AVR8_PART_IS_DEFINED(ATtiny461) || \
AVR8_PART_IS_DEFINED(ATtiny461A) || \
AVR8_PART_IS_DEFINED(ATtiny48) || \
AVR8_PART_IS_DEFINED(ATtiny5) || \
AVR8_PART_IS_DEFINED(ATtiny828) || \
AVR8_PART_IS_DEFINED(ATtiny84) || \
AVR8_PART_IS_DEFINED(ATtiny84A) || \
AVR8_PART_IS_DEFINED(ATtiny85) || \
AVR8_PART_IS_DEFINED(ATtiny861) || \
AVR8_PART_IS_DEFINED(ATtiny861A) || \
AVR8_PART_IS_DEFINED(ATtiny87) || \
AVR8_PART_IS_DEFINED(ATtiny88) || \
AVR8_PART_IS_DEFINED(ATtiny9) \
)

/** @} */

/** tinyAVR product line */
#define TINY (TINY_UNCATEGORIZED)

/** @} */

/**
* \defgroup sam_part_macros_group SAM parts
* @{
*/

/**
* \name SAM3S series
* @{
*/
#define SAM3S1 ( \
SAM_PART_IS_DEFINED(SAM3S1A) || \
SAM_PART_IS_DEFINED(SAM3S1B) || \
SAM_PART_IS_DEFINED(SAM3S1C) \
)

#define SAM3S2 ( \
SAM_PART_IS_DEFINED(SAM3S2A) || \
SAM_PART_IS_DEFINED(SAM3S2B) || \
SAM_PART_IS_DEFINED(SAM3S2C) \
)

#define SAM3S4 ( \
SAM_PART_IS_DEFINED(SAM3S4A) || \
SAM_PART_IS_DEFINED(SAM3S4B) || \
SAM_PART_IS_DEFINED(SAM3S4C) \
)

#define SAM3S8 ( \
SAM_PART_IS_DEFINED(SAM3S8B) || \
SAM_PART_IS_DEFINED(SAM3S8C) \
)

#define SAM3SD8 ( \
SAM_PART_IS_DEFINED(SAM3SD8B) || \
SAM_PART_IS_DEFINED(SAM3SD8C) \
)
/** @} */

/**
* \name SAM3U series
* @{
*/
#define SAM3U1 ( \
SAM_PART_IS_DEFINED(SAM3U1C) || \
SAM_PART_IS_DEFINED(SAM3U1E) \
)

#define SAM3U2 ( \
SAM_PART_IS_DEFINED(SAM3U2C) || \
SAM_PART_IS_DEFINED(SAM3U2E) \
)

#define SAM3U4 ( \
SAM_PART_IS_DEFINED(SAM3U4C) || \
SAM_PART_IS_DEFINED(SAM3U4E) \
)
/** @} */

/**
* \name SAM3N series
* @{
*/
#define SAM3N00 ( \
SAM_PART_IS_DEFINED(SAM3N00A) || \
SAM_PART_IS_DEFINED(SAM3N00B) \
)

#define SAM3N0 ( \
SAM_PART_IS_DEFINED(SAM3N0A) || \
SAM_PART_IS_DEFINED(SAM3N0B) || \
SAM_PART_IS_DEFINED(SAM3N0C) \
)

#define SAM3N1 ( \
SAM_PART_IS_DEFINED(SAM3N1A) || \
SAM_PART_IS_DEFINED(SAM3N1B) || \
SAM_PART_IS_DEFINED(SAM3N1C) \
)

#define SAM3N2 ( \
SAM_PART_IS_DEFINED(SAM3N2A) || \
SAM_PART_IS_DEFINED(SAM3N2B) || \
SAM_PART_IS_DEFINED(SAM3N2C) \
)

#define SAM3N4 ( \
SAM_PART_IS_DEFINED(SAM3N4A) || \
SAM_PART_IS_DEFINED(SAM3N4B) || \
SAM_PART_IS_DEFINED(SAM3N4C) \
)
/** @} */

/**
* \name SAM3X series
* @{
*/
#define SAM3X4 ( \
SAM_PART_IS_DEFINED(SAM3X4C) || \
SAM_PART_IS_DEFINED(SAM3X4E) \
)

#define SAM3X8 ( \
SAM_PART_IS_DEFINED(SAM3X8C) || \
SAM_PART_IS_DEFINED(SAM3X8E) || \
SAM_PART_IS_DEFINED(SAM3X8H) \
)
/** @} */

/**
* \name SAM3A series
* @{
*/
#define SAM3A4 ( \
SAM_PART_IS_DEFINED(SAM3A4C) \
)

#define SAM3A8 ( \
SAM_PART_IS_DEFINED(SAM3A8C) \
)
/** @} */

/**
* \name SAM4S series
* @{
*/
#define SAM4S2 ( \
SAM_PART_IS_DEFINED(SAM4S2A) || \
SAM_PART_IS_DEFINED(SAM4S2B) || \
SAM_PART_IS_DEFINED(SAM4S2C) \
)

#define SAM4S4 ( \
SAM_PART_IS_DEFINED(SAM4S4A) || \
SAM_PART_IS_DEFINED(SAM4S4B) || \
SAM_PART_IS_DEFINED(SAM4S4C) \
)

#define SAM4S8 ( \
SAM_PART_IS_DEFINED(SAM4S8B) || \
SAM_PART_IS_DEFINED(SAM4S8C) \
)

#define SAM4S16 ( \
SAM_PART_IS_DEFINED(SAM4S16B) || \
SAM_PART_IS_DEFINED(SAM4S16C) \
)

#define SAM4SA16 ( \
SAM_PART_IS_DEFINED(SAM4SA16B) || \
SAM_PART_IS_DEFINED(SAM4SA16C) \
)

#define SAM4SD16 ( \
SAM_PART_IS_DEFINED(SAM4SD16B) || \
SAM_PART_IS_DEFINED(SAM4SD16C) \
)

#define SAM4SD32 ( \
SAM_PART_IS_DEFINED(SAM4SD32B) || \
SAM_PART_IS_DEFINED(SAM4SD32C) \
)
/** @} */

/**
* \name SAM4L series
* @{
*/
#define SAM4LS ( \
SAM_PART_IS_DEFINED(SAM4LS2A) || \
SAM_PART_IS_DEFINED(SAM4LS2B) || \
SAM_PART_IS_DEFINED(SAM4LS2C) || \
SAM_PART_IS_DEFINED(SAM4LS4A) || \
SAM_PART_IS_DEFINED(SAM4LS4B) || \
SAM_PART_IS_DEFINED(SAM4LS4C) || \
SAM_PART_IS_DEFINED(SAM4LS8A) || \
SAM_PART_IS_DEFINED(SAM4LS8B) || \
SAM_PART_IS_DEFINED(SAM4LS8C) \
)

#define SAM4LC ( \
SAM_PART_IS_DEFINED(SAM4LC2A) || \
SAM_PART_IS_DEFINED(SAM4LC2B) || \
SAM_PART_IS_DEFINED(SAM4LC2C) || \
SAM_PART_IS_DEFINED(SAM4LC4A) || \
SAM_PART_IS_DEFINED(SAM4LC4B) || \
SAM_PART_IS_DEFINED(SAM4LC4C) || \
SAM_PART_IS_DEFINED(SAM4LC8A) || \
SAM_PART_IS_DEFINED(SAM4LC8B) || \
SAM_PART_IS_DEFINED(SAM4LC8C) \
)
/** @} */

/**
* \name SAMD20 series
* @{
*/
#define SAMD20J ( \
SAM_PART_IS_DEFINED(SAMD20J14) || \
SAM_PART_IS_DEFINED(SAMD20J15) || \
SAM_PART_IS_DEFINED(SAMD20J16) || \
SAM_PART_IS_DEFINED(SAMD20J17) || \
SAM_PART_IS_DEFINED(SAMD20J18) \
)

#define SAMD20G ( \
SAM_PART_IS_DEFINED(SAMD20G14) || \
SAM_PART_IS_DEFINED(SAMD20G15) || \
SAM_PART_IS_DEFINED(SAMD20G16) || \
SAM_PART_IS_DEFINED(SAMD20G17) || \
SAM_PART_IS_DEFINED(SAMD20G17U) || \
SAM_PART_IS_DEFINED(SAMD20G18) || \
SAM_PART_IS_DEFINED(SAMD20G18U) \
)

#define SAMD20E ( \
SAM_PART_IS_DEFINED(SAMD20E14) || \
SAM_PART_IS_DEFINED(SAMD20E15) || \
SAM_PART_IS_DEFINED(SAMD20E16) || \
SAM_PART_IS_DEFINED(SAMD20E17) || \
SAM_PART_IS_DEFINED(SAMD20E18) \
)
/** @} */

/**
* \name SAMD21 series
* @{
*/
#define SAMD21J ( \
SAM_PART_IS_DEFINED(SAMD21J15A) || \
SAM_PART_IS_DEFINED(SAMD21J16A) || \
SAM_PART_IS_DEFINED(SAMD21J17A) || \
SAM_PART_IS_DEFINED(SAMD21J18A) || \
SAM_PART_IS_DEFINED(SAMD21J15B) || \
SAM_PART_IS_DEFINED(SAMD21J16B) \
)

#define SAMD21G ( \
SAM_PART_IS_DEFINED(SAMD21G15A) || \
SAM_PART_IS_DEFINED(SAMD21G16A) || \
SAM_PART_IS_DEFINED(SAMD21G17A) || \
SAM_PART_IS_DEFINED(SAMD21G17AU) || \
SAM_PART_IS_DEFINED(SAMD21G18A) || \
SAM_PART_IS_DEFINED(SAMD21G18AU) || \
SAM_PART_IS_DEFINED(SAMD21G15B) || \
SAM_PART_IS_DEFINED(SAMD21G16B) \
)

#define SAMD21E ( \
SAM_PART_IS_DEFINED(SAMD21E15A) || \
SAM_PART_IS_DEFINED(SAMD21E16A) || \
SAM_PART_IS_DEFINED(SAMD21E17A) || \
SAM_PART_IS_DEFINED(SAMD21E18A) || \
SAM_PART_IS_DEFINED(SAMD21E15B) || \
SAM_PART_IS_DEFINED(SAMD21E15BU) || \
SAM_PART_IS_DEFINED(SAMD21E16B) || \
SAM_PART_IS_DEFINED(SAMD21E16BU) || \
SAM_PART_IS_DEFINED(SAMD21E15L) || \
SAM_PART_IS_DEFINED(SAMD21E16L) \
)
/** @} */

/**
* \name SAMR21 series
* @{
*/
#define SAMR21G ( \
SAM_PART_IS_DEFINED(SAMR21G16A) || \
SAM_PART_IS_DEFINED(SAMR21G17A) || \
SAM_PART_IS_DEFINED(SAMR21G18A) \
)

#define SAMR21E ( \
SAM_PART_IS_DEFINED(SAMR21E16A) || \
SAM_PART_IS_DEFINED(SAMR21E17A) || \
SAM_PART_IS_DEFINED(SAMR21E18A) \
)
/** @} */

/**
* \name SAMD10 series
* @{
*/
#define SAMD10C ( \
SAM_PART_IS_DEFINED(SAMD10C12A) || \
SAM_PART_IS_DEFINED(SAMD10C13A) || \
SAM_PART_IS_DEFINED(SAMD10C14A) \
)

#define SAMD10DS ( \
SAM_PART_IS_DEFINED(SAMD10D12AS) || \
SAM_PART_IS_DEFINED(SAMD10D13AS) || \
SAM_PART_IS_DEFINED(SAMD10D14AS) \
)

#define SAMD10DM ( \
SAM_PART_IS_DEFINED(SAMD10D12AM) || \
SAM_PART_IS_DEFINED(SAMD10D13AM) || \
SAM_PART_IS_DEFINED(SAMD10D14AM) \
)
/** @} */

/**
* \name SAMD11 series
* @{
*/
#define SAMD11C ( \
SAM_PART_IS_DEFINED(SAMD11C14A) \
)

#define SAMD11DS ( \
SAM_PART_IS_DEFINED(SAMD11D14AS) \
)

#define SAMD11DM ( \
SAM_PART_IS_DEFINED(SAMD11D14AM) \
)
/** @} */

/**
* \name SAML21 series
* @{
*/
#define SAML21E ( \
SAM_PART_IS_DEFINED(SAML21E15A) || \
SAM_PART_IS_DEFINED(SAML21E16A) || \
SAM_PART_IS_DEFINED(SAML21E17A) || \
SAM_PART_IS_DEFINED(SAML21E18A) \
)

#define SAML21G ( \
SAM_PART_IS_DEFINED(SAML21G16A) || \
SAM_PART_IS_DEFINED(SAML21G17A) || \
SAM_PART_IS_DEFINED(SAML21G18A) \
)

#define SAML21J ( \
SAM_PART_IS_DEFINED(SAML21J16A) || \
SAM_PART_IS_DEFINED(SAML21J17A) || \
SAM_PART_IS_DEFINED(SAML21J18A) \
)
/** @} */

/**
* \name SAM4E series
* @{
*/
#define SAM4E8 ( \
SAM_PART_IS_DEFINED(SAM4E8C) || \
SAM_PART_IS_DEFINED(SAM4E8E) \
)

#define SAM4E16 ( \
SAM_PART_IS_DEFINED(SAM4E16C) || \
SAM_PART_IS_DEFINED(SAM4E16E) \
)
/** @} */

/**
* \name SAM4N series
* @{
*/
#define SAM4N8 ( \
SAM_PART_IS_DEFINED(SAM4N8A) || \
SAM_PART_IS_DEFINED(SAM4N8B) || \
SAM_PART_IS_DEFINED(SAM4N8C) \
)

#define SAM4N16 ( \
SAM_PART_IS_DEFINED(SAM4N16B) || \
SAM_PART_IS_DEFINED(SAM4N16C) \
)
/** @} */

/**
* \name SAM4C series
* @{
*/
#define SAM4C4_0 ( \
SAM_PART_IS_DEFINED(SAM4C4C_0) \
)

#define SAM4C4_1 ( \
SAM_PART_IS_DEFINED(SAM4C4C_1) \
)

#define SAM4C4 (SAM4C4_0 || SAM4C4_1)

#define SAM4C8_0 ( \
SAM_PART_IS_DEFINED(SAM4C8C_0) \
)

#define SAM4C8_1 ( \
SAM_PART_IS_DEFINED(SAM4C8C_1) \
)

#define SAM4C8 (SAM4C8_0 || SAM4C8_1)

#define SAM4C16_0 ( \
SAM_PART_IS_DEFINED(SAM4C16C_0) \
)

#define SAM4C16_1 ( \
SAM_PART_IS_DEFINED(SAM4C16C_1) \
)

#define SAM4C16 (SAM4C16_0 || SAM4C16_1)

#define SAM4C32_0 ( \
SAM_PART_IS_DEFINED(SAM4C32C_0) ||\
SAM_PART_IS_DEFINED(SAM4C32E_0) \
)

#define SAM4C32_1 ( \
SAM_PART_IS_DEFINED(SAM4C32C_1) ||\
SAM_PART_IS_DEFINED(SAM4C32E_1) \
)


#define SAM4C32 (SAM4C32_0 || SAM4C32_1)

/** @} */

/**
* \name SAM4CM series
* @{
*/
#define SAM4CMP8_0 ( \
SAM_PART_IS_DEFINED(SAM4CMP8C_0) \
)

#define SAM4CMP8_1 ( \
SAM_PART_IS_DEFINED(SAM4CMP8C_1) \
)

#define SAM4CMP8 (SAM4CMP8_0 || SAM4CMP8_1)

#define SAM4CMP16_0 ( \
SAM_PART_IS_DEFINED(SAM4CMP16C_0) \
)

#define SAM4CMP16_1 ( \
SAM_PART_IS_DEFINED(SAM4CMP16C_1) \
)

#define SAM4CMP16 (SAM4CMP16_0 || SAM4CMP16_1)

#define SAM4CMP32_0 ( \
SAM_PART_IS_DEFINED(SAM4CMP32C_0) \
)

#define SAM4CMP32_1 ( \
SAM_PART_IS_DEFINED(SAM4CMP32C_1) \
)

#define SAM4CMP32 (SAM4CMP32_0 || SAM4CMP32_1)

#define SAM4CMS4_0 ( \
SAM_PART_IS_DEFINED(SAM4CMS4C_0) \
)

#define SAM4CMS4_1 ( \
SAM_PART_IS_DEFINED(SAM4CMS4C_1) \
)

#define SAM4CMS4 (SAM4CMS4_0 || SAM4CMS4_1)

#define SAM4CMS8_0 ( \
SAM_PART_IS_DEFINED(SAM4CMS8C_0) \
)

#define SAM4CMS8_1 ( \
SAM_PART_IS_DEFINED(SAM4CMS8C_1) \
)

#define SAM4CMS8 (SAM4CMS8_0 || SAM4CMS8_1)

#define SAM4CMS16_0 ( \
SAM_PART_IS_DEFINED(SAM4CMS16C_0) \
)

#define SAM4CMS16_1 ( \
SAM_PART_IS_DEFINED(SAM4CMS16C_1) \
)

#define SAM4CMS16 (SAM4CMS16_0 || SAM4CMS16_1)

#define SAM4CMS32_0 ( \
SAM_PART_IS_DEFINED(SAM4CMS32C_0) \
)

#define SAM4CMS32_1 ( \
SAM_PART_IS_DEFINED(SAM4CMS32C_1) \
)

#define SAM4CMS32 (SAM4CMS32_0 || SAM4CMS32_1)

/** @} */

/**
* \name SAM4CP series
* @{
*/
#define SAM4CP16_0 ( \
SAM_PART_IS_DEFINED(SAM4CP16B_0) \
)

#define SAM4CP16_1 ( \
SAM_PART_IS_DEFINED(SAM4CP16B_1) \
)

#define SAM4CP16 (SAM4CP16_0 || SAM4CP16_1)
/** @} */

/**
* \name SAMG series
* @{
*/
#define SAMG51 ( \
SAM_PART_IS_DEFINED(SAMG51G18) \
)

#define SAMG53 ( \
SAM_PART_IS_DEFINED(SAMG53G19) ||\
SAM_PART_IS_DEFINED(SAMG53N19) \
)

#define SAMG54 ( \
SAM_PART_IS_DEFINED(SAMG54G19) ||\
SAM_PART_IS_DEFINED(SAMG54J19) ||\
SAM_PART_IS_DEFINED(SAMG54N19) \
)

#define SAMG55 ( \
SAM_PART_IS_DEFINED(SAMG55G18) ||\
SAM_PART_IS_DEFINED(SAMG55G19) ||\
SAM_PART_IS_DEFINED(SAMG55J18) ||\
SAM_PART_IS_DEFINED(SAMG55J19) ||\
SAM_PART_IS_DEFINED(SAMG55N19) \
)
/** @} */
/**
* \name SAM families
* @{
*/
/** SAM3S Family */
#define SAM3S (SAM3S1 || SAM3S2 || SAM3S4 || SAM3S8 || SAM3SD8)

/** SAM3U Family */
#define SAM3U (SAM3U1 || SAM3U2 || SAM3U4)

/** SAM3N Family */
#define SAM3N (SAM3N00 || SAM3N0 || SAM3N1 || SAM3N2 || SAM3N4)

/** SAM3XA Family */
#define SAM3XA (SAM3X4 || SAM3X8 || SAM3A4 || SAM3A8)

/** SAM4S Family */
#define SAM4S (SAM4S2 || SAM4S4 || SAM4S8 || SAM4S16 || SAM4SA16 || SAM4SD16 || SAM4SD32)

/** SAM4L Family */
#define SAM4L (SAM4LS || SAM4LC)

/** SAMD20 Family */
#define SAMD20 (SAMD20J || SAMD20G || SAMD20E)

/** SAMD21 Family */
#define SAMD21 (SAMD21J || SAMD21G || SAMD21E)

/** SAMD10 Family */
#define SAMD10 (SAMD10C || SAMD10DS || SAMD10DM)

/** SAMD11 Family */
#define SAMD11 (SAMD11C || SAMD11DS || SAMD11DM)

/** SAMD Family */
#define SAMD (SAMD20 || SAMD21 || SAMD10 || SAMD11)

/** SAMR21 Family */
#define SAMR21 (SAMR21G || SAMR21E)

/** SAML21 Family */
#define SAML21 (SAML21J || SAML21G || SAML21E)

/** SAM4E Family */
#define SAM4E (SAM4E8 || SAM4E16)

/** SAM4N Family */
#define SAM4N (SAM4N8 || SAM4N16)

/** SAM4C Family */
#define SAM4C_0 (SAM4C4_0 || SAM4C8_0 || SAM4C16_0 || SAM4C32_0)
#define SAM4C_1 (SAM4C4_1 || SAM4C8_1 || SAM4C16_1 || SAM4C32_1)
#define SAM4C (SAM4C4 || SAM4C8 || SAM4C16 || SAM4C32)

/** SAM4CM Family */
#define SAM4CM_0 (SAM4CMP8_0 || SAM4CMP16_0 || SAM4CMP32_0 || \
SAM4CMS4_0 || SAM4CMS8_0 || SAM4CMS16_0 || SAM4CMS32_0)
#define SAM4CM_1 (SAM4CMP8_1 || SAM4CMP16_1 || SAM4CMP32_1 || \
SAM4CMS4_1 || SAM4CMS8_1 || SAM4CMS16_1 || SAM4CMS32_1)
#define SAM4CM (SAM4CMP8 || SAM4CMP16 || SAM4CMP32 || \
SAM4CMS4 || SAM4CMS8 || SAM4CMS16 || SAM4CMS32)

/** SAM4CP Family */
#define SAM4CP_0 (SAM4CP16_0)
#define SAM4CP_1 (SAM4CP16_1)
#define SAM4CP (SAM4CP16)

/** SAMG Family */
#define SAMG (SAMG51 || SAMG53 || SAMG54 || SAMG55)

/** SAM0 product line (cortex-m0+) */
#define SAM0 (SAMD20 || SAMD21 || SAMR21 || SAMD10 || SAMD11 || SAML21)

/** @} */

/** SAM product line */
#define SAM (SAM3S || SAM3U || SAM3N || SAM3XA || SAM4S || SAM4L || SAM4E || \
SAM0 || SAM4N || SAM4C || SAM4CM || SAM4CP || SAMG)

/** @} */

/** @} */

/** @} */

#endif /* ATMEL_PARTS_H */


Motofocuser.rar > usb_atmel.h

/**
* \file
*
* \brief All USB VIDs and PIDs from Atmel USB applications
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _USB_ATMEL_H_
#define _USB_ATMEL_H_

/**
* \defgroup usb_group USB Stack
*
* This stack includes the USB Device Stack, USB Host Stack and common
* definitions.
* @{
*/

//! @}

/**
* \ingroup usb_group
* \defgroup usb_atmel_ids_group Atmel USB Identifiers
*
* This module defines Atmel PID and VIDs constants.
*
* @{
*/

//! \name Vendor Identifier assigned by USB org to ATMEL
#define USB_VID_ATMEL 0x03EB


//! \name Product Identifier assigned by ATMEL to AVR applications
//! @{

//! \name The range from 2000h to 20FFh is reserved to the old PID for C51, MEGA, and others.
//! @{
#define USB_PID_ATMEL_MEGA_HIDGENERIC 0x2013
#define USB_PID_ATMEL_MEGA_HIDKEYBOARD 0x2017
#define USB_PID_ATMEL_MEGA_CDC 0x2018
#define USB_PID_ATMEL_MEGA_AUDIO_IN 0x2019
#define USB_PID_ATMEL_MEGA_MS 0x201A
#define USB_PID_ATMEL_MEGA_AUDIO_IN_OUT 0x201B
#define USB_PID_ATMEL_MEGA_HIDMOUSE 0x201C
#define USB_PID_ATMEL_MEGA_HIDMOUSE_CERTIF_U4 0x201D
#define USB_PID_ATMEL_MEGA_CDC_MULTI 0x201E
#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_USBKEY 0x2022
#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_STK525 0x2023
#define USB_PID_ATMEL_MEGA_MS_2 0x2029
#define USB_PID_ATMEL_MEGA_MS_HIDMS 0x202A
#define USB_PID_ATMEL_MEGA_MS_3 0x2032
#define USB_PID_ATMEL_MEGA_LIBUSB 0x2050
//! @}

//! \name The range 2100h to 21FFh is reserved to PIDs for AVR Tools.
//! @{
#define USB_PID_ATMEL_XPLAINED 0x2122
#define USB_PID_ATMEL_XMEGA_USB_ZIGBIT_2_4GHZ 0x214A
#define USB_PID_ATMEL_XMEGA_USB_ZIGBIT_SUBGHZ 0x214B
//! @}

//! \name The range 2300h to 23FFh is reserved to PIDs for demo from ASF1.7= & gt;
//! @{
#define USB_PID_ATMEL_UC3_ENUM 0x2300
#define USB_PID_ATMEL_UC3_MS 0x2301
#define USB_PID_ATMEL_UC3_MS_SDRAM_LOADER 0x2302
#define USB_PID_ATMEL_UC3_EVK1100_CTRLPANEL 0x2303
#define USB_PID_ATMEL_UC3_HID 0x2304
#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID 0x2305
#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID_MS 0x2306
#define USB_PID_ATMEL_UC3_CDC 0x2307
#define USB_PID_ATMEL_UC3_AUDIO_MICRO 0x2308
#define USB_PID_ATMEL_UC3_CDC_DEBUG 0x2310 // Virtual Com (debug interface) on EVK11xx
#define USB_PID_ATMEL_UC3_AUDIO_SPEAKER_MICRO 0x2311
#define USB_PID_ATMEL_UC3_CDC_MSC 0x2312
//! @}

//! \name The range 2400h to 24FFh is reserved to PIDs for ASF applications
//! @{
#define USB_PID_ATMEL_ASF_HIDMOUSE 0x2400
#define USB_PID_ATMEL_ASF_HIDKEYBOARD 0x2401
#define USB_PID_ATMEL_ASF_HIDGENERIC 0x2402
#define USB_PID_ATMEL_ASF_MSC 0x2403
#define USB_PID_ATMEL_ASF_CDC 0x2404
#define USB_PID_ATMEL_ASF_PHDC 0x2405
#define USB_PID_ATMEL_ASF_HIDMTOUCH 0x2406
#define USB_PID_ATMEL_ASF_MSC_HIDMOUSE 0x2420
#define USB_PID_ATMEL_ASF_MSC_HIDS_CDC 0x2421
#define USB_PID_ATMEL_ASF_MSC_HIDKEYBOARD 0x2422
#define USB_PID_ATMEL_ASF_VENDOR_CLASS 0x2423
#define USB_PID_ATMEL_ASF_MSC_CDC 0x2424
#define USB_PID_ATMEL_ASF_TWO_CDC 0x2425
#define USB_PID_ATMEL_ASF_SEVEN_CDC 0x2426
#define USB_PID_ATMEL_ASF_XPLAIN_BC_POWERONLY 0x2430
#define USB_PID_ATMEL_ASF_XPLAIN_BC_TERMINAL 0x2431
#define USB_PID_ATMEL_ASF_XPLAIN_BC_TOUCH 0x2432
#define USB_PID_ATMEL_ASF_AUDIO_SPEAKER 0x2433
#define USB_PID_ATMEL_ASF_XMEGA_B1_XPLAINED 0x2434
//! @}

//! \name The range 2F00h to 2FFFh is reserved to official PIDs for AVR bootloaders
//! Note, !!!! don't use this range for demos or examples !!!!
//! @{
#define USB_PID_ATMEL_DFU_ATXMEGA64C3 0x2FD6
#define USB_PID_ATMEL_DFU_ATXMEGA128C3 0x2FD7
#define USB_PID_ATMEL_DFU_ATXMEGA16C4 0x2FD8
#define USB_PID_ATMEL_DFU_ATXMEGA32C4 0x2FD9
#define USB_PID_ATMEL_DFU_ATXMEGA256C3 0x2FDA
#define USB_PID_ATMEL_DFU_ATXMEGA384C3 0x2FDB
#define USB_PID_ATMEL_DFU_ATUCL3_L4 0x2FDC
#define USB_PID_ATMEL_DFU_ATXMEGA64A4U 0x2FDD
#define USB_PID_ATMEL_DFU_ATXMEGA128A4U 0x2FDE

#define USB_PID_ATMEL_DFU_ATXMEGA64B3 0x2FDF
#define USB_PID_ATMEL_DFU_ATXMEGA128B3 0x2FE0
#define USB_PID_ATMEL_DFU_ATXMEGA64B1 0x2FE1
#define USB_PID_ATMEL_DFU_ATXMEGA256A3BU 0x2FE2
#define USB_PID_ATMEL_DFU_ATXMEGA16A4U 0x2FE3
#define USB_PID_ATMEL_DFU_ATXMEGA32A4U 0x2FE4
#define USB_PID_ATMEL_DFU_ATXMEGA64A3U 0x2FE5
#define USB_PID_ATMEL_DFU_ATXMEGA128A3U 0x2FE6
#define USB_PID_ATMEL_DFU_ATXMEGA192A3U 0x2FE7
#define USB_PID_ATMEL_DFU_ATXMEGA64A1U 0x2FE8
#define USB_PID_ATMEL_DFU_ATUC3D 0x2FE9
#define USB_PID_ATMEL_DFU_ATXMEGA128B1 0x2FEA
#define USB_PID_ATMEL_DFU_AT32UC3C 0x2FEB
#define USB_PID_ATMEL_DFU_ATXMEGA256A3U 0x2FEC
#define USB_PID_ATMEL_DFU_ATXMEGA128A1U 0x2FED
#define USB_PID_ATMEL_DFU_ATMEGA8U2 0x2FEE
#define USB_PID_ATMEL_DFU_ATMEGA16U2 0x2FEF
#define USB_PID_ATMEL_DFU_ATMEGA32U2 0x2FF0
#define USB_PID_ATMEL_DFU_AT32UC3A3 0x2FF1
#define USB_PID_ATMEL_DFU_ATMEGA32U6 0x2FF2
#define USB_PID_ATMEL_DFU_ATMEGA16U4 0x2FF3
#define USB_PID_ATMEL_DFU_ATMEGA32U4 0x2FF4
#define USB_PID_ATMEL_DFU_AT32AP7200 0x2FF5
#define USB_PID_ATMEL_DFU_AT32UC3B 0x2FF6
#define USB_PID_ATMEL_DFU_AT90USB82 0x2FF7
#define USB_PID_ATMEL_DFU_AT32UC3A 0x2FF8
#define USB_PID_ATMEL_DFU_AT90USB64 0x2FF9
#define USB_PID_ATMEL_DFU_AT90USB162 0x2FFA
#define USB_PID_ATMEL_DFU_AT90USB128 0x2FFB
// 2FFCh to 2FFFh used by C51 family products
//! @}

//! @}

//! @}


#endif // _USB_ATMEL_H_


Motofocuser.rar > udc.c

/**
* \file
*
* \brief USB Device Controller (UDC)
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#include " conf_usb.h "
#include " usb_protocol.h "
#include " udd.h "
#include " udc_desc.h "
#include " udi.h "
#include " udc.h "

/**
* \ingroup udc_group
* \defgroup udc_group_interne Implementation of UDC
*
* Internal implementation
* @{
*/

//! \name Internal variables to manage the USB device
//! @{

//! Device status state (see enum usb_device_status in usb_protocol.h)
static le16_t udc_device_status;

COMPILER_WORD_ALIGNED
//! Device interface setting value
static uint8_t udc_iface_setting = 0;

//! Device Configuration number selected by the USB host
COMPILER_WORD_ALIGNED
static uint8_t udc_num_configuration = 0;

//! Pointer on the selected speed device configuration
static udc_config_speed_t UDC_DESC_STORAGE *udc_ptr_conf;

//! Pointer on interface descriptor used by SETUP request.
static usb_iface_desc_t UDC_DESC_STORAGE *udc_ptr_iface;

//! @}


//! \name Internal structure to store the USB device main strings
//! @{

/**
* \brief Language ID of USB device (US ID by default)
*/
COMPILER_WORD_ALIGNED
static UDC_DESC_STORAGE usb_str_lgid_desc_t udc_string_desc_languageid = {
.desc.bLength = sizeof(usb_str_lgid_desc_t),
.desc.bDescriptorType = USB_DT_STRING,
.string = {LE16(USB_LANGID_EN_US)}
};

/**
* \brief USB device manufacture name storage
* String is allocated only if USB_DEVICE_MANUFACTURE_NAME is declared
* by usb application configuration
*/
#ifdef USB_DEVICE_MANUFACTURE_NAME
static uint8_t udc_string_manufacturer_name[] = USB_DEVICE_MANUFACTURE_NAME;
# define USB_DEVICE_MANUFACTURE_NAME_SIZE \
(sizeof(udc_string_manufacturer_name)-1)
#else
# define USB_DEVICE_MANUFACTURE_NAME_SIZE 0
#endif

/**
* \brief USB device product name storage
* String is allocated only if USB_DEVICE_PRODUCT_NAME is declared
* by usb application configuration
*/
#ifdef USB_DEVICE_PRODUCT_NAME
static uint8_t udc_string_product_name[] = USB_DEVICE_PRODUCT_NAME;
# define USB_DEVICE_PRODUCT_NAME_SIZE (sizeof(udc_string_product_name)-1)
#else
# define USB_DEVICE_PRODUCT_NAME_SIZE 0
#endif

/**
* \brief Get USB device serial number
*
* Use the define USB_DEVICE_SERIAL_NAME to set static serial number.
*
* For dynamic serial number set the define USB_DEVICE_GET_SERIAL_NAME_POINTER
* to a suitable pointer. This will also require the serial number length
* define USB_DEVICE_GET_SERIAL_NAME_LENGTH.
*/
#if defined USB_DEVICE_GET_SERIAL_NAME_POINTER
static const uint8_t *udc_get_string_serial_name(void)
{
return (const uint8_t *)USB_DEVICE_GET_SERIAL_NAME_POINTER;
}
# define USB_DEVICE_SERIAL_NAME_SIZE \
USB_DEVICE_GET_SERIAL_NAME_LENGTH
#elif defined USB_DEVICE_SERIAL_NAME
static const uint8_t *udc_get_string_serial_name(void)
{
return (const uint8_t *)USB_DEVICE_SERIAL_NAME;
}
# define USB_DEVICE_SERIAL_NAME_SIZE \
(sizeof(USB_DEVICE_SERIAL_NAME)-1)
#else
# define USB_DEVICE_SERIAL_NAME_SIZE 0
#endif

/**
* \brief USB device string descriptor
* Structure used to transfer ASCII strings to USB String descriptor structure.
*/
struct udc_string_desc_t {
usb_str_desc_t header;
le16_t string[Max(Max(USB_DEVICE_MANUFACTURE_NAME_SIZE, \
USB_DEVICE_PRODUCT_NAME_SIZE), USB_DEVICE_SERIAL_NAME_SIZE)];
};
COMPILER_WORD_ALIGNED
static UDC_DESC_STORAGE struct udc_string_desc_t udc_string_desc = {
.header.bDescriptorType = USB_DT_STRING
};
//! @}

usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void)
{
return udc_ptr_iface;
}

/**
* \brief Returns a value to check the end of USB Configuration descriptor
*
* \return address after the last byte of USB Configuration descriptor
*/
static usb_conf_desc_t UDC_DESC_STORAGE *udc_get_eof_conf(void)
{
return (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *)
udc_ptr_conf- & gt; desc +
le16_to_cpu(udc_ptr_conf- & gt; desc- & gt; wTotalLength));
}

#if (0!=USB_DEVICE_MAX_EP)
/**
* \brief Search specific descriptor in global interface descriptor
*
* \param desc Address of interface descriptor
* or previous specific descriptor found
* \param desc_id Descriptor ID to search
*
* \return address of specific descriptor found
* \return NULL if it is the end of global interface descriptor
*/
static usb_conf_desc_t UDC_DESC_STORAGE *udc_next_desc_in_iface(usb_conf_desc_t
UDC_DESC_STORAGE * desc, uint8_t desc_id)
{
usb_conf_desc_t UDC_DESC_STORAGE *ptr_eof_desc;

ptr_eof_desc = udc_get_eof_conf();
// Go to next descriptor
desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc +
desc- & gt; bLength);
// Check the end of configuration descriptor
while (ptr_eof_desc & gt; desc) {
// If new interface descriptor is found,
// then it is the end of the current global interface descriptor
if (USB_DT_INTERFACE == desc- & gt; bDescriptorType) {
break; // End of global interface descriptor
}
if (desc_id == desc- & gt; bDescriptorType) {
return desc; // Specific descriptor found
}
// Go to next descriptor
desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc +
desc- & gt; bLength);
}
return NULL; // No specific descriptor found
}
#endif

/**
* \brief Search an interface descriptor
* This routine updates the internal pointer udc_ptr_iface.
*
* \param iface_num Interface number to find in Configuration Descriptor
* \param setting_num Setting number of interface to find
*
* \return 1 if found or 0 if not found
*/
static bool udc_update_iface_desc(uint8_t iface_num, uint8_t setting_num)
{
usb_conf_desc_t UDC_DESC_STORAGE *ptr_end_desc;

if (0 == udc_num_configuration) {
return false;
}

if (iface_num & gt; = udc_ptr_conf- & gt; desc- & gt; bNumInterfaces) {
return false;
}

// Start at the beginning of configuration descriptor
udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *)
udc_ptr_conf- & gt; desc;

// Check the end of configuration descriptor
ptr_end_desc = udc_get_eof_conf();
while (ptr_end_desc & gt;
(UDC_DESC_STORAGE usb_conf_desc_t *) udc_ptr_iface) {
if (USB_DT_INTERFACE == udc_ptr_iface- & gt; bDescriptorType) {
// A interface descriptor is found
// Check interface and alternate setting number
if ((iface_num == udc_ptr_iface- & gt; bInterfaceNumber) & &
(setting_num ==
udc_ptr_iface- & gt; bAlternateSetting)) {
return true; // Interface found
}
}
// Go to next descriptor
udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) (
(uint8_t *) udc_ptr_iface +
udc_ptr_iface- & gt; bLength);
}
return false; // Interface not found
}

/**
* \brief Disables an usb device interface (UDI)
* This routine call the UDI corresponding to interface number
*
* \param iface_num Interface number to disable
*
* \return 1 if it is done or 0 if interface is not found
*/
static bool udc_iface_disable(uint8_t iface_num)
{
udi_api_t UDC_DESC_STORAGE *udi_api;

// Select first alternate setting of the interface
// to update udc_ptr_iface before call iface- & gt; getsetting()
if (!udc_update_iface_desc(iface_num, 0)) {
return false;
}

// Select the interface with the current alternate setting
udi_api = udc_ptr_conf- & gt; udi_apis[iface_num];

#if (0!=USB_DEVICE_MAX_EP)
if (!udc_update_iface_desc(iface_num, udi_api- & gt; getsetting())) {
return false;
}

// Start at the beginning of interface descriptor
{
usb_ep_desc_t UDC_DESC_STORAGE *ep_desc;
ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface;
while (1) {
// Search Endpoint descriptor included in global interface descriptor
ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *)
udc_next_desc_in_iface((UDC_DESC_STORAGE
usb_conf_desc_t *)
ep_desc, USB_DT_ENDPOINT);
if (NULL == ep_desc) {
break;
}
// Free the endpoint used by the interface
udd_ep_free(ep_desc- & gt; bEndpointAddress);
}
}
#endif

// Disable interface
udi_api- & gt; disable();
return true;
}

/**
* \brief Enables an usb device interface (UDI)
* This routine calls the UDI corresponding
* to the interface and setting number.
*
* \param iface_num Interface number to enable
* \param setting_num Setting number to enable
*
* \return 1 if it is done or 0 if interface is not found
*/
static bool udc_iface_enable(uint8_t iface_num, uint8_t setting_num)
{
// Select the interface descriptor
if (!udc_update_iface_desc(iface_num, setting_num)) {
return false;
}

#if (0!=USB_DEVICE_MAX_EP)
usb_ep_desc_t UDC_DESC_STORAGE *ep_desc;

// Start at the beginning of the global interface descriptor
ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface;
while (1) {
// Search Endpoint descriptor included in the global interface descriptor
ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *)
udc_next_desc_in_iface((UDC_DESC_STORAGE
usb_conf_desc_t *) ep_desc,
USB_DT_ENDPOINT);
if (NULL == ep_desc)
break;
// Alloc the endpoint used by the interface
if (!udd_ep_alloc(ep_desc- & gt; bEndpointAddress,
ep_desc- & gt; bmAttributes,
le16_to_cpu
(ep_desc- & gt; wMaxPacketSize))) {
return false;
}
}
#endif
// Enable the interface
return udc_ptr_conf- & gt; udi_apis[iface_num]- & gt; enable();
}

/*! \brief Start the USB Device stack
*/
void udc_start(void)
{
udd_enable();
}

/*! \brief Stop the USB Device stack
*/
void udc_stop(void)
{
udd_disable();
udc_reset();
}

/**
* \brief Reset the current configuration of the USB device,
* This routines can be called by UDD when a RESET on the USB line occurs.
*/
void udc_reset(void)
{
uint8_t iface_num;

if (udc_num_configuration) {
for (iface_num = 0;
iface_num & lt; udc_ptr_conf- & gt; desc- & gt; bNumInterfaces;
iface_num++) {
udc_iface_disable(iface_num);
}
}
udc_num_configuration = 0;
#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \
== (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP))
if (CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP) & udc_device_status) {
// Remote wakeup is enabled then disable it
UDC_REMOTEWAKEUP_DISABLE();
}
#endif
udc_device_status =
#if (USB_DEVICE_ATTR & USB_CONFIG_ATTR_SELF_POWERED)
CPU_TO_LE16(USB_DEV_STATUS_SELF_POWERED);
#else
CPU_TO_LE16(USB_DEV_STATUS_BUS_POWERED);
#endif
}

void udc_sof_notify(void)
{
uint8_t iface_num;

if (udc_num_configuration) {
for (iface_num = 0;
iface_num & lt; udc_ptr_conf- & gt; desc- & gt; bNumInterfaces;
iface_num++) {
if (udc_ptr_conf- & gt; udi_apis[iface_num]- & gt; sof_notify != NULL) {
udc_ptr_conf- & gt; udi_apis[iface_num]- & gt; sof_notify();
}
}
}
}

/**
* \brief Standard device request to get device status
*
* \return true if success
*/
static bool udc_req_std_dev_get_status(void)
{
if (udd_g_ctrlreq.req.wLength != sizeof(udc_device_status)) {
return false;
}

udd_set_setup_payload( (uint8_t *) & udc_device_status,
sizeof(udc_device_status));
return true;
}

#if (0!=USB_DEVICE_MAX_EP)
/**
* \brief Standard endpoint request to get endpoint status
*
* \return true if success
*/
static bool udc_req_std_ep_get_status(void)
{
static le16_t udc_ep_status;

if (udd_g_ctrlreq.req.wLength != sizeof(udc_ep_status)) {
return false;
}

udc_ep_status = udd_ep_is_halted(udd_g_ctrlreq.req.
wIndex & 0xFF) ? CPU_TO_LE16(USB_EP_STATUS_HALTED) : 0;

udd_set_setup_payload( (uint8_t *) & udc_ep_status,
sizeof(udc_ep_status));
return true;
}
#endif

/**
* \brief Standard device request to change device status
*
* \return true if success
*/
static bool udc_req_std_dev_clear_feature(void)
{
if (udd_g_ctrlreq.req.wLength) {
return false;
}

if (udd_g_ctrlreq.req.wValue == USB_DEV_FEATURE_REMOTE_WAKEUP) {
udc_device_status & = CPU_TO_LE16(~(uint32_t)USB_DEV_STATUS_REMOTEWAKEUP);
#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \
== (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP))
UDC_REMOTEWAKEUP_DISABLE();
#endif
return true;
}
return false;
}

#if (0!=USB_DEVICE_MAX_EP)
/**
* \brief Standard endpoint request to clear endpoint feature
*
* \return true if success
*/
static bool udc_req_std_ep_clear_feature(void)
{
if (udd_g_ctrlreq.req.wLength) {
return false;
}

if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) {
return udd_ep_clear_halt(udd_g_ctrlreq.req.wIndex & 0xFF);
}
return false;
}
#endif

/**
* \brief Standard device request to set a feature
*
* \return true if success
*/
static bool udc_req_std_dev_set_feature(void)
{
if (udd_g_ctrlreq.req.wLength) {
return false;
}

switch (udd_g_ctrlreq.req.wValue) {

case USB_DEV_FEATURE_REMOTE_WAKEUP:
#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \
== (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP))
udc_device_status |= CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP);
UDC_REMOTEWAKEUP_ENABLE();
return true;
#else
return false;
#endif

#ifdef USB_DEVICE_HS_SUPPORT
case USB_DEV_FEATURE_TEST_MODE:
if (!udd_is_high_speed()) {
break;
}
if (udd_g_ctrlreq.req.wIndex & 0xff) {
break;
}
// Unconfigure the device, terminating all ongoing requests
udc_reset();
switch ((udd_g_ctrlreq.req.wIndex & gt; & gt; 8) & 0xFF) {
case USB_DEV_TEST_MODE_J:
udd_g_ctrlreq.callback = udd_test_mode_j;
return true;

case USB_DEV_TEST_MODE_K:
udd_g_ctrlreq.callback = udd_test_mode_k;
return true;

case USB_DEV_TEST_MODE_SE0_NAK:
udd_g_ctrlreq.callback = udd_test_mode_se0_nak;
return true;

case USB_DEV_TEST_MODE_PACKET:
udd_g_ctrlreq.callback = udd_test_mode_packet;
return true;

case USB_DEV_TEST_MODE_FORCE_ENABLE: // Only for downstream facing hub ports
default:
break;
}
break;
#endif
default:
break;
}
return false;
}

/**
* \brief Standard endpoint request to halt an endpoint
*
* \return true if success
*/
#if (0!=USB_DEVICE_MAX_EP)
static bool udc_req_std_ep_set_feature(void)
{
if (udd_g_ctrlreq.req.wLength) {
return false;
}
if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) {
udd_ep_abort(udd_g_ctrlreq.req.wIndex & 0xFF);
return udd_ep_set_halt(udd_g_ctrlreq.req.wIndex & 0xFF);
}
return false;
}
#endif

/**
* \brief Change the address of device
* Callback called at the end of request set address
*/
static void udc_valid_address(void)
{
udd_set_address(udd_g_ctrlreq.req.wValue & 0x7F);
}

/**
* \brief Standard device request to set device address
*
* \return true if success
*/
static bool udc_req_std_dev_set_address(void)
{
if (udd_g_ctrlreq.req.wLength) {
return false;
}

// The address must be changed at the end of setup request after the handshake
// then we use a callback to change address
udd_g_ctrlreq.callback = udc_valid_address;
return true;
}

/**
* \brief Standard device request to get device string descriptor
*
* \return true if success
*/
static bool udc_req_std_dev_get_str_desc(void)
{
uint8_t i;
const uint8_t *str;
uint8_t str_length = 0;

// Link payload pointer to the string corresponding at request
switch (udd_g_ctrlreq.req.wValue & 0xff) {
case 0:
udd_set_setup_payload((uint8_t *) & udc_string_desc_languageid,
sizeof(udc_string_desc_languageid));
break;

#ifdef USB_DEVICE_MANUFACTURE_NAME
case 1:
str_length = USB_DEVICE_MANUFACTURE_NAME_SIZE;
str = udc_string_manufacturer_name;
break;
#endif
#ifdef USB_DEVICE_PRODUCT_NAME
case 2:
str_length = USB_DEVICE_PRODUCT_NAME_SIZE;
str = udc_string_product_name;
break;
#endif
#if defined USB_DEVICE_SERIAL_NAME || defined USB_DEVICE_GET_SERIAL_NAME_POINTER
case 3:
str_length = USB_DEVICE_SERIAL_NAME_SIZE;
str = udc_get_string_serial_name();
break;
#endif
default:
#ifdef UDC_GET_EXTRA_STRING
if (UDC_GET_EXTRA_STRING()) {
break;
}
#endif
return false;
}

if (str_length) {
for(i = 0; i & lt; str_length; i++) {
udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]);
}

udc_string_desc.header.bLength = 2 + (str_length) * 2;
udd_set_setup_payload(
(uint8_t *) & udc_string_desc,
udc_string_desc.header.bLength);
}

return true;
}

/**
* \brief Standard device request to get descriptors about USB device
*
* \return true if success
*/
static bool udc_req_std_dev_get_descriptor(void)
{
uint8_t conf_num;

conf_num = udd_g_ctrlreq.req.wValue & 0xff;

// Check descriptor ID
switch ((uint8_t) (udd_g_ctrlreq.req.wValue & gt; & gt; 8)) {
case USB_DT_DEVICE:
// Device descriptor requested
#ifdef USB_DEVICE_HS_SUPPORT
if (!udd_is_high_speed()) {
udd_set_setup_payload(
(uint8_t *) udc_config.confdev_hs,
udc_config.confdev_hs- & gt; bLength);
} else
#endif
{
udd_set_setup_payload(
(uint8_t *) udc_config.confdev_lsfs,
udc_config.confdev_lsfs- & gt; bLength);
}
break;

case USB_DT_CONFIGURATION:
// Configuration descriptor requested
#ifdef USB_DEVICE_HS_SUPPORT
if (udd_is_high_speed()) {
// HS descriptor
if (conf_num & gt; = udc_config.confdev_hs- & gt;
bNumConfigurations) {
return false;
}
udd_set_setup_payload(
(uint8_t *)udc_config.conf_hs[conf_num].desc,
le16_to_cpu(udc_config.conf_hs[conf_num].desc- & gt; wTotalLength));
} else
#endif
{
// FS descriptor
if (conf_num & gt; = udc_config.confdev_lsfs- & gt;
bNumConfigurations) {
return false;
}
udd_set_setup_payload(
(uint8_t *)udc_config.conf_lsfs[conf_num].desc,
le16_to_cpu(udc_config.conf_lsfs[conf_num].desc- & gt; wTotalLength));
}
((usb_conf_desc_t *) udd_g_ctrlreq.payload)- & gt; bDescriptorType =
USB_DT_CONFIGURATION;
break;

#ifdef USB_DEVICE_HS_SUPPORT
case USB_DT_DEVICE_QUALIFIER:
// Device qualifier descriptor requested
udd_set_setup_payload( (uint8_t *) udc_config.qualifier,
udc_config.qualifier- & gt; bLength);
break;

case USB_DT_OTHER_SPEED_CONFIGURATION:
// Other configuration descriptor requested
if (!udd_is_high_speed()) {
// HS descriptor
if (conf_num & gt; = udc_config.confdev_hs- & gt;
bNumConfigurations) {
return false;
}
udd_set_setup_payload(
(uint8_t *)udc_config.conf_hs[conf_num].desc,
le16_to_cpu(udc_config.conf_hs[conf_num].desc- & gt; wTotalLength));
} else {
// FS descriptor
if (conf_num & gt; = udc_config.confdev_lsfs- & gt;
bNumConfigurations) {
return false;
}
udd_set_setup_payload(
(uint8_t *)udc_config.conf_lsfs[conf_num].desc,
le16_to_cpu(udc_config.conf_lsfs[conf_num].desc- & gt; wTotalLength));
}
((usb_conf_desc_t *) udd_g_ctrlreq.payload)- & gt; bDescriptorType =
USB_DT_OTHER_SPEED_CONFIGURATION;
break;
#endif

case USB_DT_BOS:
// Device BOS descriptor requested
if (udc_config.conf_bos == NULL) {
return false;
}
udd_set_setup_payload( (uint8_t *) udc_config.conf_bos,
udc_config.conf_bos- & gt; wTotalLength);
break;

case USB_DT_STRING:
// String descriptor requested
if (!udc_req_std_dev_get_str_desc()) {
return false;
}
break;

default:
// Unknown descriptor requested
return false;
}
// if the descriptor is larger than length requested, then reduce it
if (udd_g_ctrlreq.req.wLength & lt; udd_g_ctrlreq.payload_size) {
udd_g_ctrlreq.payload_size = udd_g_ctrlreq.req.wLength;
}
return true;
}

/**
* \brief Standard device request to get configuration number
*
* \return true if success
*/
static bool udc_req_std_dev_get_configuration(void)
{
if (udd_g_ctrlreq.req.wLength != 1) {
return false;
}

udd_set_setup_payload( & udc_num_configuration,1);
return true;
}

/**
* \brief Standard device request to enable a configuration
*
* \return true if success
*/
static bool udc_req_std_dev_set_configuration(void)
{
uint8_t iface_num;

// Check request length
if (udd_g_ctrlreq.req.wLength) {
return false;
}
// Authorize configuration only if the address is valid
if (!udd_getaddress()) {
return false;
}
// Check the configuration number requested
#ifdef USB_DEVICE_HS_SUPPORT
if (udd_is_high_speed()) {
// HS descriptor
if ((udd_g_ctrlreq.req.wValue & 0xFF) & gt;
udc_config.confdev_hs- & gt; bNumConfigurations) {
return false;
}
} else
#endif
{
// FS descriptor
if ((udd_g_ctrlreq.req.wValue & 0xFF) & gt;
udc_config.confdev_lsfs- & gt; bNumConfigurations) {
return false;
}
}

// Reset current configuration
udc_reset();

// Enable new configuration
udc_num_configuration = udd_g_ctrlreq.req.wValue & 0xFF;
if (udc_num_configuration == 0) {
return true; // Default empty configuration requested
}
// Update pointer of the configuration descriptor
#ifdef USB_DEVICE_HS_SUPPORT
if (udd_is_high_speed()) {
// HS descriptor
udc_ptr_conf = & udc_config.conf_hs[udc_num_configuration - 1];
} else
#endif
{
// FS descriptor
udc_ptr_conf = & udc_config.conf_lsfs[udc_num_configuration - 1];
}
// Enable all interfaces of the selected configuration
for (iface_num = 0; iface_num & lt; udc_ptr_conf- & gt; desc- & gt; bNumInterfaces;
iface_num++) {
if (!udc_iface_enable(iface_num, 0)) {
return false;
}
}
return true;
}

/**
* \brief Standard interface request
* to get the alternate setting number of an interface
*
* \return true if success
*/
static bool udc_req_std_iface_get_setting(void)
{
uint8_t iface_num;
udi_api_t UDC_DESC_STORAGE *udi_api;

if (udd_g_ctrlreq.req.wLength != 1) {
return false; // Error in request
}
if (!udc_num_configuration) {
return false; // The device is not is configured state yet
}

// Check the interface number included in the request
iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
if (iface_num & gt; = udc_ptr_conf- & gt; desc- & gt; bNumInterfaces) {
return false;
}

// Select first alternate setting of the interface to update udc_ptr_iface
// before call iface- & gt; getsetting()
if (!udc_update_iface_desc(iface_num, 0)) {
return false;
}
// Get alternate setting from UDI
udi_api = udc_ptr_conf- & gt; udi_apis[iface_num];
udc_iface_setting = udi_api- & gt; getsetting();

// Link value to payload pointer of request
udd_set_setup_payload( & udc_iface_setting,1);
return true;
}

/**
* \brief Standard interface request
* to set an alternate setting of an interface
*
* \return true if success
*/
static bool udc_req_std_iface_set_setting(void)
{
uint8_t iface_num, setting_num;

if (udd_g_ctrlreq.req.wLength) {
return false; // Error in request
}
if (!udc_num_configuration) {
return false; // The device is not is configured state yet
}

iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
setting_num = udd_g_ctrlreq.req.wValue & 0xFF;

// Disable current setting
if (!udc_iface_disable(iface_num)) {
return false;
}

// Enable new setting
return udc_iface_enable(iface_num, setting_num);
}

/**
* \brief Main routine to manage the standard USB SETUP request
*
* \return true if the request is supported
*/
static bool udc_reqstd(void)
{
if (Udd_setup_is_in()) {
// GET Standard Requests
if (udd_g_ctrlreq.req.wLength == 0) {
return false; // Error for USB host
}

if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) {
// Standard Get Device request
switch (udd_g_ctrlreq.req.bRequest) {
case USB_REQ_GET_STATUS:
return udc_req_std_dev_get_status();
case USB_REQ_GET_DESCRIPTOR:
return udc_req_std_dev_get_descriptor();
case USB_REQ_GET_CONFIGURATION:
return udc_req_std_dev_get_configuration();
default:
break;
}
}

if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) {
// Standard Get Interface request
switch (udd_g_ctrlreq.req.bRequest) {
case USB_REQ_GET_INTERFACE:
return udc_req_std_iface_get_setting();
default:
break;
}
}
#if (0!=USB_DEVICE_MAX_EP)
if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) {
// Standard Get Endpoint request
switch (udd_g_ctrlreq.req.bRequest) {
case USB_REQ_GET_STATUS:
return udc_req_std_ep_get_status();
default:
break;
}
}
#endif
} else {
// SET Standard Requests
if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) {
// Standard Set Device request
switch (udd_g_ctrlreq.req.bRequest) {
case USB_REQ_SET_ADDRESS:
return udc_req_std_dev_set_address();
case USB_REQ_CLEAR_FEATURE:
return udc_req_std_dev_clear_feature();
case USB_REQ_SET_FEATURE:
return udc_req_std_dev_set_feature();
case USB_REQ_SET_CONFIGURATION:
return udc_req_std_dev_set_configuration();
case USB_REQ_SET_DESCRIPTOR:
/* Not supported (defined as optional by the USB 2.0 spec) */
break;
default:
break;
}
}

if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) {
// Standard Set Interface request
switch (udd_g_ctrlreq.req.bRequest) {
case USB_REQ_SET_INTERFACE:
return udc_req_std_iface_set_setting();
default:
break;
}
}
#if (0!=USB_DEVICE_MAX_EP)
if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) {
// Standard Set Endpoint request
switch (udd_g_ctrlreq.req.bRequest) {
case USB_REQ_CLEAR_FEATURE:
return udc_req_std_ep_clear_feature();
case USB_REQ_SET_FEATURE:
return udc_req_std_ep_set_feature();
default:
break;
}
}
#endif
}
return false;
}

/**
* \brief Send the SETUP interface request to UDI
*
* \return true if the request is supported
*/
static bool udc_req_iface(void)
{
uint8_t iface_num;
udi_api_t UDC_DESC_STORAGE *udi_api;

if (0 == udc_num_configuration) {
return false; // The device is not is configured state yet
}
// Check interface number
iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
if (iface_num & gt; = udc_ptr_conf- & gt; desc- & gt; bNumInterfaces) {
return false;
}

//* To update udc_ptr_iface with the selected interface in request
// Select first alternate setting of interface to update udc_ptr_iface
// before calling udi_api- & gt; getsetting()
if (!udc_update_iface_desc(iface_num, 0)) {
return false;
}
// Select the interface with the current alternate setting
udi_api = udc_ptr_conf- & gt; udi_apis[iface_num];
if (!udc_update_iface_desc(iface_num, udi_api- & gt; getsetting())) {
return false;
}

// Send the SETUP request to the UDI corresponding to the interface number
return udi_api- & gt; setup();
}

/**
* \brief Send the SETUP interface request to UDI
*
* \return true if the request is supported
*/
static bool udc_req_ep(void)
{
uint8_t iface_num;
udi_api_t UDC_DESC_STORAGE *udi_api;

if (0 == udc_num_configuration) {
return false; // The device is not is configured state yet
}
// Send this request on all enabled interfaces
iface_num = udd_g_ctrlreq.req.wIndex & 0xFF;
for (iface_num = 0; iface_num & lt; udc_ptr_conf- & gt; desc- & gt; bNumInterfaces;
iface_num++) {
// Select the interface with the current alternate setting
udi_api = udc_ptr_conf- & gt; udi_apis[iface_num];
if (!udc_update_iface_desc(iface_num, udi_api- & gt; getsetting())) {
return false;
}

// Send the SETUP request to the UDI
if (udi_api- & gt; setup()) {
return true;
}
}
return false;
}

/**
* \brief Main routine to manage the USB SETUP request.
*
* This function parses a USB SETUP request and submits an appropriate
* response back to the host or, in the case of SETUP OUT requests
* with data, sets up a buffer for receiving the data payload.
*
* The main standard requests defined by the USB 2.0 standard are handled
* internally. The interface requests are sent to UDI, and the specific request
* sent to a specific application callback.
*
* \return true if the request is supported, else the request is stalled by UDD
*/
bool udc_process_setup(void)
{
// By default no data (receive/send) and no callbacks registered
udd_g_ctrlreq.payload_size = 0;
udd_g_ctrlreq.callback = NULL;
udd_g_ctrlreq.over_under_run = NULL;

if (Udd_setup_is_in()) {
if (udd_g_ctrlreq.req.wLength == 0) {
return false; // Error from USB host
}
}

// If standard request then try to decode it in UDC
if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) {
if (udc_reqstd()) {
return true;
}
}

// If interface request then try to decode it in UDI
if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) {
if (udc_req_iface()) {
return true;
}
}

// If endpoint request then try to decode it in UDI
if (Udd_setup_recipient() == USB_REQ_RECIP_ENDPOINT) {
if (udc_req_ep()) {
return true;
}
}

// Here SETUP request unknown by UDC and UDIs
#ifdef USB_DEVICE_SPECIFIC_REQUEST
// Try to decode it in specific callback
return USB_DEVICE_SPECIFIC_REQUEST(); // Ex: Vendor request,...
#else
return false;
#endif
}

//! @}


Motofocuser.rar > udc_desc.h

/**
* \file
*
* \brief Common API for USB Device Interface
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _UDC_DESC_H_
#define _UDC_DESC_H_

#include " conf_usb.h "
#include " usb_protocol.h "
#include " udi.h "

#ifdef __cplusplus
extern " C " {
#endif

/**
* \ingroup udc_group
* \defgroup udc_desc_group USB Device Descriptor
*
* @{
*/

/**
* \brief Defines the memory's location of USB descriptors
*
* By default the Descriptor is stored in RAM
* (UDC_DESC_STORAGE is defined empty).
*
* If you have need to free RAM space,
* it is possible to put descriptor in flash in following case:
* - USB driver authorize flash transfer (USBB on UC3 and USB on Mega)
* - USB Device is not high speed (UDC no need to change USB descriptors)
*
* For UC3 application used " const " .
*
* For Mega application used " code " .
*/
#define UDC_DESC_STORAGE
// Descriptor storage in internal RAM
#if (defined UDC_DATA_USE_HRAM_SUPPORT)
# if defined(__GNUC__)
# define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__( " .data_hram0 " )))
# define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__( " .bss_hram0 " )))
# elif defined(__ICCAVR32__)
# define UDC_DATA(x) COMPILER_ALIGNED(x) __data32
# define UDC_BSS(x) COMPILER_ALIGNED(x) __data32
# endif
#else
# define UDC_DATA(x) COMPILER_ALIGNED(x)
# define UDC_BSS(x) COMPILER_ALIGNED(x)
#endif



/**
* \brief Configuration descriptor and UDI link for one USB speed
*/
typedef struct {
//! USB configuration descriptor
usb_conf_desc_t UDC_DESC_STORAGE *desc;
//! Array of UDI API pointer
udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis;
} udc_config_speed_t;


/**
* \brief All information about the USB Device
*/
typedef struct {
//! USB device descriptor for low or full speed
usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs;
//! USB configuration descriptor and UDI API pointers for low or full speed
udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs;
#ifdef USB_DEVICE_HS_SUPPORT
//! USB device descriptor for high speed
usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs;
//! USB device qualifier, only use in high speed mode
usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier;
//! USB configuration descriptor and UDI API pointers for high speed
udc_config_speed_t UDC_DESC_STORAGE *conf_hs;
#endif
usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos;
} udc_config_t;

//! Global variables of USB Device Descriptor and UDI links
extern UDC_DESC_STORAGE udc_config_t udc_config;

//@}

#ifdef __cplusplus
}
#endif
#endif // _UDC_DESC_H_


Motofocuser.rar > udi.h

/**
* \file
*
* \brief Common API for USB Device Interface
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _UDI_H_
#define _UDI_H_

#include " conf_usb.h "
#include " usb_protocol.h "

#ifdef __cplusplus
extern " C " {
#endif

/**
* \ingroup usb_device_group
* \defgroup udi_group USB Device Interface (UDI)
* The UDI provides a common API for all classes,
* and this is used by UDC for the main control of USB Device interface.
* @{
*/

/**
* \brief UDI API.
*
* The callbacks within this structure are called only by
* USB Device Controller (UDC)
*
* The udc_get_interface_desc() can be use by UDI to know the interface descriptor
* selected by UDC.
*/
typedef struct {
/**
* \brief Enable the interface.
*
* This function is called when the host selects a configuration
* to which this interface belongs through a Set Configuration
* request, and when the host selects an alternate setting of
* this interface through a Set Interface request.
*
* \return \c 1 if function was successfully done, otherwise \c 0.
*/
bool(*enable) (void);

/**
* \brief Disable the interface.
*
* This function is called when this interface is currently
* active, and
* - the host selects any configuration through a Set
* Configuration request, or
* - the host issues a USB reset, or
* - the device is detached from the host (i.e. Vbus is no
* longer present)
*/
void (*disable) (void);

/**
* \brief Handle a control request directed at an interface.
*
* This function is called when this interface is currently
* active and the host sends a SETUP request
* with this interface as the recipient.
*
* Use udd_g_ctrlreq to decode and response to SETUP request.
*
* \return \c 1 if this interface supports the SETUP request, otherwise \c 0.
*/
bool(*setup) (void);

/**
* \brief Returns the current setting of the selected interface.
*
* This function is called when UDC when know alternate setting of selected interface.
*
* \return alternate setting of selected interface
*/
uint8_t(*getsetting) (void);

/**
* \brief To signal that a SOF is occurred
*/
void(*sof_notify) (void);
} udi_api_t;

//@}

#ifdef __cplusplus
}
#endif
#endif // _UDI_H_


Motofocuser.rar > udc.h

/**
* \file
*
* \brief Interface of the USB Device Controller (UDC)
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _UDC_H_
#define _UDC_H_

#include " conf_usb.h "
#include " usb_protocol.h "
#include " udc_desc.h "
#include " udd.h "

#if USB_DEVICE_VENDOR_ID == 0
# error USB_DEVICE_VENDOR_ID cannot be equal to 0
#endif

#if USB_DEVICE_PRODUCT_ID == 0
# error USB_DEVICE_PRODUCT_ID cannot be equal to 0
#endif

#ifdef __cplusplus
extern " C " {
#endif

/**
* \ingroup usb_device_group
* \defgroup udc_group USB Device Controller (UDC)
*
* The UDC provides a high-level abstraction of the usb device.
* You can use these functions to control the main device state
* (start/attach/wakeup).
*
* \section USB_DEVICE_CONF USB Device Custom configuration
* The following USB Device configuration must be included in the conf_usb.h
* file of the application.
*
* USB_DEVICE_VENDOR_ID (Word) & lt; br & gt;
* Vendor ID provided by USB org (ATMEL 0x03EB).
*
* USB_DEVICE_PRODUCT_ID (Word) & lt; br & gt;
* Product ID (Referenced in usb_atmel.h).
*
* USB_DEVICE_MAJOR_VERSION (Byte) & lt; br & gt;
* Major version of the device
*
* USB_DEVICE_MINOR_VERSION (Byte) & lt; br & gt;
* Minor version of the device
*
* USB_DEVICE_MANUFACTURE_NAME (string) & lt; br & gt;
* ASCII name for the manufacture
*
* USB_DEVICE_PRODUCT_NAME (string) & lt; br & gt;
* ASCII name for the product
*
* USB_DEVICE_SERIAL_NAME (string) & lt; br & gt;
* ASCII name to enable and set a serial number
*
* USB_DEVICE_POWER (Numeric) & lt; br & gt;
* (unit mA) Maximum device power
*
* USB_DEVICE_ATTR (Byte) & lt; br & gt;
* USB attributes available:
* - USB_CONFIG_ATTR_SELF_POWERED
* - USB_CONFIG_ATTR_REMOTE_WAKEUP
* Note: if remote wake enabled then defines remotewakeup callbacks,
* see Table 5-2. External API from UDC - Callback
*
* USB_DEVICE_LOW_SPEED (Only defined) & lt; br & gt;
* Force the USB Device to run in low speed
*
* USB_DEVICE_HS_SUPPORT (Only defined) & lt; br & gt;
* Authorize the USB Device to run in high speed
*
* USB_DEVICE_MAX_EP (Byte) & lt; br & gt;
* Define the maximum endpoint number used by the USB Device. & lt; br & gt;
* This one is already defined in UDI default configuration.
* Ex:
* - When endpoint control 0x00, endpoint 0x01 and
* endpoint 0x82 is used then USB_DEVICE_MAX_EP=2
* - When only endpoint control 0x00 is used then USB_DEVICE_MAX_EP=0
* - When endpoint 0x01 and endpoint 0x81 is used then USB_DEVICE_MAX_EP=1 & lt; br & gt;
* (configuration not possible on USBB interface)
* @{
*/

/**
* \brief Authorizes the VBUS event
*
* \return true, if the VBUS monitoring is possible.
*
* \section udc_vbus_monitoring VBus monitoring used cases
*
* The VBus monitoring is used only for USB SELF Power application.
*
* - By default the USB device is automatically attached when Vbus is high
* or when USB is start for devices without internal Vbus monitoring.
* conf_usb.h file does not contains define USB_DEVICE_ATTACH_AUTO_DISABLE.
* \code //#define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
*
* - Add custom VBUS monitoring. conf_usb.h file contains define
* USB_DEVICE_ATTACH_AUTO_DISABLE:
* \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
* User C file contains:
* \code
// Authorize VBUS monitoring
if (!udc_include_vbus_monitoring()) {
// Implement custom VBUS monitoring via GPIO or other
}
Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other
{
// Attach USB Device
udc_attach();
}
\endcode
*
* - Case of battery charging. conf_usb.h file contains define
* USB_DEVICE_ATTACH_AUTO_DISABLE:
* \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
* User C file contains:
* \code
Event VBUS present() // VBUS interrupt or GPIO interrupt or ..
{
// Authorize battery charging, but wait key press to start USB.
}
Event Key press()
{
// Stop batteries charging
// Start USB
udc_attach();
}
\endcode
*/
static inline bool udc_include_vbus_monitoring(void)
{
return udd_include_vbus_monitoring();
}

/*! \brief Start the USB Device stack
*/
void udc_start(void);

/*! \brief Stop the USB Device stack
*/
void udc_stop(void);

/**
* \brief Attach device to the bus when possible
*
* \warning If a VBus control is included in driver,
* then it will attach device when an acceptable Vbus
* level from the host is detected.
*/
static inline void udc_attach(void)
{
udd_attach();
}


/**
* \brief Detaches the device from the bus
*
* The driver must remove pull-up on USB line D- or D+.
*/
static inline void udc_detach(void)
{
udd_detach();
}


/*! \brief The USB driver sends a resume signal called \e " Upstream Resume "
* This is authorized only when the remote wakeup feature is enabled by host.
*/
static inline void udc_remotewakeup(void)
{
udd_send_remotewakeup();
}


/**
* \brief Returns a pointer on the current interface descriptor
*
* \return pointer on the current interface descriptor.
*/
usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);

//@}

/**
* \ingroup usb_group
* \defgroup usb_device_group USB Stack Device
*
* This module includes USB Stack Device implementation.
* The stack is divided in three parts:
* - USB Device Controller (UDC) provides USB chapter 9 compliance
* - USB Device Interface (UDI) provides USB Class compliance
* - USB Device Driver (UDD) provides USB Driver for each Atmel MCU

* Many USB Device applications can be implemented on Atmel MCU.
* Atmel provides many application notes for different applications:
* - AVR4900, provides general information about Device Stack
* - AVR4901, explains how to create a new class
* - AVR4902, explains how to create a composite device
* - AVR49xx, all device classes provided in ASF have an application note
*
* A basic USB knowledge is required to understand the USB Device
* Class application notes (HID,MS,CDC,PHDC,...).
* Then, to create an USB device with
* only one class provided by ASF, refer directly to the application note
* corresponding to this USB class. The USB Device application note for
* New Class and Composite is dedicated to advanced USB users.
*
* @{
*/

//! @}

#ifdef __cplusplus
}
#endif

/**
* \ingroup udc_group
* \defgroup udc_basic_use_case_setup_prereq USB Device Controller (UDC) - Prerequisites
* Common prerequisites for all USB devices.
*
* This module is based on USB device stack full interrupt driven, and supporting
* \ref sleepmgr_group sleepmgr. For AVR and SAM3/4 devices the \ref clk_group clock services
* is supported. For SAMD devices the \ref asfdoc_sam0_system_clock_group clock driver is supported.
*
* The following procedure must be executed to setup the project correctly:
* - Specify the clock configuration:
* - XMEGA USB devices need 48MHz clock input.\n
* XMEGA USB devices need CPU frequency higher than 12MHz.\n
* You can use either an internal RC48MHz auto calibrated by Start of Frames
* or an external OSC.
* - UC3 and SAM3/4 devices without USB high speed support need 48MHz clock input.\n
* You must use a PLL and an external OSC.
* - UC3 and SAM3/4 devices with USB high speed support need 12MHz clock input.\n
* You must use an external OSC.
* - UC3 devices with USBC hardware need CPU frequency higher than 25MHz.
* - SAMD devices without USB high speed support need 48MHz clock input.\n
* You should use DFLL with USBCRM.
* - In conf_board.h, the define CONF_BOARD_USB_PORT must be added to enable USB lines.
* (Not mandatory for all boards)
* - Enable interrupts
* - Initialize the clock service
*
* The usage of \ref sleepmgr_group sleepmgr service is optional, but recommended to reduce power
* consumption:
* - Initialize the sleep manager service
* - Activate sleep mode when the application is in IDLE state
*
* \subpage udc_conf_clock.
*
* for AVR and SAM3/4 devices, add to the initialization code:
* \code
sysclk_init();
irq_initialize_vectors();
cpu_irq_enable();
board_init();
sleepmgr_init(); // Optional
\endcode
*
* For SAMD devices, add to the initialization code:
* \code
system_init();
irq_initialize_vectors();
cpu_irq_enable();
sleepmgr_init(); // Optional
\endcode
* Add to the main IDLE loop:
* \code
sleepmgr_enter_sleep(); // Optional
\endcode
*
*/

/**
* \ingroup udc_group
* \defgroup udc_basic_use_case_setup_code USB Device Controller (UDC) - Example code
* Common example code for all USB devices.
*
* Content of conf_usb.h:
* \code
#define USB_DEVICE_VENDOR_ID 0x03EB
#define USB_DEVICE_PRODUCT_ID 0xXXXX
#define USB_DEVICE_MAJOR_VERSION 1
#define USB_DEVICE_MINOR_VERSION 0
#define USB_DEVICE_POWER 100
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED
\endcode
*
* Add to application C-file:
* \code
void usb_init(void)
{
udc_start();
}
\endcode
*/

/**
* \ingroup udc_group
* \defgroup udc_basic_use_case_setup_flow USB Device Controller (UDC) - Workflow
* Common workflow for all USB devices.
*
* -# Ensure that conf_usb.h is available and contains the following configuration
* which is the main USB device configuration:
* - \code // Vendor ID provided by USB org (ATMEL 0x03EB)
#define USB_DEVICE_VENDOR_ID 0x03EB // Type Word
// Product ID (Atmel PID referenced in usb_atmel.h)
#define USB_DEVICE_PRODUCT_ID 0xXXXX // Type Word
// Major version of the device
#define USB_DEVICE_MAJOR_VERSION 1 // Type Byte
// Minor version of the device
#define USB_DEVICE_MINOR_VERSION 0 // Type Byte
// Maximum device power (mA)
#define USB_DEVICE_POWER 100 // Type 9-bits
// USB attributes to enable features
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED // Flags \endcode
* -# Call the USB device stack start function to enable stack and start USB:
* - \code udc_start(); \endcode
* \note In case of USB dual roles (Device and Host) managed through USB OTG connector
* (USB ID pin), the call of udc_start() must be removed and replaced by uhc_start().
* SeRefer to " AVR4950 section 6.1 Dual roles " for further information about dual roles.
*/

/**
* \page udc_conf_clock conf_clock.h examples with USB support
*
* Content of XMEGA conf_clock.h:
* \code
// Configuration based on internal RC:
// USB clock need of 48Mhz
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
#define CONFIG_OSC_RC32_CAL 48000000UL
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF
// CPU clock need of clock & gt; 12MHz to run with USB (Here 24MHz)
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_2
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1
\endcode
*
* Content of conf_clock.h for AT32UC3A0, AT32UC3A1, AT32UC3B devices (USBB):
* \code
// Configuration based on 12MHz external OSC:
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
#define CONFIG_PLL1_MUL 8
#define CONFIG_PLL1_DIV 2
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
\endcode
*
* Content of conf_clock.h for AT32UC3A3, AT32UC3A4 devices (USBB with high speed support):
* \code
// Configuration based on 12MHz external OSC:
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
\endcode
*
* Content of conf_clock.h for AT32UC3C, ATUCXXD, ATUCXXL3U, ATUCXXL4U devices (USBC):
* \code
// Configuration based on 12MHz external OSC:
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
#define CONFIG_PLL1_MUL 8
#define CONFIG_PLL1_DIV 2
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
// CPU clock need of clock & gt; 25MHz to run with USBC
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL1
\endcode
*
* Content of conf_clock.h for SAM3S, SAM3SD, SAM4S devices (UPD: USB Peripheral Device):
* \code
// PLL1 (B) Options (Fpll = (Fclk * PLL_mul) / PLL_div)
#define CONFIG_PLL1_SOURCE PLL_SRC_MAINCK_XTAL
#define CONFIG_PLL1_MUL 16
#define CONFIG_PLL1_DIV 2
// USB Clock Source Options (Fusb = FpllX / USB_div)
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
#define CONFIG_USBCLK_DIV 2
\endcode
*
* Content of conf_clock.h for SAM3U device (UPDHS: USB Peripheral Device High Speed):
* \code
// USB Clock Source fixed at UPLL.
\endcode
*
* Content of conf_clock.h for SAM3X, SAM3A devices (UOTGHS: USB OTG High Speed):
* \code
// USB Clock Source fixed at UPLL.
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_UPLL
#define CONFIG_USBCLK_DIV 1
\endcode
*
* Content of conf_clocks.h for SAMD devices (USB):
* \code
// System clock bus configuration
# define CONF_CLOCK_FLASH_WAIT_STATES 2

// USB Clock Source fixed at DFLL.
// SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
# define CONF_CLOCK_DFLL_ENABLE true
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY
# define CONF_CLOCK_DFLL_ON_DEMAND true

// Set this to true to configure the GCLK when running clocks_init.
// If set to false, none of the GCLK generators will be configured in clocks_init().
# define CONF_CLOCK_CONFIGURE_GCLK true

// Configure GCLK generator 0 (Main Clock)
# define CONF_CLOCK_GCLK_0_ENABLE true
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
# define CONF_CLOCK_GCLK_0_PRESCALER 1
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
\endcode
*/

/**
* \page udc_use_case_1 Change USB speed
*
* In this use case, the USB device is used with different USB speeds.
*
* \section udc_use_case_1_setup Setup steps
*
* Prior to implement this use case, be sure to have already
* apply the UDI module " basic use case " .
*
* \section udc_use_case_1_usage Usage steps
*
* \subsection udc_use_case_1_usage_code Example code
* Content of conf_usb.h:
* \code
#if // Low speed
#define USB_DEVICE_LOW_SPEED
// #define USB_DEVICE_HS_SUPPORT

#elif // Full speed
// #define USB_DEVICE_LOW_SPEED
// #define USB_DEVICE_HS_SUPPORT

#elif // High speed
// #define USB_DEVICE_LOW_SPEED
#define USB_DEVICE_HS_SUPPORT

#endif
\endcode
*
* \subsection udc_use_case_1_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters
* required for a USB device low speed (1.5Mbit/s):
* - \code #define USB_DEVICE_LOW_SPEED
//#define USB_DEVICE_HS_SUPPORT \endcode
* -# Ensure that conf_usb.h contains the following parameters
* required for a USB device full speed (12Mbit/s):
* - \code //#define USB_DEVICE_LOW_SPEED
//#define USB_DEVICE_HS_SUPPORT \endcode
* -# Ensure that conf_usb.h contains the following parameters
* required for a USB device high speed (480Mbit/s):
* - \code //#define USB_DEVICE_LOW_SPEED
#define USB_DEVICE_HS_SUPPORT \endcode
*/

/**
* \page udc_use_case_2 Use USB strings
*
* In this use case, the usual USB strings is added in the USB device.
*
* \section udc_use_case_2_setup Setup steps
* Prior to implement this use case, be sure to have already
* apply the UDI module " basic use case " .
*
* \section udc_use_case_2_usage Usage steps
*
* \subsection udc_use_case_2_usage_code Example code
* Content of conf_usb.h:
* \code
#define USB_DEVICE_MANUFACTURE_NAME " Manufacture name "
#define USB_DEVICE_PRODUCT_NAME " Product name "
#define USB_DEVICE_SERIAL_NAME " 12...EF "
\endcode
*
* \subsection udc_use_case_2_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters
* required to enable different USB strings:
* - \code // Static ASCII name for the manufacture
#define USB_DEVICE_MANUFACTURE_NAME " Manufacture name " \endcode
* - \code // Static ASCII name for the product
#define USB_DEVICE_PRODUCT_NAME " Product name " \endcode
* - \code // Static ASCII name to enable and set a serial number
#define USB_DEVICE_SERIAL_NAME " 12...EF " \endcode
*/

/**
* \page udc_use_case_3 Use USB remote wakeup feature
*
* In this use case, the USB remote wakeup feature is enabled.
*
* \section udc_use_case_3_setup Setup steps
* Prior to implement this use case, be sure to have already
* apply the UDI module " basic use case " .
*
* \section udc_use_case_3_usage Usage steps
*
* \subsection udc_use_case_3_usage_code Example code
* Content of conf_usb.h:
* \code
#define USB_DEVICE_ATTR \
(USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED)
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
extern void my_callback_remotewakeup_enable(void);
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
extern void my_callback_remotewakeup_disable(void);
\endcode
*
* Add to application C-file:
* \code
void my_callback_remotewakeup_enable(void)
{
// Enable application wakeup events (e.g. enable GPIO interrupt)
}
void my_callback_remotewakeup_disable(void)
{
// Disable application wakeup events (e.g. disable GPIO interrupt)
}

void my_interrupt_event(void)
{
udc_remotewakeup();
}
\endcode
*
* \subsection udc_use_case_3_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters
* required to enable remote wakeup feature:
* - \code // Authorizes the remote wakeup feature
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) \endcode
* - \code // Define callback called when the host enables the remotewakeup feature
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
extern void my_callback_remotewakeup_enable(void); \endcode
* - \code // Define callback called when the host disables the remotewakeup feature
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
extern void my_callback_remotewakeup_disable(void); \endcode
* -# Send a remote wakeup (USB upstream):
* - \code udc_remotewakeup(); \endcode
*/

/**
* \page udc_use_case_5 Bus power application recommendations
*
* In this use case, the USB device BUS power feature is enabled.
* This feature requires a correct power consumption management.
*
* \section udc_use_case_5_setup Setup steps
* Prior to implement this use case, be sure to have already
* apply the UDI module " basic use case " .
*
* \section udc_use_case_5_usage Usage steps
*
* \subsection udc_use_case_5_usage_code Example code
* Content of conf_usb.h:
* \code
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED)
#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
extern void user_callback_suspend_action(void)
#define UDC_RESUME_EVENT() user_callback_resume_action()
extern void user_callback_resume_action(void)
\endcode
*
* Add to application C-file:
* \code
void user_callback_suspend_action(void)
{
// Disable hardware component to reduce power consumption
}
void user_callback_resume_action(void)
{
// Re-enable hardware component
}
\endcode
*
* \subsection udc_use_case_5_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters:
* - \code // Authorizes the BUS power feature
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) \endcode
* - \code // Define callback called when the host suspend the USB line
#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
extern void user_callback_suspend_action(void); \endcode
* - \code // Define callback called when the host or device resume the USB line
#define UDC_RESUME_EVENT() user_callback_resume_action()
extern void user_callback_resume_action(void); \endcode
* -# Reduce power consumption in suspend mode (max. 2.5mA on Vbus):
* - \code void user_callback_suspend_action(void)
{
turn_off_components();
} \endcode
*/

/**
* \page udc_use_case_6 USB dynamic serial number
*
* In this use case, the USB serial strings is dynamic.
* For a static serial string refer to \ref udc_use_case_2.
*
* \section udc_use_case_6_setup Setup steps
* Prior to implement this use case, be sure to have already
* apply the UDI module " basic use case " .
*
* \section udc_use_case_6_usage Usage steps
*
* \subsection udc_use_case_6_usage_code Example code
* Content of conf_usb.h:
* \code
#define USB_DEVICE_SERIAL_NAME
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12
extern uint8_t serial_number[];
\endcode
*
* Add to application C-file:
* \code
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];

void init_build_usb_serial_number(void)
{
serial_number[0] = 'A';
serial_number[1] = 'B';
...
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
} \endcode
*
* \subsection udc_use_case_6_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters
* required to enable a USB serial number strings dynamically:
* - \code #define USB_DEVICE_SERIAL_NAME // Define this empty
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number // Give serial array pointer
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12 // Give size of serial array
extern uint8_t serial_number[]; // Declare external serial array \endcode
* -# Before start USB stack, initialize the serial array
* - \code
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];

void init_build_usb_serial_number(void)
{
serial_number[0] = 'A';
serial_number[1] = 'B';
...
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
} \endcode
*/



#endif // _UDC_H_


Motofocuser.rar > udd.h

/**
* \file
*
* \brief Common API for USB Device Drivers (UDD)
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _UDD_H_
#define _UDD_H_

#include " usb_protocol.h "
#include " udc_desc.h "

#ifdef __cplusplus
extern " C " {
#endif

/**
* \ingroup usb_device_group
* \defgroup udd_group USB Device Driver (UDD)
*
* The UDD driver provides a low-level abstraction of the device
* controller hardware. Most events coming from the hardware such as
* interrupts, which may cause the UDD to call into the UDC and UDI.
*
* @{
*/

//! \brief Endpoint identifier
typedef uint8_t udd_ep_id_t;

//! \brief Endpoint transfer status
//! Returned in parameters of callback register via udd_ep_run routine.
typedef enum {
UDD_EP_TRANSFER_OK = 0,
UDD_EP_TRANSFER_ABORT = 1,
} udd_ep_status_t;

/**
* \brief Global variable to give and record information of the setup request management
*
* This global variable allows to decode and response a setup request.
* It can be updated by udc_process_setup() from UDC or *setup() from UDIs.
*/
typedef struct {
//! Data received in USB SETUP packet
//! Note: The swap of " req.wValues " from uin16_t to le16_t is done by UDD.
usb_setup_req_t req;

//! Point to buffer to send or fill with data following SETUP packet
//! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer)
uint8_t *payload;

//! Size of buffer to send or fill, and content the number of byte transfered
uint16_t payload_size;

//! Callback called after reception of ZLP from setup request
void (*callback) (void);

//! Callback called when the buffer given (.payload) is full or empty.
//! This one return false to abort data transfer, or true with a new buffer in .payload.
bool(*over_under_run) (void);
} udd_ctrl_request_t;
extern udd_ctrl_request_t udd_g_ctrlreq;

//! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer
#define Udd_setup_is_in() \
(USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))

//! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer
#define Udd_setup_is_out() \
(USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))

//! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype.
#define Udd_setup_type() \
(udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)

//! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient
#define Udd_setup_recipient() \
(udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)

/**
* \brief End of halt callback function type.
* Registered by routine udd_ep_wait_stall_clear()
* Callback called when endpoint stall is cleared.
*/
typedef void (*udd_callback_halt_cleared_t) (void);

/**
* \brief End of transfer callback function type.
* Registered by routine udd_ep_run()
* Callback called by USB interrupt after data transfer or abort (reset,...).
*
* \param status UDD_EP_TRANSFER_OK, if transfer is complete
* \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted
* \param n number of data transfered
*/
typedef void (*udd_callback_trans_t) (udd_ep_status_t status,
iram_size_t nb_transfered, udd_ep_id_t ep);

/**
* \brief Authorizes the VBUS event
*
* \return true, if the VBUS monitoring is possible.
*/
bool udd_include_vbus_monitoring(void);

/**
* \brief Enables the USB Device mode
*/
void udd_enable(void);

/**
* \brief Disables the USB Device mode
*/
void udd_disable(void);

/**
* \brief Attach device to the bus when possible
*
* \warning If a VBus control is included in driver,
* then it will attach device when an acceptable Vbus
* level from the host is detected.
*/
void udd_attach(void);

/**
* \brief Detaches the device from the bus
*
* The driver must remove pull-up on USB line D- or D+.
*/
void udd_detach(void);

/**
* \brief Test whether the USB Device Controller is running at high
* speed or not.
*
* \return \c true if the Device is running at high speed mode, otherwise \c false.
*/
bool udd_is_high_speed(void);

/**
* \brief Changes the USB address of device
*
* \param address New USB address
*/
void udd_set_address(uint8_t address);

/**
* \brief Returns the USB address of device
*
* \return USB address
*/
uint8_t udd_getaddress(void);

/**
* \brief Returns the current start of frame number
*
* \return current start of frame number.
*/
uint16_t udd_get_frame_number(void);

/**
* \brief Returns the current micro start of frame number
*
* \return current micro start of frame number required in high speed mode.
*/
uint16_t udd_get_micro_frame_number(void);

/*! \brief The USB driver sends a resume signal called Upstream Resume
*/
void udd_send_remotewakeup(void);

/**
* \brief Load setup payload
*
* \param payload Pointer on payload
* \param payload_size Size of payload
*/
void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size );


/**
* \name Endpoint Management
*
* The following functions allow drivers to create and remove
* endpoints, as well as set, clear and query their " halted " and
* " wedged " states.
*/
//@{

#if (USB_DEVICE_MAX_EP != 0)

/**
* \brief Configures and enables an endpoint
*
* \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT).
* \param bmAttributes Attributes of endpoint declared in the descriptor.
* \param MaxEndpointSize Endpoint maximum size
*
* \return \c 1 if the endpoint is enabled, otherwise \c 0.
*/
bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
uint16_t MaxEndpointSize);

/**
* \brief Disables an endpoint
*
* \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT).
*/
void udd_ep_free(udd_ep_id_t ep);

/**
* \brief Check if the endpoint \a ep is halted.
*
* \param ep The ID of the endpoint to check.
*
* \return \c 1 if \a ep is halted, otherwise \c 0.
*/
bool udd_ep_is_halted(udd_ep_id_t ep);

/**
* \brief Set the halted state of the endpoint \a ep
*
* After calling this function, any transaction on \a ep will result
* in a STALL handshake being sent. Any pending transactions will be
* performed first, however.
*
* \param ep The ID of the endpoint to be halted
*
* \return \c 1 if \a ep is halted, otherwise \c 0.
*/
bool udd_ep_set_halt(udd_ep_id_t ep);

/**
* \brief Clear the halted state of the endpoint \a ep
*
* After calling this function, any transaction on \a ep will
* be handled normally, i.e. a STALL handshake will not be sent, and
* the data toggle sequence will start at DATA0.
*
* \param ep The ID of the endpoint to be un-halted
*
* \return \c 1 if function was successfully done, otherwise \c 0.
*/
bool udd_ep_clear_halt(udd_ep_id_t ep);

/**
* \brief Registers a callback to call when endpoint halt is cleared
*
* \param ep The ID of the endpoint to use
* \param callback NULL or function to call when endpoint halt is cleared
*
* \warning if the endpoint is not halted then the \a callback is called immediately.
*
* \return \c 1 if the register is accepted, otherwise \c 0.
*/
bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
udd_callback_halt_cleared_t callback);

/**
* \brief Allows to receive or send data on an endpoint
*
* The driver uses a specific DMA USB to transfer data
* from internal RAM to endpoint, if this one is available.
* When the transfer is finished or aborted (stall, reset, ...), the \a callback is called.
* The \a callback returns the transfer status and eventually the number of byte transfered.
* Note: The control endpoint is not authorized.
*
* \param ep The ID of the endpoint to use
* \param b_shortpacket Enabled automatic short packet
* \param buf Buffer on Internal RAM to send or fill.
* It must be align, then use COMPILER_WORD_ALIGNED.
* \param buf_size Buffer size to send or fill
* \param callback NULL or function to call at the end of transfer
*
* \warning About \a b_shortpacket, for IN endpoint it means that a short packet
* (or a Zero Length Packet) will be sent to the USB line to properly close the usb
* transfer at the end of the data transfer.
* For Bulk and Interrupt OUT endpoint, it will automatically stop the transfer
* at the end of the data transfer (received short packet).
*
* \return \c 1 if function was successfully done, otherwise \c 0.
*/
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
uint8_t * buf, iram_size_t buf_size,
udd_callback_trans_t callback);
/**
* \brief Aborts transfer on going on endpoint
*
* If a transfer is on going, then it is stopped and
* the callback registered is called to signal the end of transfer.
* Note: The control endpoint is not authorized.
*
* \param ep Endpoint to abort
*/
void udd_ep_abort(udd_ep_id_t ep);

#endif

//@}


/**
* \name High speed test mode management
*
* The following functions allow the device to jump to a specific test mode required in high speed mode.
*/
//@{
void udd_test_mode_j(void);
void udd_test_mode_k(void);
void udd_test_mode_se0_nak(void);
void udd_test_mode_packet(void);
//@}


/**
* \name UDC callbacks to provide for UDD
*
* The following callbacks are used by UDD.
*/
//@{

/**
* \brief Decodes and manages a setup request
*
* The driver call it when a SETUP packet is received.
* The \c udd_g_ctrlreq contains the data of SETUP packet.
* If this callback accepts the setup request then it must
* return \c 1 and eventually update \c udd_g_ctrlreq to send or receive data.
*
* \return \c 1 if the request is accepted, otherwise \c 0.
*/
extern bool udc_process_setup(void);

/**
* \brief Reset the UDC
*
* The UDC must reset all configuration.
*/
extern void udc_reset(void);

/**
* \brief To signal that a SOF is occurred
*
* The UDC must send the signal to all UDIs enabled
*/
extern void udc_sof_notify(void);

//@}

//@}

#ifdef __cplusplus
}
#endif
#endif // _UDD_H_


Motofocuser.rar > usb_protocol.h

/**
* \file
*
* \brief USB protocol definitions.
*
* This file contains the USB definitions and data structures provided by the
* USB 2.0 specification.
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _USB_PROTOCOL_H_
#define _USB_PROTOCOL_H_

#include " usb_atmel.h "

/**
* \ingroup usb_group
* \defgroup usb_protocol_group USB Protocol Definitions
*
* This module defines constants and data structures provided by the USB
* 2.0 specification.
*
* @{
*/

//! Value for field bcdUSB
#define USB_V2_0 0x0200 //! & lt; USB Specification version 2.00
#define USB_V2_1 0x0201 //! & lt; USB Specification version 2.01

/*! \name Generic definitions (Class, subclass and protocol)
*/
//! @{
#define NO_CLASS 0x00
#define CLASS_VENDOR_SPECIFIC 0xFF
#define NO_SUBCLASS 0x00
#define NO_PROTOCOL 0x00
//! @}

//! \name IAD (Interface Association Descriptor) constants
//! @{
#define CLASS_IAD 0xEF
#define SUB_CLASS_IAD 0x02
#define PROTOCOL_IAD 0x01
//! @}

/**
* \brief USB request data transfer direction (bmRequestType)
*/
#define USB_REQ_DIR_OUT (0 & lt; & lt; 7) //! & lt; Host to device
#define USB_REQ_DIR_IN (1 & lt; & lt; 7) //! & lt; Device to host
#define USB_REQ_DIR_MASK (1 & lt; & lt; 7) //! & lt; Mask

/**
* \brief USB request types (bmRequestType)
*/
#define USB_REQ_TYPE_STANDARD (0 & lt; & lt; 5) //! & lt; Standard request
#define USB_REQ_TYPE_CLASS (1 & lt; & lt; 5) //! & lt; Class-specific request
#define USB_REQ_TYPE_VENDOR (2 & lt; & lt; 5) //! & lt; Vendor-specific request
#define USB_REQ_TYPE_MASK (3 & lt; & lt; 5) //! & lt; Mask

/**
* \brief USB recipient codes (bmRequestType)
*/
#define USB_REQ_RECIP_DEVICE (0 & lt; & lt; 0) //! & lt; Recipient device
#define USB_REQ_RECIP_INTERFACE (1 & lt; & lt; 0) //! & lt; Recipient interface
#define USB_REQ_RECIP_ENDPOINT (2 & lt; & lt; 0) //! & lt; Recipient endpoint
#define USB_REQ_RECIP_OTHER (3 & lt; & lt; 0) //! & lt; Recipient other
#define USB_REQ_RECIP_MASK (0x1F) //! & lt; Mask

/**
* \brief Standard USB requests (bRequest)
*/
enum usb_reqid {
USB_REQ_GET_STATUS = 0,
USB_REQ_CLEAR_FEATURE = 1,
USB_REQ_SET_FEATURE = 3,
USB_REQ_SET_ADDRESS = 5,
USB_REQ_GET_DESCRIPTOR = 6,
USB_REQ_SET_DESCRIPTOR = 7,
USB_REQ_GET_CONFIGURATION = 8,
USB_REQ_SET_CONFIGURATION = 9,
USB_REQ_GET_INTERFACE = 10,
USB_REQ_SET_INTERFACE = 11,
USB_REQ_SYNCH_FRAME = 12,
};

/**
* \brief Standard USB device status flags
*
*/
enum usb_device_status {
USB_DEV_STATUS_BUS_POWERED = 0,
USB_DEV_STATUS_SELF_POWERED = 1,
USB_DEV_STATUS_REMOTEWAKEUP = 2
};

/**
* \brief Standard USB Interface status flags
*
*/
enum usb_interface_status {
USB_IFACE_STATUS_RESERVED = 0
};

/**
* \brief Standard USB endpoint status flags
*
*/
enum usb_endpoint_status {
USB_EP_STATUS_HALTED = 1,
};

/**
* \brief Standard USB device feature flags
*
* \note valid for SetFeature request.
*/
enum usb_device_feature {
USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //! & lt; Remote wakeup enabled
USB_DEV_FEATURE_TEST_MODE = 2, //! & lt; USB test mode
USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3,
USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4,
USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5
};

/**
* \brief Test Mode possible on HS USB device
*
* \note valid for USB_DEV_FEATURE_TEST_MODE request.
*/
enum usb_device_hs_test_mode {
USB_DEV_TEST_MODE_J = 1,
USB_DEV_TEST_MODE_K = 2,
USB_DEV_TEST_MODE_SE0_NAK = 3,
USB_DEV_TEST_MODE_PACKET = 4,
USB_DEV_TEST_MODE_FORCE_ENABLE = 5,
};

/**
* \brief Standard USB endpoint feature/status flags
*/
enum usb_endpoint_feature {
USB_EP_FEATURE_HALT = 0,
};

/**
* \brief Standard USB Test Mode Selectors
*/
enum usb_test_mode_selector {
USB_TEST_J = 0x01,
USB_TEST_K = 0x02,
USB_TEST_SE0_NAK = 0x03,
USB_TEST_PACKET = 0x04,
USB_TEST_FORCE_ENABLE = 0x05,
};

/**
* \brief Standard USB descriptor types
*/
enum usb_descriptor_type {
USB_DT_DEVICE = 1,
USB_DT_CONFIGURATION = 2,
USB_DT_STRING = 3,
USB_DT_INTERFACE = 4,
USB_DT_ENDPOINT = 5,
USB_DT_DEVICE_QUALIFIER = 6,
USB_DT_OTHER_SPEED_CONFIGURATION = 7,
USB_DT_INTERFACE_POWER = 8,
USB_DT_OTG = 9,
USB_DT_IAD = 0x0B,
USB_DT_BOS = 0x0F,
USB_DT_DEVICE_CAPABILITY = 0x10,
};

/**
* \brief USB Device Capability types
*/
enum usb_capability_type {
USB_DC_USB20_EXTENSION = 0x02,
};

/**
* \brief USB Device Capability - USB 2.0 Extension
* To fill bmAttributes field of usb_capa_ext_desc_t structure.
*/
enum usb_capability_extension_attr {
USB_DC_EXT_LPM = 0x00000002,
};

#define HIRD_50_US 0
#define HIRD_125_US 1
#define HIRD_200_US 2
#define HIRD_275_US 3
#define HIRD_350_US 4
#define HIRD_425_US 5
#define HIRD_500_US 6
#define HIRD_575_US 7
#define HIRD_650_US 8
#define HIRD_725_US 9
#define HIRD_800_US 10
#define HIRD_875_US 11
#define HIRD_950_US 12
#define HIRD_1025_US 13
#define HIRD_1100_US 14
#define HIRD_1175_US 15

/** Fields definition from a LPM TOKEN */
#define USB_LPM_ATTRIBUT_BLINKSTATE_MASK (0xF & lt; & lt; 0)
#define USB_LPM_ATTRIBUT_FIRD_MASK (0xF & lt; & lt; 4)
#define USB_LPM_ATTRIBUT_REMOTEWAKE_MASK (1 & lt; & lt; 8)
#define USB_LPM_ATTRIBUT_BLINKSTATE(value) ((value & 0xF) & lt; & lt; 0)
#define USB_LPM_ATTRIBUT_FIRD(value) ((value & 0xF) & lt; & lt; 4)
#define USB_LPM_ATTRIBUT_REMOTEWAKE(value) ((value & 1) & lt; & lt; 8)
#define USB_LPM_ATTRIBUT_BLINKSTATE_L1 USB_LPM_ATTRIBUT_BLINKSTATE(1)

/**
* \brief Standard USB endpoint transfer types
*/
enum usb_ep_type {
USB_EP_TYPE_CONTROL = 0x00,
USB_EP_TYPE_ISOCHRONOUS = 0x01,
USB_EP_TYPE_BULK = 0x02,
USB_EP_TYPE_INTERRUPT = 0x03,
USB_EP_TYPE_MASK = 0x03,
};

/**
* \brief Standard USB language IDs for string descriptors
*/
enum usb_langid {
USB_LANGID_EN_US = 0x0409, //! & lt; English (United States)
};

/**
* \brief Mask selecting the index part of an endpoint address
*/
#define USB_EP_ADDR_MASK 0x0f

//! \brief USB address identifier
typedef uint8_t usb_add_t;

/**
* \brief Endpoint transfer direction is IN
*/
#define USB_EP_DIR_IN 0x80

/**
* \brief Endpoint transfer direction is OUT
*/
#define USB_EP_DIR_OUT 0x00

//! \brief Endpoint identifier
typedef uint8_t usb_ep_t;

/**
* \brief Maximum length in bytes of a USB descriptor
*
* The maximum length of a USB descriptor is limited by the 8-bit
* bLength field.
*/
#define USB_MAX_DESC_LEN 255

/*
* 2-byte alignment requested for all USB structures.
*/
COMPILER_PACK_SET(1)

/**
* \brief A USB Device SETUP request
*
* The data payload of SETUP packets always follows this structure.
*/
typedef struct {
uint8_t bmRequestType;
uint8_t bRequest;
le16_t wValue;
le16_t wIndex;
le16_t wLength;
} usb_setup_req_t;

/**
* \brief Standard USB device descriptor structure
*/
typedef struct {
uint8_t bLength;
uint8_t bDescriptorType;
le16_t bcdUSB;
uint8_t bDeviceClass;
uint8_t bDeviceSubClass;
uint8_t bDeviceProtocol;
uint8_t bMaxPacketSize0;
le16_t idVendor;
le16_t idProduct;
le16_t bcdDevice;
uint8_t iManufacturer;
uint8_t iProduct;
uint8_t iSerialNumber;
uint8_t bNumConfigurations;
} usb_dev_desc_t;

/**
* \brief Standard USB device qualifier descriptor structure
*
* This descriptor contains information about the device when running at
* the " other " speed (i.e. if the device is currently operating at high
* speed, this descriptor can be used to determine what would change if
* the device was operating at full speed.)
*/
typedef struct {
uint8_t bLength;
uint8_t bDescriptorType;
le16_t bcdUSB;
uint8_t bDeviceClass;
uint8_t bDeviceSubClass;
uint8_t bDeviceProtocol;
uint8_t bMaxPacketSize0;
uint8_t bNumConfigurations;
uint8_t bReserved;
} usb_dev_qual_desc_t;

/**
* \brief USB Device BOS descriptor structure
*
* The BOS descriptor (Binary device Object Store) defines a root
* descriptor that is similar to the configuration descriptor, and is
* the base descriptor for accessing a family of related descriptors.
* A host can read a BOS descriptor and learn from the wTotalLength field
* the entire size of the device-level descriptor set, or it can read in
* the entire BOS descriptor set of device capabilities.
* The host accesses this descriptor using the GetDescriptor() request.
* The descriptor type in the GetDescriptor() request is set to BOS.
*/
typedef struct {
uint8_t bLength;
uint8_t bDescriptorType;
le16_t wTotalLength;
uint8_t bNumDeviceCaps;
} usb_dev_bos_desc_t;


/**
* \brief USB Device Capabilities - USB 2.0 Extension Descriptor structure
*
* Defines the set of USB 1.1-specific device level capabilities.
*/
typedef struct {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bDevCapabilityType;
le32_t bmAttributes;
} usb_dev_capa_ext_desc_t;

/**
* \brief USB Device LPM Descriptor structure
*
* The BOS descriptor and capabilities descriptors for LPM.
*/
typedef struct {
usb_dev_bos_desc_t bos;
usb_dev_capa_ext_desc_t capa_ext;
} usb_dev_lpm_desc_t;

/**
* \brief Standard USB Interface Association Descriptor structure
*/
typedef struct {
uint8_t bLength; //! & lt; size of this descriptor in bytes
uint8_t bDescriptorType; //! & lt; INTERFACE descriptor type
uint8_t bFirstInterface; //! & lt; Number of interface
uint8_t bInterfaceCount; //! & lt; value to select alternate setting
uint8_t bFunctionClass; //! & lt; Class code assigned by the USB
uint8_t bFunctionSubClass;//! & lt; Sub-class code assigned by the USB
uint8_t bFunctionProtocol;//! & lt; Protocol code assigned by the USB
uint8_t iFunction; //! & lt; Index of string descriptor
} usb_association_desc_t;


/**
* \brief Standard USB configuration descriptor structure
*/
typedef struct {
uint8_t bLength;
uint8_t bDescriptorType;
le16_t wTotalLength;
uint8_t bNumInterfaces;
uint8_t bConfigurationValue;
uint8_t iConfiguration;
uint8_t bmAttributes;
uint8_t bMaxPower;
} usb_conf_desc_t;


#define USB_CONFIG_ATTR_MUST_SET (1 & lt; & lt; 7) //! & lt; Must always be set
#define USB_CONFIG_ATTR_BUS_POWERED (0 & lt; & lt; 6) //! & lt; Bus-powered
#define USB_CONFIG_ATTR_SELF_POWERED (1 & lt; & lt; 6) //! & lt; Self-powered
#define USB_CONFIG_ATTR_REMOTE_WAKEUP (1 & lt; & lt; 5) //! & lt; remote wakeup supported

#define USB_CONFIG_MAX_POWER(ma) (((ma) + 1) / 2) //! & lt; Max power in mA

/**
* \brief Standard USB association descriptor structure
*/
typedef struct {
uint8_t bLength; //! & lt; Size of this descriptor in bytes
uint8_t bDescriptorType; //! & lt; Interface descriptor type
uint8_t bFirstInterface; //! & lt; Number of interface
uint8_t bInterfaceCount; //! & lt; value to select alternate setting
uint8_t bFunctionClass; //! & lt; Class code assigned by the USB
uint8_t bFunctionSubClass; //! & lt; Sub-class code assigned by the USB
uint8_t bFunctionProtocol; //! & lt; Protocol code assigned by the USB
uint8_t iFunction; //! & lt; Index of string descriptor
} usb_iad_desc_t;

/**
* \brief Standard USB interface descriptor structure
*/
typedef struct {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bInterfaceNumber;
uint8_t bAlternateSetting;
uint8_t bNumEndpoints;
uint8_t bInterfaceClass;
uint8_t bInterfaceSubClass;
uint8_t bInterfaceProtocol;
uint8_t iInterface;
} usb_iface_desc_t;

/**
* \brief Standard USB endpoint descriptor structure
*/
typedef struct {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bEndpointAddress;
uint8_t bmAttributes;
le16_t wMaxPacketSize;
uint8_t bInterval;
} usb_ep_desc_t;


/**
* \brief A standard USB string descriptor structure
*/
typedef struct {
uint8_t bLength;
uint8_t bDescriptorType;
} usb_str_desc_t;

typedef struct {
usb_str_desc_t desc;
le16_t string[1];
} usb_str_lgid_desc_t;

COMPILER_PACK_RESET()

//! @}

#endif /* _USB_PROTOCOL_H_ */


Motofocuser.rar > usb_protocol_cdc.h

/**
* \file
*
* \brief USB Communication Device Class (CDC) protocol definitions
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef _USB_PROTOCOL_CDC_H_
#define _USB_PROTOCOL_CDC_H_

#include " compiler.h "

/**
* \ingroup usb_protocol_group
* \defgroup cdc_protocol_group Communication Device Class Definitions
* @{
*/

/**
* \name Possible values of class
*/
//@{
#define CDC_CLASS_DEVICE 0x02 //! & lt; USB Communication Device Class
#define CDC_CLASS_COMM 0x02 //! & lt; CDC Communication Class Interface
#define CDC_CLASS_DATA 0x0A //! & lt; CDC Data Class Interface
//@}

//! \name USB CDC Subclass IDs
//@{
#define CDC_SUBCLASS_DLCM 0x01 //! & lt; Direct Line Control Model
#define CDC_SUBCLASS_ACM 0x02 //! & lt; Abstract Control Model
#define CDC_SUBCLASS_TCM 0x03 //! & lt; Telephone Control Model
#define CDC_SUBCLASS_MCCM 0x04 //! & lt; Multi-Channel Control Model
#define CDC_SUBCLASS_CCM 0x05 //! & lt; CAPI Control Model
#define CDC_SUBCLASS_ETH 0x06 //! & lt; Ethernet Networking Control Model
#define CDC_SUBCLASS_ATM 0x07 //! & lt; ATM Networking Control Model
//@}

//! \name USB CDC Communication Interface Protocol IDs
//@{
#define CDC_PROTOCOL_V25TER 0x01 //! & lt; Common AT commands
//@}

//! \name USB CDC Data Interface Protocol IDs
//@{
#define CDC_PROTOCOL_I430 0x30 //! & lt; ISDN BRI
#define CDC_PROTOCOL_HDLC 0x31 //! & lt; HDLC
#define CDC_PROTOCOL_TRANS 0x32 //! & lt; Transparent
#define CDC_PROTOCOL_Q921M 0x50 //! & lt; Q.921 management protocol
#define CDC_PROTOCOL_Q921 0x51 //! & lt; Q.931 [sic] Data link protocol
#define CDC_PROTOCOL_Q921TM 0x52 //! & lt; Q.921 TEI-multiplexor
#define CDC_PROTOCOL_V42BIS 0x90 //! & lt; Data compression procedures
#define CDC_PROTOCOL_Q931 0x91 //! & lt; Euro-ISDN protocol control
#define CDC_PROTOCOL_V120 0x92 //! & lt; V.24 rate adaption to ISDN
#define CDC_PROTOCOL_CAPI20 0x93 //! & lt; CAPI Commands
#define CDC_PROTOCOL_HOST 0xFD //! & lt; Host based driver
/**
* \brief Describes the Protocol Unit Functional Descriptors [sic]
* on Communication Class Interface
*/
#define CDC_PROTOCOL_PUFD 0xFE
//@}

//! \name USB CDC Functional Descriptor Types
//@{
#define CDC_CS_INTERFACE 0x24 //! & lt; Interface Functional Descriptor
#define CDC_CS_ENDPOINT 0x25 //! & lt; Endpoint Functional Descriptor
//@}

//! \name USB CDC Functional Descriptor Subtypes
//@{
#define CDC_SCS_HEADER 0x00 //! & lt; Header Functional Descriptor
#define CDC_SCS_CALL_MGMT 0x01 //! & lt; Call Management
#define CDC_SCS_ACM 0x02 //! & lt; Abstract Control Management
#define CDC_SCS_UNION 0x06 //! & lt; Union Functional Descriptor
//@}

//! \name USB CDC Request IDs
//@{
#define USB_REQ_CDC_SEND_ENCAPSULATED_COMMAND 0x00
#define USB_REQ_CDC_GET_ENCAPSULATED_RESPONSE 0x01
#define USB_REQ_CDC_SET_COMM_FEATURE 0x02
#define USB_REQ_CDC_GET_COMM_FEATURE 0x03
#define USB_REQ_CDC_CLEAR_COMM_FEATURE 0x04
#define USB_REQ_CDC_SET_AUX_LINE_STATE 0x10
#define USB_REQ_CDC_SET_HOOK_STATE 0x11
#define USB_REQ_CDC_PULSE_SETUP 0x12
#define USB_REQ_CDC_SEND_PULSE 0x13
#define USB_REQ_CDC_SET_PULSE_TIME 0x14
#define USB_REQ_CDC_RING_AUX_JACK 0x15
#define USB_REQ_CDC_SET_LINE_CODING 0x20
#define USB_REQ_CDC_GET_LINE_CODING 0x21
#define USB_REQ_CDC_SET_CONTROL_LINE_STATE 0x22
#define USB_REQ_CDC_SEND_BREAK 0x23
#define USB_REQ_CDC_SET_RINGER_PARMS 0x30
#define USB_REQ_CDC_GET_RINGER_PARMS 0x31
#define USB_REQ_CDC_SET_OPERATION_PARMS 0x32
#define USB_REQ_CDC_GET_OPERATION_PARMS 0x33
#define USB_REQ_CDC_SET_LINE_PARMS 0x34
#define USB_REQ_CDC_GET_LINE_PARMS 0x35
#define USB_REQ_CDC_DIAL_DIGITS 0x36
#define USB_REQ_CDC_SET_UNIT_PARAMETER 0x37
#define USB_REQ_CDC_GET_UNIT_PARAMETER 0x38
#define USB_REQ_CDC_CLEAR_UNIT_PARAMETER 0x39
#define USB_REQ_CDC_GET_PROFILE 0x3A
#define USB_REQ_CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40
#define USB_REQ_CDC_SET_ETHERNET_POWER_MANAGEMENT_PATTERNFILTER 0x41
#define USB_REQ_CDC_GET_ETHERNET_POWER_MANAGEMENT_PATTERNFILTER 0x42
#define USB_REQ_CDC_SET_ETHERNET_PACKET_FILTER 0x43
#define USB_REQ_CDC_GET_ETHERNET_STATISTIC 0x44
#define USB_REQ_CDC_SET_ATM_DATA_FORMAT 0x50
#define USB_REQ_CDC_GET_ATM_DEVICE_STATISTICS 0x51
#define USB_REQ_CDC_SET_ATM_DEFAULT_VC 0x52
#define USB_REQ_CDC_GET_ATM_VC_STATISTICS 0x53
// Added bNotification codes according cdc spec 1.1 chapter 6.3
#define USB_REQ_CDC_NOTIFY_RING_DETECT 0x09
#define USB_REQ_CDC_NOTIFY_SERIAL_STATE 0x20
#define USB_REQ_CDC_NOTIFY_CALL_STATE_CHANGE 0x28
#define USB_REQ_CDC_NOTIFY_LINE_STATE_CHANGE 0x29
//@}

/*
* Need to pack structures tightly, or the compiler might insert padding
* and violate the spec-mandated layout.
*/
COMPILER_PACK_SET(1)

//! \name USB CDC Descriptors
//@{


//! CDC Header Functional Descriptor
typedef struct {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
le16_t bcdCDC;
} usb_cdc_hdr_desc_t;

//! CDC Call Management Functional Descriptor
typedef struct {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bmCapabilities;
uint8_t bDataInterface;
} usb_cdc_call_mgmt_desc_t;

//! CDC ACM Functional Descriptor
typedef struct {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bmCapabilities;
} usb_cdc_acm_desc_t;

//! CDC Union Functional Descriptor
typedef struct {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bMasterInterface;
uint8_t bSlaveInterface0;
} usb_cdc_union_desc_t;


//! \name USB CDC Call Management Capabilities
//@{
//! Device handles call management itself
#define CDC_CALL_MGMT_SUPPORTED (1 & lt; & lt; 0)
//! Device can send/receive call management info over a Data Class interface
#define CDC_CALL_MGMT_OVER_DCI (1 & lt; & lt; 1)
//@}

//! \name USB CDC ACM Capabilities
//@{
//! Device supports the request combination of
//! Set_Comm_Feature, Clear_Comm_Feature, and Get_Comm_Feature.
#define CDC_ACM_SUPPORT_FEATURE_REQUESTS (1 & lt; & lt; 0)
//! Device supports the request combination of
//! Set_Line_Coding, Set_Control_Line_State, Get_Line_Coding,
//! and the notification Serial_State.
#define CDC_ACM_SUPPORT_LINE_REQUESTS (1 & lt; & lt; 1)
//! Device supports the request Send_Break
#define CDC_ACM_SUPPORT_SENDBREAK_REQUESTS (1 & lt; & lt; 2)
//! Device supports the notification Network_Connection.
#define CDC_ACM_SUPPORT_NOTIFY_REQUESTS (1 & lt; & lt; 3)
//@}
//@}

//! \name USB CDC line control
//@{

//! \name USB CDC line coding
//@{
//! Line Coding structure
typedef struct {
le32_t dwDTERate;
uint8_t bCharFormat;
uint8_t bParityType;
uint8_t bDataBits;
} usb_cdc_line_coding_t;
//! Possible values of bCharFormat
enum cdc_char_format {
CDC_STOP_BITS_1 = 0, //! & lt; 1 stop bit
CDC_STOP_BITS_1_5 = 1, //! & lt; 1.5 stop bits
CDC_STOP_BITS_2 = 2, //! & lt; 2 stop bits
};
//! Possible values of bParityType
enum cdc_parity {
CDC_PAR_NONE = 0, //! & lt; No parity
CDC_PAR_ODD = 1, //! & lt; Odd parity
CDC_PAR_EVEN = 2, //! & lt; Even parity
CDC_PAR_MARK = 3, //! & lt; Parity forced to 0 (space)
CDC_PAR_SPACE = 4, //! & lt; Parity forced to 1 (mark)
};
//@}

//! \name USB CDC control signals
//! spec 1.1 chapter 6.2.14
//@{

//! Control signal structure
typedef struct {
uint16_t value;
} usb_cdc_control_signal_t;

//! \name Possible values in usb_cdc_control_signal_t
//@{
//! Carrier control for half duplex modems.
//! This signal corresponds to V.24 signal 105 and RS-232 signal RTS.
//! The device ignores the value of this bit
//! when operating in full duplex mode.
#define CDC_CTRL_SIGNAL_ACTIVATE_CARRIER (1 & lt; & lt; 1)
//! Indicates to DCE if DTE is present or not.
//! This signal corresponds to V.24 signal 108/2 and RS-232 signal DTR.
#define CDC_CTRL_SIGNAL_DTE_PRESENT (1 & lt; & lt; 0)
//@}
//@}


//! \name USB CDC notification message
//@{

typedef struct {
uint8_t bmRequestType;
uint8_t bNotification;
le16_t wValue;
le16_t wIndex;
le16_t wLength;
} usb_cdc_notify_msg_t;

//! \name USB CDC serial state
//@{*

//! Hardware handshake support (cdc spec 1.1 chapter 6.3.5)
typedef struct {
usb_cdc_notify_msg_t header;
le16_t value;
} usb_cdc_notify_serial_state_t;

//! \name Possible values in usb_cdc_notify_serial_state_t
//@{
#define CDC_SERIAL_STATE_DCD CPU_TO_LE16((1 & lt; & lt; 0))
#define CDC_SERIAL_STATE_DSR CPU_TO_LE16((1 & lt; & lt; 1))
#define CDC_SERIAL_STATE_BREAK CPU_TO_LE16((1 & lt; & lt; 2))
#define CDC_SERIAL_STATE_RING CPU_TO_LE16((1 & lt; & lt; 3))
#define CDC_SERIAL_STATE_FRAMING CPU_TO_LE16((1 & lt; & lt; 4))
#define CDC_SERIAL_STATE_PARITY CPU_TO_LE16((1 & lt; & lt; 5))
#define CDC_SERIAL_STATE_OVERRUN CPU_TO_LE16((1 & lt; & lt; 6))
//@}
//! @}

//! @}

COMPILER_PACK_RESET()

//! @}

#endif // _USB_PROTOCOL_CDC_H_


Motofocuser.rar > udi_cdc_conf.h

/**
* \file
*
* \brief Default CDC configuration for a USB Device with a single interface
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _UDI_CDC_CONF_H_
#define _UDI_CDC_CONF_H_

#include " usb_protocol_cdc.h "
#include " conf_usb.h "

#ifndef UDI_CDC_PORT_NB
# define UDI_CDC_PORT_NB 1
#endif

#ifdef __cplusplus
extern " C " {
#endif

/**
* \addtogroup udi_cdc_group_single_desc
* @{
*/

//! Control endpoint size (Endpoint 0)
#define USB_DEVICE_EP_CTRL_SIZE 64

#if XMEGA
/**
* \name Endpoint configuration on XMEGA
* The XMEGA supports a IN and OUT endpoint with the same number endpoint,
* thus XMEGA can support up to 7 CDC interfaces.
*/
//@{
#define UDI_CDC_DATA_EP_IN_0 ( 1 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_0 ( 2 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_0 ( 2 | USB_EP_DIR_IN) // Notify endpoint
#define UDI_CDC_DATA_EP_IN_1 ( 3 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_1 ( 4 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_1 ( 4 | USB_EP_DIR_IN) // Notify endpoint
#define UDI_CDC_DATA_EP_IN_2 ( 5 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_2 ( 6 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_2 ( 6 | USB_EP_DIR_IN) // Notify endpoint
#define UDI_CDC_DATA_EP_IN_3 ( 7 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_3 ( 8 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_3 ( 8 | USB_EP_DIR_IN) // Notify endpoint
#define UDI_CDC_DATA_EP_IN_4 ( 9 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_4 (10 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_4 (10 | USB_EP_DIR_IN) // Notify endpoint
#define UDI_CDC_DATA_EP_IN_5 (11 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_5 (12 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_5 (12 | USB_EP_DIR_IN) // Notify endpoint
#define UDI_CDC_DATA_EP_IN_6 (13 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_6 (14 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_6 (14 | USB_EP_DIR_IN) // Notify endpoint
//! 2 endpoints numbers used per CDC interface
#define USB_DEVICE_MAX_EP (2*UDI_CDC_PORT_NB)
//@}

#else

/**
* \name Default endpoint configuration
* The USBB, UDP, UDPHS and UOTGHS interfaces can support up to 2 CDC interfaces.
*/
//@{
# if UDI_CDC_PORT_NB & gt; 2
# error USBB, UDP, UDPHS and UOTGHS interfaces have not enought endpoints.
# endif
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
# if SAM3U
/* For 3U max endpoint size of 4 is 64, use 5 and 6 as bulk tx and rx */
# define UDI_CDC_DATA_EP_IN_1 (6 | USB_EP_DIR_IN) // TX
# define UDI_CDC_DATA_EP_OUT_1 (5 | USB_EP_DIR_OUT) // RX
# define UDI_CDC_COMM_EP_1 (4 | USB_EP_DIR_IN) // Notify
# else
# define UDI_CDC_DATA_EP_IN_1 (4 | USB_EP_DIR_IN) // TX
# define UDI_CDC_DATA_EP_OUT_1 (5 | USB_EP_DIR_OUT) // RX
# define UDI_CDC_COMM_EP_1 (6 | USB_EP_DIR_IN) // Notify
# endif
//! 3 endpoints used per CDC interface
#define USB_DEVICE_MAX_EP (3*UDI_CDC_PORT_NB)
//@}

#endif

/**
* \name Default Interface numbers
*/
//@{
#define UDI_CDC_COMM_IFACE_NUMBER_0 0
#define UDI_CDC_DATA_IFACE_NUMBER_0 1
#define UDI_CDC_COMM_IFACE_NUMBER_1 2
#define UDI_CDC_DATA_IFACE_NUMBER_1 3
#define UDI_CDC_COMM_IFACE_NUMBER_2 4
#define UDI_CDC_DATA_IFACE_NUMBER_2 5
#define UDI_CDC_COMM_IFACE_NUMBER_3 6
#define UDI_CDC_DATA_IFACE_NUMBER_3 7
#define UDI_CDC_COMM_IFACE_NUMBER_4 8
#define UDI_CDC_DATA_IFACE_NUMBER_4 9
#define UDI_CDC_COMM_IFACE_NUMBER_5 10
#define UDI_CDC_DATA_IFACE_NUMBER_5 11
#define UDI_CDC_COMM_IFACE_NUMBER_6 12
#define UDI_CDC_DATA_IFACE_NUMBER_6 13
//@}

//@}

#ifdef __cplusplus
}
#endif
#endif // _UDI_CDC_CONF_H_


Motofocuser.rar > udi_cdc.h

/**
* \file
*
* \brief USB Device Communication Device Class (CDC) interface definitions.
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _UDI_CDC_H_
#define _UDI_CDC_H_

#include " conf_usb.h "
#include " usb_protocol.h "
#include " usb_protocol_cdc.h "
#include " udd.h "
#include " udc_desc.h "
#include " udi.h "

// Check the number of port
#ifndef UDI_CDC_PORT_NB
# define UDI_CDC_PORT_NB 1
#endif
#if (UDI_CDC_PORT_NB & lt; 1) || (UDI_CDC_PORT_NB & gt; 7)
# error UDI_CDC_PORT_NB must be between 1 and 7
#endif

#ifdef __cplusplus
extern " C " {
#endif

/**
* \addtogroup udi_cdc_group_udc
* @{
*/

//! Global structure which contains standard UDI API for UDC
extern UDC_DESC_STORAGE udi_api_t udi_api_cdc_comm;
extern UDC_DESC_STORAGE udi_api_t udi_api_cdc_data;
//@}

/**
* \ingroup udi_cdc_group
* \defgroup udi_cdc_group_desc USB interface descriptors
*
* The following structures provide predefined USB interface descriptors.
* It must be used to define the final USB descriptors.
*/
//@{

/**
* \brief Communication Class interface descriptor
*
* Interface descriptor with associated functional and endpoint
* descriptors for the CDC Communication Class interface.
*/
typedef struct {
//! Standard interface descriptor
usb_iface_desc_t iface;
//! CDC Header functional descriptor
usb_cdc_hdr_desc_t header;
//! CDC Abstract Control Model functional descriptor
usb_cdc_acm_desc_t acm;
//! CDC Union functional descriptor
usb_cdc_union_desc_t union_desc;
//! CDC Call Management functional descriptor
usb_cdc_call_mgmt_desc_t call_mgmt;
//! Notification endpoint descriptor
usb_ep_desc_t ep_notify;
} udi_cdc_comm_desc_t;


/**
* \brief Data Class interface descriptor
*
* Interface descriptor with associated endpoint descriptors for the
* CDC Data Class interface.
*/
typedef struct {
//! Standard interface descriptor
usb_iface_desc_t iface;
//! Data IN/OUT endpoint descriptors
usb_ep_desc_t ep_in;
usb_ep_desc_t ep_out;
} udi_cdc_data_desc_t;


//! CDC communication endpoints size for all speeds
#define UDI_CDC_COMM_EP_SIZE 64
//! CDC data endpoints size for FS speed (8B, 16B, 32B, 64B)
#define UDI_CDC_DATA_EPS_FS_SIZE 64
//! CDC data endpoints size for HS speed (512B only)
#define UDI_CDC_DATA_EPS_HS_SIZE 512

/**
* \name Content of interface descriptors
* Up to 7 CDC interfaces can be implemented on a USB device.
*/
//@{
//! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_0
#define UDI_CDC_IAD_STRING_ID_0 0
#endif
#ifndef UDI_CDC_COMM_STRING_ID_0
#define UDI_CDC_COMM_STRING_ID_0 0
#endif
#ifndef UDI_CDC_DATA_STRING_ID_0
#define UDI_CDC_DATA_STRING_ID_0 0
#endif
#define UDI_CDC_IAD_DESC_0 UDI_CDC_IAD_DESC(0)
#define UDI_CDC_COMM_DESC_0 UDI_CDC_COMM_DESC(0)
#define UDI_CDC_DATA_DESC_0_FS UDI_CDC_DATA_DESC_FS(0)
#define UDI_CDC_DATA_DESC_0_HS UDI_CDC_DATA_DESC_HS(0)

//! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_1
#define UDI_CDC_IAD_STRING_ID_1 0
#endif
#ifndef UDI_CDC_COMM_STRING_ID_1
#define UDI_CDC_COMM_STRING_ID_1 0
#endif
#ifndef UDI_CDC_DATA_STRING_ID_1
#define UDI_CDC_DATA_STRING_ID_1 0
#endif
#define UDI_CDC_IAD_DESC_1 UDI_CDC_IAD_DESC(1)
#define UDI_CDC_COMM_DESC_1 UDI_CDC_COMM_DESC(1)
#define UDI_CDC_DATA_DESC_1_FS UDI_CDC_DATA_DESC_FS(1)
#define UDI_CDC_DATA_DESC_1_HS UDI_CDC_DATA_DESC_HS(1)

//! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_2
#define UDI_CDC_IAD_STRING_ID_2 0
#endif
#ifndef UDI_CDC_COMM_STRING_ID_2
#define UDI_CDC_COMM_STRING_ID_2 0
#endif
#ifndef UDI_CDC_DATA_STRING_ID_2
#define UDI_CDC_DATA_STRING_ID_2 0
#endif
#define UDI_CDC_IAD_DESC_2 UDI_CDC_IAD_DESC(2)
#define UDI_CDC_COMM_DESC_2 UDI_CDC_COMM_DESC(2)
#define UDI_CDC_DATA_DESC_2_FS UDI_CDC_DATA_DESC_FS(2)
#define UDI_CDC_DATA_DESC_2_HS UDI_CDC_DATA_DESC_HS(2)

//! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_3
#define UDI_CDC_IAD_STRING_ID_3 0
#endif
#ifndef UDI_CDC_COMM_STRING_ID_3
#define UDI_CDC_COMM_STRING_ID_3 0
#endif
#ifndef UDI_CDC_DATA_STRING_ID_3
#define UDI_CDC_DATA_STRING_ID_3 0
#endif
#define UDI_CDC_IAD_DESC_3 UDI_CDC_IAD_DESC(3)
#define UDI_CDC_COMM_DESC_3 UDI_CDC_COMM_DESC(3)
#define UDI_CDC_DATA_DESC_3_FS UDI_CDC_DATA_DESC_FS(3)
#define UDI_CDC_DATA_DESC_3_HS UDI_CDC_DATA_DESC_HS(3)

//! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_4
#define UDI_CDC_IAD_STRING_ID_4 0
#endif
#ifndef UDI_CDC_COMM_STRING_ID_4
#define UDI_CDC_COMM_STRING_ID_4 0
#endif
#ifndef UDI_CDC_DATA_STRING_ID_4
#define UDI_CDC_DATA_STRING_ID_4 0
#endif
#define UDI_CDC_IAD_DESC_4 UDI_CDC_IAD_DESC(4)
#define UDI_CDC_COMM_DESC_4 UDI_CDC_COMM_DESC(4)
#define UDI_CDC_DATA_DESC_4_FS UDI_CDC_DATA_DESC_FS(4)
#define UDI_CDC_DATA_DESC_4_HS UDI_CDC_DATA_DESC_HS(4)

//! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_5
#define UDI_CDC_IAD_STRING_ID_5 0
#endif
#ifndef UDI_CDC_COMM_STRING_ID_5
#define UDI_CDC_COMM_STRING_ID_5 0
#endif
#ifndef UDI_CDC_DATA_STRING_ID_5
#define UDI_CDC_DATA_STRING_ID_5 0
#endif
#define UDI_CDC_IAD_DESC_5 UDI_CDC_IAD_DESC(5)
#define UDI_CDC_COMM_DESC_5 UDI_CDC_COMM_DESC(5)
#define UDI_CDC_DATA_DESC_5_FS UDI_CDC_DATA_DESC_FS(5)
#define UDI_CDC_DATA_DESC_5_HS UDI_CDC_DATA_DESC_HS(5)

//! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_6
#define UDI_CDC_IAD_STRING_ID_6 0
#endif
#ifndef UDI_CDC_COMM_STRING_ID_6
#define UDI_CDC_COMM_STRING_ID_6 0
#endif
#ifndef UDI_CDC_DATA_STRING_ID_6
#define UDI_CDC_DATA_STRING_ID_6 0
#endif
#define UDI_CDC_IAD_DESC_6 UDI_CDC_IAD_DESC(6)
#define UDI_CDC_COMM_DESC_6 UDI_CDC_COMM_DESC(6)
#define UDI_CDC_DATA_DESC_6_FS UDI_CDC_DATA_DESC_FS(6)
#define UDI_CDC_DATA_DESC_6_HS UDI_CDC_DATA_DESC_HS(6)
//@}


//! Content of CDC IAD interface descriptor for all speeds
#define UDI_CDC_IAD_DESC(port) { \
.bLength = sizeof(usb_iad_desc_t),\
.bDescriptorType = USB_DT_IAD,\
.bInterfaceCount = 2,\
.bFunctionClass = CDC_CLASS_COMM,\
.bFunctionSubClass = CDC_SUBCLASS_ACM,\
.bFunctionProtocol = CDC_PROTOCOL_V25TER,\
.bFirstInterface = UDI_CDC_COMM_IFACE_NUMBER_##port,\
.iFunction = UDI_CDC_IAD_STRING_ID_##port,\
}

//! Content of CDC COMM interface descriptor for all speeds
#define UDI_CDC_COMM_DESC(port) { \
.iface.bLength = sizeof(usb_iface_desc_t),\
.iface.bDescriptorType = USB_DT_INTERFACE,\
.iface.bAlternateSetting = 0,\
.iface.bNumEndpoints = 1,\
.iface.bInterfaceClass = CDC_CLASS_COMM,\
.iface.bInterfaceSubClass = CDC_SUBCLASS_ACM,\
.iface.bInterfaceProtocol = CDC_PROTOCOL_V25TER,\
.header.bFunctionLength = sizeof(usb_cdc_hdr_desc_t),\
.header.bDescriptorType = CDC_CS_INTERFACE,\
.header.bDescriptorSubtype = CDC_SCS_HEADER,\
.header.bcdCDC = LE16(0x0110),\
.call_mgmt.bFunctionLength = sizeof(usb_cdc_call_mgmt_desc_t),\
.call_mgmt.bDescriptorType = CDC_CS_INTERFACE,\
.call_mgmt.bDescriptorSubtype = CDC_SCS_CALL_MGMT,\
.call_mgmt.bmCapabilities = \
CDC_CALL_MGMT_SUPPORTED | CDC_CALL_MGMT_OVER_DCI,\
.acm.bFunctionLength = sizeof(usb_cdc_acm_desc_t),\
.acm.bDescriptorType = CDC_CS_INTERFACE,\
.acm.bDescriptorSubtype = CDC_SCS_ACM,\
.acm.bmCapabilities = CDC_ACM_SUPPORT_LINE_REQUESTS,\
.union_desc.bFunctionLength = sizeof(usb_cdc_union_desc_t),\
.union_desc.bDescriptorType = CDC_CS_INTERFACE,\
.union_desc.bDescriptorSubtype= CDC_SCS_UNION,\
.ep_notify.bLength = sizeof(usb_ep_desc_t),\
.ep_notify.bDescriptorType = USB_DT_ENDPOINT,\
.ep_notify.bmAttributes = USB_EP_TYPE_INTERRUPT,\
.ep_notify.wMaxPacketSize = LE16(UDI_CDC_COMM_EP_SIZE),\
.ep_notify.bInterval = 0x10,\
.ep_notify.bEndpointAddress = UDI_CDC_COMM_EP_##port,\
.iface.bInterfaceNumber = UDI_CDC_COMM_IFACE_NUMBER_##port,\
.call_mgmt.bDataInterface = UDI_CDC_DATA_IFACE_NUMBER_##port,\
.union_desc.bMasterInterface = UDI_CDC_COMM_IFACE_NUMBER_##port,\
.union_desc.bSlaveInterface0 = UDI_CDC_DATA_IFACE_NUMBER_##port,\
.iface.iInterface = UDI_CDC_COMM_STRING_ID_##port,\
}

//! Content of CDC DATA interface descriptors
#define UDI_CDC_DATA_DESC_COMMON \
.iface.bLength = sizeof(usb_iface_desc_t),\
.iface.bDescriptorType = USB_DT_INTERFACE,\
.iface.bAlternateSetting = 0,\
.iface.bNumEndpoints = 2,\
.iface.bInterfaceClass = CDC_CLASS_DATA,\
.iface.bInterfaceSubClass = 0,\
.iface.bInterfaceProtocol = 0,\
.ep_in.bLength = sizeof(usb_ep_desc_t),\
.ep_in.bDescriptorType = USB_DT_ENDPOINT,\
.ep_in.bmAttributes = USB_EP_TYPE_BULK,\
.ep_in.bInterval = 0,\
.ep_out.bLength = sizeof(usb_ep_desc_t),\
.ep_out.bDescriptorType = USB_DT_ENDPOINT,\
.ep_out.bmAttributes = USB_EP_TYPE_BULK,\
.ep_out.bInterval = 0,

#define UDI_CDC_DATA_DESC_FS(port) { \
UDI_CDC_DATA_DESC_COMMON \
.ep_in.wMaxPacketSize = LE16(UDI_CDC_DATA_EPS_FS_SIZE),\
.ep_out.wMaxPacketSize = LE16(UDI_CDC_DATA_EPS_FS_SIZE),\
.ep_in.bEndpointAddress = UDI_CDC_DATA_EP_IN_##port,\
.ep_out.bEndpointAddress = UDI_CDC_DATA_EP_OUT_##port,\
.iface.bInterfaceNumber = UDI_CDC_DATA_IFACE_NUMBER_##port,\
.iface.iInterface = UDI_CDC_DATA_STRING_ID_##port,\
}

#define UDI_CDC_DATA_DESC_HS(port) { \
UDI_CDC_DATA_DESC_COMMON \
.ep_in.wMaxPacketSize = LE16(UDI_CDC_DATA_EPS_HS_SIZE),\
.ep_out.wMaxPacketSize = LE16(UDI_CDC_DATA_EPS_HS_SIZE),\
.ep_in.bEndpointAddress = UDI_CDC_DATA_EP_IN_##port,\
.ep_out.bEndpointAddress = UDI_CDC_DATA_EP_OUT_##port,\
.iface.bInterfaceNumber = UDI_CDC_DATA_IFACE_NUMBER_##port,\
.iface.iInterface = UDI_CDC_DATA_STRING_ID_##port,\
}

//@}

/**
* \ingroup udi_group
* \defgroup udi_cdc_group USB Device Interface (UDI) for Communication Class Device (CDC)
*
* Common APIs used by high level application to use this USB class.
*
* These routines are used to transfer and control data
* to/from USB CDC endpoint.
*
* See \ref udi_cdc_quickstart.
* @{
*/

/**
* \name Interface for application with single CDC interface support
*/
//@{

/**
* \brief Notify a state change of DCD signal
*
* \param b_set DCD is enabled if true, else disabled
*/
void udi_cdc_ctrl_signal_dcd(bool b_set);

/**
* \brief Notify a state change of DSR signal
*
* \param b_set DSR is enabled if true, else disabled
*/
void udi_cdc_ctrl_signal_dsr(bool b_set);

/**
* \brief Notify a framing error
*/
void udi_cdc_signal_framing_error(void);

/**
* \brief Notify a parity error
*/
void udi_cdc_signal_parity_error(void);

/**
* \brief Notify a overrun
*/
void udi_cdc_signal_overrun(void);

/**
* \brief Gets the number of byte received
*
* \return the number of data available
*/
iram_size_t udi_cdc_get_nb_received_data(void);

/**
* \brief This function checks if a character has been received on the CDC line
*
* \return \c 1 if a byte is ready to be read.
*/
bool udi_cdc_is_rx_ready(void);

/**
* \brief Waits and gets a value on CDC line
*
* \return value read on CDC line
*/
int udi_cdc_getc(void);

/**
* \brief Reads a RAM buffer on CDC line
*
* \param buf Values read
* \param size Number of value read
*
* \return the number of data remaining
*/
iram_size_t udi_cdc_read_buf(void* buf, iram_size_t size);

/**
* \brief Gets the number of free byte in TX buffer
*
* \return the number of free byte in TX buffer
*/
iram_size_t udi_cdc_get_free_tx_buffer(void);

/**
* \brief This function checks if a new character sent is possible
* The type int is used to support scanf redirection from compiler LIB.
*
* \return \c 1 if a new character can be sent
*/
bool udi_cdc_is_tx_ready(void);

/**
* \brief Puts a byte on CDC line
* The type int is used to support printf redirection from compiler LIB.
*
* \param value Value to put
*
* \return \c 1 if function was successfully done, otherwise \c 0.
*/
int udi_cdc_putc(int value);

/**
* \brief Writes a RAM buffer on CDC line
*
* \param buf Values to write
* \param size Number of value to write
*
* \return the number of data remaining
*/
iram_size_t udi_cdc_write_buf(const void* buf, iram_size_t size);
//@}

/**
* \name Interface for application with multi CDC interfaces support
*/
//@{

/**
* \brief Notify a state change of DCD signal
*
* \param port Communication port number to manage
* \param b_set DCD is enabled if true, else disabled
*/
void udi_cdc_multi_ctrl_signal_dcd(uint8_t port, bool b_set);

/**
* \brief Notify a state change of DSR signal
*
* \param port Communication port number to manage
* \param b_set DSR is enabled if true, else disabled
*/
void udi_cdc_multi_ctrl_signal_dsr(uint8_t port, bool b_set);

/**
* \brief Notify a framing error
*
* \param port Communication port number to manage
*/
void udi_cdc_multi_signal_framing_error(uint8_t port);

/**
* \brief Notify a parity error
*
* \param port Communication port number to manage
*/
void udi_cdc_multi_signal_parity_error(uint8_t port);

/**
* \brief Notify a overrun
*
* \param port Communication port number to manage
*/
void udi_cdc_multi_signal_overrun(uint8_t port);

/**
* \brief Gets the number of byte received
*
* \param port Communication port number to manage
*
* \return the number of data available
*/
iram_size_t udi_cdc_multi_get_nb_received_data(uint8_t port);

/**
* \brief This function checks if a character has been received on the CDC line
*
* \param port Communication port number to manage
*
* \return \c 1 if a byte is ready to be read.
*/
bool udi_cdc_multi_is_rx_ready(uint8_t port);

/**
* \brief Waits and gets a value on CDC line
*
* \param port Communication port number to manage
*
* \return value read on CDC line
*/
int udi_cdc_multi_getc(uint8_t port);

/**
* \brief Reads a RAM buffer on CDC line
*
* \param port Communication port number to manage
* \param buf Values read
* \param size Number of values read
*
* \return the number of data remaining
*/
iram_size_t udi_cdc_multi_read_buf(uint8_t port, void* buf, iram_size_t size);

/**
* \brief Gets the number of free byte in TX buffer
*
* \param port Communication port number to manage
*
* \return the number of free byte in TX buffer
*/
iram_size_t udi_cdc_multi_get_free_tx_buffer(uint8_t port);

/**
* \brief This function checks if a new character sent is possible
* The type int is used to support scanf redirection from compiler LIB.
*
* \param port Communication port number to manage
*
* \return \c 1 if a new character can be sent
*/
bool udi_cdc_multi_is_tx_ready(uint8_t port);

/**
* \brief Puts a byte on CDC line
* The type int is used to support printf redirection from compiler LIB.
*
* \param port Communication port number to manage
* \param value Value to put
*
* \return \c 1 if function was successfully done, otherwise \c 0.
*/
int udi_cdc_multi_putc(uint8_t port, int value);

/**
* \brief Writes a RAM buffer on CDC line
*
* \param port Communication port number to manage
* \param buf Values to write
* \param size Number of value to write
*
* \return the number of data remaining
*/
iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t size);
//@}

//@}

/**
* \page udi_cdc_quickstart Quick start guide for USB device Communication Class Device module (UDI CDC)
*
* This is the quick start guide for the \ref udi_cdc_group
* " USB device interface CDC module (UDI CDC) " with step-by-step instructions on
* how to configure and use the modules in a selection of use cases.
*
* The use cases contain several code fragments. The code fragments in the
* steps for setup can be copied into a custom initialization function, while
* the steps for usage can be copied into, e.g., the main application function.
*
* \section udi_cdc_basic_use_case Basic use case
* In this basic use case, the " USB CDC (Single Interface Device) " module is used
* with only one communication port.
* The " USB CDC (Composite Device) " module usage is described in \ref udi_cdc_use_cases
* " Advanced use cases " .
*
* \section udi_cdc_basic_use_case_setup Setup steps
* \subsection udi_cdc_basic_use_case_setup_prereq Prerequisites
* \copydetails udc_basic_use_case_setup_prereq
* \subsection udi_cdc_basic_use_case_setup_code Example code
* \copydetails udc_basic_use_case_setup_code
* \subsection udi_cdc_basic_use_case_setup_flow Workflow
* \copydetails udc_basic_use_case_setup_flow
*
* \section udi_cdc_basic_use_case_usage Usage steps
*
* \subsection udi_cdc_basic_use_case_usage_code Example code
* Content of conf_usb.h:
* \code
#define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
extern bool my_callback_cdc_enable(void);
#define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
extern void my_callback_cdc_disable(void);
#define UDI_CDC_LOW_RATE

#define UDI_CDC_DEFAULT_RATE 115200
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
#define UDI_CDC_DEFAULT_DATABITS 8

#include " udi_cdc_conf.h " // At the end of conf_usb.h file
\endcode
*
* Add to application C-file:
* \code
static bool my_flag_autorize_cdc_transfert = false;
bool my_callback_cdc_enable(void)
{
my_flag_autorize_cdc_transfert = true;
return true;
}
void my_callback_cdc_disable(void)
{
my_flag_autorize_cdc_transfert = false;
}

void task(void)
{
if (my_flag_autorize_cdc_transfert) {
udi_cdc_putc('A');
udi_cdc_getc();
}
}
\endcode
*
* \subsection udi_cdc_basic_use_case_setup_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following configuration
* which is the USB device CDC configuration:
* - \code #define USB_DEVICE_SERIAL_NAME " 12...EF " // Disk SN for CDC \endcode
* \note The USB serial number is mandatory when a CDC interface is used.
* - \code #define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
extern bool my_callback_cdc_enable(void); \endcode
* \note After the device enumeration (detecting and identifying USB devices),
* the USB host starts the device configuration. When the USB CDC interface
* from the device is accepted by the host, the USB host enables this interface and the
* UDI_CDC_ENABLE_EXT() callback function is called and return true.
* Thus, when this event is received, the data transfer on CDC interface are authorized.
* - \code #define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
extern void my_callback_cdc_disable(void); \endcode
* \note When the USB device is unplugged or is reset by the USB host, the USB
* interface is disabled and the UDI_CDC_DISABLE_EXT() callback function
* is called. Thus, the data transfer must be stopped on CDC interface.
* - \code #define UDI_CDC_LOW_RATE \endcode
* \note Define it when the transfer CDC Device to Host is a low rate
* ( & lt; 512000 bauds) to reduce CDC buffers size.
* - \code #define UDI_CDC_DEFAULT_RATE 115200
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
#define UDI_CDC_DEFAULT_DATABITS 8 \endcode
* \note Default configuration of communication port at startup.
* -# Send or wait data on CDC line:
* - \code // Waits and gets a value on CDC line
int udi_cdc_getc(void);
// Reads a RAM buffer on CDC line
iram_size_t udi_cdc_read_buf(int* buf, iram_size_t size);
// Puts a byte on CDC line
int udi_cdc_putc(int value);
// Writes a RAM buffer on CDC line
iram_size_t udi_cdc_write_buf(const int* buf, iram_size_t size); \endcode
*
* \section udi_cdc_use_cases Advanced use cases
* For more advanced use of the UDI CDC module, see the following use cases:
* - \subpage udi_cdc_use_case_composite
* - \subpage udc_use_case_1
* - \subpage udc_use_case_2
* - \subpage udc_use_case_3
* - \subpage udc_use_case_4
* - \subpage udc_use_case_5
* - \subpage udc_use_case_6
*/

/**
* \page udi_cdc_use_case_composite CDC in a composite device
*
* A USB Composite Device is a USB Device which uses more than one USB class.
* In this use case, the " USB CDC (Composite Device) " module is used to
* create a USB composite device. Thus, this USB module can be associated with
* another " Composite Device " module, like " USB HID Mouse (Composite Device) " .
*
* Also, you can refer to application note
* & lt; A href= " http://www.atmel.com/dyn/resources/prod_documents/doc8445.pdf " & gt;
* AVR4902 ASF - USB Composite Device & lt; /A & gt; .
*
* \section udi_cdc_use_case_composite_setup Setup steps
* For the setup code of this use case to work, the
* \ref udi_cdc_basic_use_case " basic use case " must be followed.
*
* \section udi_cdc_use_case_composite_usage Usage steps
*
* \subsection udi_cdc_use_case_composite_usage_code Example code
* Content of conf_usb.h:
* \code
#define USB_DEVICE_EP_CTRL_SIZE 64
#define USB_DEVICE_NB_INTERFACE (X+2)
#define USB_DEVICE_MAX_EP (X+3)

#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1

#define UDI_COMPOSITE_DESC_T \
usb_iad_desc_t udi_cdc_iad; \
udi_cdc_comm_desc_t udi_cdc_comm; \
udi_cdc_data_desc_t udi_cdc_data; \
...
#define UDI_COMPOSITE_DESC_FS \
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
...
#define UDI_COMPOSITE_DESC_HS \
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
...
#define UDI_COMPOSITE_API \
& udi_api_cdc_comm, \
& udi_api_cdc_data, \
...
\endcode
*
* \subsection udi_cdc_use_case_composite_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters
* required for a USB composite device configuration:
* - \code // Endpoint control size, This must be:
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
// - 64 for a high speed device
#define USB_DEVICE_EP_CTRL_SIZE 64
// Total Number of interfaces on this USB device.
// Add 2 for CDC.
#define USB_DEVICE_NB_INTERFACE (X+2)
// Total number of endpoints on this USB device.
// This must include each endpoint for each interface.
// Add 3 for CDC.
#define USB_DEVICE_MAX_EP (X+3) \endcode
* -# Ensure that conf_usb.h contains the description of
* composite device:
* - \code // The endpoint numbers chosen by you for the CDC.
// The endpoint numbers starting from 1.
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
// The interface index of an interface starting from 0
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1 \endcode
* -# Ensure that conf_usb.h contains the following parameters
* required for a USB composite device configuration:
* - \code // USB Interfaces descriptor structure
#define UDI_COMPOSITE_DESC_T \
...
usb_iad_desc_t udi_cdc_iad; \
udi_cdc_comm_desc_t udi_cdc_comm; \
udi_cdc_data_desc_t udi_cdc_data; \
...
// USB Interfaces descriptor value for Full Speed
#define UDI_COMPOSITE_DESC_FS \
...
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
...
// USB Interfaces descriptor value for High Speed
#define UDI_COMPOSITE_DESC_HS \
...
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
...
// USB Interface APIs
#define UDI_COMPOSITE_API \
...
& udi_api_cdc_comm, \
& udi_api_cdc_data, \
... \endcode
* - \note The descriptors order given in the four lists above must be the
* same as the order defined by all interface indexes. The interface index
* orders are defined through UDI_X_IFACE_NUMBER defines.\n
* Also, the CDC requires a USB Interface Association Descriptor (IAD) for
* composite device.
*/

#ifdef __cplusplus
}
#endif
#endif // _UDI_CDC_H_


Motofocuser.rar > udi_cdc_desc.c

/**
* \file
*
* \brief Default descriptors for a USB Device with a single interface CDC
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#include " conf_usb.h "
#include " udd.h "
#include " udc_desc.h "
#include " udi_cdc.h "


/**
* \defgroup udi_cdc_group_single_desc USB device descriptors for a single interface
*
* The following structures provide the USB device descriptors required for
* USB Device with a single interface CDC.
*
* It is ready to use and do not require more definition.
*
* @{
*/

//! Two interfaces for a CDC device
#define USB_DEVICE_NB_INTERFACE (2*UDI_CDC_PORT_NB)

#ifdef USB_DEVICE_LPM_SUPPORT
# define USB_VERSION USB_V2_1
#else
# define USB_VERSION USB_V2_0
#endif

//! USB Device Descriptor
COMPILER_WORD_ALIGNED
UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = {
.bLength = sizeof(usb_dev_desc_t),
.bDescriptorType = USB_DT_DEVICE,
.bcdUSB = LE16(USB_VERSION),
#if UDI_CDC_PORT_NB & gt; 1
.bDeviceClass = 0,
#else
.bDeviceClass = CDC_CLASS_DEVICE,
#endif
.bDeviceSubClass = 0,
.bDeviceProtocol = 0,
.bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE,
.idVendor = LE16(USB_DEVICE_VENDOR_ID),
.idProduct = LE16(USB_DEVICE_PRODUCT_ID),
.bcdDevice = LE16((USB_DEVICE_MAJOR_VERSION & lt; & lt; 8)
| USB_DEVICE_MINOR_VERSION),
#ifdef USB_DEVICE_MANUFACTURE_NAME
.iManufacturer = 1,
#else
.iManufacturer = 0, // No manufacture string
#endif
#ifdef USB_DEVICE_PRODUCT_NAME
.iProduct = 2,
#else
.iProduct = 0, // No product string
#endif
#ifdef USB_DEVICE_SERIAL_NAME
.iSerialNumber = 3,
#else
.iSerialNumber = 0, // No serial string
#endif
.bNumConfigurations = 1
};


#ifdef USB_DEVICE_HS_SUPPORT
//! USB Device Qualifier Descriptor for HS
COMPILER_WORD_ALIGNED
UDC_DESC_STORAGE usb_dev_qual_desc_t udc_device_qual = {
.bLength = sizeof(usb_dev_qual_desc_t),
.bDescriptorType = USB_DT_DEVICE_QUALIFIER,
.bcdUSB = LE16(USB_VERSION),
#if UDI_CDC_PORT_NB & gt; 1
.bDeviceClass = 0,
#else
.bDeviceClass = CDC_CLASS_DEVICE,
#endif
.bDeviceSubClass = 0,
.bDeviceProtocol = 0,
.bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE,
.bNumConfigurations = 1
};
#endif

#ifdef USB_DEVICE_LPM_SUPPORT
//! USB Device Qualifier Descriptor
COMPILER_WORD_ALIGNED
UDC_DESC_STORAGE usb_dev_lpm_desc_t udc_device_lpm = {
.bos.bLength = sizeof(usb_dev_bos_desc_t),
.bos.bDescriptorType = USB_DT_BOS,
.bos.wTotalLength = LE16(sizeof(usb_dev_bos_desc_t) + sizeof(usb_dev_capa_ext_desc_t)),
.bos.bNumDeviceCaps = 1,
.capa_ext.bLength = sizeof(usb_dev_capa_ext_desc_t),
.capa_ext.bDescriptorType = USB_DT_DEVICE_CAPABILITY,
.capa_ext.bDevCapabilityType = USB_DC_USB20_EXTENSION,
.capa_ext.bmAttributes = USB_DC_EXT_LPM,
};
#endif

//! Structure for USB Device Configuration Descriptor
COMPILER_PACK_SET(1)
typedef struct {
usb_conf_desc_t conf;
#if UDI_CDC_PORT_NB == 1
udi_cdc_comm_desc_t udi_cdc_comm_0;
udi_cdc_data_desc_t udi_cdc_data_0;
#else
# define UDI_CDC_DESC_STRUCTURE(index, unused) \
usb_iad_desc_t udi_cdc_iad_##index; \
udi_cdc_comm_desc_t udi_cdc_comm_##index; \
udi_cdc_data_desc_t udi_cdc_data_##index;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_DESC_STRUCTURE, ~)
# undef UDI_CDC_DESC_STRUCTURE
#endif
} udc_desc_t;
COMPILER_PACK_RESET()

//! USB Device Configuration Descriptor filled for full and high speed
COMPILER_WORD_ALIGNED
UDC_DESC_STORAGE udc_desc_t udc_desc_fs = {
.conf.bLength = sizeof(usb_conf_desc_t),
.conf.bDescriptorType = USB_DT_CONFIGURATION,
.conf.wTotalLength = LE16(sizeof(udc_desc_t)),
.conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE,
.conf.bConfigurationValue = 1,
.conf.iConfiguration = 0,
.conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR,
.conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER),
#if UDI_CDC_PORT_NB == 1
.udi_cdc_comm_0 = UDI_CDC_COMM_DESC_0,
.udi_cdc_data_0 = UDI_CDC_DATA_DESC_0_FS,
#else
# define UDI_CDC_DESC_FS(index, unused) \
.udi_cdc_iad_##index = UDI_CDC_IAD_DESC_##index,\
.udi_cdc_comm_##index = UDI_CDC_COMM_DESC_##index,\
.udi_cdc_data_##index = UDI_CDC_DATA_DESC_##index##_FS,
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_DESC_FS, ~)
# undef UDI_CDC_DESC_FS
#endif
};

#ifdef USB_DEVICE_HS_SUPPORT
COMPILER_WORD_ALIGNED
UDC_DESC_STORAGE udc_desc_t udc_desc_hs = {
.conf.bLength = sizeof(usb_conf_desc_t),
.conf.bDescriptorType = USB_DT_CONFIGURATION,
.conf.wTotalLength = LE16(sizeof(udc_desc_t)),
.conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE,
.conf.bConfigurationValue = 1,
.conf.iConfiguration = 0,
.conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR,
.conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER),
#if UDI_CDC_PORT_NB == 1
.udi_cdc_comm_0 = UDI_CDC_COMM_DESC_0,
.udi_cdc_data_0 = UDI_CDC_DATA_DESC_0_HS,
#else
# define UDI_CDC_DESC_HS(index, unused) \
.udi_cdc_iad_##index = UDI_CDC_IAD_DESC_##index, \
.udi_cdc_comm_##index = UDI_CDC_COMM_DESC_##index, \
.udi_cdc_data_##index = UDI_CDC_DATA_DESC_##index##_HS,
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_DESC_HS, ~)
# undef UDI_CDC_DESC_HS
#endif
};
#endif

/**
* \name UDC structures which content all USB Device definitions
*/
//@{

//! Associate an UDI for each USB interface
UDC_DESC_STORAGE udi_api_t *udi_apis[USB_DEVICE_NB_INTERFACE] = {
# define UDI_CDC_API(index, unused) \
& udi_api_cdc_comm, \
& udi_api_cdc_data,
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_API, ~)
# undef UDI_CDC_API
};

//! Add UDI with USB Descriptors FS & HS
UDC_DESC_STORAGE udc_config_speed_t udc_config_fs[1] = { {
.desc = (usb_conf_desc_t UDC_DESC_STORAGE*) & udc_desc_fs,
.udi_apis = udi_apis,
}};
#ifdef USB_DEVICE_HS_SUPPORT
UDC_DESC_STORAGE udc_config_speed_t udc_config_hs[1] = { {
.desc = (usb_conf_desc_t UDC_DESC_STORAGE*) & udc_desc_hs,
.udi_apis = udi_apis,
}};
#endif

//! Add all information about USB Device in global structure for UDC
UDC_DESC_STORAGE udc_config_t udc_config = {
.confdev_lsfs = & udc_device_desc,
.conf_lsfs = udc_config_fs,
#ifdef USB_DEVICE_HS_SUPPORT
.confdev_hs = & udc_device_desc,
.qualifier = & udc_device_qual,
.conf_hs = udc_config_hs,
#endif
#ifdef USB_DEVICE_LPM_SUPPORT
.conf_bos = & udc_device_lpm.bos,
#else
.conf_bos = NULL,
#endif
};

//@}
//@}


Motofocuser.rar > udi_cdc.c

/**
* \file
*
* \brief USB Device Communication Device Class (CDC) interface.
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#include " conf_usb.h "
#include " usb_protocol.h "
#include " usb_protocol_cdc.h "
#include " udd.h "
#include " udc.h "
#include " udi_cdc.h "
#include & lt; string.h & gt;

#ifdef UDI_CDC_LOW_RATE
# ifdef USB_DEVICE_HS_SUPPORT
# define UDI_CDC_TX_BUFFERS (UDI_CDC_DATA_EPS_HS_SIZE)
# define UDI_CDC_RX_BUFFERS (UDI_CDC_DATA_EPS_HS_SIZE)
# else
# define UDI_CDC_TX_BUFFERS (UDI_CDC_DATA_EPS_FS_SIZE)
# define UDI_CDC_RX_BUFFERS (UDI_CDC_DATA_EPS_FS_SIZE)
# endif
#else
# ifdef USB_DEVICE_HS_SUPPORT
# define UDI_CDC_TX_BUFFERS (UDI_CDC_DATA_EPS_HS_SIZE)
# define UDI_CDC_RX_BUFFERS (UDI_CDC_DATA_EPS_HS_SIZE)
# else
# define UDI_CDC_TX_BUFFERS (5*UDI_CDC_DATA_EPS_FS_SIZE)
# define UDI_CDC_RX_BUFFERS (5*UDI_CDC_DATA_EPS_FS_SIZE)
# endif
#endif

#ifndef UDI_CDC_TX_EMPTY_NOTIFY
# define UDI_CDC_TX_EMPTY_NOTIFY(port)
#endif

/**
* \ingroup udi_cdc_group
* \defgroup udi_cdc_group_udc Interface with USB Device Core (UDC)
*
* Structures and functions required by UDC.
*
* @{
*/
bool udi_cdc_comm_enable(void);
void udi_cdc_comm_disable(void);
bool udi_cdc_comm_setup(void);
bool udi_cdc_data_enable(void);
void udi_cdc_data_disable(void);
bool udi_cdc_data_setup(void);
uint8_t udi_cdc_getsetting(void);
void udi_cdc_data_sof_notify(void);
UDC_DESC_STORAGE udi_api_t udi_api_cdc_comm = {
.enable = udi_cdc_comm_enable,
.disable = udi_cdc_comm_disable,
.setup = udi_cdc_comm_setup,
.getsetting = udi_cdc_getsetting,
};
UDC_DESC_STORAGE udi_api_t udi_api_cdc_data = {
.enable = udi_cdc_data_enable,
.disable = udi_cdc_data_disable,
.setup = udi_cdc_data_setup,
.getsetting = udi_cdc_getsetting,
.sof_notify = udi_cdc_data_sof_notify,
};
//@}

/**
* \ingroup udi_cdc_group
* \defgroup udi_cdc_group_internal Implementation of UDI CDC
*
* Class internal implementation
* @{
*/

/**
* \name Internal routines
*/
//@{

/**
* \name Routines to control serial line
*/
//@{

/**
* \brief Returns the port number corresponding at current setup request
*
* \return port number
*/
static uint8_t udi_cdc_setup_to_port(void);

/**
* \brief Sends line coding to application
*
* Called after SETUP request when line coding data is received.
*/
static void udi_cdc_line_coding_received(void);

/**
* \brief Records new state
*
* \param port Communication port number to manage
* \param b_set State is enabled if true, else disabled
* \param bit_mask Field to process (see CDC_SERIAL_STATE_ defines)
*/
static void udi_cdc_ctrl_state_change(uint8_t port, bool b_set, le16_t bit_mask);

/**
* \brief Check and eventually notify the USB host of new state
*
* \param port Communication port number to manage
* \param ep Port communication endpoint
*/
static void udi_cdc_ctrl_state_notify(uint8_t port, udd_ep_id_t ep);

/**
* \brief Ack sent of serial state message
* Callback called after serial state message sent
*
* \param status UDD_EP_TRANSFER_OK, if transfer finished
* \param status UDD_EP_TRANSFER_ABORT, if transfer aborted
* \param n number of data transfered
*/
static void udi_cdc_serial_state_msg_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep);

//@}

/**
* \name Routines to process data transfer
*/
//@{

/**
* \brief Enable the reception of data from the USB host
*
* The value udi_cdc_rx_trans_sel indicate the RX buffer to fill.
*
* \param port Communication port number to manage
*
* \return \c 1 if function was successfully done, otherwise \c 0.
*/
static bool udi_cdc_rx_start(uint8_t port);

/**
* \brief Update rx buffer management with a new data
* Callback called after data reception on USB line
*
* \param status UDD_EP_TRANSFER_OK, if transfer finish
* \param status UDD_EP_TRANSFER_ABORT, if transfer aborted
* \param n number of data received
*/
static void udi_cdc_data_received(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep);

/**
* \brief Ack sent of tx buffer
* Callback called after data transfer on USB line
*
* \param status UDD_EP_TRANSFER_OK, if transfer finished
* \param status UDD_EP_TRANSFER_ABORT, if transfer aborted
* \param n number of data transfered
*/
static void udi_cdc_data_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep);

/**
* \brief Send buffer on line or wait a SOF event
*
* \param port Communication port number to manage
*/
static void udi_cdc_tx_send(uint8_t port);

//@}

//@}

/**
* \name Information about configuration of communication line
*/
//@{
COMPILER_WORD_ALIGNED
static usb_cdc_line_coding_t udi_cdc_line_coding[UDI_CDC_PORT_NB];
static bool udi_cdc_serial_state_msg_ongoing[UDI_CDC_PORT_NB];
static volatile le16_t udi_cdc_state[UDI_CDC_PORT_NB];
COMPILER_WORD_ALIGNED static usb_cdc_notify_serial_state_t uid_cdc_state_msg[UDI_CDC_PORT_NB];

//! Status of CDC COMM interfaces
static volatile uint8_t udi_cdc_nb_comm_enabled = 0;
//@}

/**
* \name Variables to manage RX/TX transfer requests
* Two buffers for each sense are used to optimize the speed.
*/
//@{

//! Status of CDC DATA interfaces
static volatile uint8_t udi_cdc_nb_data_enabled = 0;
static volatile bool udi_cdc_data_running = false;
//! Buffer to receive data
COMPILER_WORD_ALIGNED static uint8_t udi_cdc_rx_buf[UDI_CDC_PORT_NB][2][UDI_CDC_RX_BUFFERS];
//! Data available in RX buffers
static uint16_t udi_cdc_rx_buf_nb[UDI_CDC_PORT_NB][2];
//! Give the current RX buffer used (rx0 if 0, rx1 if 1)
static volatile uint8_t udi_cdc_rx_buf_sel[UDI_CDC_PORT_NB];
//! Read position in current RX buffer
static volatile uint16_t udi_cdc_rx_pos[UDI_CDC_PORT_NB];
//! Signal a transfer on-going
static volatile bool udi_cdc_rx_trans_ongoing[UDI_CDC_PORT_NB];

//! Define a transfer halted
#define UDI_CDC_TRANS_HALTED 2

//! Buffer to send data
COMPILER_WORD_ALIGNED static uint8_t udi_cdc_tx_buf[UDI_CDC_PORT_NB][2][UDI_CDC_TX_BUFFERS];
//! Data available in TX buffers
static uint16_t udi_cdc_tx_buf_nb[UDI_CDC_PORT_NB][2];
//! Give current TX buffer used (tx0 if 0, tx1 if 1)
static volatile uint8_t udi_cdc_tx_buf_sel[UDI_CDC_PORT_NB];
//! Value of SOF during last TX transfer
static uint16_t udi_cdc_tx_sof_num[UDI_CDC_PORT_NB];
//! Signal a transfer on-going
static volatile bool udi_cdc_tx_trans_ongoing[UDI_CDC_PORT_NB];
//! Signal that both buffer content data to send
static volatile bool udi_cdc_tx_both_buf_to_send[UDI_CDC_PORT_NB];

//@}

bool udi_cdc_comm_enable(void)
{
uint8_t port;
uint8_t iface_comm_num;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
udi_cdc_nb_comm_enabled = 0;
#else
if (udi_cdc_nb_comm_enabled & gt; UDI_CDC_PORT_NB) {
udi_cdc_nb_comm_enabled = 0;
}
port = udi_cdc_nb_comm_enabled;
#endif

// Initialize control signal management
udi_cdc_state[port] = CPU_TO_LE16(0);

uid_cdc_state_msg[port].header.bmRequestType =
USB_REQ_DIR_IN | USB_REQ_TYPE_CLASS |
USB_REQ_RECIP_INTERFACE;
uid_cdc_state_msg[port].header.bNotification = USB_REQ_CDC_NOTIFY_SERIAL_STATE;
uid_cdc_state_msg[port].header.wValue = LE16(0);

switch (port) {
#define UDI_CDC_PORT_TO_IFACE_COMM(index, unused) \
case index: \
iface_comm_num = UDI_CDC_COMM_IFACE_NUMBER_##index; \
break;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_PORT_TO_IFACE_COMM, ~)
#undef UDI_CDC_PORT_TO_IFACE_COMM
default:
iface_comm_num = UDI_CDC_COMM_IFACE_NUMBER_0;
break;
}

uid_cdc_state_msg[port].header.wIndex = LE16(iface_comm_num);
uid_cdc_state_msg[port].header.wLength = LE16(2);
uid_cdc_state_msg[port].value = CPU_TO_LE16(0);

udi_cdc_line_coding[port].dwDTERate = CPU_TO_LE32(UDI_CDC_DEFAULT_RATE);
udi_cdc_line_coding[port].bCharFormat = UDI_CDC_DEFAULT_STOPBITS;
udi_cdc_line_coding[port].bParityType = UDI_CDC_DEFAULT_PARITY;
udi_cdc_line_coding[port].bDataBits = UDI_CDC_DEFAULT_DATABITS;
// Call application callback
// to initialize memories or indicate that interface is enabled
UDI_CDC_SET_CODING_EXT(port,( & udi_cdc_line_coding[port]));
if (!UDI_CDC_ENABLE_EXT(port)) {
return false;
}
udi_cdc_nb_comm_enabled++;
return true;
}

bool udi_cdc_data_enable(void)
{
uint8_t port;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
udi_cdc_nb_data_enabled = 0;
#else
if (udi_cdc_nb_data_enabled & gt; UDI_CDC_PORT_NB) {
udi_cdc_nb_data_enabled = 0;
}
port = udi_cdc_nb_data_enabled;
#endif

// Initialize TX management
udi_cdc_tx_trans_ongoing[port] = false;
udi_cdc_tx_both_buf_to_send[port] = false;
udi_cdc_tx_buf_sel[port] = 0;
udi_cdc_tx_buf_nb[port][0] = 0;
udi_cdc_tx_buf_nb[port][1] = 0;
udi_cdc_tx_sof_num[port] = 0;
udi_cdc_tx_send(port);

// Initialize RX management
udi_cdc_rx_trans_ongoing[port] = false;
udi_cdc_rx_buf_sel[port] = 0;
udi_cdc_rx_buf_nb[port][0] = 0;
udi_cdc_rx_pos[port] = 0;
if (!udi_cdc_rx_start(port)) {
return false;
}
udi_cdc_nb_data_enabled++;
if (udi_cdc_nb_data_enabled == UDI_CDC_PORT_NB) {
udi_cdc_data_running = true;
}
return true;
}

void udi_cdc_comm_disable(void)
{
Assert(udi_cdc_nb_comm_enabled != 0);
udi_cdc_nb_comm_enabled--;
}

void udi_cdc_data_disable(void)
{
uint8_t port;
UNUSED(port);

Assert(udi_cdc_nb_data_enabled != 0);
udi_cdc_nb_data_enabled--;
port = udi_cdc_nb_data_enabled;
UDI_CDC_DISABLE_EXT(port);
udi_cdc_data_running = false;
}

bool udi_cdc_comm_setup(void)
{
uint8_t port = udi_cdc_setup_to_port();

if (Udd_setup_is_in()) {
// GET Interface Requests
if (Udd_setup_type() == USB_REQ_TYPE_CLASS) {
// Requests Class Interface Get
switch (udd_g_ctrlreq.req.bRequest) {
case USB_REQ_CDC_GET_LINE_CODING:
// Get configuration of CDC line
if (sizeof(usb_cdc_line_coding_t) !=
udd_g_ctrlreq.req.wLength)
return false; // Error for USB host
udd_g_ctrlreq.payload =
(uint8_t *) &
udi_cdc_line_coding[port];
udd_g_ctrlreq.payload_size =
sizeof(usb_cdc_line_coding_t);
return true;
}
}
}
if (Udd_setup_is_out()) {
// SET Interface Requests
if (Udd_setup_type() == USB_REQ_TYPE_CLASS) {
// Requests Class Interface Set
switch (udd_g_ctrlreq.req.bRequest) {
case USB_REQ_CDC_SET_LINE_CODING:
// Change configuration of CDC line
if (sizeof(usb_cdc_line_coding_t) !=
udd_g_ctrlreq.req.wLength)
return false; // Error for USB host
udd_g_ctrlreq.callback =
udi_cdc_line_coding_received;
udd_g_ctrlreq.payload =
(uint8_t *) &
udi_cdc_line_coding[port];
udd_g_ctrlreq.payload_size =
sizeof(usb_cdc_line_coding_t);
return true;
case USB_REQ_CDC_SET_CONTROL_LINE_STATE:
// According cdc spec 1.1 chapter 6.2.14
UDI_CDC_SET_DTR_EXT(port, (0 !=
(udd_g_ctrlreq.req.wValue
& CDC_CTRL_SIGNAL_DTE_PRESENT)));
UDI_CDC_SET_RTS_EXT(port, (0 !=
(udd_g_ctrlreq.req.wValue
& CDC_CTRL_SIGNAL_ACTIVATE_CARRIER)));
return true;
}
}
}
return false; // request Not supported
}

bool udi_cdc_data_setup(void)
{
return false; // request Not supported
}

uint8_t udi_cdc_getsetting(void)
{
return 0; // CDC don't have multiple alternate setting
}

void udi_cdc_data_sof_notify(void)
{
static uint8_t port_notify = 0;

// A call of udi_cdc_data_sof_notify() is done for each port
udi_cdc_tx_send(port_notify);
#if UDI_CDC_PORT_NB != 1 // To optimize code
port_notify++;
if (port_notify & gt; = UDI_CDC_PORT_NB) {
port_notify = 0;
}
#endif
}


//-------------------------------------------------
//------- Internal routines to control serial line

static uint8_t udi_cdc_setup_to_port(void)
{
uint8_t port;

switch (udd_g_ctrlreq.req.wIndex & 0xFF) {
#define UDI_CDC_IFACE_COMM_TO_PORT(iface, unused) \
case UDI_CDC_COMM_IFACE_NUMBER_##iface: \
port = iface; \
break;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_IFACE_COMM_TO_PORT, ~)
#undef UDI_CDC_IFACE_COMM_TO_PORT
default:
port = 0;
break;
}
return port;
}

static void udi_cdc_line_coding_received(void)
{
uint8_t port = udi_cdc_setup_to_port();
UNUSED(port);

UDI_CDC_SET_CODING_EXT(port, ( & udi_cdc_line_coding[port]));
}

static void udi_cdc_ctrl_state_change(uint8_t port, bool b_set, le16_t bit_mask)
{
irqflags_t flags;
udd_ep_id_t ep_comm;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

// Update state
flags = cpu_irq_save(); // Protect udi_cdc_state
if (b_set) {
udi_cdc_state[port] |= bit_mask;
} else {
udi_cdc_state[port] & = ~(unsigned)bit_mask;
}
cpu_irq_restore(flags);

// Send it if possible and state changed
switch (port) {
#define UDI_CDC_PORT_TO_COMM_EP(index, unused) \
case index: \
ep_comm = UDI_CDC_COMM_EP_##index; \
break;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_PORT_TO_COMM_EP, ~)
#undef UDI_CDC_PORT_TO_COMM_EP
default:
ep_comm = UDI_CDC_COMM_EP_0;
break;
}
udi_cdc_ctrl_state_notify(port, ep_comm);
}


static void udi_cdc_ctrl_state_notify(uint8_t port, udd_ep_id_t ep)
{
#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

// Send it if possible and state changed
if ((!udi_cdc_serial_state_msg_ongoing[port])
& & (udi_cdc_state[port] != uid_cdc_state_msg[port].value)) {
// Fill notification message
uid_cdc_state_msg[port].value = udi_cdc_state[port];
// Send notification message
udi_cdc_serial_state_msg_ongoing[port] =
udd_ep_run(ep,
false,
(uint8_t *) & uid_cdc_state_msg[port],
sizeof(uid_cdc_state_msg[0]),
udi_cdc_serial_state_msg_sent);
}
}


static void udi_cdc_serial_state_msg_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
{
uint8_t port;
UNUSED(n);
UNUSED(status);

switch (ep) {
#define UDI_CDC_GET_PORT_FROM_COMM_EP(iface, unused) \
case UDI_CDC_COMM_EP_##iface: \
port = iface; \
break;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_GET_PORT_FROM_COMM_EP, ~)
#undef UDI_CDC_GET_PORT_FROM_COMM_EP
default:
port = 0;
break;
}

udi_cdc_serial_state_msg_ongoing[port] = false;

// For the irregular signals like break, the incoming ring signal,
// or the overrun error state, this will reset their values to zero
// and again will not send another notification until their state changes.
udi_cdc_state[port] & = ~(CDC_SERIAL_STATE_BREAK |
CDC_SERIAL_STATE_RING |
CDC_SERIAL_STATE_FRAMING |
CDC_SERIAL_STATE_PARITY | CDC_SERIAL_STATE_OVERRUN);
uid_cdc_state_msg[port].value & = ~(CDC_SERIAL_STATE_BREAK |
CDC_SERIAL_STATE_RING |
CDC_SERIAL_STATE_FRAMING |
CDC_SERIAL_STATE_PARITY | CDC_SERIAL_STATE_OVERRUN);
// Send it if possible and state changed
udi_cdc_ctrl_state_notify(port, ep);
}


//-------------------------------------------------
//------- Internal routines to process data transfer


static bool udi_cdc_rx_start(uint8_t port)
{
irqflags_t flags;
uint8_t buf_sel_trans;
udd_ep_id_t ep;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

flags = cpu_irq_save();
buf_sel_trans = udi_cdc_rx_buf_sel[port];
if (udi_cdc_rx_trans_ongoing[port] ||
(udi_cdc_rx_pos[port] & lt; udi_cdc_rx_buf_nb[port][buf_sel_trans])) {
// Transfer already on-going or current buffer no empty
cpu_irq_restore(flags);
return false;
}

// Change current buffer
udi_cdc_rx_pos[port] = 0;
udi_cdc_rx_buf_sel[port] = (buf_sel_trans==0)?1:0;

// Start transfer on RX
udi_cdc_rx_trans_ongoing[port] = true;
cpu_irq_restore(flags);

if (udi_cdc_multi_is_rx_ready(port)) {
UDI_CDC_RX_NOTIFY(port);
}
// Send the buffer with enable of short packet
switch (port) {
#define UDI_CDC_PORT_TO_DATA_EP_OUT(index, unused) \
case index: \
ep = UDI_CDC_DATA_EP_OUT_##index; \
break;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_PORT_TO_DATA_EP_OUT, ~)
#undef UDI_CDC_PORT_TO_DATA_EP_OUT
default:
ep = UDI_CDC_DATA_EP_OUT_0;
break;
}
return udd_ep_run(ep,
true,
udi_cdc_rx_buf[port][buf_sel_trans],
UDI_CDC_RX_BUFFERS,
udi_cdc_data_received);
}


static void udi_cdc_data_received(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
{
uint8_t buf_sel_trans;
uint8_t port;

switch (ep) {
#define UDI_CDC_DATA_EP_OUT_TO_PORT(index, unused) \
case UDI_CDC_DATA_EP_OUT_##index: \
port = index; \
break;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_DATA_EP_OUT_TO_PORT, ~)
#undef UDI_CDC_DATA_EP_OUT_TO_PORT
default:
port = 0;
break;
}

if (UDD_EP_TRANSFER_OK != status) {
// Abort reception
return;
}
buf_sel_trans = (udi_cdc_rx_buf_sel[port]==0)?1:0;
if (!n) {
udd_ep_run( ep,
true,
udi_cdc_rx_buf[port][buf_sel_trans],
UDI_CDC_RX_BUFFERS,
udi_cdc_data_received);
return;
}
udi_cdc_rx_buf_nb[port][buf_sel_trans] = n;
udi_cdc_rx_trans_ongoing[port] = false;
udi_cdc_rx_start(port);
}


static void udi_cdc_data_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
{
uint8_t port;
UNUSED(n);

switch (ep) {
#define UDI_CDC_DATA_EP_IN_TO_PORT(index, unused) \
case UDI_CDC_DATA_EP_IN_##index: \
port = index; \
break;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_DATA_EP_IN_TO_PORT, ~)
#undef UDI_CDC_DATA_EP_IN_TO_PORT
default:
port = 0;
break;
}

if (UDD_EP_TRANSFER_OK != status) {
// Abort transfer
return;
}
udi_cdc_tx_buf_nb[port][(udi_cdc_tx_buf_sel[port]==0)?1:0] = 0;
udi_cdc_tx_both_buf_to_send[port] = false;
udi_cdc_tx_trans_ongoing[port] = false;

if (n != 0) {
UDI_CDC_TX_EMPTY_NOTIFY(port);
}
udi_cdc_tx_send(port);
}


static void udi_cdc_tx_send(uint8_t port)
{
irqflags_t flags;
uint8_t buf_sel_trans;
bool b_short_packet;
udd_ep_id_t ep;
static uint16_t sof_zlp_counter = 0;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

if (udi_cdc_tx_trans_ongoing[port]) {
return; // Already on going or wait next SOF to send next data
}
if (udd_is_high_speed()) {
if (udi_cdc_tx_sof_num[port] == udd_get_micro_frame_number()) {
return; // Wait next SOF to send next data
}
}else{
if (udi_cdc_tx_sof_num[port] == udd_get_frame_number()) {
return; // Wait next SOF to send next data
}
}

flags = cpu_irq_save(); // to protect udi_cdc_tx_buf_sel
buf_sel_trans = udi_cdc_tx_buf_sel[port];
if (udi_cdc_tx_buf_nb[port][buf_sel_trans] == 0) {
sof_zlp_counter++;
if (((!udd_is_high_speed()) & & (sof_zlp_counter & lt; 100))
|| (udd_is_high_speed() & & (sof_zlp_counter & lt; 800))) {
cpu_irq_restore(flags);
return;
}
}
sof_zlp_counter = 0;

if (!udi_cdc_tx_both_buf_to_send[port]) {
// Send current Buffer
// and switch the current buffer
udi_cdc_tx_buf_sel[port] = (buf_sel_trans==0)?1:0;
}else{
// Send the other Buffer
// and no switch the current buffer
buf_sel_trans = (buf_sel_trans==0)?1:0;
}
udi_cdc_tx_trans_ongoing[port] = true;
cpu_irq_restore(flags);

b_short_packet = (udi_cdc_tx_buf_nb[port][buf_sel_trans] != UDI_CDC_TX_BUFFERS);
if (b_short_packet) {
if (udd_is_high_speed()) {
udi_cdc_tx_sof_num[port] = udd_get_micro_frame_number();
}else{
udi_cdc_tx_sof_num[port] = udd_get_frame_number();
}
}else{
udi_cdc_tx_sof_num[port] = 0; // Force next transfer without wait SOF
}

// Send the buffer with enable of short packet
switch (port) {
#define UDI_CDC_PORT_TO_DATA_EP_IN(index, unused) \
case index: \
ep = UDI_CDC_DATA_EP_IN_##index; \
break;
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_PORT_TO_DATA_EP_IN, ~)
#undef UDI_CDC_PORT_TO_DATA_EP_IN
default:
ep = UDI_CDC_DATA_EP_IN_0;
break;
}
udd_ep_run( ep,
b_short_packet,
udi_cdc_tx_buf[port][buf_sel_trans],
udi_cdc_tx_buf_nb[port][buf_sel_trans],
udi_cdc_data_sent);
}


//---------------------------------------------
//------- Application interface


//------- Application interface

void udi_cdc_ctrl_signal_dcd(bool b_set)
{
udi_cdc_ctrl_state_change(0, b_set, CDC_SERIAL_STATE_DCD);
}

void udi_cdc_ctrl_signal_dsr(bool b_set)
{
udi_cdc_ctrl_state_change(0, b_set, CDC_SERIAL_STATE_DSR);
}

void udi_cdc_signal_framing_error(void)
{
udi_cdc_ctrl_state_change(0, true, CDC_SERIAL_STATE_FRAMING);
}

void udi_cdc_signal_parity_error(void)
{
udi_cdc_ctrl_state_change(0, true, CDC_SERIAL_STATE_PARITY);
}

void udi_cdc_signal_overrun(void)
{
udi_cdc_ctrl_state_change(0, true, CDC_SERIAL_STATE_OVERRUN);
}

void udi_cdc_multi_ctrl_signal_dcd(uint8_t port, bool b_set)
{
udi_cdc_ctrl_state_change(port, b_set, CDC_SERIAL_STATE_DCD);
}

void udi_cdc_multi_ctrl_signal_dsr(uint8_t port, bool b_set)
{
udi_cdc_ctrl_state_change(port, b_set, CDC_SERIAL_STATE_DSR);
}

void udi_cdc_multi_signal_framing_error(uint8_t port)
{
udi_cdc_ctrl_state_change(port, true, CDC_SERIAL_STATE_FRAMING);
}

void udi_cdc_multi_signal_parity_error(uint8_t port)
{
udi_cdc_ctrl_state_change(port, true, CDC_SERIAL_STATE_PARITY);
}

void udi_cdc_multi_signal_overrun(uint8_t port)
{
udi_cdc_ctrl_state_change(port, true, CDC_SERIAL_STATE_OVERRUN);
}

iram_size_t udi_cdc_multi_get_nb_received_data(uint8_t port)
{
irqflags_t flags;
uint16_t pos;
iram_size_t nb_received;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif
flags = cpu_irq_save();
pos = udi_cdc_rx_pos[port];
nb_received = udi_cdc_rx_buf_nb[port][udi_cdc_rx_buf_sel[port]] - pos;
cpu_irq_restore(flags);
return nb_received;
}

iram_size_t udi_cdc_get_nb_received_data(void)
{
return udi_cdc_multi_get_nb_received_data(0);
}

bool udi_cdc_multi_is_rx_ready(uint8_t port)
{
return (udi_cdc_multi_get_nb_received_data(port) & gt; 0);
}

bool udi_cdc_is_rx_ready(void)
{
return udi_cdc_multi_is_rx_ready(0);
}

int udi_cdc_multi_getc(uint8_t port)
{
irqflags_t flags;
int rx_data = 0;
bool b_databit_9;
uint16_t pos;
uint8_t buf_sel;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

b_databit_9 = (9 == udi_cdc_line_coding[port].bDataBits);

udi_cdc_getc_process_one_byte:
// Check available data
flags = cpu_irq_save();
pos = udi_cdc_rx_pos[port];
buf_sel = udi_cdc_rx_buf_sel[port];
cpu_irq_restore(flags);
while (pos & gt; = udi_cdc_rx_buf_nb[port][buf_sel]) {
if (!udi_cdc_data_running) {
return 0;
}
goto udi_cdc_getc_process_one_byte;
}

// Read data
rx_data |= udi_cdc_rx_buf[port][buf_sel][pos];
udi_cdc_rx_pos[port] = pos+1;

udi_cdc_rx_start(port);

if (b_databit_9) {
// Receive MSB
b_databit_9 = false;
rx_data = rx_data & lt; & lt; 8;
goto udi_cdc_getc_process_one_byte;
}
return rx_data;
}

int udi_cdc_getc(void)
{
return udi_cdc_multi_getc(0);
}

iram_size_t udi_cdc_multi_read_buf(uint8_t port, void* buf, iram_size_t size)
{
irqflags_t flags;
uint8_t *ptr_buf = (uint8_t *)buf;
iram_size_t copy_nb;
uint16_t pos;
uint8_t buf_sel;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

udi_cdc_read_buf_loop_wait:
// Check available data
flags = cpu_irq_save();
pos = udi_cdc_rx_pos[port];
buf_sel = udi_cdc_rx_buf_sel[port];
cpu_irq_restore(flags);
while (pos & gt; = udi_cdc_rx_buf_nb[port][buf_sel]) {
if (!udi_cdc_data_running) {
return size;
}
goto udi_cdc_read_buf_loop_wait;
}

// Read data
copy_nb = udi_cdc_rx_buf_nb[port][buf_sel] - pos;
if (copy_nb & gt; size) {
copy_nb = size;
}
memcpy(ptr_buf, & udi_cdc_rx_buf[port][buf_sel][pos], copy_nb);
udi_cdc_rx_pos[port] += copy_nb;
ptr_buf += copy_nb;
size -= copy_nb;
udi_cdc_rx_start(port);

if (size) {
goto udi_cdc_read_buf_loop_wait;
}
return 0;
}

iram_size_t udi_cdc_read_buf(void* buf, iram_size_t size)
{
return udi_cdc_multi_read_buf(0, buf, size);
}

iram_size_t udi_cdc_multi_get_free_tx_buffer(uint8_t port)
{
irqflags_t flags;
iram_size_t buf_sel_nb, buf_nosel_nb, retval;
uint8_t buf_sel;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

flags = cpu_irq_save();
buf_sel = udi_cdc_tx_buf_sel[port];
buf_sel_nb = udi_cdc_tx_buf_nb[port][buf_sel];
buf_nosel_nb = udi_cdc_tx_buf_nb[port][(buf_sel == 0)? 1 : 0];
if (buf_sel_nb == UDI_CDC_TX_BUFFERS) {
if ((!udi_cdc_tx_trans_ongoing[port])
& & (!udi_cdc_tx_both_buf_to_send[port])) {
/* One buffer is full, but the other buffer is not used.
* (not used = transfer on-going)
* then move to the other buffer to store data */
udi_cdc_tx_both_buf_to_send[port] = true;
udi_cdc_tx_buf_sel[port] = (buf_sel == 0)? 1 : 0;
buf_sel_nb = 0;
buf_nosel_nb = UDI_CDC_TX_BUFFERS;
}
}
retval = UDI_CDC_TX_BUFFERS - buf_sel_nb;
cpu_irq_restore(flags);
return retval;
}

iram_size_t udi_cdc_get_free_tx_buffer(void)
{
return udi_cdc_multi_get_free_tx_buffer(0);
}

bool udi_cdc_multi_is_tx_ready(uint8_t port)
{
return (udi_cdc_multi_get_free_tx_buffer(port) != 0);
}

bool udi_cdc_is_tx_ready(void)
{
return udi_cdc_multi_is_tx_ready(0);
}

int udi_cdc_multi_putc(uint8_t port, int value)
{
irqflags_t flags;
bool b_databit_9;
uint8_t buf_sel;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

b_databit_9 = (9 == udi_cdc_line_coding[port].bDataBits);

udi_cdc_putc_process_one_byte:
// Check available space
if (!udi_cdc_multi_is_tx_ready(port)) {
if (!udi_cdc_data_running) {
return false;
}
goto udi_cdc_putc_process_one_byte;
}

// Write value
flags = cpu_irq_save();
buf_sel = udi_cdc_tx_buf_sel[port];
udi_cdc_tx_buf[port][buf_sel][udi_cdc_tx_buf_nb[port][buf_sel]++] = value;
cpu_irq_restore(flags);

if (b_databit_9) {
// Send MSB
b_databit_9 = false;
value = value & gt; & gt; 8;
goto udi_cdc_putc_process_one_byte;
}
return true;
}

int udi_cdc_putc(int value)
{
return udi_cdc_multi_putc(0, value);
}

iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t size)
{
irqflags_t flags;
uint8_t buf_sel;
uint16_t buf_nb;
iram_size_t copy_nb;
uint8_t *ptr_buf = (uint8_t *)buf;

#if UDI_CDC_PORT_NB == 1 // To optimize code
port = 0;
#endif

if (9 == udi_cdc_line_coding[port].bDataBits) {
size *=2;
}

udi_cdc_write_buf_loop_wait:
// Check available space
if (!udi_cdc_multi_is_tx_ready(port)) {
if (!udi_cdc_data_running) {
return size;
}
goto udi_cdc_write_buf_loop_wait;
}

// Write values
flags = cpu_irq_save();
buf_sel = udi_cdc_tx_buf_sel[port];
buf_nb = udi_cdc_tx_buf_nb[port][buf_sel];
copy_nb = UDI_CDC_TX_BUFFERS - buf_nb;
if (copy_nb & gt; size) {
copy_nb = size;
}
memcpy( & udi_cdc_tx_buf[port][buf_sel][buf_nb], ptr_buf, copy_nb);
udi_cdc_tx_buf_nb[port][buf_sel] = buf_nb + copy_nb;
cpu_irq_restore(flags);

// Update buffer pointer
ptr_buf = ptr_buf + copy_nb;
size -= copy_nb;

if (size) {
goto udi_cdc_write_buf_loop_wait;
}

return 0;
}

iram_size_t udi_cdc_write_buf(const void* buf, iram_size_t size)
{
return udi_cdc_multi_write_buf(0, buf, size);
}

//@}


Motofocuser.rar > sleepmgr.c

/**
* \file
*
* \brief Sleep manager
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#include & lt; compiler.h & gt;
#include & lt; sleepmgr.h & gt;

#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__)

uint8_t sleepmgr_locks[SLEEPMGR_NR_OF_MODES];

enum SLEEP_SMODE_enum sleepmgr_configs[SLEEPMGR_NR_OF_MODES] = {
SLEEP_SMODE_IDLE_gc,
SLEEP_SMODE_ESTDBY_gc,
SLEEP_SMODE_PSAVE_gc,
SLEEP_SMODE_STDBY_gc,
SLEEP_SMODE_PDOWN_gc,
};

#endif /* CONFIG_SLEEPMGR_ENABLE */


Motofocuser.rar > sleepmgr.h

/**
* \file
*
* \brief AVR XMEGA Sleep manager implementation
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef XMEGA_SLEEPMGR_H
#define XMEGA_SLEEPMGR_H

#ifdef __cplusplus
extern " C " {
#endif

#include & lt; compiler.h & gt;
#include & lt; conf_sleepmgr.h & gt;
#include & lt; sleep.h & gt;

/**
* \weakgroup sleepmgr_group
* @{
*/

enum sleepmgr_mode {
//! Active mode.
SLEEPMGR_ACTIVE = 0,
//! Idle mode.
SLEEPMGR_IDLE,
//! Extended Standby mode.
SLEEPMGR_ESTDBY,
//! Power Save mode.
SLEEPMGR_PSAVE,
//! Standby mode.
SLEEPMGR_STDBY,
//! Power Down mode.
SLEEPMGR_PDOWN,
SLEEPMGR_NR_OF_MODES,
};

/**
* \internal
* \name Internal arrays
* @{
*/
#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__)
//! Sleep mode lock counters
extern uint8_t sleepmgr_locks[];
/**
* \brief Look-up table with sleep mode configurations
* \note This is located in program memory (Flash) as it is constant.
*/
extern enum SLEEP_SMODE_enum sleepmgr_configs[];
#endif /* CONFIG_SLEEPMGR_ENABLE */
//! @}

static inline void sleepmgr_sleep(const enum sleepmgr_mode sleep_mode)
{
Assert(sleep_mode != SLEEPMGR_ACTIVE);
#ifdef CONFIG_SLEEPMGR_ENABLE
sleep_set_mode(sleepmgr_configs[sleep_mode-1]);
sleep_enable();

cpu_irq_enable();
sleep_enter();

sleep_disable();
#else
cpu_irq_enable();
#endif /* CONFIG_SLEEPMGR_ENABLE */

}

//! @}

#ifdef __cplusplus
}
#endif

#endif /* XMEGA_SLEEPMGR_H */


Motofocuser.rar > sleepmgr.h

/**
* \file
*
* \brief Sleep manager
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef SLEEPMGR_H
#define SLEEPMGR_H

#include & lt; compiler.h & gt;
#include & lt; parts.h & gt;

#if (SAM3S || SAM3U || SAM3N || SAM3XA || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM)
# include " sam/sleepmgr.h "
#elif XMEGA
# include " xmega/sleepmgr.h "
#elif UC3
# include " uc3/sleepmgr.h "
#elif SAM4L
# include " sam4l/sleepmgr.h "
#elif MEGA
# include " mega/sleepmgr.h "
#elif (SAMD20 || SAMD21 || SAMR21 || SAMD11)
# include " samd/sleepmgr.h "
#elif (SAML21)
# include " saml/sleepmgr.h "
#else
# error Unsupported device.
#endif

#ifdef __cplusplus
extern " C " {
#endif

/**
* \defgroup sleepmgr_group Sleep manager
*
* The sleep manager is a service for ensuring that the device is not put to
* sleep in deeper sleep modes than the system (e.g., peripheral drivers,
* services or the application) allows at any given time.
*
* It is based on the use of lock counting for the individual sleep modes, and
* will put the device to sleep in the shallowest sleep mode that has a non-zero
* lock count. The drivers/services/application can change these counts by use
* of \ref sleepmgr_lock_mode and \ref sleepmgr_unlock_mode.
* Refer to \ref sleepmgr_mode for a list of the sleep modes available for
* locking, and the device datasheet for information on their effect.
*
* The application must supply the file \ref conf_sleepmgr.h.
*
* For the sleep manager to be enabled, the symbol \ref CONFIG_SLEEPMGR_ENABLE
* must be defined, e.g., in \ref conf_sleepmgr.h. If this symbol is not
* defined, the functions are replaced with dummy functions and no RAM is used.
*
* @{
*/

/**
* \def CONFIG_SLEEPMGR_ENABLE
* \brief Configuration symbol for enabling the sleep manager
*
* If this symbol is not defined, the functions of this service are replaced
* with dummy functions. This is useful for reducing code size and execution
* time if the sleep manager is not needed in the application.
*
* This symbol may be defined in \ref conf_sleepmgr.h.
*/
#if defined(__DOXYGEN__) & & !defined(CONFIG_SLEEPMGR_ENABLE)
# define CONFIG_SLEEPMGR_ENABLE
#endif

/**
* \enum sleepmgr_mode
* \brief Sleep mode locks
*
* Identifiers for the different sleep mode locks.
*/

/**
* \brief Initialize the lock counts
*
* Sets all lock counts to 0, except the very last one, which is set to 1. This
* is done to simplify the algorithm for finding the deepest allowable sleep
* mode in \ref sleepmgr_enter_sleep.
*/
static inline void sleepmgr_init(void)
{
#ifdef CONFIG_SLEEPMGR_ENABLE
uint8_t i;

for (i = 0; i & lt; SLEEPMGR_NR_OF_MODES - 1; i++) {
sleepmgr_locks[i] = 0;
}
sleepmgr_locks[SLEEPMGR_NR_OF_MODES - 1] = 1;
#endif /* CONFIG_SLEEPMGR_ENABLE */
}

/**
* \brief Increase lock count for a sleep mode
*
* Increases the lock count for \a mode to ensure that the sleep manager does
* not put the device to sleep in the deeper sleep modes.
*
* \param mode Sleep mode to lock.
*/
static inline void sleepmgr_lock_mode(enum sleepmgr_mode mode)
{
#ifdef CONFIG_SLEEPMGR_ENABLE
irqflags_t flags;

if(sleepmgr_locks[mode] & gt; = 0xff) {
while (true) {
// Warning: maximum value of sleepmgr_locks buffer is no more than 255.
// Check APP or change the data type to uint16_t.
}
}

// Enter a critical section
flags = cpu_irq_save();

++sleepmgr_locks[mode];

// Leave the critical section
cpu_irq_restore(flags);
#else
UNUSED(mode);
#endif /* CONFIG_SLEEPMGR_ENABLE */
}

/**
* \brief Decrease lock count for a sleep mode
*
* Decreases the lock count for \a mode. If the lock count reaches 0, the sleep
* manager can put the device to sleep in the deeper sleep modes.
*
* \param mode Sleep mode to unlock.
*/
static inline void sleepmgr_unlock_mode(enum sleepmgr_mode mode)
{
#ifdef CONFIG_SLEEPMGR_ENABLE
irqflags_t flags;

if(sleepmgr_locks[mode] == 0) {
while (true) {
// Warning: minimum value of sleepmgr_locks buffer is no less than 0.
// Check APP.
}
}

// Enter a critical section
flags = cpu_irq_save();

--sleepmgr_locks[mode];

// Leave the critical section
cpu_irq_restore(flags);
#else
UNUSED(mode);
#endif /* CONFIG_SLEEPMGR_ENABLE */
}

/**
* \brief Retrieves the deepest allowable sleep mode
*
* Searches through the sleep mode lock counts, starting at the shallowest sleep
* mode, until the first non-zero lock count is found. The deepest allowable
* sleep mode is then returned.
*/
static inline enum sleepmgr_mode sleepmgr_get_sleep_mode(void)
{
enum sleepmgr_mode sleep_mode = SLEEPMGR_ACTIVE;

#ifdef CONFIG_SLEEPMGR_ENABLE
uint8_t *lock_ptr = sleepmgr_locks;

// Find first non-zero lock count, starting with the shallowest modes.
while (!(*lock_ptr)) {
lock_ptr++;
sleep_mode = (enum sleepmgr_mode)(sleep_mode + 1);
}

// Catch the case where one too many sleepmgr_unlock_mode() call has been
// performed on the deepest sleep mode.
Assert((uintptr_t)(lock_ptr - sleepmgr_locks) & lt; SLEEPMGR_NR_OF_MODES);

#endif /* CONFIG_SLEEPMGR_ENABLE */

return sleep_mode;
}

/**
* \fn sleepmgr_enter_sleep
* \brief Go to sleep in the deepest allowed mode
*
* Searches through the sleep mode lock counts, starting at the shallowest sleep
* mode, until the first non-zero lock count is found. The device is then put to
* sleep in the sleep mode that corresponds to the lock.
*
* \note This function enables interrupts before going to sleep, and will leave
* them enabled upon return. This also applies if sleep is skipped due to ACTIVE
* mode being locked.
*/

static inline void sleepmgr_enter_sleep(void)
{
#ifdef CONFIG_SLEEPMGR_ENABLE
enum sleepmgr_mode sleep_mode;

cpu_irq_disable();

// Find the deepest allowable sleep mode
sleep_mode = sleepmgr_get_sleep_mode();
// Return right away if first mode (ACTIVE) is locked.
if (sleep_mode==SLEEPMGR_ACTIVE) {
cpu_irq_enable();
return;
}
// Enter the deepest allowable sleep mode with interrupts enabled
sleepmgr_sleep(sleep_mode);
#else
cpu_irq_enable();
#endif /* CONFIG_SLEEPMGR_ENABLE */
}


//! @}

#ifdef __cplusplus
}
#endif

#endif /* SLEEPMGR_H */


Motofocuser.rar > osc.h

/**
* \file
*
* \brief Chip-specific oscillator management functions
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef XMEGA_OSC_H_INCLUDED
#define XMEGA_OSC_H_INCLUDED

#include & lt; compiler.h & gt;
#include & lt; board.h & gt;

/**
* \weakgroup osc_group
*
* \section osc_group_errata Errata
* - Auto-calibration does not work on XMEGA A1 revision H and
* earlier.
* @{
*/

//! \name Oscillator identifiers
//@{
//! 2 MHz Internal RC Oscillator
#define OSC_ID_RC2MHZ OSC_RC2MEN_bm
//! 32 MHz Internal RC Oscillator
#define OSC_ID_RC32MHZ OSC_RC32MEN_bm
//! 32 KHz Internal RC Oscillator
#define OSC_ID_RC32KHZ OSC_RC32KEN_bm
//! External Oscillator
#define OSC_ID_XOSC OSC_XOSCEN_bm
#if XMEGA_E
//! 8 MHz Internal RC Oscillator
# define OSC_ID_RC8MHZ OSC_RC8MEN_bm
#endif

/**
* \brief Reference from USB Start Of Frame
* \note This cannot be enabled or disabled, but can be used as a reference for
* the autocalibration (DFLL).
*/
#define OSC_ID_USBSOF 0xff
//@}

//! \name External oscillator types
//@{
#define XOSC_TYPE_EXTERNAL 0 //! & lt; External clock signal
#define XOSC_TYPE_32KHZ 2 //! & lt; 32.768 kHz resonator on TOSC
#define XOSC_TYPE_XTAL 3 //! & lt; 0.4 to 16 MHz resonator on XTAL
//@}

/**
* \def CONFIG_XOSC_32KHZ_LPM
* \brief Define for enabling Low Power Mode for 32 kHz external oscillator.
*/
#ifdef __DOXYGEN__
# define CONFIG_XOSC_32KHZ_LPM
#endif /* __DOXYGEN__ */

/**
* \def CONFIG_XOSC_STARTUP
* \brief Board-dependent value that determines the number of start-up cycles
* for external resonators, based on BOARD_XOSC_STARTUP_US. This is written to
* the two MSB of the XOSCSEL field of OSC.XOSCCTRL.
*
* \note This is automatically computed from BOARD_XOSC_HZ and
* BOARD_XOSC_STARTUP_US if it is not manually set.
*/

//! \name XTAL resonator start-up cycles
//@{
#define XOSC_STARTUP_256 0 //! & lt; 256 cycle start-up time
#define XOSC_STARTUP_1024 1 //! & lt; 1 k cycle start-up time
#define XOSC_STARTUP_16384 2 //! & lt; 16 k cycle start-up time
//@}

/**
* \def CONFIG_XOSC_RANGE
* \brief Board-dependent value that sets the frequency range of the external
* oscillator. This is written to the FRQRANGE field of OSC.XOSCCTRL.
*
* \note This is automatically computed from BOARD_XOSC_HZ if it is not manually
* set.
*/

//! \name XTAL resonator frequency range
//@{
//! 0.4 to 2 MHz frequency range
#define XOSC_RANGE_04TO2 OSC_FRQRANGE_04TO2_gc
//! 2 to 9 MHz frequency range
#define XOSC_RANGE_2TO9 OSC_FRQRANGE_2TO9_gc
//! 9 to 12 MHz frequency range
#define XOSC_RANGE_9TO12 OSC_FRQRANGE_9TO12_gc
//! 12 to 16 MHz frequency range
#define XOSC_RANGE_12TO16 OSC_FRQRANGE_12TO16_gc
//@}

/**
* \def XOSC_STARTUP_TIMEOUT
* \brief Number of us to wait for XOSC to start
*
* This is the number of slow clock cycles corresponding to
* OSC0_STARTUP_VALUE with an additional 25% safety margin. If the
* oscillator isn't running when this timeout has expired, it is assumed
* to have failed to start.
*/

// If application intends to use XOSC.
#ifdef BOARD_XOSC_HZ
// Get start-up config for XOSC, if not manually set.
# ifndef CONFIG_XOSC_STARTUP
# ifndef BOARD_XOSC_STARTUP_US
# error BOARD_XOSC_STARTUP_US must be configured.
# else
//! \internal Number of start-up cycles for the board's XOSC.
# define BOARD_XOSC_STARTUP_CYCLES \
(BOARD_XOSC_HZ / 1000000 * BOARD_XOSC_STARTUP_US)

# if (BOARD_XOSC_TYPE == XOSC_TYPE_XTAL)
# if (BOARD_XOSC_STARTUP_CYCLES & gt; 16384)
# error BOARD_XOSC_STARTUP_US is too high for current BOARD_XOSC_HZ.

# elif (BOARD_XOSC_STARTUP_CYCLES & gt; 1024)
# define CONFIG_XOSC_STARTUP XOSC_STARTUP_16384
# define XOSC_STARTUP_TIMEOUT (16384*(1000000/BOARD_XOSC_HZ))

# elif (BOARD_XOSC_STARTUP_CYCLES & gt; 256)
# define CONFIG_XOSC_STARTUP XOSC_STARTUP_1024
# define XOSC_STARTUP_TIMEOUT (1024*(1000000/BOARD_XOSC_HZ))

# else
# define CONFIG_XOSC_STARTUP XOSC_STARTUP_256
# define XOSC_STARTUP_TIMEOUT (256*(1000000/BOARD_XOSC_HZ))
# endif
# else /* BOARD_XOSC_TYPE == XOSC_TYPE_XTAL */
# define CONFIG_XOSC_STARTUP 0
# endif
# endif /* BOARD_XOSC_STARTUP_US */
# endif /* CONFIG_XOSC_STARTUP */

// Get frequency range setting for XOSC, if not manually set.
# ifndef CONFIG_XOSC_RANGE
# if (BOARD_XOSC_TYPE == XOSC_TYPE_XTAL)
# if (BOARD_XOSC_HZ & lt; 400000)
# error BOARD_XOSC_HZ is below minimum frequency of 400 kHz.

# elif (BOARD_XOSC_HZ & lt; 2000000)
# define CONFIG_XOSC_RANGE XOSC_RANGE_04TO2

# elif (BOARD_XOSC_HZ & lt; 9000000)
# define CONFIG_XOSC_RANGE XOSC_RANGE_2TO9

# elif (BOARD_XOSC_HZ & lt; 12000000)
# define CONFIG_XOSC_RANGE XOSC_RANGE_9TO12

# elif (BOARD_XOSC_HZ & lt; = 16000000)
# define CONFIG_XOSC_RANGE XOSC_RANGE_12TO16

# else
# error BOARD_XOSC_HZ is above maximum frequency of 16 MHz.
# endif
# else /* BOARD_XOSC_TYPE == XOSC_TYPE_XTAL */
# define CONFIG_XOSC_RANGE 0
# endif
# endif /* CONFIG_XOSC_RANGE */
#endif /* BOARD_XOSC_HZ */

#ifndef __ASSEMBLY__

/**
* \internal
* \brief Enable internal oscillator \a id
*
* Do not call this function directly. Use osc_enable() instead.
*/
static inline void osc_enable_internal(uint8_t id)
{
irqflags_t flags;

Assert(id != OSC_ID_USBSOF);

flags = cpu_irq_save();
OSC.CTRL |= id;
#if (XMEGA_E & & CONFIG_SYSCLK_RC8MHZ_LPM)
if(id == OSC_ID_RC8MHZ) {
OSC.CTRL |= OSC_RC8MLPM_bm;
}
#endif
cpu_irq_restore(flags);
}

#if defined(BOARD_XOSC_HZ) || defined(__DOXYGEN__)

/**
* \internal
* \brief Enable external oscillator \a id
*
* Do not call this function directly. Use osc_enable() instead. Also
* note that this function is only available if the board actually has
* an external oscillator crystal.
*/
static inline void osc_enable_external(uint8_t id)
{
irqflags_t flags;

Assert(id == OSC_ID_XOSC);

#ifndef CONFIG_XOSC_32KHZ_LPM
# if (XMEGA_E & & (BOARD_XOSC_TYPE == XOSC_TYPE_EXTERNAL) & & defined(CONFIG_XOSC_EXTERNAL_PC4))
OSC.XOSCCTRL = OSC_XOSCSEL4_bm;
# else
OSC.XOSCCTRL = BOARD_XOSC_TYPE | (CONFIG_XOSC_STARTUP & lt; & lt; 2) |
CONFIG_XOSC_RANGE;
# endif
#else
OSC.XOSCCTRL = BOARD_XOSC_TYPE | (CONFIG_XOSC_STARTUP & lt; & lt; 2) |
CONFIG_XOSC_RANGE | OSC_X32KLPM_bm;
#endif /* CONFIG_XOSC_32KHZ_LPM */

flags = cpu_irq_save();
OSC.CTRL |= id;
cpu_irq_restore(flags);
}
#else

static inline void osc_enable_external(uint8_t id)
{
Assert(false); // No external oscillator on the selected board
}
#endif

static inline void osc_disable(uint8_t id)
{
irqflags_t flags;

Assert(id != OSC_ID_USBSOF);

flags = cpu_irq_save();
OSC.CTRL & = ~id;
cpu_irq_restore(flags);
}

static inline void osc_enable(uint8_t id)
{
if (id != OSC_ID_XOSC) {
osc_enable_internal(id);
} else {
osc_enable_external(id);
}
}

static inline bool osc_is_ready(uint8_t id)
{
Assert(id != OSC_ID_USBSOF);

return OSC.STATUS & id;
}

//! \name XMEGA-Specific Oscillator Features
//@{

/**
* \brief Enable DFLL-based automatic calibration of an internal
* oscillator.
*
* The XMEGA features two Digital Frequency Locked Loops (DFLLs) which
* can be used to improve the accuracy of the 2 MHz and 32 MHz internal
* RC oscillators. The DFLL compares the oscillator frequency with a
* more accurate reference clock to do automatic run-time calibration of
* the oscillator.
*
* This function enables auto-calibration for either the 2 MHz or 32 MHz
* internal oscillator using either the 32.768 kHz calibrated internal
* oscillator or an external crystal oscillator as a reference. If the
* latter option is used, the crystal must be connected to the TOSC pins
* and run at 32.768 kHz.
*
* \param id The ID of the oscillator for which to enable
* auto-calibration:
* \arg \c OSC_ID_RC2MHZ or \c OSC_ID_RC32MHZ.
* \param ref_id The ID of the oscillator to use as a reference:
* \arg \c OSC_ID_RC32KHZ or \c OSC_ID_XOSC for internal or external 32 kHz
* reference, respectively.
* \arg \c OSC_ID_USBSOF for 32 MHz only when USB is available and running.
*/
static inline void osc_enable_autocalibration(uint8_t id, uint8_t ref_id)
{
irqflags_t flags;

flags = cpu_irq_save();
switch (id) {
case OSC_ID_RC2MHZ:
#if !XMEGA_E
Assert((ref_id == OSC_ID_RC32KHZ) || (ref_id == OSC_ID_XOSC));
if (ref_id == OSC_ID_XOSC) {
osc_enable(OSC_ID_RC32KHZ);
OSC.DFLLCTRL |= OSC_RC2MCREF_bm;
} else {
OSC.DFLLCTRL & = ~(OSC_RC2MCREF_bm);
}
DFLLRC2M.CTRL |= DFLL_ENABLE_bm;
#endif
break;

case OSC_ID_RC32MHZ:
#if XMEGA_AU || XMEGA_B || XMEGA_C || XMEGA_E
Assert((ref_id == OSC_ID_RC32KHZ)
|| (ref_id == OSC_ID_XOSC)
# if !XMEGA_E
|| (ref_id == OSC_ID_USBSOF)
#endif
);

OSC.DFLLCTRL & = ~(OSC_RC32MCREF_gm);

if (ref_id == OSC_ID_XOSC) {
osc_enable(OSC_ID_RC32KHZ);
OSC.DFLLCTRL |= OSC_RC32MCREF_XOSC32K_gc;
}
else if (ref_id == OSC_ID_RC32KHZ) {
OSC.DFLLCTRL |= OSC_RC32MCREF_RC32K_gc;
}
# if !XMEGA_E
else if (ref_id == OSC_ID_USBSOF) {
/*
* Calibrate 32MRC at 48MHz using USB SOF
* 48MHz / 1kHz = 0xBB80
*/
DFLLRC32M.COMP1 = 0x80;
DFLLRC32M.COMP2 = 0xBB;
OSC.DFLLCTRL |= OSC_RC32MCREF_USBSOF_gc;
}
# endif
#else
Assert((ref_id == OSC_ID_RC32KHZ) ||
(ref_id == OSC_ID_XOSC));

# if defined(OSC_RC32MCREF_gm)
OSC.DFLLCTRL & = ~(OSC_RC32MCREF_gm);
# endif

if (ref_id == OSC_ID_XOSC) {
osc_enable(OSC_ID_RC32KHZ);
# if defined(OSC_RC32MCREF_gm)
OSC.DFLLCTRL |= OSC_RC32MCREF_XOSC32K_gc;
# else
OSC.DFLLCTRL |= OSC_RC32MCREF_bm;
# endif
}
else if (ref_id == OSC_ID_RC32KHZ) {
# if defined(OSC_RC32MCREF_gm)
OSC.DFLLCTRL |= OSC_RC32MCREF_RC32K_gc;
# else
OSC.DFLLCTRL & = ~(OSC_RC32MCREF_bm);
# endif
}
#endif

DFLLRC32M.CTRL |= DFLL_ENABLE_bm;
break;

default:
Assert(false);
break;
}
cpu_irq_restore(flags);
}

/**
* \brief Disable DFLL-based automatic calibration of an internal
* oscillator.
*
* \see osc_enable_autocalibration
*
* \param id The ID of the oscillator for which to disable
* auto-calibration:
* \arg \c OSC_ID_RC2MHZ or \c OSC_ID_RC32MHZ.
*/
static inline void osc_disable_autocalibration(uint8_t id)
{
switch (id) {
case OSC_ID_RC2MHZ:
#if !XMEGA_E
DFLLRC2M.CTRL = 0;
#endif
break;

case OSC_ID_RC32MHZ:
DFLLRC32M.CTRL = 0;
break;

default:
Assert(false);
break;
}
}

/**
* \brief Load a specific calibration value for the specified oscillator.
*
* \param id The ID of the oscillator for which to disable
* auto-calibration:
* \arg \c OSC_ID_RC2MHZ or \c OSC_ID_RC32MHZ.
* \param calib The specific calibration value required:
*
*/
static inline void osc_user_calibration(uint8_t id, uint16_t calib)
{
switch (id) {
case OSC_ID_RC2MHZ:
#if !XMEGA_E
DFLLRC2M.CALA=LSB(calib);
DFLLRC2M.CALB=MSB(calib);
#endif
break;

case OSC_ID_RC32MHZ:
DFLLRC32M.CALA=LSB(calib);
DFLLRC32M.CALB=MSB(calib);
break;

#if XMEGA_E
case OSC_ID_RC8MHZ:
OSC.RC8MCAL=LSB(calib);
break;
#endif

default:
Assert(false);
break;
}
}
//@}

static inline uint32_t osc_get_rate(uint8_t id)
{
Assert(id != OSC_ID_USBSOF);

switch (id) {
case OSC_ID_RC2MHZ:
return 2000000UL;

case OSC_ID_RC32MHZ:
#ifdef CONFIG_OSC_RC32_CAL
return CONFIG_OSC_RC32_CAL;
#else
return 32000000UL;
#endif

case OSC_ID_RC32KHZ:
return 32768UL;

#ifdef BOARD_XOSC_HZ
case OSC_ID_XOSC:
return BOARD_XOSC_HZ;
#endif

default:
Assert(false);
return 0;
}
}

#endif /* __ASSEMBLY__ */

//! @}

#endif /* XMEGA_OSC_H_INCLUDED */


Motofocuser.rar > sysclk.h

/**
* \file
*
* \brief Chip-specific system clock management functions
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef XMEGA_SYSCLK_H_INCLUDED
#define XMEGA_SYSCLK_H_INCLUDED

#include & lt; board.h & gt;
#include & lt; compiler.h & gt;
#include & lt; parts.h & gt;
#include & lt; ccp.h & gt;
#include & lt; osc.h & gt;
#include & lt; pll.h & gt;

// Include clock configuration for the project.
#include & lt; conf_clock.h & gt;

#ifdef __cplusplus
extern " C " {
#endif

/**
* \page sysclk_quickstart Quick Start Guide for the System Clock Management service (XMEGA)
*
* This is the quick start guide for the \ref sysclk_group " System Clock Management "
* service, with step-by-step instructions on how to configure and use the service for
* specific use cases.
*
* \section sysclk_quickstart_usecases System Clock Management use cases
* - \ref sysclk_quickstart_basic
* - \ref sysclk_quickstart_use_case_2
* - \ref sysclk_quickstart_use_case_3
*
* \section sysclk_quickstart_basic Basic usage of the System Clock Management service
* This section will present a basic use case for the System Clock Management service.
* This use case will configure the main system clock to 32MHz, using an internal PLL
* module to multiply the frequency of a crystal attached to the microcontroller. The
* secondary peripheral bus clock and CPU clock are scaled down from the speed of the
* main system clock.
*
* \subsection sysclk_quickstart_use_case_1_prereq Prerequisites
* - None
*
* \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code
* Add to the application initialization code:
* \code
sysclk_init();
\endcode
*
* \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow
* -# Configure the system clocks according to the settings in conf_clock.h:
* \code sysclk_init(); \endcode
*
* \subsection sysclk_quickstart_use_case_1_example_code Example code
* Add or uncomment the following in your conf_clock.h header file, commenting out all other
* definitions of the same symbol(s):
* \code
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL

// Fpll0 = (Fclk * PLL_mul) / PLL_div
#define CONFIG_PLL0_SOURCE PLL_SRC_XOSC
#define CONFIG_PLL0_MUL (32000000UL / BOARD_XOSC_HZ)
#define CONFIG_PLL0_DIV 1

// Fbus = Fsys / (2 ^ BUS_div)
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_2
\endcode
*
* \subsection sysclk_quickstart_use_case_1_example_workflow Workflow
* -# Configure the main system clock to use the output of the PLL module as its source:
* \code #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL \endcode
* -# Configure the PLL0 module to use external crystal oscillator XOSC as its source:
* \code #define CONFIG_PLL0_SOURCE PLL_SRC_XOSC \endcode
* -# Configure the PLL0 module to multiply the external oscillator XOSC frequency up to 32MHz:
* \code
#define CONFIG_PLL0_MUL (32000000UL / BOARD_XOSC_HZ)
#define CONFIG_PLL0_DIV 1
\endcode
* \note For user boards, \c BOARD_XOSC_HZ should be defined in the board \c conf_board.h configuration
* file as the frequency of the crystal attached to XOSC.
* -# Configure the main CPU clock and slow peripheral bus to run at 16MHz, run the fast peripheral bus
* at the full 32MHz speed:
* \code
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_2
\endcode
* \note Some dividers are powers of two, while others are integer division factors. Refer to the
* formulas in the conf_clock.h template commented above each division define.
*/

/**
* \page sysclk_quickstart_use_case_2 Advanced use case - Peripheral Bus Clock Management (XMEGA)
*
* \section sysclk_quickstart_use_case_2 Advanced use case - Peripheral Bus Clock Management
* This section will present a more advanced use case for the System Clock Management service.
* This use case will configure the main system clock to 32MHz, using an internal PLL
* module to multiply the frequency of a crystal attached to the microcontroller. The peripheral bus
* clocks will run at the same speed as the CPU clock, and the USB clock will be configured to use
* the internal 32MHz (nominal) RC oscillator calibrated to 48MHz with the USB Start-of-Frame as the
* calibration reference.
*
* \subsection sysclk_quickstart_use_case_2_prereq Prerequisites
* - None
*
* \subsection sysclk_quickstart_use_case_2_setup_steps Initialization code
* Add to the application initialization code:
* \code
sysclk_init();
\endcode
*
* \subsection sysclk_quickstart_use_case_2_setup_steps_workflow Workflow
* -# Configure the system clocks according to the settings in conf_clock.h:
* \code sysclk_init(); \endcode
*
* \subsection sysclk_quickstart_use_case_2_example_code Example code
* Add or uncomment the following in your conf_clock.h header file, commenting out all other
* definitions of the same symbol(s):
* \code
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL

// Fpll0 = (Fclk * PLL_mul) / PLL_div
#define CONFIG_PLL0_SOURCE PLL_SRC_XOSC
#define CONFIG_PLL0_MUL (32000000UL / BOARD_XOSC_HZ)
#define CONFIG_PLL0_DIV 1

// Fbus = Fsys / (2 ^ BUS_div)
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1

#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
#define CONFIG_OSC_RC32_CAL 48000000UL
#define CONFIG_OSC_AUTOCAL OSC_ID_RC32MHZ
#define CONFIG_OSC_AUTOCAL_REF_OSC OSC_ID_USBSOF
\endcode
*
* \subsection sysclk_quickstart_use_case_2_example_workflow Workflow
* -# Configure the main system clock to use the output of the PLL module as its source:
* \code #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL \endcode
* -# Configure the PLL0 module to use external crystal oscillator XOSC as its source:
* \code #define CONFIG_PLL0_SOURCE PLL_SRC_XOSC \endcode
* -# Configure the PLL0 module to multiply the external oscillator XOSC frequency up to 32MHz:
* \code
#define CONFIG_PLL0_MUL (32000000UL / BOARD_XOSC_HZ)
#define CONFIG_PLL0_DIV 1
\endcode
* \note For user boards, \c BOARD_XOSC_HZ should be defined in the board \c conf_board.h configuration
* file as the frequency of the crystal attached to XOSC.
* -# Configure the main CPU and peripheral bus clocks to run at 32MHz:
* \code
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_2
\endcode
* \note Some dividers are powers of two, while others are integer division factors. Refer to the
* formulas in the conf_clock.h template commented above each division define.
* -# Configure the USB module clock to use the internal fast (32MHz) RC oscillator:
* \code
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
\endcode
* \note When the internal RC oscillator is used for the USB module, it must be recalibrated to 48MHz for
* the USB peripheral to function. If this oscillator is then used as the main system clock source,
* the clock must be divided down via the peripheral and CPU bus clock division constants to ensure
* that the maximum allowable CPU frequency is not exceeded.
* -# Configure the internal fast (32MHz) RC oscillator to calibrate to 48MHz using the USB Start of Frame (SOF)
* as the calibration reference:
* \code
#define CONFIG_OSC_RC32_CAL 48000000UL
#define CONFIG_OSC_AUTOCAL OSC_ID_RC32MHZ
#define CONFIG_OSC_AUTOCAL_REF_OSC OSC_ID_USBSOF
\endcode
*/

/**
* \page sysclk_quickstart_use_case_3 Advanced use case - DFLL auto-calibration (XMEGA)
*
* \section sysclk_quickstart_use_case_3 Advanced use case - DFLL auto-calibration
* This section will present a more advanced use case for the System Clock
* Management service. This use case will configure the main system clock to
* 2MHz, using the internal 2MHz RC oscillator calibrated against the internal
* 32KHz oscillator. The peripheral bus clocks will run at the same speed as
* the CPU clock, and the USB clock will be configured to use the internal
* 32MHz (nominal) RC oscillator calibrated to 48MHz with the USB
* Start-of-Frame as the calibration reference.
*
* \subsection sysclk_quickstart_use_case_3_prereq Prerequisites
* - None
*
* \subsection sysclk_quickstart_use_case_3_setup_steps Initialization code
* Add to the application initialization code:
* \code
sysclk_init();
\endcode
*
* \subsection sysclk_quickstart_use_case_3_setup_steps_workflow Workflow
* -# Configure the system clocks according to the settings in conf_clock.h:
* \code sysclk_init(); \endcode
*
* \subsection sysclk_quickstart_use_case_3_example_code Example code
* Add or uncomment the following in your conf_clock.h header file,
* commenting out all other definitions of the same symbol(s):
* \code
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC2MHZ

#define CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC OSC_ID_RC32KHZ

#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
#define CONFIG_OSC_RC32_CAL 48000000UL
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF
\endcode
*
* \subsection sysclk_quickstart_use_case_3_example_workflow Workflow
* -# Configure the main system clock to use the internal 2MHz RC oscillator
* as its source:
* \code
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC2MHZ
\endcode
* -# Configure the 2MHz DFLL auto-calibration to use the internal 32KHz RC
* oscillator:
* \code
#define CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC OSC_ID_RC32KHZ
\endcode
* \note For auto-calibration it's typically more relevant to use an external
* 32KHz crystal. So if that's the case use OSC_ID_XOSC instead.
* -# Configure the USB module clock to use the internal fast (32MHz) RC oscillator:
* \code
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
\endcode
* -# Configure the internal fast (32MHz) RC oscillator to calibrate to 48MHz
* using the USB Start of Frame (SOF) as the calibration reference:
* \code
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
#define CONFIG_OSC_RC32_CAL 48000000UL
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF
\endcode
*/

/* Wrap old config into new one */
#ifdef CONFIG_OSC_AUTOCAL
# if CONFIG_OSC_AUTOCAL == OSC_ID_RC2MHZ
# define CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC CONFIG_OSC_AUTOCAL_REF_OSC
# elif CONFIG_OSC_AUTOCAL == OSC_ID_RC32MHZ
# define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC CONFIG_OSC_AUTOCAL_REF_OSC
# else
# error Bad configuration of CONFIG_OSC_AUTOCAL and/or CONFIG_OSC_AUTOCAL_REF_OSC
# endif
#endif

// Use 2 MHz with no prescaling if config was empty.
#ifndef CONFIG_SYSCLK_SOURCE
# define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC2MHZ
#endif /* CONFIG_SYSCLK_SOURCE */

#ifndef CONFIG_SYSCLK_PSADIV
# define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1
#endif /* CONFIG_SYSCLK_PSADIV */

#ifndef CONFIG_SYSCLK_PSBCDIV
# define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1
#endif /* CONFIG_SYSCLK_PSBCDIV */

/**
* \weakgroup sysclk_group
*
* \section sysclk_group_config Configuration Symbols
*
* The following configuration symbols may be used to specify the
* initial system clock configuration. If any of the symbols are not
* set, reasonable defaults will be provided.
* - \b CONFIG_SYSCLK_SOURCE: The initial system clock source.
* - \b CONFIG_SYSCLK_PSADIV: The initial Prescaler A setting.
* - \b CONFIG_SYSCLK_PSBCDIV: The initial Prescaler B setting.
* - \b CONFIG_USBCLK_SOURCE: The initial USB clock source.
*
* @{
*/

//! \name System Clock Sources
//@{
//! Internal 2 MHz RC oscillator
#define SYSCLK_SRC_RC2MHZ CLK_SCLKSEL_RC2M_gc
//! Internal 32 MHz RC oscillator
#define SYSCLK_SRC_RC32MHZ CLK_SCLKSEL_RC32M_gc
//! Internal 32 KHz RC oscillator
#define SYSCLK_SRC_RC32KHZ CLK_SCLKSEL_RC32K_gc
//! External oscillator
#define SYSCLK_SRC_XOSC CLK_SCLKSEL_XOSC_gc
//! Phase-Locked Loop
#define SYSCLK_SRC_PLL CLK_SCLKSEL_PLL_gc
#if XMEGA_E
//! Internal 8 MHz RC oscillator
# define SYSCLK_SRC_RC8MHZ CLK_SCLKSEL_RC8M_gc
#endif
//@}

//! \name Prescaler A Setting (relative to CLKsys)
//@{
#define SYSCLK_PSADIV_1 CLK_PSADIV_1_gc //! & lt; Do not prescale
#define SYSCLK_PSADIV_2 CLK_PSADIV_2_gc //! & lt; Prescale CLKper4 by 2
#define SYSCLK_PSADIV_4 CLK_PSADIV_4_gc //! & lt; Prescale CLKper4 by 4
#define SYSCLK_PSADIV_8 CLK_PSADIV_8_gc //! & lt; Prescale CLKper4 by 8
#define SYSCLK_PSADIV_16 CLK_PSADIV_16_gc //! & lt; Prescale CLKper4 by 16
#define SYSCLK_PSADIV_32 CLK_PSADIV_32_gc //! & lt; Prescale CLKper4 by 32
#define SYSCLK_PSADIV_64 CLK_PSADIV_64_gc //! & lt; Prescale CLKper4 by 64
#define SYSCLK_PSADIV_128 CLK_PSADIV_128_gc //! & lt; Prescale CLKper4 by 128
#define SYSCLK_PSADIV_256 CLK_PSADIV_256_gc //! & lt; Prescale CLKper4 by 256
#define SYSCLK_PSADIV_512 CLK_PSADIV_512_gc //! & lt; Prescale CLKper4 by 512

#if XMEGA_E
# define SYSCLK_PSADIV_6 CLK_PSADIV_6_gc //! & lt; Prescale CLKper4 by 6
# define SYSCLK_PSADIV_10 CLK_PSADIV_10_gc //! & lt; Prescale CLKper4 by 10
# define SYSCLK_PSADIV_12 CLK_PSADIV_12_gc //! & lt; Prescale CLKper4 by 12
# define SYSCLK_PSADIV_24 CLK_PSADIV_24_gc //! & lt; Prescale CLKper4 by 24
# define SYSCLK_PSADIV_48 CLK_PSADIV_48_gc //! & lt; Prescale CLKper4 by 48
#endif
//@}

//! \name Prescaler B and C Setting (relative to CLKper4)
//@{
//! Do not prescale
#define SYSCLK_PSBCDIV_1_1 CLK_PSBCDIV_1_1_gc
//! Prescale CLKper and CLKcpu by 2
#define SYSCLK_PSBCDIV_1_2 CLK_PSBCDIV_1_2_gc
//! Prescale CLKper2, CLKper and CLKcpu by 4
#define SYSCLK_PSBCDIV_4_1 CLK_PSBCDIV_4_1_gc
//! Prescale CLKper2 by 2, CLKper and CLKcpu by 4
#define SYSCLK_PSBCDIV_2_2 CLK_PSBCDIV_2_2_gc
//@}

//! \name System Clock Port Numbers
enum sysclk_port_id {
SYSCLK_PORT_GEN, //! & lt; Devices not associated with a specific port.
SYSCLK_PORT_A, //! & lt; Devices on PORTA
SYSCLK_PORT_B, //! & lt; Devices on PORTB
SYSCLK_PORT_C, //! & lt; Devices on PORTC
SYSCLK_PORT_D, //! & lt; Devices on PORTD
SYSCLK_PORT_E, //! & lt; Devices on PORTE
SYSCLK_PORT_F, //! & lt; Devices on PORTF
};

/*! \name Clocks not associated with any port
*
* \note See the datasheet for available modules in the device.
*/
//@{
#define SYSCLK_DMA PR_DMA_bm //! & lt; DMA Controller
#define SYSCLK_EDMA PR_EDMA_bm //! & lt; EDMA Controller
#define SYSCLK_EVSYS PR_EVSYS_bm //! & lt; Event System
#define SYSCLK_RTC PR_RTC_bm //! & lt; Real-Time Counter
#define SYSCLK_EBI PR_EBI_bm //! & lt; Ext Bus Interface
#define SYSCLK_AES PR_AES_bm //! & lt; AES Module
#define SYSCLK_USB PR_USB_bm //! & lt; USB Module
#define SYSCLK_XCL PR_XCL_bm //! & lt; USB Module
//@}

/*! \name Clocks on PORTA and PORTB
*
* \note See the datasheet for available modules in the device.
*/
//@{
#define SYSCLK_AC PR_AC_bm //! & lt; Analog Comparator
#define SYSCLK_ADC PR_ADC_bm //! & lt; A/D Converter
#define SYSCLK_DAC PR_DAC_bm //! & lt; D/A Converter
//@}

/*! \name Clocks on PORTC, PORTD, PORTE and PORTF
*
* \note See the datasheet for available modules in the device.
*/
//@{
#define SYSCLK_TC0 PR_TC0_bm //! & lt; Timer/Counter 0
#define SYSCLK_TC1 PR_TC1_bm //! & lt; Timer/Counter 1
#define SYSCLK_TC4 PR_TC4_bm //! & lt; Timer/Counter 0
#define SYSCLK_TC5 PR_TC5_bm //! & lt; Timer/Counter 1
#define SYSCLK_HIRES PR_HIRES_bm //! & lt; Hi-Res Extension
#define SYSCLK_SPI PR_SPI_bm //! & lt; SPI controller
#define SYSCLK_USART0 PR_USART0_bm //! & lt; USART 0
#define SYSCLK_USART1 PR_USART1_bm //! & lt; USART 1
#define SYSCLK_TWI PR_TWI_bm //! & lt; TWI controller
//@}

/**
* \name RTC clock source identifiers
*
* @{
*/

/** 1kHz from internal ULP oscillator. Low precision */
#define SYSCLK_RTCSRC_ULP CLK_RTCSRC_ULP_gc
/** 1.024kHz from 32.768kHz crystal oscillator TOSC */
#define SYSCLK_RTCSRC_TOSC CLK_RTCSRC_TOSC_gc
/** 1.024kHz from 32.768kHz internal RC oscillator */
#define SYSCLK_RTCSRC_RCOSC CLK_RTCSRC_RCOSC_gc
/** 32.768kHz from crystal oscillator TOSC */
#define SYSCLK_RTCSRC_TOSC32 CLK_RTCSRC_TOSC32_gc
/** 32.768kHz from internal RC oscillator */
#define SYSCLK_RTCSRC_RCOSC32 CLK_RTCSRC_RCOSC32_gc
/** External clock on TOSC1 */
#define SYSCLK_RTCSRC_EXTCLK CLK_RTCSRC_EXTCLK_gc

/** @} */

#if XMEGA_AU || XMEGA_B || XMEGA_C
//! \name USB Clock Sources
//@{
//! Internal 32 MHz RC oscillator
#define USBCLK_SRC_RCOSC 0
//! Phase-Locked Loop
#define USBCLK_SRC_PLL 1
//@}

/**
* \def CONFIG_USBCLK_SOURCE
* \brief Configuration symbol for the USB clock source
*
* If the device features an USB module, and this is intended to be used, this
* symbol must be defined with the clock source configuration.
*
* Define this as one of the \c USBCLK_SRC_xxx definitions. If the PLL is
* selected, it must be configured to run at 48 MHz. If the 32 MHz RC oscillator
* is selected, it must be tuned to 48 MHz by means of the DFLL.
*/
#ifdef __DOXYGEN__
# define CONFIG_USBCLK_SOURCE
#endif

#endif // XMEGA_AU || XMEGA_B || XMEGA_C

#ifndef __ASSEMBLY__

/**
* \name Querying the system clock and its derived clocks
*/
//@{

/**
* \brief Return the current rate in Hz of the main system clock
*
* \todo This function assumes that the main clock source never changes
* once it's been set up, and that PLL0 always runs at the compile-time
* configured default rate. While this is probably the most common
* configuration, which we want to support as a special case for
* performance reasons, we will at some point need to support more
* dynamic setups as well.
*
* \return Frequency of the main system clock, in Hz.
*/
static inline uint32_t sysclk_get_main_hz(void)
{
switch (CONFIG_SYSCLK_SOURCE) {
case SYSCLK_SRC_RC2MHZ:
return 2000000UL;
#if XMEGA_E
case SYSCLK_SRC_RC8MHZ:
return 8000000UL;
#endif
case SYSCLK_SRC_RC32MHZ:
#ifdef CONFIG_OSC_RC32_CAL
return CONFIG_OSC_RC32_CAL;
#else
return 32000000UL;
#endif

case SYSCLK_SRC_RC32KHZ:
return 32768UL;

#ifdef BOARD_XOSC_HZ
case SYSCLK_SRC_XOSC:
return BOARD_XOSC_HZ;
#endif

#ifdef CONFIG_PLL0_SOURCE
case SYSCLK_SRC_PLL:
return pll_get_default_rate(0);
#endif

default:
//unhandled_case(CONFIG_SYSCLK_SOURCE);
return 0;
}
}

/**
* \brief Return the current rate in Hz of clk_PER4.
*
* This clock can run up to four times faster than the CPU clock.
*
* \return Frequency of the clk_PER4 clock, in Hz.
*/
static inline uint32_t sysclk_get_per4_hz(void)
{
uint8_t shift = 0;

#if XMEGA_E
if (CONFIG_SYSCLK_PSADIV & gt; SYSCLK_PSADIV_512) {
switch (CONFIG_SYSCLK_PSADIV) {
case SYSCLK_PSADIV_6:
return sysclk_get_main_hz() / 6;
case SYSCLK_PSADIV_10:
return sysclk_get_main_hz() / 10;
case SYSCLK_PSADIV_12:
return sysclk_get_main_hz() / 12;
case SYSCLK_PSADIV_24:
return sysclk_get_main_hz() / 24;
case SYSCLK_PSADIV_48:
return sysclk_get_main_hz() / 48;
default:
//unhandled_case;
return 0;
}
}
#endif
if (CONFIG_SYSCLK_PSADIV & (1U & lt; & lt; CLK_PSADIV_gp)) {
shift = (CONFIG_SYSCLK_PSADIV & gt; & gt; (1 + CLK_PSADIV_gp)) + 1;
}

return sysclk_get_main_hz() & gt; & gt; shift;
}

/**
* \brief Return the current rate in Hz of clk_PER2.
*
* This clock can run up to two times faster than the CPU clock.
*
* \return Frequency of the clk_PER2 clock, in Hz.
*/
static inline uint32_t sysclk_get_per2_hz(void)
{
switch (CONFIG_SYSCLK_PSBCDIV) {
case SYSCLK_PSBCDIV_1_1: /* Fall through */
case SYSCLK_PSBCDIV_1_2:
return sysclk_get_per4_hz();

case SYSCLK_PSBCDIV_4_1:
return sysclk_get_per4_hz() / 4;

case SYSCLK_PSBCDIV_2_2:
return sysclk_get_per4_hz() / 2;

default:
//unhandled_case(CONFIG_SYSCLK_PSBCDIV);
return 0;
}
}

/**
* \brief Return the current rate in Hz of clk_PER.
*
* This clock always runs at the same rate as the CPU clock unless the divider
* is set.
*
* \return Frequency of the clk_PER clock, in Hz.
*/
static inline uint32_t sysclk_get_per_hz(void)
{
if (CONFIG_SYSCLK_PSBCDIV & (1U & lt; & lt; CLK_PSBCDIV_gp))
return sysclk_get_per2_hz() / 2;
else
return sysclk_get_per2_hz();
}

/**
* \brief Return the current rate in Hz of the CPU clock.
*
* \return Frequency of the CPU clock, in Hz.
*/
static inline uint32_t sysclk_get_cpu_hz(void)
{
return sysclk_get_per_hz();
}

/**
* \brief Retrieves the current rate in Hz of the Peripheral Bus clock attached
* to the specified peripheral.
*
* \param module Pointer to the module's base address.
*
* \return Frequency of the bus attached to the specified peripheral, in Hz.
*/
static inline uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module)
{
if (module == NULL) {
Assert(false);
return 0;
}
#ifdef AES
else if (module == & AES) {
return sysclk_get_per_hz();
}
#endif
#ifdef EBI
else if (module == & EBI) {
return sysclk_get_per2_hz();
}
#endif
#ifdef RTC
else if (module == & RTC) {
return sysclk_get_per_hz();
}
#endif
#ifdef EVSYS
else if (module == & EVSYS) {
return sysclk_get_per_hz();
}
#endif
#ifdef DMA
else if (module == & DMA) {
return sysclk_get_per_hz();
}
#endif
#ifdef EDMA
else if (module == & EDMA) {
return sysclk_get_per_hz();
}
#endif
#ifdef ACA
else if (module == & ACA) {
return sysclk_get_per_hz();
}
#endif
#ifdef ACB
else if (module == & ACB) {
return sysclk_get_per_hz();
}
#endif
#ifdef ADCA
else if (module == & ADCA) {
return sysclk_get_per_hz();
}
#endif
#ifdef ADCB
else if (module == & ADCB) {
return sysclk_get_per_hz();
}
#endif
#ifdef DACA
else if (module == & DACA) {
return sysclk_get_per_hz();
}
#endif
// Workaround for bad XMEGA D header file
#if !XMEGA_D
#ifdef DACB
else if (module == & DACB) {
return sysclk_get_per_hz();
}
#endif
#endif // Workaround end
#ifdef FAULTC0
else if (module == & FAULTC0) {
return sysclk_get_per_hz();
}
#endif
#ifdef FAULTC1
else if (module == & FAULTC1) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCC0
else if (module == & TCC0) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCD0
else if (module == & TCD0) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCE0
else if (module == & TCE0) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCF0
else if (module == & TCF0) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCC1
else if (module == & TCC1) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCD1
else if (module == & TCD1) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCE1
else if (module == & TCE1) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCF1
else if (module == & TCF1) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCC4
else if (module == & TCC4) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCC5
else if (module == & TCC5) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCD4
else if (module == & TCD4) {
return sysclk_get_per_hz();
}
#endif
#ifdef TCD5
else if (module == & TCD5) {
return sysclk_get_per_hz();
}
#endif
#ifdef HIRESC
else if (module == & HIRESC) {
return sysclk_get_per4_hz();
}
#endif
#ifdef HIRESD
else if (module == & HIRESD) {
return sysclk_get_per4_hz();
}
#endif
#ifdef HIRESE
else if (module == & HIRESE) {
return sysclk_get_per4_hz();
}
#endif
#ifdef HIRESF
else if (module == & HIRESF) {
return sysclk_get_per4_hz();
}
#endif
#ifdef SPIC
else if (module == & SPIC) {
return sysclk_get_per_hz();
}
#endif
#ifdef SPID
else if (module == & SPID) {
return sysclk_get_per_hz();
}
#endif
#ifdef SPIE
else if (module == & SPIE) {
return sysclk_get_per_hz();
}
#endif
#ifdef SPIF
else if (module == & SPIF) {
return sysclk_get_per_hz();
}
#endif
#ifdef USARTC0
else if (module == & USARTC0) {
return sysclk_get_per_hz();
}
#endif
#ifdef USARTD0
else if (module == & USARTD0) {
return sysclk_get_per_hz();
}
#endif
#ifdef USARTE0
else if (module == & USARTE0) {
return sysclk_get_per_hz();
}
#endif
#ifdef USARTF0
else if (module == & USARTF0) {
return sysclk_get_per_hz();
}
#endif
#ifdef USARTC1
else if (module == & USARTC1) {
return sysclk_get_per_hz();
}
#endif
#ifdef USARTD1
else if (module == & USARTD1) {
return sysclk_get_per_hz();
}
#endif
#ifdef USARTE1
else if (module == & USARTE1) {
return sysclk_get_per_hz();
}
#endif
#ifdef USARTF1
else if (module == & USARTF1) {
return sysclk_get_per_hz();
}
#endif
#ifdef TWIC
else if (module == & TWIC) {
return sysclk_get_per_hz();
}
#endif
#ifdef TWID
else if (module == & TWID) {
return sysclk_get_per_hz();
}
#endif
#ifdef TWIE
else if (module == & TWIE) {
return sysclk_get_per_hz();
}
#endif
#ifdef TWIF
else if (module == & TWIF) {
return sysclk_get_per_hz();
}
#endif
#ifdef XCL
else if (module == & XCL) {
return sysclk_get_per_hz();
}
#endif
else {
Assert(false);
return 0;
}
}

//@}

//! \name Enabling and disabling synchronous clocks
//@{

/**
* \brief Enable the clock to peripheral \a id on port \a port
*
* \param port ID of the port to which the module is connected (one of
* the \c SYSCLK_PORT_* definitions).
* \param id The ID (bitmask) of the peripheral module to be enabled.
*/
extern void sysclk_enable_module(enum sysclk_port_id port, uint8_t id);

/**
* \brief Disable the clock to peripheral \a id on port \a port
*
* \param port ID of the port to which the module is connected (one of
* the \c SYSCLK_PORT_* definitions).
* \param id The ID (bitmask) of the peripheral module to be disabled.
*/
extern void sysclk_disable_module(enum sysclk_port_id port, uint8_t id);

/**
* \brief Enable a peripheral's clock from its base address.
*
* Enables the clock to a peripheral, given its base address. If the peripheral
* has an associated clock on the HSB bus, this will be enabled also.
*
* \param module Pointer to the module's base address.
*/
static inline void sysclk_enable_peripheral_clock(const volatile void *module)
{
if (module == NULL) {
Assert(false);
}
#ifdef AES
else if (module == & AES) {
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_AES);
}
#endif
#ifdef EBI
else if (module == & EBI) {
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EBI);
}
#endif
#ifdef RTC
else if (module == & RTC) {
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_RTC);
}
#endif
#ifdef EVSYS
else if (module == & EVSYS) {
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS);
}
#endif
#ifdef DMA
else if (module == & DMA) {
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_DMA);
}
#endif
#ifdef EDMA
else if (module == & EDMA) {
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EDMA);
}
#endif
#ifdef ACA
else if (module == & ACA) {
sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_AC);
}
#endif
#ifdef ACB
else if (module == & ACB) {
sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_AC);
}
#endif
#ifdef ADCA
else if (module == & ADCA) {
sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC);
}
#endif
#ifdef ADCB
else if (module == & ADCB) {
sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_ADC);
}
#endif
#ifdef DACA
else if (module == & DACA) {
sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_DAC);
}
#endif
// Workaround for bad XMEGA D header file
#if !XMEGA_D
#ifdef DACB
else if (module == & DACB) {
sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_DAC);
}
#endif
#endif // Workaround end
#ifdef TCC0
else if (module == & TCC0) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC0);
}
#endif
#ifdef TCD0
else if (module == & TCD0) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC0);
}
#endif
#ifdef TCE0
else if (module == & TCE0) {
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC0);
}
#endif
#ifdef TCF0
else if (module == & TCF0) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC0);
}
#endif
#ifdef TCC1
else if (module == & TCC1) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC1);
}
#endif
#ifdef TCD1
else if (module == & TCD1) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC1);
}
#endif
#ifdef TCE1
else if (module == & TCE1) {
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TC1);
}
#endif
#ifdef TCF1
else if (module == & TCF1) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TC1);
}
#endif
#ifdef TCC4
else if (module == & TCC4) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC4);
}
#endif
#ifdef TCC5
else if (module == & TCC5) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC5);
}
#endif
#ifdef TCD4
else if (module == & TCD4) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC4);
}
#endif
#ifdef TCD5
else if (module == & TCD5) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC5);
}
#endif
#ifdef HIRESC
else if (module == & HIRESC) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_HIRES);
}
#endif
#ifdef HIRESD
else if (module == & HIRESD) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_HIRES);
}
#endif
#ifdef HIRESE
else if (module == & HIRESE) {
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_HIRES);
}
#endif
#ifdef HIRESF
else if (module == & HIRESF) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_HIRES);
}
#endif
#ifdef SPIC
else if (module == & SPIC) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_SPI);
}
#endif
#ifdef SPID
else if (module == & SPID) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_SPI);
}
#endif
#ifdef SPIE
else if (module == & SPIE) {
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_SPI);
}
#endif
#ifdef SPIF
else if (module == & SPIF) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_SPI);
}
#endif
#ifdef USARTC0
else if (module == & USARTC0) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART0);
}
#endif
#ifdef USARTD0
else if (module == & USARTD0) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART0);
}
#endif
#ifdef USARTE0
else if (module == & USARTE0) {
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART0);
}
#endif
#ifdef USARTF0
else if (module == & USARTF0) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0);
}
#endif
#ifdef USARTC1
else if (module == & USARTC1) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART1);
}
#endif
#ifdef USARTD1
else if (module == & USARTD1) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART1);
}
#endif
#ifdef USARTE1
else if (module == & USARTE1) {
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART1);
}
#endif
#ifdef USARTF1
else if (module == & USARTF1) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART1);
}
#endif
#ifdef TWIC
else if (module == & TWIC) {
sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TWI);
}
#endif
#ifdef TWID
else if (module == & TWID) {
sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TWI);
}
#endif
#ifdef TWIE
else if (module == & TWIE) {
sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_TWI);
}
#endif
#ifdef TWIF
else if (module == & TWIF) {
sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_TWI);
}
#endif
#ifdef XCL
else if (module == & XCL) {
sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_XCL);
}
#endif
else {
Assert(false);
}
}

/**
* \brief Disable a peripheral's clock from its base address.
*
* Disables the clock to a peripheral, given its base address. If the peripheral
* has an associated clock on the HSB bus, this will be disabled also.
*
* \param module Pointer to the module's base address.
*/
static inline void sysclk_disable_peripheral_clock(const volatile void *module)
{
if (module == NULL) {
Assert(false);
}
#ifdef AES
else if (module == & AES) {
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_AES);
}
#endif
#ifdef EBI
else if (module == & EBI) {
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_EBI);
}
#endif
#ifdef RTC
else if (module == & RTC) {
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_RTC);
}
#endif
#ifdef EVSYS
else if (module == & EVSYS) {
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_EVSYS);
}
#endif
#ifdef DMA
else if (module == & DMA) {
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_DMA);
}
#endif
#ifdef EDMA
else if (module == & EDMA) {
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_EDMA);
}
#endif
#ifdef ACA
else if (module == & ACA) {
sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_AC);
}
#endif
#ifdef ACB
else if (module == & ACB) {
sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_AC);
}
#endif
#ifdef ADCA
else if (module == & ADCA) {
sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_ADC);
}
#endif
#ifdef ADCB
else if (module == & ADCB) {
sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_ADC);
}
#endif
#ifdef DACA
else if (module == & DACA) {
sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_DAC);
}
#endif
// Workaround for bad XMEGA D header file
#if !XMEGA_D
#ifdef DACB
else if (module == & DACB) {
sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_DAC);
}
#endif
#endif // Workaround end
#ifdef TCC0
else if (module == & TCC0) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC0);
}
#endif
#ifdef TCD0
else if (module == & TCD0) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC0);
}
#endif
#ifdef TCE0
else if (module == & TCE0) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TC0);
}
#endif
#ifdef TCF0
else if (module == & TCF0) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TC0);
}
#endif
#ifdef TCC1
else if (module == & TCC1) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC1);
}
#endif
#ifdef TCD1
else if (module == & TCD1) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC1);
}
#endif
#ifdef TCE1
else if (module == & TCE1) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TC1);
}
#endif
#ifdef TCF1
else if (module == & TCF1) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TC1);
}
#endif
#ifdef TCC4
else if (module == & TCC4) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC4);
}
#endif
#ifdef TCC5
else if (module == & TCC5) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC5);
}
#endif
#ifdef TCD4
else if (module == & TCD4) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC4);
}
#endif
#ifdef TCD5
else if (module == & TCD5) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC5);
}
#endif
#ifdef HIRESC
else if (module == & HIRESC) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_HIRES);
}
#endif
#ifdef HIRESD
else if (module == & HIRESD) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_HIRES);
}
#endif
#ifdef HIRESE
else if (module == & HIRESE) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_HIRES);
}
#endif
#ifdef HIRESF
else if (module == & HIRESF) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_HIRES);
}
#endif
#ifdef SPIC
else if (module == & SPIC) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_SPI);
}
#endif
#ifdef SPID
else if (module == & SPID) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_SPI);
}
#endif
#ifdef SPIE
else if (module == & SPIE) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_SPI);
}
#endif
#ifdef SPIF
else if (module == & SPIF) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_SPI);
}
#endif
#ifdef USARTC0
else if (module == & USARTC0) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_USART0);
}
#endif
#ifdef USARTD0
else if (module == & USARTD0) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_USART0);
}
#endif
#ifdef USARTE0
else if (module == & USARTE0) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_USART0);
}
#endif
#ifdef USARTF0
else if (module == & USARTF0) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_USART0);
}
#endif
#ifdef USARTC1
else if (module == & USARTC1) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_USART1);
}
#endif
#ifdef USARTD1
else if (module == & USARTD1) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_USART1);
}
#endif
#ifdef USARTE1
else if (module == & USARTE1) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_USART1);
}
#endif
#ifdef USARTF1
else if (module == & USARTF1) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_USART1);
}
#endif
#ifdef TWIC
else if (module == & TWIC) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TWI);
}
#endif
#ifdef TWID
else if (module == & TWID) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TWI);
}
#endif
#ifdef TWIE
else if (module == & TWIE) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TWI);
}
#endif
#ifdef TWIF
else if (module == & TWIF) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TWI);
}
#endif
#ifdef XCL
else if (module == & XCL) {
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_XCL);
}
#endif
else {
Assert(false);
}
}

/**
* \brief Check if the synchronous clock is enabled for a module
*
* \param port ID of the port to which the module is connected (one of
* the \c SYSCLK_PORT_* definitions).
* \param id The ID (bitmask) of the peripheral module to check (one of
* the \c SYSCLK_* module definitions).
*
* \retval true If the clock for module \a id on \a port is enabled.
* \retval false If the clock for module \a id on \a port is disabled.
*/
static inline bool sysclk_module_is_enabled(enum sysclk_port_id port,
uint8_t id)
{
uint8_t mask = *((uint8_t *) & PR.PRGEN + port);
return (mask & id) == 0;
}

#if XMEGA_AU || XMEGA_B || XMEGA_C || defined(__DOXYGEN__)
# if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__)
# if (CONFIG_USBCLK_SOURCE == USBCLK_SRC_RCOSC)
# define USBCLK_STARTUP_TIMEOUT 1
# elif (CONFIG_USBCLK_SOURCE == USBCLK_SRC_PLL)
# if (CONFIG_PLL0_SOURCE == PLL_SRC_XOSC)
# define USBCLK_STARTUP_TIMEOUT XOSC_STARTUP_TIMEOUT
# elif (CONFIG_PLL0_SOURCE == PLL_SRC_RC32MHZ)
# define USBCLK_STARTUP_TIMEOUT 1
# elif (CONFIG_PLL0_SOURCE == PLL_SRC_RC2MHZ)
# define USBCLK_STARTUP_TIMEOUT 1
# else
# error Unknow value for CONFIG_PLL0_SOURCE, see conf_clock.h.
# endif
# endif
# else /* CONFIG_USBCLK_SOURCE not defined */
# define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
# define USBCLK_STARTUP_TIMEOUT 1
# endif /* CONFIG_USBCLK_SOURCE */
void sysclk_enable_usb(uint8_t frequency);
void sysclk_disable_usb(void);
#endif /* XMEGA_AU || XMEGA_B || XMEGA_C */
//@}

//! \name System Clock Source and Prescaler configuration
//@{

/**
* \brief Set system clock prescaler configuration
*
* This function will change the system clock prescaler configuration to
* match the parameters.
*
* \note The parameters to this function are device-specific.
*
* \param psadiv The prescaler A setting (one of the \c SYSCLK_PSADIV_*
* definitions). This determines the clkPER4 frequency.
* \param psbcdiv The prescaler B and C settings (one of the \c SYSCLK_PSBCDIV_*
* definitions). These determine the clkPER2, clkPER and clkCPU frequencies.
*/
static inline void sysclk_set_prescalers(uint8_t psadiv, uint8_t psbcdiv)
{
ccp_write_io((uint8_t *) & CLK.PSCTRL, psadiv | psbcdiv);
}

/**
* \brief Change the source of the main system clock.
*
* \param src The new system clock source. Must be one of the constants
* from the & lt; em & gt; System Clock Sources & lt; /em & gt; section.
*/
static inline void sysclk_set_source(uint8_t src)
{
ccp_write_io((uint8_t *) & CLK.CTRL, src);
}

/**
* \brief Lock the system clock configuration
*
* This function will lock the current system clock source and prescaler
* configuration, preventing any further changes.
*/
static inline void sysclk_lock(void)
{
ccp_write_io((uint8_t *) & CLK.LOCK, CLK_LOCK_bm);
}

//@}

/**
* \name RTC clock source control
* @{
*/

/**
* \brief Enable RTC clock with specified clock source
*
* \param id RTC clock source ID. Select from SYSCLK_RTCSRC_ULP,
* SYSCLK_RTCSRC_RCOSC, SYSCLK_RTCSRC_TOSC, SYSCLK_RTCSRC_RCOSC32,
* SYSCLK_RTCSRC_TOSC32 or SYSCLK_RTCSRC_EXTCLK
*/
static inline void sysclk_rtcsrc_enable(uint8_t id)
{
Assert((id & ~CLK_RTCSRC_gm) == 0);

switch (id) {
case SYSCLK_RTCSRC_RCOSC:
#if !XMEGA_A & & !XMEGA_D
case SYSCLK_RTCSRC_RCOSC32:
#endif
osc_enable(OSC_ID_RC32KHZ);
osc_wait_ready(OSC_ID_RC32KHZ);
break;
case SYSCLK_RTCSRC_TOSC:
case SYSCLK_RTCSRC_TOSC32:
#if !XMEGA_A & & !XMEGA_D
case SYSCLK_RTCSRC_EXTCLK:
#endif
osc_enable(OSC_ID_XOSC);
osc_wait_ready(OSC_ID_XOSC);
break;
}

CLK.RTCCTRL = id | CLK_RTCEN_bm;
}

/**
* \brief Disable RTC clock
*/
static inline void sysclk_rtcsrc_disable(void)
{
CLK.RTCCTRL = 0;
}

/** @} */

//! \name System Clock Initialization
//@{

extern void sysclk_init(void);

//@}

#endif /* !__ASSEMBLY__ */

//! @}

#ifdef __cplusplus
}
#endif

#endif /* XMEGA_SYSCLK_H_INCLUDED */


Motofocuser.rar > pll.h

/**
* \file
*
* \brief Chip-specific PLL management functions
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef XMEGA_PLL_H_INCLUDED
#define XMEGA_PLL_H_INCLUDED

#include & lt; compiler.h & gt;

/**
* \weakgroup pll_group
* @{
*/

#define NR_PLLS 1
#define PLL_MIN_HZ 10000000UL
#define PLL_MAX_HZ 200000000UL
#define PLL_NR_OPTIONS 0

enum pll_source {
//! 2 MHz Internal RC Oscillator
PLL_SRC_RC2MHZ = OSC_PLLSRC_RC2M_gc,
//! 32 MHz Internal RC Oscillator
PLL_SRC_RC32MHZ = OSC_PLLSRC_RC32M_gc,
//! External Clock Source
PLL_SRC_XOSC = OSC_PLLSRC_XOSC_gc,
};

#define pll_get_default_rate(pll_id) \
pll_get_default_rate_priv(CONFIG_PLL##pll_id##_SOURCE, \
CONFIG_PLL##pll_id##_MUL, \
CONFIG_PLL##pll_id##_DIV)

/**
* \internal
* \brief Return clock rate for specified PLL settings.
*
* \note Due to the hardware implementation of the PLL, \a div must be 4 if the
* 32 MHz RC oscillator is used as reference and 1 otherwise. The reference must
* be above 440 kHz, and the output between 10 and 200 MHz.
*
* \param src ID of the PLL's reference source oscillator.
* \param mul Multiplier for the PLL.
* \param div Divisor for the PLL.
*
* \retval Output clock rate from PLL.
*/
static inline uint32_t pll_get_default_rate_priv(enum pll_source src,
unsigned int mul, unsigned int div)
{
uint32_t rate;

switch (src) {
case PLL_SRC_RC2MHZ:
rate = 2000000UL;
Assert(div == 1);
break;

case PLL_SRC_RC32MHZ:
#ifdef CONFIG_OSC_RC32_CAL //32MHz oscillator is calibrated to another frequency
rate = CONFIG_OSC_RC32_CAL / 4;
#else
rate = 8000000UL;
#endif
Assert(div == 4);
break;

case PLL_SRC_XOSC:
rate = osc_get_rate(OSC_ID_XOSC);
Assert(div == 1);
break;

default:
break;
}

Assert(rate & gt; = 440000UL);

rate *= mul;

Assert(rate & gt; = PLL_MIN_HZ);
Assert(rate & lt; = PLL_MAX_HZ);

return rate;
}

struct pll_config {
uint8_t ctrl;
};

/**
* \note The XMEGA PLL hardware uses hard-wired input dividers, so the
* user must ensure that \a div is set as follows:
* - If \a src is PLL_SRC_32MHZ, \a div must be set to 4.
* - Otherwise, \a div must be set to 1.
*/
static inline void pll_config_init(struct pll_config *cfg, enum pll_source src,
unsigned int div, unsigned int mul)
{
Assert(mul & gt; = 1 & & mul & lt; = 31);

if (src == PLL_SRC_RC32MHZ) {
Assert(div == 4);
} else {
Assert(div == 1);
}

/* Initialize the configuration */
cfg- & gt; ctrl = src | (mul & lt; & lt; OSC_PLLFAC_gp);
}

#define pll_config_defaults(cfg, pll_id) \
pll_config_init(cfg, \
CONFIG_PLL##pll_id##_SOURCE, \
CONFIG_PLL##pll_id##_DIV, \
CONFIG_PLL##pll_id##_MUL)

static inline void pll_config_read(struct pll_config *cfg, unsigned int pll_id)
{
Assert(pll_id & lt; NR_PLLS);

cfg- & gt; ctrl = OSC.PLLCTRL;
}

static inline void pll_config_write(const struct pll_config *cfg,
unsigned int pll_id)
{
Assert(pll_id & lt; NR_PLLS);

OSC.PLLCTRL = cfg- & gt; ctrl;
}

/**
* \note If a different PLL reference oscillator than those enabled by
* \ref sysclk_init() is used, the user must ensure that the desired reference
* is enabled prior to calling this function.
*/
static inline void pll_enable(const struct pll_config *cfg,
unsigned int pll_id)
{
irqflags_t flags;

Assert(pll_id & lt; NR_PLLS);

flags = cpu_irq_save();
pll_config_write(cfg, pll_id);
OSC.CTRL |= OSC_PLLEN_bm;
cpu_irq_restore(flags);
}

/*! \note This will not automatically disable the reference oscillator that is
* configured for the PLL.
*/
static inline void pll_disable(unsigned int pll_id)
{
irqflags_t flags;

Assert(pll_id & lt; NR_PLLS);

flags = cpu_irq_save();
OSC.CTRL & = ~OSC_PLLEN_bm;
cpu_irq_restore(flags);
}

static inline bool pll_is_locked(unsigned int pll_id)
{
Assert(pll_id & lt; NR_PLLS);

return OSC.STATUS & OSC_PLLRDY_bm;
}

static inline void pll_enable_source(enum pll_source src)
{
switch (src) {
case PLL_SRC_RC2MHZ:
break;

case PLL_SRC_RC32MHZ:
if (!osc_is_ready(OSC_ID_RC32MHZ)) {
osc_enable(OSC_ID_RC32MHZ);
osc_wait_ready(OSC_ID_RC32MHZ);
#ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
if (CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
!= OSC_ID_USBSOF) {
osc_enable(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
osc_wait_ready(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
}
osc_enable_autocalibration(OSC_ID_RC32MHZ,
CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
#endif
}
break;

case PLL_SRC_XOSC:
if (!osc_is_ready(OSC_ID_XOSC)) {
osc_enable(OSC_ID_XOSC);
osc_wait_ready(OSC_ID_XOSC);
}
break;
default:
Assert(false);
break;
}
}

static inline void pll_enable_config_defaults(unsigned int pll_id)
{
struct pll_config pllcfg;

if (pll_is_locked(pll_id)) {
return; // Pll already running
}
switch (pll_id) {
#ifdef CONFIG_PLL0_SOURCE
case 0:
pll_enable_source(CONFIG_PLL0_SOURCE);
pll_config_init( & pllcfg,
CONFIG_PLL0_SOURCE,
CONFIG_PLL0_DIV,
CONFIG_PLL0_MUL);
break;
#endif
default:
Assert(false);
break;
}
pll_enable( & pllcfg, pll_id);
while (!pll_is_locked(pll_id));
}

//! @}

#endif /* XMEGA_PLL_H_INCLUDED */


Motofocuser.rar > sysclk.c

/**
* \file
*
* \brief Chip-specific system clock management functions
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#include & lt; compiler.h & gt;

#include & lt; sysclk.h & gt;
#include & lt; osc.h & gt;
#include & lt; pll.h & gt;

#if XMEGA_AU || XMEGA_B || XMEGA_C
# include & lt; nvm.h & gt;
#endif


void sysclk_init(void)
{
uint8_t *reg = (uint8_t *) & PR.PRGEN;
uint8_t i;
#ifdef CONFIG_OSC_RC32_CAL
uint16_t cal;
/* avoid Cppcheck Warning */
UNUSED(cal);
#endif
bool need_rc2mhz = false;

/* Turn off all peripheral clocks that can be turned off. */
for (i = 0; i & lt; = SYSCLK_PORT_F; i++) {
*(reg++) = 0xff;
}

/* Set up system clock prescalers if different from defaults */
if ((CONFIG_SYSCLK_PSADIV != SYSCLK_PSADIV_1)
|| (CONFIG_SYSCLK_PSBCDIV != SYSCLK_PSBCDIV_1_1)) {
sysclk_set_prescalers(CONFIG_SYSCLK_PSADIV,
CONFIG_SYSCLK_PSBCDIV);
}
#if (CONFIG_OSC_RC32_CAL==48000000UL)
MSB(cal) = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(USBRCOSC));
LSB(cal) = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(USBRCOSCA));
/*
* If a device has an uncalibrated value in the
* production signature row (early sample part), load a
* sane default calibration value.
*/
if (cal == 0xFFFF) {
cal = 0x2340;
}
osc_user_calibration(OSC_ID_RC32MHZ,cal);
#endif
/*
* Switch to the selected initial system clock source, unless
* the default internal 2 MHz oscillator is selected.
*/
if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RC2MHZ) {
need_rc2mhz = true;
} else {
switch (CONFIG_SYSCLK_SOURCE) {
case SYSCLK_SRC_RC32MHZ:
osc_enable(OSC_ID_RC32MHZ);
osc_wait_ready(OSC_ID_RC32MHZ);
#ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
if (CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
!= OSC_ID_USBSOF) {
osc_enable(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
osc_wait_ready(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
}
osc_enable_autocalibration(OSC_ID_RC32MHZ,
CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
#endif
break;

case SYSCLK_SRC_RC32KHZ:
osc_enable(OSC_ID_RC32KHZ);
osc_wait_ready(OSC_ID_RC32KHZ);
break;

case SYSCLK_SRC_XOSC:
osc_enable(OSC_ID_XOSC);
osc_wait_ready(OSC_ID_XOSC);
break;

#ifdef CONFIG_PLL0_SOURCE
case SYSCLK_SRC_PLL:
if (CONFIG_PLL0_SOURCE == PLL_SRC_RC2MHZ) {
need_rc2mhz = true;
}
pll_enable_config_defaults(0);
break;
#endif
#if XMEGA_E
case SYSCLK_SRC_RC8MHZ:
osc_enable(OSC_ID_RC8MHZ);
osc_wait_ready(OSC_ID_RC8MHZ);
break;
#endif
default:
//unhandled_case(CONFIG_SYSCLK_SOURCE);
return;
}

ccp_write_io((uint8_t *) & CLK.CTRL, CONFIG_SYSCLK_SOURCE);
Assert(CLK.CTRL == CONFIG_SYSCLK_SOURCE);
}

if (need_rc2mhz) {
#ifdef CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC
osc_enable(CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC);
osc_wait_ready(CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC);
osc_enable_autocalibration(OSC_ID_RC2MHZ,
CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC);
#endif
} else {
osc_disable(OSC_ID_RC2MHZ);
}

#ifdef CONFIG_RTC_SOURCE
sysclk_rtcsrc_enable(CONFIG_RTC_SOURCE);
#endif
}

void sysclk_enable_module(enum sysclk_port_id port, uint8_t id)
{
irqflags_t flags = cpu_irq_save();

*((uint8_t *) & PR.PRGEN + port) & = ~id;

cpu_irq_restore(flags);
}

void sysclk_disable_module(enum sysclk_port_id port, uint8_t id)
{
irqflags_t flags = cpu_irq_save();

*((uint8_t *) & PR.PRGEN + port) |= id;

cpu_irq_restore(flags);
}

#if XMEGA_AU || XMEGA_B || XMEGA_C || defined(__DOXYGEN__)

/**
* \brief Enable clock for the USB module
*
* \pre CONFIG_USBCLK_SOURCE must be defined.
*
* \param frequency The required USB clock frequency in MHz:
* \arg \c 6 for 6 MHz
* \arg \c 48 for 48 MHz
*/
void sysclk_enable_usb(uint8_t frequency)
{
uint8_t prescaler;

Assert((frequency == 6) || (frequency == 48));

/*
* Enable or disable prescaler depending on if the USB frequency is 6
* MHz or 48 MHz. Only 6 MHz USB frequency requires prescaling.
*/
if (frequency == 6) {
prescaler = CLK_USBPSDIV_8_gc;
}
else {
prescaler = 0;
}

/*
* Switch to the system clock selected by the user.
*/
switch (CONFIG_USBCLK_SOURCE) {
case USBCLK_SRC_RCOSC:
if (!osc_is_ready(OSC_ID_RC32MHZ)) {
osc_enable(OSC_ID_RC32MHZ);
osc_wait_ready(OSC_ID_RC32MHZ);
#ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
if (CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
!= OSC_ID_USBSOF) {
osc_enable(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
osc_wait_ready(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
}
osc_enable_autocalibration(OSC_ID_RC32MHZ,
CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
#endif
}
ccp_write_io((uint8_t *) & CLK.USBCTRL, (prescaler)
| CLK_USBSRC_RC32M_gc
| CLK_USBSEN_bm);
break;

#ifdef CONFIG_PLL0_SOURCE
case USBCLK_SRC_PLL:
pll_enable_config_defaults(0);
ccp_write_io((uint8_t *) & CLK.USBCTRL, (prescaler)
| CLK_USBSRC_PLL_gc
| CLK_USBSEN_bm);
break;
#endif

default:
Assert(false);
break;
}

sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_USB);
}

/**
* \brief Disable clock for the USB module
*/
void sysclk_disable_usb(void)
{
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_USB);
ccp_write_io((uint8_t *) & CLK.USBCTRL, 0);
}
#endif // XMEGA_AU || XMEGA_B || XMEGA_C


Motofocuser.rar > osc.h

/**
* \file
*
* \brief Oscillator management
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef OSC_H_INCLUDED
#define OSC_H_INCLUDED

#include " parts.h "
#include " conf_clock.h "

#if SAM3S
# include " sam3s/osc.h "
#elif SAM3XA
# include " sam3x/osc.h "
#elif SAM3U
# include " sam3u/osc.h "
#elif SAM3N
# include " sam3n/osc.h "
#elif SAM4S
# include " sam4s/osc.h "
#elif SAM4E
# include " sam4e/osc.h "
#elif SAM4C
# include " sam4c/osc.h "
#elif SAM4CM
# include " sam4cm/osc.h "
#elif SAM4CP
# include " sam4cp/osc.h "
#elif SAM4L
# include " sam4l/osc.h "
#elif SAM4N
# include " sam4n/osc.h "
#elif SAMG
# include " samg/osc.h "
#elif (UC3A0 || UC3A1)
# include " uc3a0_a1/osc.h "
#elif UC3A3
# include " uc3a3_a4/osc.h "
#elif UC3B
# include " uc3b0_b1/osc.h "
#elif UC3C
# include " uc3c/osc.h "
#elif UC3D
# include " uc3d/osc.h "
#elif UC3L
# include " uc3l/osc.h "
#elif XMEGA
# include " xmega/osc.h "
#else
# error Unsupported chip type
#endif

/**
* \ingroup clk_group
* \defgroup osc_group Oscillator Management
*
* This group contains functions and definitions related to configuring
* and enabling/disabling on-chip oscillators. Internal RC-oscillators,
* external crystal oscillators and external clock generators are
* supported by this module. What all of these have in common is that
* they swing at a fixed, nominal frequency which is normally not
* adjustable.
*
* \par Example: Enabling an oscillator
*
* The following example demonstrates how to enable the external
* oscillator on XMEGA A and wait for it to be ready to use. The
* oscillator identifiers are platform-specific, so while the same
* procedure is used on all platforms, the parameter to osc_enable()
* will be different from device to device.
* \code
osc_enable(OSC_ID_XOSC);
osc_wait_ready(OSC_ID_XOSC); \endcode
*
* \section osc_group_board Board-specific Definitions
* If external oscillators are used, the board code must provide the
* following definitions for each of those:
* - \b BOARD_ & lt; osc name & gt; _HZ: The nominal frequency of the oscillator.
* - \b BOARD_ & lt; osc name & gt; _STARTUP_US: The startup time of the
* oscillator in microseconds.
* - \b BOARD_ & lt; osc name & gt; _TYPE: The type of oscillator connected, i.e.
* whether it's a crystal or external clock, and sometimes what kind
* of crystal it is. The meaning of this value is platform-specific.
*
* @{
*/

//! \name Oscillator Management
//@{
/**
* \fn void osc_enable(uint8_t id)
* \brief Enable oscillator \a id
*
* The startup time and mode value is automatically determined based on
* definitions in the board code.
*/
/**
* \fn void osc_disable(uint8_t id)
* \brief Disable oscillator \a id
*/
/**
* \fn osc_is_ready(uint8_t id)
* \brief Determine whether oscillator \a id is ready.
* \retval true Oscillator \a id is running and ready to use as a clock
* source.
* \retval false Oscillator \a id is not running.
*/
/**
* \fn uint32_t osc_get_rate(uint8_t id)
* \brief Return the frequency of oscillator \a id in Hz
*/

#ifndef __ASSEMBLY__

/**
* \brief Wait until the oscillator identified by \a id is ready
*
* This function will busy-wait for the oscillator identified by \a id
* to become stable and ready to use as a clock source.
*
* \param id A number identifying the oscillator to wait for.
*/
static inline void osc_wait_ready(uint8_t id)
{
while (!osc_is_ready(id)) {
/* Do nothing */
}
}

#endif /* __ASSEMBLY__ */

//@}

//! @}

#endif /* OSC_H_INCLUDED */


Motofocuser.rar > sysclk.h

/**
* \file
*
* \brief System clock management
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef SYSCLK_H_INCLUDED
#define SYSCLK_H_INCLUDED

#include " parts.h "
#include " conf_clock.h "

#if SAM3S
# include " sam3s/sysclk.h "
#elif SAM3U
# include " sam3u/sysclk.h "
#elif SAM3N
# include " sam3n/sysclk.h "
#elif SAM3XA
# include " sam3x/sysclk.h "
#elif SAM4S
# include " sam4s/sysclk.h "
#elif SAM4E
# include " sam4e/sysclk.h "
#elif SAM4C
# include " sam4c/sysclk.h "
#elif SAM4CM
# include " sam4cm/sysclk.h "
#elif SAM4CP
# include " sam4cp/sysclk.h "
#elif SAM4L
# include " sam4l/sysclk.h "
#elif SAM4N
# include " sam4n/sysclk.h "
#elif SAMG
# include " samg/sysclk.h "
#elif (UC3A0 || UC3A1)
# include " uc3a0_a1/sysclk.h "
#elif UC3A3
# include " uc3a3_a4/sysclk.h "
#elif UC3B
# include " uc3b0_b1/sysclk.h "
#elif UC3C
# include " uc3c/sysclk.h "
#elif UC3D
# include " uc3d/sysclk.h "
#elif UC3L
# include " uc3l/sysclk.h "
#elif XMEGA
# include " xmega/sysclk.h "
#elif MEGA
# include " mega/sysclk.h "
#else
# error Unsupported chip type
#endif

/**
* \defgroup clk_group Clock Management
*/

/**
* \ingroup clk_group
* \defgroup sysclk_group System Clock Management
*
* See \ref sysclk_quickstart.
*
* The & lt; em & gt; sysclk & lt; /em & gt; API covers the & lt; em & gt; system clock & lt; /em & gt; and all
* clocks derived from it. The system clock is a chip-internal clock on
* which all & lt; em & gt; synchronous clocks & lt; /em & gt; , i.e. CPU and bus/peripheral
* clocks, are based. The system clock is typically generated from one
* of a variety of sources, which may include crystal and RC oscillators
* as well as PLLs. The clocks derived from the system clock are
* sometimes also known as & lt; em & gt; synchronous clocks & lt; /em & gt; , since they
* always run synchronously with respect to each other, as opposed to
* & lt; em & gt; generic clocks & lt; /em & gt; which may run from different oscillators or
* PLLs.
*
* Most applications should simply call sysclk_init() to initialize
* everything related to the system clock and its source (oscillator,
* PLL or DFLL), and leave it at that. More advanced applications, and
* platform-specific drivers, may require additional services from the
* clock system, some of which may be platform-specific.
*
* \section sysclk_group_platform Platform Dependencies
*
* The sysclk API is partially chip- or platform-specific. While all
* platforms provide mostly the same functionality, there are some
* variations around how different bus types and clock tree structures
* are handled.
*
* The following functions are available on all platforms with the same
* parameters and functionality. These functions may be called freely by
* portable applications, drivers and services:
* - sysclk_init()
* - sysclk_set_source()
* - sysclk_get_main_hz()
* - sysclk_get_cpu_hz()
* - sysclk_get_peripheral_bus_hz()
*
* The following functions are available on all platforms, but there may
* be variations in the function signature (i.e. parameters) and
* behavior. These functions are typically called by platform-specific
* parts of drivers, and applications that aren't intended to be
* portable:
* - sysclk_enable_peripheral_clock()
* - sysclk_disable_peripheral_clock()
* - sysclk_enable_module()
* - sysclk_disable_module()
* - sysclk_module_is_enabled()
* - sysclk_set_prescalers()
*
* All other functions should be considered platform-specific.
* Enabling/disabling clocks to specific peripherals as well as
* determining the speed of these clocks should be done by calling
* functions provided by the driver for that peripheral.
*
* @{
*/

//! \name System Clock Initialization
//@{
/**
* \fn void sysclk_init(void)
* \brief Initialize the synchronous clock system.
*
* This function will initialize the system clock and its source. This
* includes:
* - Mask all synchronous clocks except for any clocks which are
* essential for normal operation (for example internal memory
* clocks).
* - Set up the system clock prescalers as specified by the
* application's configuration file.
* - Enable the clock source specified by the application's
* configuration file (oscillator or PLL) and wait for it to become
* stable.
* - Set the main system clock source to the clock specified by the
* application's configuration file.
*
* Since all non-essential peripheral clocks are initially disabled, it
* is the responsibility of the peripheral driver to re-enable any
* clocks that are needed for normal operation.
*/
//@}

//! @}

#endif /* SYSCLK_H_INCLUDED */


Motofocuser.rar > pll.h

/**
* \file
*
* \brief PLL management
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef CLK_PLL_H_INCLUDED
#define CLK_PLL_H_INCLUDED

#include " parts.h "
#include " conf_clock.h "

#if SAM3S
# include " sam3s/pll.h "
#elif SAM3XA
# include " sam3x/pll.h "
#elif SAM3U
# include " sam3u/pll.h "
#elif SAM3N
# include " sam3n/pll.h "
#elif SAM4S
# include " sam4s/pll.h "
#elif SAM4E
# include " sam4e/pll.h "
#elif SAM4C
# include " sam4c/pll.h "
#elif SAM4CM
# include " sam4cm/pll.h "
#elif SAM4CP
# include " sam4cp/pll.h "
#elif SAM4L
# include " sam4l/pll.h "
#elif SAM4N
# include " sam4n/pll.h "
#elif SAMG
# include " samg/pll.h "
#elif (UC3A0 || UC3A1)
# include " uc3a0_a1/pll.h "
#elif UC3A3
# include " uc3a3_a4/pll.h "
#elif UC3B
# include " uc3b0_b1/pll.h "
#elif UC3C
# include " uc3c/pll.h "
#elif UC3D
# include " uc3d/pll.h "
#elif (UC3L0128 || UC3L0256 || UC3L3_L4)
# include " uc3l/pll.h "
#elif XMEGA
# include " xmega/pll.h "
#else
# error Unsupported chip type
#endif

/**
* \ingroup clk_group
* \defgroup pll_group PLL Management
*
* This group contains functions and definitions related to configuring
* and enabling/disabling on-chip PLLs. A PLL will take an input signal
* (the \em source), optionally divide the frequency by a configurable
* \em divider, and then multiply the frequency by a configurable \em
* multiplier.
*
* Some devices don't support input dividers; specifying any other
* divisor than 1 on these devices will result in an assertion failure.
* Other devices may have various restrictions to the frequency range of
* the input and output signals.
*
* \par Example: Setting up PLL0 with default parameters
*
* The following example shows how to configure and enable PLL0 using
* the default parameters specified using the configuration symbols
* listed above.
* \code
pll_enable_config_defaults(0); \endcode
*
* To configure, enable PLL0 using the default parameters and to disable
* a specific feature like Wide Bandwidth Mode (a UC3A3-specific
* PLL option.), you can use this initialization process.
* \code
struct pll_config pllcfg;
if (pll_is_locked(pll_id)) {
return; // Pll already running
}
pll_enable_source(CONFIG_PLL0_SOURCE);
pll_config_defaults( & pllcfg, 0);
pll_config_set_option( & pllcfg, PLL_OPT_WBM_DISABLE);
pll_enable( & pllcfg, 0);
pll_wait_for_lock(0); \endcode
*
* When the last function call returns, PLL0 is ready to be used as the
* main system clock source.
*
* \section pll_group_config Configuration Symbols
*
* Each PLL has a set of default parameters determined by the following
* configuration symbols in the application's configuration file:
* - \b CONFIG_PLLn_SOURCE: The default clock source connected to the
* input of PLL \a n. Must be one of the values defined by the
* #pll_source enum.
* - \b CONFIG_PLLn_MUL: The default multiplier (loop divider) of PLL
* \a n.
* - \b CONFIG_PLLn_DIV: The default input divider of PLL \a n.
*
* These configuration symbols determine the result of calling
* pll_config_defaults() and pll_get_default_rate().
*
* @{
*/

//! \name Chip-specific PLL characteristics
//@{
/**
* \def PLL_MAX_STARTUP_CYCLES
* \brief Maximum PLL startup time in number of slow clock cycles
*/
/**
* \def NR_PLLS
* \brief Number of on-chip PLLs
*/

/**
* \def PLL_MIN_HZ
* \brief Minimum frequency that the PLL can generate
*/
/**
* \def PLL_MAX_HZ
* \brief Maximum frequency that the PLL can generate
*/
/**
* \def PLL_NR_OPTIONS
* \brief Number of PLL option bits
*/
//@}

/**
* \enum pll_source
* \brief PLL clock source
*/

//! \name PLL configuration
//@{

/**
* \struct pll_config
* \brief Hardware-specific representation of PLL configuration.
*
* This structure contains one or more device-specific values
* representing the current PLL configuration. The contents of this
* structure is typically different from platform to platform, and the
* user should not access any fields except through the PLL
* configuration API.
*/

/**
* \fn void pll_config_init(struct pll_config *cfg,
* enum pll_source src, unsigned int div, unsigned int mul)
* \brief Initialize PLL configuration from standard parameters.
*
* \note This function may be defined inline because it is assumed to be
* called very few times, and usually with constant parameters. Inlining
* it will in such cases reduce the code size significantly.
*
* \param cfg The PLL configuration to be initialized.
* \param src The oscillator to be used as input to the PLL.
* \param div PLL input divider.
* \param mul PLL loop divider (i.e. multiplier).
*
* \return A configuration which will make the PLL run at
* (\a mul / \a div) times the frequency of \a src
*/
/**
* \def pll_config_defaults(cfg, pll_id)
* \brief Initialize PLL configuration using default parameters.
*
* After this function returns, \a cfg will contain a configuration
* which will make the PLL run at (CONFIG_PLLx_MUL / CONFIG_PLLx_DIV)
* times the frequency of CONFIG_PLLx_SOURCE.
*
* \param cfg The PLL configuration to be initialized.
* \param pll_id Use defaults for this PLL.
*/
/**
* \def pll_get_default_rate(pll_id)
* \brief Get the default rate in Hz of \a pll_id
*/
/**
* \fn void pll_config_set_option(struct pll_config *cfg,
* unsigned int option)
* \brief Set the PLL option bit \a option in the configuration \a cfg.
*
* \param cfg The PLL configuration to be changed.
* \param option The PLL option bit to be set.
*/
/**
* \fn void pll_config_clear_option(struct pll_config *cfg,
* unsigned int option)
* \brief Clear the PLL option bit \a option in the configuration \a cfg.
*
* \param cfg The PLL configuration to be changed.
* \param option The PLL option bit to be cleared.
*/
/**
* \fn void pll_config_read(struct pll_config *cfg, unsigned int pll_id)
* \brief Read the currently active configuration of \a pll_id.
*
* \param cfg The configuration object into which to store the currently
* active configuration.
* \param pll_id The ID of the PLL to be accessed.
*/
/**
* \fn void pll_config_write(const struct pll_config *cfg,
* unsigned int pll_id)
* \brief Activate the configuration \a cfg on \a pll_id
*
* \param cfg The configuration object representing the PLL
* configuration to be activated.
* \param pll_id The ID of the PLL to be updated.
*/

//@}

//! \name Interaction with the PLL hardware
//@{
/**
* \fn void pll_enable(const struct pll_config *cfg,
* unsigned int pll_id)
* \brief Activate the configuration \a cfg and enable PLL \a pll_id.
*
* \param cfg The PLL configuration to be activated.
* \param pll_id The ID of the PLL to be enabled.
*/
/**
* \fn void pll_disable(unsigned int pll_id)
* \brief Disable the PLL identified by \a pll_id.
*
* After this function is called, the PLL identified by \a pll_id will
* be disabled. The PLL configuration stored in hardware may be affected
* by this, so if the caller needs to restore the same configuration
* later, it should either do a pll_config_read() before disabling the
* PLL, or remember the last configuration written to the PLL.
*
* \param pll_id The ID of the PLL to be disabled.
*/
/**
* \fn bool pll_is_locked(unsigned int pll_id)
* \brief Determine whether the PLL is locked or not.
*
* \param pll_id The ID of the PLL to check.
*
* \retval true The PLL is locked and ready to use as a clock source
* \retval false The PLL is not yet locked, or has not been enabled.
*/
/**
* \fn void pll_enable_source(enum pll_source src)
* \brief Enable the source of the pll.
* The source is enabled, if the source is not already running.
*
* \param src The ID of the PLL source to enable.
*/
/**
* \fn void pll_enable_config_defaults(unsigned int pll_id)
* \brief Enable the pll with the default configuration.
* PLL is enabled, if the PLL is not already locked.
*
* \param pll_id The ID of the PLL to enable.
*/

/**
* \brief Wait for PLL \a pll_id to become locked
*
* \todo Use a timeout to avoid waiting forever and hanging the system
*
* \param pll_id The ID of the PLL to wait for.
*
* \retval STATUS_OK The PLL is now locked.
* \retval ERR_TIMEOUT Timed out waiting for PLL to become locked.
*/
static inline int pll_wait_for_lock(unsigned int pll_id)
{
Assert(pll_id & lt; NR_PLLS);

while (!pll_is_locked(pll_id)) {
/* Do nothing */
}

return 0;
}

//@}
//! @}

#endif /* CLK_PLL_H_INCLUDED */


Motofocuser.rar > genclk.h

/**
* \file
*
* \brief Generic clock management
*
* Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef CLK_GENCLK_H_INCLUDED
#define CLK_GENCLK_H_INCLUDED

#include " parts.h "

#if SAM3S
# include " sam3s/genclk.h "
#elif SAM3U
# include " sam3u/genclk.h "
#elif SAM3N
# include " sam3n/genclk.h "
#elif SAM3XA
# include " sam3x/genclk.h "
#elif SAM4S
# include " sam4s/genclk.h "
#elif SAM4L
# include " sam4l/genclk.h "
#elif SAM4E
# include " sam4e/genclk.h "
#elif SAM4N
# include " sam4n/genclk.h "
#elif SAM4C
# include " sam4c/genclk.h "
#elif SAM4CM
# include " sam4cm/genclk.h "
#elif SAM4CP
# include " sam4cp/genclk.h "
#elif SAMG
# include " samg/genclk.h "
#elif (UC3A0 || UC3A1)
# include " uc3a0_a1/genclk.h "
#elif UC3A3
# include " uc3a3_a4/genclk.h "
#elif UC3B
# include " uc3b0_b1/genclk.h "
#elif UC3C
# include " uc3c/genclk.h "
#elif UC3D
# include " uc3d/genclk.h "
#elif UC3L
# include " uc3l/genclk.h "
#else
# error Unsupported chip type
#endif

/**
* \ingroup clk_group
* \defgroup genclk_group Generic Clock Management
*
* Generic clocks are configurable clocks which run outside the system
* clock domain. They are often connected to peripherals which have an
* asynchronous component running independently of the bus clock, e.g.
* USB controllers, low-power timers and RTCs, etc.
*
* Note that not all platforms have support for generic clocks; on such
* platforms, this API will not be available.
*
* @{
*/

/**
* \def GENCLK_DIV_MAX
* \brief Maximum divider supported by the generic clock implementation
*/
/**
* \enum genclk_source
* \brief Generic clock source ID
*
* Each generic clock may be generated from a different clock source.
* These are the available alternatives provided by the chip.
*/

//! \name Generic clock configuration
//@{
/**
* \struct genclk_config
* \brief Hardware representation of a set of generic clock parameters
*/
/**
* \fn void genclk_config_defaults(struct genclk_config *cfg,
* unsigned int id)
* \brief Initialize \a cfg to the default configuration for the clock
* identified by \a id.
*/
/**
* \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id)
* \brief Read the currently active configuration of the clock
* identified by \a id into \a cfg.
*/
/**
* \fn void genclk_config_write(const struct genclk_config *cfg,
* unsigned int id)
* \brief Activate the configuration \a cfg on the clock identified by
* \a id.
*/
/**
* \fn void genclk_config_set_source(struct genclk_config *cfg,
* enum genclk_source src)
* \brief Select a new source clock \a src in configuration \a cfg.
*/
/**
* \fn void genclk_config_set_divider(struct genclk_config *cfg,
* unsigned int divider)
* \brief Set a new \a divider in configuration \a cfg.
*/
/**
* \fn void genclk_enable_source(enum genclk_source src)
* \brief Enable the source clock \a src used by a generic clock.
*/
//@}

//! \name Enabling and disabling Generic Clocks
//@{
/**
* \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id)
* \brief Activate the configuration \a cfg on the clock identified by
* \a id and enable it.
*/
/**
* \fn void genclk_disable(unsigned int id)
* \brief Disable the generic clock identified by \a id.
*/
//@}

/**
* \brief Enable the configuration defined by \a src and \a divider
* for the generic clock identified by \a id.
*
* \param id The ID of the generic clock.
* \param src The source clock of the generic clock.
* \param divider The divider used to generate the generic clock.
*/
static inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider)
{
struct genclk_config gcfg;

genclk_config_defaults( & gcfg, id);
genclk_enable_source(src);
genclk_config_set_source( & gcfg, src);
genclk_config_set_divider( & gcfg, divider);
genclk_enable( & gcfg, id);
}

//! @}

#endif /* CLK_GENCLK_H_INCLUDED */


Motofocuser.rar > board.h

/**
* \file
*
* \brief Standard board header file.
*
* This file includes the appropriate board header file according to the
* defined board (parameter BOARD).
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _BOARD_H_
#define _BOARD_H_

/**
* \defgroup group_common_boards Generic board support
*
* The generic board support module includes board-specific definitions
* and function prototypes, such as the board initialization function.
*
* \{
*/

#include " compiler.h "

#ifdef __cplusplus
extern " C " {
#endif


/*! \name Base Boards
*/
//! @{
#define EVK1100 1 //! & lt; AT32UC3A EVK1100 board.
#define EVK1101 2 //! & lt; AT32UC3B EVK1101 board.
#define UC3C_EK 3 //! & lt; AT32UC3C UC3C-EK board.
#define EVK1104 4 //! & lt; AT32UC3A3 EVK1104 board.
#define EVK1105 5 //! & lt; AT32UC3A EVK1105 board.
#define STK600_RCUC3L0 6 //! & lt; STK600 RCUC3L0 board.
#define UC3L_EK 7 //! & lt; AT32UC3L-EK board.
#define XPLAIN 8 //! & lt; ATxmega128A1 Xplain board.
#define STK600_RC064X 10 //! & lt; ATxmega256A3 STK600 board.
#define STK600_RC100X 11 //! & lt; ATxmega128A1 STK600 board.
#define UC3_A3_XPLAINED 13 //! & lt; ATUC3A3 UC3-A3 Xplained board.
#define UC3_L0_XPLAINED 15 //! & lt; ATUC3L0 UC3-L0 Xplained board.
#define STK600_RCUC3D 16 //! & lt; STK600 RCUC3D board.
#define STK600_RCUC3C0 17 //! & lt; STK600 RCUC3C board.
#define XMEGA_B1_XPLAINED 18 //! & lt; ATxmega128B1 Xplained board.
#define XMEGA_A1_XPLAINED 19 //! & lt; ATxmega128A1 Xplain-A1 board.
#define XMEGA_A1U_XPLAINED_PRO 20 //! & lt; ATxmega128A1U XMEGA-A1U Xplained Pro board.
#define STK600_RCUC3L4 21 //! & lt; ATUCL4 STK600 board.
#define UC3_L0_XPLAINED_BC 22 //! & lt; ATUC3L0 UC3-L0 Xplained board controller board.
#define MEGA1284P_XPLAINED_BC 23 //! & lt; ATmega1284P-Xplained board controller board.
#define STK600_RC044X 24 //! & lt; STK600 with RC044X routing card board.
#define STK600_RCUC3B0 25 //! & lt; STK600 RCUC3B0 board.
#define UC3_L0_QT600 26 //! & lt; QT600 UC3L0 MCU board.
#define XMEGA_A3BU_XPLAINED 27 //! & lt; ATxmega256A3BU Xplained board.
#define STK600_RC064X_LCDX 28 //! & lt; XMEGAB3 STK600 RC064X LCDX board.
#define STK600_RC100X_LCDX 29 //! & lt; XMEGAB1 STK600 RC100X LCDX board.
#define UC3B_BOARD_CONTROLLER 30 //! & lt; AT32UC3B1 board controller for Atmel boards.
#define RZ600 31 //! & lt; AT32UC3A RZ600 MCU board.
#define SAM3S_EK 32 //! & lt; SAM3S-EK board.
#define SAM3U_EK 33 //! & lt; SAM3U-EK board.
#define SAM3X_EK 34 //! & lt; SAM3X-EK board.
#define SAM3N_EK 35 //! & lt; SAM3N-EK board.
#define SAM3S_EK2 36 //! & lt; SAM3S-EK2 board.
#define SAM4S_EK 37 //! & lt; SAM4S-EK board.
#define STK600_RCUC3A0 38 //! & lt; STK600 RCUC3A0 board.
#define STK600_MEGA 39 //! & lt; STK600 MEGA board.
#define MEGA_1284P_XPLAINED 40 //! & lt; ATmega1284P Xplained board.
#define SAM4S_XPLAINED 41 //! & lt; SAM4S Xplained board.
#define ATXMEGA128A1_QT600 42 //! & lt; QT600 ATXMEGA128A1 MCU board.
#define ARDUINO_DUE_X 43 //! & lt; Arduino Due/X board.
#define STK600_RCUC3L3 44 //! & lt; ATUCL3 STK600 board.
#define SAM4L_EK 45 //! & lt; SAM4L-EK board.
#define STK600_MEGA_RF 46 //! & lt; STK600 MEGA RF EVK board.
#define XMEGA_C3_XPLAINED 47 //! & lt; ATxmega384C3 Xplained board.
#define STK600_RC032X 48 //! & lt; STK600 with RC032X routing card board.
#define SAM4S_EK2 49 //! & lt; SAM4S-EK2 board.
#define XMEGA_E5_XPLAINED 50 //! & lt; ATxmega32E5 Xplained board.
#define SAM4E_EK 51 //! & lt; SAM4E-EK board.
#define ATMEGA256RFR2_XPLAINED_PRO 52 //! & lt; ATmega256RFR2 Xplained Pro board.
#define SAM4S_XPLAINED_PRO 53 //! & lt; SAM4S Xplained Pro board.
#define SAM4L_XPLAINED_PRO 54 //! & lt; SAM4L Xplained Pro board.
#define ATMEGA256RFR2_ZIGBIT 55 //! & lt; ATmega256RFR2 zigbit.
#define XMEGA_RF233_ZIGBIT 56 //! & lt; ATxmega256A3U with AT86RF233 Zigbit.
#define XMEGA_RF212B_ZIGBIT 57 //! & lt; ATxmega256A3U with AT86RF212B Zigbit.
#define SAM4S_WPIR_RD 58 //! & lt; SAM4S-WPIR-RD board.
#define SAMD20_XPLAINED_PRO 59 //! & lt; SAM D20 Xplained Pro board.
#define SAM4L8_XPLAINED_PRO 60 //! & lt; SAM4L8 Xplained Pro board.
#define SAM4N_XPLAINED_PRO 61 //! & lt; SAM4N Xplained Pro board.
#define XMEGA_A3_REB_CBB 62 //! & lt; XMEGA REB Controller Base board.
#define ATMEGARFX_RCB 63 //! & lt; RFR2 & RFA1 RCB.
#define SAM4C_EK 64 //! & lt; SAM4C-EK board.
#define RCB256RFR2_XPRO 65 //! & lt; RFR2 RCB Xplained Pro board.
#define SAMG53_XPLAINED_PRO 66 //! & lt; SAMG53 Xplained Pro board.
#define SAM4CP16BMB 67 //! & lt; SAM4CP16BMB board.
#define SAM4E_XPLAINED_PRO 68 //! & lt; SAM4E Xplained Pro board.
#define SAMD21_XPLAINED_PRO 69 //! & lt; SAM D21 Xplained Pro board.
#define SAMR21_XPLAINED_PRO 70 //! & lt; SAM R21 Xplained Pro board.
#define SAM4CMP_DB 71 //! & lt; SAM4CMP demo board.
#define SAM4CMS_DB 72 //! & lt; SAM4CMS demo board.
#define ATPL230AMB 73 //! & lt; ATPL230AMB board.
#define SAMD11_XPLAINED_PRO 74 //! & lt; SAM D11 Xplained Pro board.
#define SAMG55_XPLAINED_PRO 75 //! & lt; SAMG55 Xplained Pro board.
#define SAML21_XPLAINED_PRO 76 //! & lt; SAM L21 Xplained Pro board.
#define SAMD10_XPLAINED_MINI 77 //! & lt; SAM D10 Xplained Mini board.
#define SAMW25_XPLAINED_PRO 79 //! & lt; SAMW25 Xplained Pro board.
#define SIMULATOR_XMEGA_A1 97 //! & lt; Simulator for XMEGA A1 devices.
#define AVR_SIMULATOR_UC3 98 //! & lt; Simulator for the AVR UC3 device family.
#define USER_BOARD 99 //! & lt; User-reserved board (if any).
#define DUMMY_BOARD 100 //! & lt; Dummy board to support board-independent applications (e.g. bootloader).
//! @}

/*! \name Extension Boards
*/
//! @{
#define EXT1102 1 //! & lt; AT32UC3B EXT1102 board
#define MC300 2 //! & lt; AT32UC3 MC300 board
#define SENSORS_XPLAINED_INERTIAL_1 3 //! & lt; Xplained inertial sensor board 1
#define SENSORS_XPLAINED_INERTIAL_2 4 //! & lt; Xplained inertial sensor board 2
#define SENSORS_XPLAINED_PRESSURE_1 5 //! & lt; Xplained pressure sensor board
#define SENSORS_XPLAINED_LIGHTPROX_1 6 //! & lt; Xplained light & proximity sensor board
#define SENSORS_XPLAINED_INERTIAL_A1 7 //! & lt; Xplained inertial sensor board " A "
#define RZ600_AT86RF231 8 //! & lt; AT86RF231 RF board in RZ600
#define RZ600_AT86RF230B 9 //! & lt; AT86RF230B RF board in RZ600
#define RZ600_AT86RF212 10 //! & lt; AT86RF212 RF board in RZ600
#define SENSORS_XPLAINED_BREADBOARD 11 //! & lt; Xplained sensor development breadboard
#define SECURITY_XPLAINED 12 //! & lt; Xplained ATSHA204 board
#define USER_EXT_BOARD 99 //! & lt; User-reserved extension board (if any).
//! @}

#if BOARD == EVK1100
# include " evk1100/evk1100.h "
#elif BOARD == EVK1101
# include " evk1101/evk1101.h "
#elif BOARD == UC3C_EK
# include " uc3c_ek/uc3c_ek.h "
#elif BOARD == EVK1104
# include " evk1104/evk1104.h "
#elif BOARD == EVK1105
# include " evk1105/evk1105.h "
#elif BOARD == STK600_RCUC3L0
# include " stk600/rcuc3l0/stk600_rcuc3l0.h "
#elif BOARD == UC3L_EK
# include " uc3l_ek/uc3l_ek.h "
#elif BOARD == STK600_RCUC3L4
# include " stk600/rcuc3l4/stk600_rcuc3l4.h "
#elif BOARD == XPLAIN
# include " xplain/xplain.h "
#elif BOARD == STK600_MEGA
/*No header-file to include*/
#elif BOARD == STK600_MEGA_RF
# include " stk600.h "
#elif BOARD == ATMEGA256RFR2_XPLAINED_PRO
# include " atmega256rfr2_xplained_pro/atmega256rfr2_xplained_pro.h "
#elif BOARD == ATMEGA256RFR2_ZIGBIT
# include " atmega256rfr2_zigbit/atmega256rfr2_zigbit.h "
#elif BOARD == STK600_RC032X
# include " stk600/rc032x/stk600_rc032x.h "
#elif BOARD == STK600_RC044X
# include " stk600/rc044x/stk600_rc044x.h "
#elif BOARD == STK600_RC064X
# include " stk600/rc064x/stk600_rc064x.h "
#elif BOARD == STK600_RC100X
# include " stk600/rc100x/stk600_rc100x.h "
#elif BOARD == UC3_A3_XPLAINED
# include " uc3_a3_xplained/uc3_a3_xplained.h "
#elif BOARD == UC3_L0_XPLAINED
# include " uc3_l0_xplained/uc3_l0_xplained.h "
#elif BOARD == STK600_RCUC3B0
# include " stk600/rcuc3b0/stk600_rcuc3b0.h "
#elif BOARD == STK600_RCUC3D
# include " stk600/rcuc3d/stk600_rcuc3d.h "
#elif BOARD == STK600_RCUC3C0
# include " stk600/rcuc3c0/stk600_rcuc3c0.h "
#elif BOARD == SAMG53_XPLAINED_PRO
# include " samg53_xplained_pro/samg53_xplained_pro.h "
#elif BOARD == SAMG55_XPLAINED_PRO
# include " samg55_xplained_pro/samg55_xplained_pro.h "
#elif BOARD == XMEGA_B1_XPLAINED
# include " xmega_b1_xplained/xmega_b1_xplained.h "
#elif BOARD == STK600_RC064X_LCDX
# include " stk600/rc064x_lcdx/stk600_rc064x_lcdx.h "
#elif BOARD == STK600_RC100X_LCDX
# include " stk600/rc100x_lcdx/stk600_rc100x_lcdx.h "
#elif BOARD == XMEGA_A1_XPLAINED
# include " xmega_a1_xplained/xmega_a1_xplained.h "
#elif BOARD == XMEGA_A1U_XPLAINED_PRO
# include " xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h "
#elif BOARD == UC3_L0_XPLAINED_BC
# include " uc3_l0_xplained_bc/uc3_l0_xplained_bc.h "
#elif BOARD == SAM3S_EK
# include " sam3s_ek/sam3s_ek.h "
# include " system_sam3s.h "
#elif BOARD == SAM3S_EK2
# include " sam3s_ek2/sam3s_ek2.h "
# include " system_sam3sd8.h "
#elif BOARD == SAM3U_EK
# include " sam3u_ek/sam3u_ek.h "
# include " system_sam3u.h "
#elif BOARD == SAM3X_EK
# include " sam3x_ek/sam3x_ek.h "
# include " system_sam3x.h "
#elif BOARD == SAM3N_EK
# include " sam3n_ek/sam3n_ek.h "
# include " system_sam3n.h "
#elif BOARD == SAM4S_EK
# include " sam4s_ek/sam4s_ek.h "
# include " system_sam4s.h "
#elif BOARD == SAM4S_WPIR_RD
# include " sam4s_wpir_rd/sam4s_wpir_rd.h "
# include " system_sam4s.h "
#elif BOARD == SAM4S_XPLAINED
# include " sam4s_xplained/sam4s_xplained.h "
# include " system_sam4s.h "
#elif BOARD == SAM4S_EK2
# include " sam4s_ek2/sam4s_ek2.h "
# include " system_sam4s.h "
#elif BOARD == MEGA_1284P_XPLAINED
/*No header-file to include*/
#elif BOARD == ARDUINO_DUE_X
# include " arduino_due_x/arduino_due_x.h "
# include " system_sam3x.h "
#elif BOARD == SAM4L_EK
# include " sam4l_ek/sam4l_ek.h "
#elif BOARD == SAM4E_EK
# include " sam4e_ek/sam4e_ek.h "
#elif BOARD == SAMD20_XPLAINED_PRO
# include " samd20_xplained_pro/samd20_xplained_pro.h "
#elif BOARD == SAMD21_XPLAINED_PRO
# include " samd21_xplained_pro/samd21_xplained_pro.h "
#elif BOARD == SAMR21_XPLAINED_PRO
# include " samr21_xplained_pro/samr21_xplained_pro.h "
#elif BOARD == SAMD11_XPLAINED_PRO
# include " samd11_xplained_pro/samd11_xplained_pro.h "
#elif BOARD == SAML21_XPLAINED_PRO
# include " saml21_xplained_pro/saml21_xplained_pro.h "
#elif BOARD == SAMD10_XPLAINED_MINI
# include " samd10_xplained_mini/samd10_xplained_mini.h "
#elif BOARD == SAM4N_XPLAINED_PRO
# include " sam4n_xplained_pro/sam4n_xplained_pro.h "
#elif BOARD == SAMW25_XPLAINED_PRO
# include " samw25_xplained_pro/samw25_xplained_pro.h "
#elif BOARD == MEGA1284P_XPLAINED_BC
# include " mega1284p_xplained_bc/mega1284p_xplained_bc.h "
#elif BOARD == UC3_L0_QT600
# include " uc3_l0_qt600/uc3_l0_qt600.h "
#elif BOARD == XMEGA_A3BU_XPLAINED
# include " xmega_a3bu_xplained/xmega_a3bu_xplained.h "
#elif BOARD == XMEGA_E5_XPLAINED
# include " xmega_e5_xplained/xmega_e5_xplained.h "
#elif BOARD == UC3B_BOARD_CONTROLLER
# include " uc3b_board_controller/uc3b_board_controller.h "
#elif BOARD == RZ600
# include " rz600/rz600.h "
#elif BOARD == STK600_RCUC3A0
# include " stk600/rcuc3a0/stk600_rcuc3a0.h "
#elif BOARD == ATXMEGA128A1_QT600
# include " atxmega128a1_qt600/atxmega128a1_qt600.h "
#elif BOARD == STK600_RCUC3L3
# include " stk600/rcuc3l3/stk600_rcuc3l3.h "
#elif BOARD == SAM4S_XPLAINED_PRO
# include " sam4s_xplained_pro/sam4s_xplained_pro.h "
#elif BOARD == SAM4L_XPLAINED_PRO
# include " sam4l_xplained_pro/sam4l_xplained_pro.h "
#elif BOARD == SAM4L8_XPLAINED_PRO
# include " sam4l8_xplained_pro/sam4l8_xplained_pro.h "
#elif BOARD == SAM4C_EK
# include " sam4c_ek/sam4c_ek.h "
#elif BOARD == SAM4CMP_DB
# include " sam4cmp_db/sam4cmp_db.h "
#elif BOARD == SAM4CMS_DB
# include " sam4cms_db/sam4cms_db.h "
#elif BOARD == SAM4CP16BMB
# include " sam4cp16bmb/sam4cp16bmb.h "
#elif BOARD == ATPL230AMB
# include " atpl230amb/atpl230amb.h "
#elif BOARD == SIMULATOR_XMEGA_A1
# include " simulator/xmega_a1/simulator_xmega_a1.h "
#elif BOARD == XMEGA_C3_XPLAINED
# include " xmega_c3_xplained/xmega_c3_xplained.h "
#elif BOARD == XMEGA_RF233_ZIGBIT
# include " xmega_rf233_zigbit/xmega_rf233_zigbit.h "
#elif BOARD == XMEGA_A3_REB_CBB
# include " xmega_a3_reb_cbb/xmega_a3_reb_cbb.h "
#elif BOARD == ATMEGARFX_RCB
# include " atmegarfx_rcb/atmegarfx_rcb.h "
#elif BOARD == RCB256RFR2_XPRO
# include " atmega256rfr2_rcb_xpro/atmega256rfr2_rcb_xpro.h "
#elif BOARD == XMEGA_RF212B_ZIGBIT
# include " xmega_rf212b_zigbit/xmega_rf212b_zigbit.h "
#elif BOARD == SAM4E_XPLAINED_PRO
# include " sam4e_xplained_pro/sam4e_xplained_pro.h "
#elif BOARD == AVR_SIMULATOR_UC3
# include " avr_simulator_uc3/avr_simulator_uc3.h "
#elif BOARD == USER_BOARD
// User-reserved area: #include the header file of your board here (if any).
# include " user_board.h "
#elif BOARD == DUMMY_BOARD
# include " dummy/dummy_board.h "
#else
# error No known Atmel board defined
#endif

#if (defined EXT_BOARD)
# if EXT_BOARD == MC300
# include " mc300/mc300.h "
# elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \
(EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \
(EXT_BOARD == SENSORS_XPLAINED_LIGHTPROX_1) || \
(EXT_BOARD == SENSORS_XPLAINED_BREADBOARD)
# include " sensors_xplained/sensors_xplained.h "
# elif EXT_BOARD == RZ600_AT86RF231
# include " at86rf231/at86rf231.h "
# elif EXT_BOARD == RZ600_AT86RF230B
# include " at86rf230b/at86rf230b.h "
# elif EXT_BOARD == RZ600_AT86RF212
# include " at86rf212/at86rf212.h "
# elif EXT_BOARD == SECURITY_XPLAINED
# include " security_xplained.h "
# elif EXT_BOARD == USER_EXT_BOARD
// User-reserved area: #include the header file of your extension board here
// (if any).
# endif
#endif


#if (defined(__GNUC__) & & defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__))
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.

/*! \brief This function initializes the board target resources
*
* This function should be called to ensure proper initialization of the target
* board hardware connected to the part.
*/
extern void board_init(void);

#endif // #ifdef __AVR32_ABI_COMPILER__
#else
/*! \brief This function initializes the board target resources
*
* This function should be called to ensure proper initialization of the target
* board hardware connected to the part.
*/
extern void board_init(void);
#endif


#ifdef __cplusplus
}
#endif

/**
* \}
*/

#endif // _BOARD_H_


Motofocuser.rar > main.c

/**
* \file
*
* \brief Empty user application template
*
*/

/**
* \mainpage User Application template doxygen documentation
*
* \par Empty user application template
*
* Bare minimum empty user application template
*
* \par Content
*
* -# Include the ASF header files (through asf.h)
* -# " Insert system clock initialization code here " comment
* -# Minimal main function that starts with a call to board_init()
* -# " Insert application code here " comment
*
*/

/*
* Include header files for all drivers that have been imported from
* Atmel Software Framework (ASF).
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
/*#include & lt; asf.h & gt;

void usb_init(void)
{
udc_start();
}

static bool my_flag_autorize_cdc_transfert = false;
bool my_callback_cdc_enable(void)
{
my_flag_autorize_cdc_transfert = true;
return true;
}
void my_callback_cdc_disable(void)
{
my_flag_autorize_cdc_transfert = false;
}
void task(void)
{
if (my_flag_autorize_cdc_transfert) {
udi_cdc_putc('A');
udi_cdc_getc();
}
}

int main (void)
{
sysclk_init();
irq_initialize_vectors();
cpu_irq_enable();
board_init();
//sleepmgr_init(); // Optional
board_init();
usb_init();
while(true)
{
task();
}
}*/


Motofocuser.rar > Motofocuser.c

/*
* Motofocuser.c
*
* Created: 2015-05-13 22:34:19
* Author: Mateusz
*/


#include & lt; avr/io.h & gt;
#include & lt; asf.h & gt;

void usb_init(void)
{
udc_start();
}

static bool my_flag_autorize_cdc_transfert = false;
bool my_callback_cdc_enable(void)
{
my_flag_autorize_cdc_transfert = true;
return true;
}
void my_callback_cdc_disable(void)
{
my_flag_autorize_cdc_transfert = false;
}
void task(void)
{
if (my_flag_autorize_cdc_transfert) {
udi_cdc_putc('A');
udi_cdc_getc();
}
}

int main (void)
{
sysclk_init();
irq_initialize_vectors();
cpu_irq_enable();
board_init();
//sleepmgr_init(); // Optional
board_init();
usb_init();
while(true)
{
task();
}
}


Motofocuser.rar > conf_clock.h

/**
* \file
*
* \brief Chip-specific system clock manager configuration
*
* Copyright (c) 2011-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef CONF_CLOCK_H_INCLUDED
#define CONF_CLOCK_H_INCLUDED

#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC2MHZ
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32KHZ
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_XOSC
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL

/* Fbus = Fsys / (2 ^ BUS_div) */
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1

//#define CONFIG_PLL0_SOURCE PLL_SRC_XOSC
//#define CONFIG_PLL0_SOURCE PLL_SRC_RC2MHZ
//#define CONFIG_PLL0_SOURCE PLL_SRC_RC32MHZ

/* Fpll = (Fclk * PLL_mul) / PLL_div */
//#define CONFIG_PLL0_MUL (24000000UL / BOARD_XOSC_HZ)
//#define CONFIG_PLL0_DIV 1

/* External oscillator frequency range */
/** 0.4 to 2 MHz frequency range */
//#define CONFIG_XOSC_RANGE XOSC_RANGE_04TO2
/** 2 to 9 MHz frequency range */
//#define CONFIG_XOSC_RANGE XOSC_RANGE_2TO9
/** 9 to 12 MHz frequency range */
//#define CONFIG_XOSC_RANGE XOSC_RANGE_9TO12
/** 12 to 16 MHz frequency range */
//#define CONFIG_XOSC_RANGE XOSC_RANGE_12TO16

/* DFLL autocalibration */
//#define CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC OSC_ID_RC32KHZ
//#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_XOSC

/* The following example clock configuration definitions can be used in XMEGA
* devices that contain a USB controller. It configures the USB controller clock
* source to use the internal (nominally) 32MHz RC oscillator, up-calibrated to
* run at 48MHz via the periodic 1ms USB Start Of Frame packets sent by the
* host. The USB controller requires 48MHz for Full Speed operation, or 6MHz
* for USB Low Speed operation.
*
* Note that when the 32MHz RC oscillator is tuned to 48MHz, it cannot be used
* directly as the system clock source; it must either be prescaled down to a
* speed below the maximum operating frequency given in the datasheet, or an
* alternative clock source (e.g. the internal 2MHz RC Oscillator, multiplied
* to a higher frequency via the internal PLL module) must be used instead.
*/
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
#define CONFIG_OSC_RC32_CAL 48000000UL
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF

/* Use to enable and select RTC clock source */
//#define CONFIG_RTC_SOURCE SYSCLK_RTCSRC_ULP

#endif /* CONF_CLOCK_H_INCLUDED */


Motofocuser.rar > conf_usb.h

/**
* \file
*
* \brief USB configuration file for CDC application
*
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/

#ifndef _CONF_USB_H_
#define _CONF_USB_H_

#include " compiler.h "

#warning You must refill the following definitions with a correct values

/**
* USB Device Configuration
* @{
*/

//! Device definition (mandatory)
#define USB_DEVICE_VENDOR_ID USB_VID_ATMEL
#define USB_DEVICE_PRODUCT_ID USB_PID_ATMEL_ASF_CDC
#define USB_DEVICE_MAJOR_VERSION 1
#define USB_DEVICE_MINOR_VERSION 0
#define USB_DEVICE_POWER 100 // Consumption on Vbus line (mA)
#define USB_DEVICE_ATTR \
// (USB_CONFIG_ATTR_SELF_POWERED)
(USB_CONFIG_ATTR_BUS_POWERED)
// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_SELF_POWERED)
// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_BUS_POWERED)

//! USB Device string definitions (Optional)
// #define USB_DEVICE_MANUFACTURE_NAME " Manufacture name "
// #define USB_DEVICE_PRODUCT_NAME " Product name "
#define USB_DEVICE_SERIAL_NAME " 12...EF "


/**
* Device speeds support
* Low speed not supported by CDC
* @{
*/
//! To authorize the High speed
#if (UC3A3||UC3A4)
#define USB_DEVICE_HS_SUPPORT
#endif
//@}


/**
* USB Device Callbacks definitions (Optional)
* @{
*/
// #define UDC_VBUS_EVENT(b_vbus_high) user_callback_vbus_action(b_vbus_high)
// extern void user_callback_vbus_action(bool b_vbus_high);
// #define UDC_SOF_EVENT() user_callback_sof_action()
// extern void user_callback_sof_action(void);
// #define UDC_SUSPEND_EVENT() user_callback_suspend_action()
// extern void user_callback_suspend_action(void);
// #define UDC_RESUME_EVENT() user_callback_resume_action()
// extern void user_callback_resume_action(void);
// Mandatory when USB_DEVICE_ATTR authorizes remote wakeup feature
// #define UDC_REMOTEWAKEUP_ENABLE() user_callback_remotewakeup_enable()
// extern void user_callback_remotewakeup_enable(void);
// #define UDC_REMOTEWAKEUP_DISABLE() user_callback_remotewakeup_disable()
// extern void user_callback_remotewakeup_disable(void);
// When a extra string descriptor must be supported
// other than manufacturer, product and serial string
// #define UDC_GET_EXTRA_STRING()
//@}

//@}


/**
* USB Interface Configuration
* @{
*/
/**
* Configuration of CDC interface
* @{
*/

//! Number of communication port used (1 to 3)
#define UDI_CDC_PORT_NB 1

//! Interface callback definition
//#define UDI_CDC_ENABLE_EXT(port) true
//#define UDI_CDC_DISABLE_EXT(port)
#define UDI_CDC_RX_NOTIFY(port)
#define UDI_CDC_TX_EMPTY_NOTIFY(port)
#define UDI_CDC_SET_CODING_EXT(port,cfg)
#define UDI_CDC_SET_DTR_EXT(port,set)
#define UDI_CDC_SET_RTS_EXT(port,set)

#define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
extern bool my_callback_cdc_enable(void);
#define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
extern void my_callback_cdc_disable(void);
// #define UDI_CDC_RX_NOTIFY(port) my_callback_rx_notify(port)
// extern void my_callback_rx_notify(uint8_t port);
// #define UDI_CDC_TX_EMPTY_NOTIFY(port) my_callback_tx_empty_notify(port)
// extern void my_callback_tx_empty_notify(uint8_t port);
// #define UDI_CDC_SET_CODING_EXT(port,cfg) my_callback_config(port,cfg)
// extern void my_callback_config(uint8_t port, usb_cdc_line_coding_t * cfg);
// #define UDI_CDC_SET_DTR_EXT(port,set) my_callback_cdc_set_dtr(port,set)
// extern void my_callback_cdc_set_dtr(uint8_t port, bool b_enable);
// #define UDI_CDC_SET_RTS_EXT(port,set) my_callback_cdc_set_rts(port,set)
// extern void my_callback_cdc_set_rts(uint8_t port, bool b_enable);

//! Define it when the transfer CDC Device to Host is a low rate ( & lt; 512000 bauds)
//! to reduce CDC buffers size
#define UDI_CDC_LOW_RATE

//! Default configuration of communication port
#define UDI_CDC_DEFAULT_RATE 115200
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
#define UDI_CDC_DEFAULT_DATABITS 8
//@}
//@}


/**
* USB Device Driver Configuration
* @{
*/
//@}

//! The includes of classes and other headers must be done at the end of this file to avoid compile error
#include " udi_cdc_conf.h "

#endif // _CONF_USB_H_


Motofocuser.rar > conf_sleepmgr.h

/**
* \file
*
* \brief Chip-specific sleep manager configuration
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL " AS IS " AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit & lt; a href= " http://www.atmel.com/design-support/ " & gt; Atmel Support & lt; /a & gt;
*/
#ifndef CONF_SLEEPMGR_H
#define CONF_SLEEPMGR_H

// Sleep manager options
#define CONFIG_SLEEPMGR_ENABLE

#endif /* CONF_SLEEPMGR_H */

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