LNK304PN.pdf

Whirlpool AWE 6317/P - pralka wyłączyła się podczas prania i nie reaguje

L003 to dławik to on ma mieć przejście. Diody D012/D013 wylutuj i sprawdź je wylutowane, a tu masz specyfikacje LNK304. :arrow: 859740


LNK302/304-306

LinkSwitch-TN Family
(R)

Lowest Component Count, Energy-Efficient
Off-Line Switcher IC
Product Highlights
Cost Effective Linear/Cap Dropper Replacement
o Lowest cost and component count buck converter solution
o Fully integrated auto-restart for short-circuit and open
loop fault protection - saves external component costs
o LNK302 uses a simplified controller without auto-restart
for very low system cost
o 66 kHz operation with accurate current limit - allows low cost
off-the-shelf 1 mH inductor for up to 120 mA output current
o Tight tolerances and negligible temperature variation
o High breakdown voltage of 700 V provides excellent
input surge withstand
o Frequency jittering dramatically reduces EMI (~10 dB)
- minimizes EMI filter cost
o High thermal shutdown temperature (+135 °C minimum)
Much Higher Performance over Discrete Buck and
Passive Solutions
o Supports buck, buck-boost and flyback topologies
o System level thermal overload, output short-circuit and
open control loop protection
o Excellent line and load regulation even with typical
configuration
o High bandwidth provides fast turn-on with no overshoot
o Current limit operation rejects line ripple
o Universal input voltage range (85 VAC to 265 VAC)
o Built-in current limit and hysteretic thermal protection
o Higher efficiency than passive solutions
o Higher power factor than capacitor-fed solutions
o Entirely manufacturable in SMD
EcoSmart - Extremely Energy Efficient
o Consumes typically only 50/80 mW in self-powered buck
topology at 115/230 VAC input with no load (opto feedback)
o Consumes typically only 7/12 mW in flyback topology
with external bias at 115/230 VAC input with no load
o Meets California Energy Commission (CEC), Energy
Star, and EU requirements
(R)

Applications
o Appliances and timers
o LED drivers and industrial controls

Description
LinkSwitch-TN is specifically designed to replace all linear and
capacitor-fed (cap dropper) non-isolated power supplies in the
under 360 mA output current range at equal system cost while
offering much higher performance and energy efficiency.

FB
D

+
Wide Range
HV DC Input

BP
S

+
DC
Output

LinkSwitch-TN

PI-3492-111903

Figure 1. Typical Buck Converter Application (See Application
Examples Section for Other Circuit Configurations).

OUTPUT CURRENT TABLE1
PRODUCT4
LNK302P/G/D

230 VAC ?15%
MDCM

2

CCM

3

85-265 VAC
MDCM2

CCM3
80 mA

63 mA

80 mA

63 mA

LNK304P/G/D 120 mA

170 mA

120 mA 170 mA

LNK305P/G/D 175 mA

280 mA

175 mA 280 mA

LNK306P/G/D 225 mA

360 mA

225 mA 360 mA

Table 1. Output Current Table.
Notes:
1. Typical output current in a non-isolated buck converter. Output power
capability depends on respective output voltage. See Key Applications
Considerations Section for complete description of assumptions,
including fully discontinuous conduction mode (DCM) operation.
2. Mostly discontinuous conduction mode.
3. Continuous conduction mode.
4. Packages: P: DIP-8B, G: SMD-8B, D: SO-8C.

LinkSwitch-TN devices integrate a 700 V power MOSFET,
oscillator, simple On/Off control scheme, a high voltage switched
current source, frequency jittering, cycle-by-cycle current limit
and thermal shutdown circuitry onto a monolithic IC. The startup and operating power are derived directly from the voltage
on the DRAIN pin, eliminating the need for a bias supply and
associated circuitry in buck or flyback converters. The fully
integrated auto-restart circuit in the LNK304-306 safely limits
output power during fault conditions such as short-circuit or
open loop, reducing component count and system-level load
protection cost. A local supply provided by the IC allows use
of a non-safety graded optocoupler acting as a level shifter to
further enhance line and load regulation performance in buck
and buck-boost converters, if required.
November 2008

LNK302/304-306
BYPASS
(BP)

DRAIN
(D)
REGULATOR
5.8 V

BYPASS PIN
UNDER-VOLTAGE

+

5.8 V
4.85 V

-

CURRENT LIMIT
COMPARATOR

6.3 V

+

VI

-

LIMIT

JITTER
CLOCK
DCMAX
THERMAL
SHUTDOWN
OSCILLATOR
FEEDBACK
(FB)

1.65 V -VT
S

Q

R

Q
LEADING
EDGE
BLANKING

SOURCE
(S)
PI-3904-020805

Figure 2a. Functional Block Diagram (LNK302).

DRAIN
(D)

BYPASS
(BP)

REGULATOR
5.8 V
FAULT
PRESENT
AUTORESTART
COUNTER
CLOCK
RESET

+

5.8 V
4.85 V

BYPASS PIN
UNDER-VOLTAGE

-

CURRENT LIMIT
COMPARATOR

6.3 V

+
-

VI

LIMIT

JITTER
CLOCK
DCMAX
OSCILLATOR
FEEDBACK
(FB)

THERMAL
SHUTDOWN

1.65 V -VT
S

Q

R

Q
LEADING
EDGE
BLANKING

SOURCE
(S)
PI-2367-021105

Figure 2b. Functional Block Diagram (LNK304-306).

2-2
2
Rev. I 11/08

LNK302/304-306

Pin Functional Description
DRAIN (D) Pin:
Power MOSFET drain connection. Provides internal operating
current for both start-up and steady-state operation.
BYPASS (BP) Pin:
Connection point for a 0.1 ?F external bypass capacitor for the
internally generated 5.8 V supply.
FEEDBACK (FB) Pin:
During normal operation, switching of the power MOSFET is
controlled by this pin. MOSFET switching is terminated when
a current greater than 49 ?A is delivered into this pin.
SOURCE (S) Pin:
This pin is the power MOSFET source connection. It is also the
ground reference for the BYPASS and FEEDBACK pins.

P Package (DIP-8B)
G Package (SMD-8B)
S

1

8

S

S

2

7

S

BP

D Package (SO-8C)

3

FB

BP

1

8

S

FB

2

7

S

D

4

6

5

4
3a

D

S

5

S

3b

The LinkSwitch-TN oscillator incorporates circuitry that
introduces a small amount of frequency jitter, typically 4 kHz
peak-to-peak, to minimize EMI emission. The modulation rate
of the frequency jitter is set to 1 kHz to optimize EMI reduction
for both average and quasi-peak emissions. The frequency
jitter should be measured with the oscilloscope triggered at
the falling edge of the DRAIN waveform. The waveform in
Figure 4 illustrates the frequency jitter of the LinkSwitch-TN.
Feedback Input Circuit
The feedback input circuit at the FB pin consists of a low
impedance source follower output set at 1.65 V. When the current
delivered into this pin exceeds 49 ?A, a low logic level (disable)
is generated at the output of the feedback circuit. This output
is sampled at the beginning of each cycle on the rising edge of
the clock signal. If high, the power MOSFET is turned on for
that cycle (enabled), otherwise the power MOSFET remains off
(disabled). Since the sampling is done only at the beginning of
each cycle, subsequent changes in the FB pin voltage or current
during the remainder of the cycle are ignored.
5.8 V Regulator and 6.3 V Shunt Voltage Clamp
The 5.8 V regulator charges the bypass capacitor connected to
the BYPASS pin to 5.8 V by drawing a current from the voltage
on the DRAIN, whenever the MOSFET is off. The BYPASS
pin is the internal supply voltage node for the LinkSwitch-TN.
When the MOSFET is on, the LinkSwitch-TN runs off of the
energy stored in the bypass capacitor. Extremely low power
consumption of the internal circuitry allows the LinkSwitch-TN
to operate continuously from the current drawn from the DRAIN
pin. A bypass capacitor value of 0.1 ?F is sufficient for both
high frequency decoupling and energy storage.

PI-3491-120706

Figure 3. Pin Configuration.

LinkSwitch-TN Functional
Description
LinkSwitch-TN combines a high voltage power MOSFET switch
with a power supply controller in one device. Unlike conventional
PWM (pulse width modulator) controllers, LinkSwitch-TN uses
a simple ON/OFF control to regulate the output voltage. The
LinkSwitch-TN controller consists of an oscillator, feedback
(sense and logic) circuit, 5.8 V regulator, BYPASS pin undervoltage circuit, over-temperature protection, frequency jittering,
current limit circuit, leading edge blanking and a 700 V power
MOSFET. The LinkSwitch-TN incorporates additional circuitry
for auto-restart.
Oscillator
The typical oscillator frequency is internally set to an average
of 66 kHz. Two signals are generated from the oscillator: the
maximum duty cycle signal (DCMAX) and the clock signal that
indicates the beginning of each cycle.

In addition, there is a 6.3 V shunt regulator clamping the
BYPASS pin at 6.3 V when current is provided to the BYPASS
pin through an external resistor. This facilitates powering of
LinkSwitch-TN externally through a bias winding to decrease
the no-load consumption to about 50 mW.
BYPASS Pin Under-Voltage
The BYPASS pin under-voltage circuitry disables the power
MOSFET when the BYPASS pin voltage drops below 4.85 V.
Once the BYPASS pin voltage drops below 4.85 V, it must rise
back to 5.8 V to enable (turn-on) the power MOSFET.
Over-Temperature Protection
The thermal shutdown circuitry senses the die temperature.
The threshold is set at 142 °C typical with a 75 °C hysteresis.
When the die temperature rises above this threshold (142 °C) the
power MOSFET is disabled and remains disabled until the die
temperature falls by 75 °C, at which point it is re-enabled.
Current Limit
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the
2-3
3
Rev. I 11/08

LNK302/304-306
PI-3660-081303

600
500
VDRAIN
400

12 V, 120 mA non-isolated power supply used in appliance
control such as rice cookers, dishwashers or other white goods.
This circuit may also be applicable to other applications such
as night-lights, LED drivers, electricity meters, and residential
heating controllers, where a non-isolated supply is acceptable.

300

The input stage comprises fusible resistor RF1, diodes D3 and
D4, capacitors C4 and C5, and inductor L2. Resistor RF1 is
a flame proof, fusible, wire wound resistor. It accomplishes
several functions: a) Inrush current limitation to safe levels for
rectifiers D3 and D4; b) Differential mode noise attenuation;
c) Input fuse should any other component fail short-circuit
(component fails safely open-circuit without emitting smoke,
fire or incandescent material).

200
100
0
68 kHz
64 kHz

0

20
Time (?s)

Figure 4. Frequency Jitter.

power MOSFET is turned off for the remainder of that cycle.
The leading edge blanking circuit inhibits the current limit
comparator for a short time (tLEB) after the power MOSFET
is turned on. This leading edge blanking time has been set so
that current spikes caused by capacitance and rectifier reverse
recovery time will not cause premature termination of the
switching pulse.
Auto-Restart (LNK304-306 only)
In the event of a fault condition such as output overload, output
short, or an open loop condition, LinkSwitch-TN enters into autorestart operation. An internal counter clocked by the oscillator
gets reset every time the FB pin is pulled high. If the FB pin
is not pulled high for 50 ms, the power MOSFET switching is
disabled for 800 ms. The auto-restart alternately enables and
disables the switching of the power MOSFET until the fault
condition is removed.

Applications Example
A 1.44 W Universal Input Buck Converter
The circuit shown in Figure 5 is a typical implementation of a

The power processing stage is formed by the LinkSwitch-TN,
freewheeling diode D1, output choke L1, and the output
capacitor C2. The LNK304 was selected such that the power
supply operates in the mostly discontinuous-mode (MDCM).
Diode D1 is an ultra-fast diode with a reverse recovery time (trr)
of approximately 75 ns, acceptable for MDCM operation. For
continuous conduction mode (CCM) designs, a diode with a trr of
<=35 ns is recommended. Inductor L1 is a standard off-the- shelf
inductor with appropriate RMS current rating (and acceptable
temperature rise). Capacitor C2 is the output filter capacitor;
its primary function is to limit the output voltage ripple. The
output voltage ripple is a stronger function of the ESR of the
output capacitor than the value of the capacitor itself.
To a first order, the forward voltage drops of D1 and D2 are
identical. Therefore, the voltage across C3 tracks the output
voltage. The voltage developed across C3 is sensed and regulated
via the resistor divider R1 and R3 connected to U1's FB pin.
The values of R1 and R3 are selected such that, at the desired
output voltage, the voltage at the FB pin is 1.65 V.
Regulation is maintained by skipping switching cycles. As the
output voltage rises, the current into the FB pin will rise. If
this exceeds IFB then subsequent cycles will be skipped until the
current reduces below IFB. Thus, as the output load is reduced,
more cycles will be skipped and if the load increases, fewer

R1
13.0 k?
1%

RF1
8.2 ?
2W

85-265
VAC

L2
1 mH
D3
1N4007
D4
1N4007

FB
D

C4
4.7 ?F
400 V

C5
4.7 ?F
400 V

BP

C1
100 nF

R3
2.05 k?
1%

S

LinkSwitch-TN
LNK304

C3
10 ?F
35 V
L1
1 mH
280 mA

D1
UF4005

D2
1N4005GP
12 V,
120 mA
C2
100 ?F
16 V

R4
3.3 k?
RTN

Figure 5. Universal Input, 12 V, 120 mA Constant Voltage Power Supply Using LinkSwitch-TN.

2-4
4
Rev. I 11/08

PI-3757-112103

LNK302/304-306

LinkSwitch-TN
RF1

D3

L2

D

FB
D2

R1

+

BP
AC
INPUT

C5

S

S

S

C4

C1

S

R3

L1

C3

C2

DC
OUTPUT

D1

D4

Optimize hatched copper areas (

) for heatsinking and EMI.

PI-3750-121106

Figure 6a. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Configuration using P or G Package.

D3

RF1

L2

FB
BP
AC
INPUT

C4

S

LinkSwitch-TN

D

S

L1

+

S
D1

S

C3

C5
C1

R3

D2

C2

R1

DC
OUTPUT

D4

Optimize hatched copper areas (

) for heatsinking and EMI.

PI-4546-011807

Figure 6b. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Configuration using D Package
to Bottom Side of the Board.

cycles are skipped. To provide overload protection if no cycles
are skipped during a 50 ms period, LinkSwitch-TN will enter
auto-restart (LNK304-306), limiting the average output power
to approximately 6% of the maximum overload power. Due to
tracking errors between the output voltage and the voltage across
C3 at light load or no load, a small pre-load may be required
(R4). For the design in Figure 5, if regulation to zero load is
required, then this value should be reduced to 2.4 k?.

Key Application Considerations
LinkSwitch-TN Design Considerations
Output Current Table
Data sheet maximum output current table (Table 1) represents
the maximum practical continuous output current for both
mostly discontinuous conduction mode (MDCM) and continuous
conduction mode (CCM) of operation that can be delivered from
a given LinkSwitch-TN device under the following assumed
conditions:

1) Buck converter topology.
2) The minimum DC input voltage is >=70 V. The value of
input capacitance should be large enough to meet this
criterion.
3) For CCM operation a KRP* of 0.4.
4) Output voltage of 12 VDC.
5) Efficiency of 75%.
6) A catch/freewheeling diode with trr <=75 ns is used for
MDCM operation and for CCM operation, a diode with
trr <=35 ns is used.
7) The part is board mounted with SOURCE pins soldered
to a sufficient area of copper to keep the SOURCE pin
temperature at or below 100 °C.
*KRP is the ratio of ripple to peak inductor current.
LinkSwitch-TN Selection and Selection Between
MDCM and CCM Operation
Select the LinkSwitch-TN device, freewheeling diode and output
inductor that gives the lowest overall cost. In general, MDCM
2-5
5
Rev. I 11/08

LNK302/304-306
TOPOLOGY

BASIC CIRCUIT SCHEMATIC

High-Side
Buck -
Direct
Feedback

FB

1. Output referenced to input
2. Positive output (VO) with respect to -VIN
3. Step down - VO &amp; lt; VIN
4. Low cost direct feedback (?10% typ.)

BP
S

D

+

KEY FEATURES

+

LinkSwitch-TN

VIN

VO
PI-3751-121003

High-Side
Buck -
Optocoupler
Feedback

BP

FB
D

+

S

+

LinkSwitch-TN
VO

VIN

PI-3752-121003

Low-Side
Buck -
Optocoupler
Feedback

+

+
LinkSwitch-TN
VO

VIN

BP

FB
D

S

Low-Side
Buck -
Constant
Current LED
Driver

PI-3753-111903

+

IO
LinkSwitch-TN
VF +

VIN

BP

D

R=

High-Side
Buck Boost -
Direct
Feedback

FB

VF PI-3754-112103
IO

BP
S

D

+

LinkSwitch-TN

VIN

VO

+
PI-3755-121003

300 ?

RSENSE =

2 k?
FB

+

D

BP

RSENSE

2V
IO
IO

S

LinkSwitch-TN
VIN

1. Output referenced to input
2. Negative output (VO) with respect to +VIN
3. Step down - VO &amp; lt; VIN
4. Optocoupler feedback
- Accuracy only limited by reference
choice
- Low cost non-safety rated opto
- No pre-load required
- Ideal for driving LEDs

FB

S

High-Side
Buck Boost -
Constant
Current LED
Driver

1. Output referenced to input
2. Positive output (VO) with respect to -VIN
3. Step down - VO &amp; lt; VIN
4. Optocoupler feedback
- Accuracy only limited by reference
choice
- Low cost non-safety rated opto
- No pre-load required
5. Minimum no-load consumption

10 ?F
50 V

100 nF

1. Output referenced to input
2. Negative output (VO) with respect to +VIN
3. Step up/down - VO &amp; gt; VIN or VO &amp; lt; VIN
4. Low cost direct feedback (?10% typ.)
5. Fail-safe - output is not subjected to input
voltage if the internal MOSFET fails
6. Ideal for driving LEDs - better accuracy
and temperature stability than Low-side
Buck constant current LED driver

PI-3779-120803

Table 2. Common Circuit Configurations Using LinkSwitch-TN. (continued on next page)

2-6
6
Rev. I 11/08

LNK302/304-306
TOPOLOGY
Low-Side
Buck Boost -
Optocoupler
Feedback

BASIC CIRCUIT SCHEMATIC

KEY FEATURES

+
LinkSwitch-TN
VO

VIN

BP
S

FB
D

+
PI-3756-111903

1. Output referenced to input
2. Positive output (VO) with respect to +VIN
3. Step up/down - VO &amp; gt; VIN or VO &amp; lt; VIN
4. Optocoupler feedback
- Accuracy only limited by reference
choice
- Low cost non-safety rated opto
- No pre-load required
5. Fail-safe - output is not subjected to input
voltage if the internal MOSFET fails

Table 2 (cont). Common Circuit Configurations Using LinkSwitch-TN.

provides the lowest cost and highest efficiency converter. CCM
designs require a larger inductor and ultra-fast (trr <=35 ns)
freewheeling diode in all cases. It is lower cost to use a larger
LinkSwitch-TN in MDCM than a smaller LinkSwitch-TN in CCM
because of the additional external component costs of a CCM
design. However, if the highest output current is required, CCM
should be employed following the guidelines below.
Topology Options
LinkSwitch-TN can be used in all common topologies, with or
without an optocoupler and reference to improve output voltage
tolerance and regulation. Table 2 provide a summary of these
configurations. For more information see the Application
Note - LinkSwitch-TN Design Guide.
Component Selection
Referring to Figure 5, the following considerations may be
helpful in selecting components for a LinkSwitch-TN design.
Freewheeling Diode D1
Diode D1 should be an ultra-fast type. For MDCM, reverse
recovery time trr <=75 ns should be used at a temperature of
70 °C or below. Slower diodes are not acceptable, as continuous
mode operation will always occur during startup, causing high
leading edge current spikes, terminating the switching cycle
prematurely, and preventing the output from reaching regulation.
If the ambient temperature is above 70 °C then a diode with
trr <=35 ns should be used.
For CCM an ultra-fast diode with reverse recovery time
trr <=35 ns should be used. A slower diode may cause excessive
leading edge current spikes, terminating the switching cycle
prematurely and preventing full power delivery.
Fast and slow diodes should never be used as the large reverse
recovery currents can cause excessive power dissipation in the
diode and/or exceed the maximum drain current specification
of LinkSwitch-TN.

Feedback Diode D2
Diode D2 can be a low-cost slow diode such as the 1N400X
series, however it should be specified as a glass passivated type
to guarantee a specified reverse recovery time. To a first order,
the forward drops of D1 and D2 should match.
Inductor L1
Choose any standard off-the-shelf inductor that meets the
design requirements. A "drum" or "dog bone" "I" core
inductor is recommended with a single ferrite element due to
its low cost and very low audible noise properties. The typical
inductance value and RMS current rating can be obtained from
the LinkSwitch-TN design spreadsheet available within the
PI Expert design suite from Power Integrations. Choose L1
greater than or equal to the typical calculated inductance with
RMS current rating greater than or equal to calculated RMS
inductor current.
Capacitor C2
The primary function of capacitor C2 is to smooth the inductor
current. The actual output ripple voltage is a function of this
capacitor's ESR. To a first order, the ESR of this capacitor
should not exceed the rated ripple voltage divided by the typical
current limit of the chosen LinkSwitch-TN.
Feedback Resistors R1 and R3
The values of the resistors in the resistor divider formed by
R1 and R3 are selected to maintain 1.65 V at the FB pin. It is
recommended that R3 be chosen as a standard 1% resistor of
2 k?. This ensures good noise immunity by biasing the feedback
network with a current of approximately 0.8 mA.
Feedback Capacitor C3
Capacitor C3 can be a low cost general purpose capacitor. It
provides a "sample and hold" function, charging to the output
voltage during the off time of LinkSwitch-TN. Its value should
be 10 ?F to 22 ?F; smaller values cause poorer regulation at
light load conditions.

2-7
7
Rev. I 11/08

LNK302/304-306
Pre-load Resistor R4
In high-side, direct feedback designs where the minimum load
is &amp; lt; 3 mA, a pre-load resistor is required to maintain output
regulation. This ensures sufficient inductor energy to pull the
inductor side of the feedback capacitor C3 to input return via
D2. The value of R4 should be selected to give a minimum
output load of 3 mA.
In designs with an optocoupler the Zener or reference bias
current provides a 1 mA to 2 mA minimum load, preventing
"pulse bunching" and increased output ripple at zero load.
LinkSwitch-TN Layout Considerations
In the buck or buck-boost converter configuration, since the
SOURCE pins in LinkSwitch-TN are switching nodes, the copper
area connected to SOURCE should be minimized to minimize
EMI within the thermal constraints of the design.
In the boost configuration, since the SOURCE pins are tied
to DC return, the copper area connected to SOURCE can be
maximized to improve heatsinking.
The loop formed between the LinkSwitch-TN, inductor (L1),
freewheeling diode (D1), and output capacitor (C2) should
be kept as small as possible. The BYPASS pin capacitor
C1 (Figure 6) should be located physically close to the
SOURCE (S) and BYPASS (BP) pins. To minimize direct
coupling from switching nodes, the LinkSwitch-TN should be
placed away from AC input lines. It may be advantageous to
place capacitors C4 and C5 in-between LinkSwitch-TN and the
AC input. The second rectifier diode D4 is optional, but may
be included for better EMI performance and higher line surge
withstand capability.

2-8
8
Rev. I 11/08

Quick Design Checklist
As with any power supply design, all LinkSwitch-TN designs
should be verified for proper functionality on the bench. The
following minimum tests are recommended:
1) Adequate DC rail voltage - check that the minimum DC
input voltage does not fall below 70 VDC at maximum load,
minimum input voltage.
2) Correct Diode Selection - UF400x series diodes are
recommended only for designs that operate in MDCM at
an ambient of 70 °C or below. For designs operating in
continuous conduction mode (CCM) and/or higher ambients,
then a diode with a reverse recovery time of 35 ns or better,
such as the BYV26C, is recommended.
3) Maximum drain current - verify that the peak drain current
is below the data sheet peak drain specification under
worst-case conditions of highest line voltage, maximum
overload (just prior to auto-restart) and highest ambient
temperature.
4) Thermal check - at maximum output power, minimum
input voltage and maximum ambient temperature, verify
that the LinkSwitch-TN SOURCE pin temperature is
100 °C or below. This figure ensures adequate margin due
to variations in RDS(ON) from part to part. A battery powered
thermocouple meter is recommended to make measurements
when the SOURCE pins are a switching node. Alternatively,
the ambient temperature may be raised to indicate margin
to thermal shutdown.
In a LinkSwitch-TN design using a buck or buck boost converter
topology, the SOURCE pin is a switching node. Oscilloscope
measurements should therefore be made with probe grounded
to a DC voltage, such as primary return or DC input rail, and
not to the SOURCE pins. The power supply input must always
be supplied from an isolated source (e.g. via an isolation
transformer).

LNK302/304-306
ABSOLUTE MAXIMUM RATINGS(1,5)
DRAIN Voltage .................................................. -0.3 V to 700 V
Peak DRAIN Current (LNK302).................200 mA (375 mA)(2)
Peak DRAIN Current (LNK304).................400 mA (750 mA)(2)
Peak DRAIN Current (LNK305).................800 mA (1500 mA)(2)
Peak DRAIN Current (LNK306).................1400 mA (2600 mA)(2)
FEEDBACK Voltage .........................................-0.3 V to 9 V
FEEDBACK Current.............................................100 mA
BYPASS Voltage ..........................................-0.3 V to 9 V
Storage Temperature .......................................... -65 °C to 150 °C
Operating Junction Temperature(3) ..................... -40 °C to 150 °C
Lead Temperature(4) ........................................................260 °C

Notes:
1. All voltages referenced to SOURCE, TA = 25 °C.
2. The higher peak DRAIN current is allowed if the DRAIN
to SOURCE voltage does not exceed 400 V.
3. Normally limited by internal circuitry.
4. 1/16 in. from case for 5 seconds.
5. Maximum ratings specified may be applied, one at a time,
without causing permanent damage to the product.
Exposure to Absolute Maximum Rating conditions for
extended periods of time may affect product reliability.

THERMAL IMPEDANCE
Thermal Impedance: P or G Package:
(?JA) ........................... 70 °C/W(3); 60 °C/W(4)
(?JC)(1) ............................................... 11 °C/W
D Package:
(?JA) ..................... .... 100 °C/W(3); 80 °C/W(4)
(?JC)(2) ............................................... 30 °C/W

Notes:
1. Measured on pin 2 (SOURCE) close to plastic interface.
2. Measured on pin 8 (SOURCE) close to plastic interface.
3. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
4. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.

Conditions
Parameter

Symbol

SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 7
(Unless Otherwise Specified)

Min

Typ

Max

62

66

70

Units

CONTROL FUNCTIONS
Output
Frequency
Maximum Duty
Cycle
FEEDBACK Pin
Turnoff Threshold
Current
FEEDBACK Pin
Voltage at Turnoff
Threshold

fOSC

TJ = 25 °C

Average
Peak-Peak Jitter

4

kHz

DCMAX

S2 Open

66

69

72

%

IFB

TJ = 25 °C

30

49

68

?A

1.54

1.65

1.76

V

160

220

?A

LNK302/304

200

260

LNK305

220

280

LNK306

250

310

VFB

IS1

DRAIN Supply
Current
IS2

VFB >=2 V
(MOSFET Not Switching)
See Note A
FEEDBACK
Open
(MOSFET
Switching)
See Notes A, B

?A

2-9
9
Rev. I 11/08

LNK302/304-306
Conditions
Parameter

Symbol

SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 7
(Unless Otherwise Specified)

Min

Typ

Max

Units

CONTROL FUNCTIONS (cont.)
BYPASS Pin
Charge Current

ICH1

VBP = 0 V
TJ = 25 °C

LNK302/304

-5.5

-3.3

-1.8

LNK305/306

-7.5

-4.6

-2.5

ICH2

VBP = 4 V
TJ = 25 °C

LNK302/304

-3.8

-2.3

-1.0

LNK305/306

-4.5

-3.3

-1.5

mA

BYPASS Pin
Voltage

VBP

5.55

5.8

6.10

V

BYPASS Pin
Voltage Hysteresis

VBPH

0.8

0.95

1.2

V

BYPASS Pin
Supply Current

IBPSC

See Note D

?A

68

CIRCUIT PROTECTION
di/dt = 55 mA/?s
TJ = 25 °C

126
145

165

185

240

257

275

271

di/dt = 65 mA/?s
TJ = 25 °C

Current Limit

146

308

345

LNK302

di/dt = 250 mA/?s
TJ = 25 °C

ILIMIT (See
Note E)

136

LNK304

di/dt = 415 mA/?s
TJ = 25 °C

mA

di/dt = 75 mA/?s
TJ = 25 °C

350

375

401

396

450

504

450

482

515

508

578

647

LNK302/304

280

360

475

LNK305

360

460

610

LNK306

400

500

675

170

215

135

142

LNK305

di/dt = 500 mA/?s
TJ = 25 °C
di/dt = 95 mA/?s
TJ = 25 °C

LNK306

di/dt = 610 mA/?s
TJ = 25 °C

Minimum On Time

tON(MIN)

Leading Edge
Blanking Time

tLEB

Thermal Shutdown
Temperature

TSD

2-10
10
Rev. I 11/08

TJ = 25 °C
See Note F

ns

ns

150

°C

LNK302/304-306
Conditions
Parameter

Symbol

SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 7
(Unless Otherwise Specified)

Min

Typ

Max

Units

CIRCUIT PROTECTION (cont.)
Thermal Shutdown
Hysteresis

TSHD

See Note G

°C

75

OUTPUT
LNK302
ID = 13 mA

ON-State
Resistance

RDS(ON)

LNK304
ID = 25 mA
LNK305
ID = 35 mA
LNK306
ID = 45 mA

OFF-State Drain
Leakage Current
Breakdown Voltage
Rise Time
Fall Time

IDSS

BVDSS
tR
tF

VBP = 6.2 V, VFB >=2 V,
VDS = 560 V,
TJ = 25 °C

TJ = 25 °C

48

55.2

TJ = 100 °C

76

88.4

TJ = 25 °C

24

27.6

TJ = 100 °C

38

44.2

TJ = 25 °C

12

13.8

TJ = 100 °C

19

22.1

TJ = 25 °C

7

8.1

TJ = 100 °C

11

12.9

LNK302/304

50

LNK305

70

LNK306

90

VBP = 6.2 V, VFB >=2 V,
TJ = 25 °C

700

V
ns

50

ns

50

tEN

Output Disable
Setup Time

tDST

Auto-Restart
ON-Time

tAR

Auto-Restart
Duty Cycle

DCAR

V

See Figure 9

10

0.5
TJ = 25 °C
See Note H

?A

50

Measured in a Typical Buck
Converter Application

DRAIN Supply
Voltage
Output Enable
Delay

?

LNK302

50

LNK302

Not Applicable

LNK304-306

6

?s

Not Applicable

LNK304-306

?s

ms

%

2-11
11
Rev. I 11/08

LNK302/304-306
NOTES:
A. Total current consumption is the sum of IS1 and IDSS when FEEDBACK pin voltage is >=2 V (MOSFET not
switching) and the sum of IS2 and IDSS when FEEDBACK pin is shorted to SOURCE (MOSFET switching).
B Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the
DRAIN. An alternative is to measure the BYPASS pin current at 6 V.
C. See Typical Performance Characteristics section Figure 14 for BYPASS pin start-up charging waveform.
D. This current is only intended to supply an optional optocoupler connected between the BYPASS and FEEDBACK
pins and not any other external circuitry.
E. For current limit at other di/dt values, refer to Figure 13.
F. This parameter is guaranteed by design.
G. This parameter is derived from characterization.
H. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to
frequency).

470 ?
5W

470 k?
D

S1

FB

S2
BP

50 V
S
S

50 V

0.1 ?F

S
S

PI-3490-060204

Figure 7. LinkSwitch-TN General Test Circuit.

DCMAX
(internal signal)
tP

FB
VDRAIN
tP =

tEN

1
fOSC
PI-3707-112503

Figure 8. LinkSwitch-TN Duty Cycle Measurement.

2-12
12
Rev. I 11/08

Figure 9. LinkSwitch-TN Output Enable Timing.

LNK302/304-306

Typical Performance Characteristics

1.0

PI-2680-012301

1.2

Output Frequency
(Normalized to 25 °C)

PI-2213-012301

1.0
0.8
0.6
0.4
0.2

0.9

0
-50 -25

0

25

50

75 100 125 150

-50

-25

Junction Temperature (°C)

0.8
Normalized di/dt
di/dt = 1
di/dt = 6

0.4
0.2
0
-50

100 125

PI-3710-071204

1.2
1.0
0.8
0.6
LNK302
LNK304
LNK305
LNK306

0.4
0.2

Normalized
di/dt = 1
55 mA/?s
65 mA/?s
75 mA/?s
95 mA/?s

Normalized
Current
Limit = 1
136 mA
257 mA
375 mA
482 mA

0
0

50

100

1

150

2

3

4

5

6

Normalized di/dt

Temperature (°C)

Figure 13. Current Limit vs. di/dt.

PI-2240-012301

7
6
5
4
3
2
1
0

400
350

DRAIN Current (mA)

Figure 12. Current Limit vs. Temperature at
Normalized di/dt.

BYPASS Pin Voltage (V)

75

1.4

Normalized Current Limit

1.0

0.6

50

Figure 11. Frequency vs. Temperature.

PI-3709-111203

Current Limit
(Normalized to 25 °C)

1.2

25

Junction Temperature (°C)

Figure 10. Breakdown vs. Temperature.
1.4

0

PI-3661-071404

Breakdown Voltage
(Normalized to 25 °C)

1.1

25 °C

300

100 °C

250
200
150

Scaling Factors:
LNK302 0.5
LNK304 1.0
LNK305 2.0
LNK306 3.4

100
50
0

0

0.2

0.4

0.6

0.8

Time (ms)
Figure 14. BYPASS Pin Start-up Waveform.

1.0

0

2

4

6

8 10 12 14 16 18 20

DRAIN Voltage (V)
Figure 15. Output Characteristics.

2-13
13
Rev. I 11/08

LNK302/304-306

Typical Performance Characteristics (cont.)
PI-3711-071404

Drain Capacitance (pF)

1000

100

Scaling Factors:
LNK302
0.5
LNK304
1.0
LNK305
2.0
LNK306
3.4

10

1
0

100

200

300

400

500

600

Drain Voltage (V)
Figure 16. COSS vs. Drain Voltage.

PART ORDERING INFORMATION
LinkSwitch Product Family
TN Series Number
Package Identifier
G

Plastic Surface Mount DIP

P

Plastic DIP

D

Plastic SO-8C

Lead Finish
N

Pure Matte Tin (RoHS Compliant)

G

RoHS Compliant and Halogen Free (D package only)

Tape &amp; Reel and Other Options
Blank Standard Configurations

LNK 304 G N - TL

2-14
14
Rev. I 11/08

TL

Tape &amp; Reel, 1 k pcs minimum for G Package. 2.5 k pcs
for D Package. Not available for P Package.

LNK302/304-306

DIP-8B
? D S .004 (.10)
-E-

Notes:
1. Package dimensions conform to JEDEC specification
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
3. Dimensions shown do not include mold flash or other
protrusions. Mold flash or protrusions shall not exceed
.006 (.15) on any side.
4. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 6 is omitted.
5. Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
6. Lead width measured at package body.
7. Lead spacing measured with the leads constrained to be
perpendicular to plane T.

.137 (3.48)
MINIMUM

.240 (6.10)
.260 (6.60)

Pin 1
-D-

.367 (9.32)
.387 (9.83)

.125 (3.18)
.145 (3.68)

.057 (1.45)
.068 (1.73)
(NOTE 6)
.015 (.38)
MINIMUM

-TSEATING
PLANE

.100 (2.54) BSC

.008 (.20)
.015 (.38)

.120 (3.05)
.140 (3.56)

.300 (7.62) BSC
(NOTE 7)
.300 (7.62)
.390 (9.91)

.048 (1.22)
.053 (1.35)
.014 (.36)
.022 (.56) ? T E D S .010 (.25) M

P08B
PI-2551-121504

SMD-8B
? D S .004 (.10)

.137 (3.48)
MINIMUM

-E-

.372 (9.45)
.388 (9.86)
? E S .010 (.25)

.240 (6.10)
.260 (6.60)

Pin 1
.100 (2.54) (BSC)

-D-

.367 (9.32)
.387 (9.83)
.057 (1.45)
.068 (1.73)
(NOTE 5)

.125 (3.18)
.145 (3.68)

.032 (.81)
.037 (.94)

.048 (1.22)
.053 (1.35)

Notes:
1. Controlling dimensions are
inches. Millimeter sizes are
shown in parentheses.
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.006 (.15) on any side.
.420
3. Pin locations start with Pin 1,
and continue counter-clock.046 .060 .060 .046
wise to Pin 8 when viewed
from the top. Pin 6 is omitted.
4. Minimum metal to metal
.080
spacing at the package body
Pin 1
for the omitted lead location
is .137 inch (3.48 mm).
.086
5. Lead width measured at
.186
package body.
.286
6. D and E are referenced
Solder Pad Dimensions
datums on the package
body.

.004 (.10)
.009 (.23)

.004 (.10)
.012 (.30)

.036 (0.91)
.044 (1.12)

0°- 8°

G08B
PI-2546-121504

2-15
15
Rev. I 11/08

LNK302/304-306

SO-8C
4

B

0.10 (0.004) C A-B 2X

2

DETAIL A

4.90 (0.193) BSC

A

4

8

D

5
GAUGE
PLANE

2 3.90 (0.154) BSC

SEATING
PLANE

6.00 (0.236) BSC

0-8

C
1.04 (0.041) REF

0.10 (0.004) C D
2X

Pin 1 ID

1

4

0.25 (0.010)
BSC

0.40 (0.016)
1.27 (0.050)

0.20 (0.008) C
2X
7X 0.31 - 0.51 (0.012 - 0.020)
0.25 (0.010) M C A-B D

1.27 (0.050) BSC

1.25 - 1.65
(0.049 - 0.065)

1.35 (0.053)
1.75 (0.069)

o

DETAIL A

0.10 (0.004)
0.25 (0.010)

0.10 (0.004) C

H

7X
SEATING PLANE
C

Reference
Solder Pad
Dimensions

+

2.00 (0.079)

+

D07C

2-16
16
Rev. I 11/08

0.17 (0.007)
0.25 (0.010)

1.27 (0.050)

4.90 (0.193)

+

+

Notes:
1. JEDEC reference: MS-012.
2. Package outline exclusive of mold flash and metal burr.
3. Package outline inclusive of plating thickness.
4. Datums A and B to be determined at datum plane H.
5. Controlling dimensions are in millimeters. Inch dimensions
are shown in parenthesis. Angles in degrees.

0.60 (0.024)
PI-4526-040207

LNK302/304-306

Notes

2-17
17
Rev. I 11/08

LNK302/304-306

Notes

2-18
18
Rev. I 11/08

LNK302/304-306
Revision Notes

Date

C

1) Released final data sheet.

3/03

D

1) Corrected Minimum On Time.

1/04

E

1) Added LNK302.

8/04

F

1) Added lead-free ordering information.

12/04

G

1) Minor error corrections.
2) Renamed Feedback Pin Voltage parameter to Feedback Pin Voltage at Turnoff Threshold and
removed condition.

3/05

H

1) Added SO-8C package.

12/06

I

1) Updated Part Ordering Information section with Halogen Free

11/08

2-19
19
Rev. I 11/08

LNK302/304-306

For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES
NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered
by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A
complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under
certain patent rights as set forth at http://www.powerint.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii)
whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant
injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or effectiveness.
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and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies.
(C)2006, Power Integrations, Inc.

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2-20
20
Rev. I 11/08

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