B101XTN01.1.pdf

Netbook Acer D270 - Zmiana matrycy z WSVGA na HD

Witam Zrobię mały odkop ale pewnie przydatny dla potomnych . Zmodyfikowałem również swojego Acera One D270 do wersji HD ale na matrycy AUO B101XTN01.1 H/W 0A F/W:1 Jest ona odpowiednikiem przedstawionej przez autora wątku . Cena takiej matrycy bardzo przystępna 25 $ i była to matryca fabrycznie nowa . Do modyfikacji potrzebny oczywiście był zmodyfikowany bios i wyższa wersja win7 , no i oczywiście zmiana trybu rozdzielczości w rejestrze .https://obrazki.elektroda.pl/9666799500_1511518959_thumb.jpg


Product Specification
AU OPTRONICS CORPORATION

.tw

( ) Preliminary Specifications
(V ) Final Specifications
10.1"(10.05") HD 16:9 Color TFT-LCD
with LED Backlight design

Model Name

B101XTN01.1 (H/W:1A)

Note

LED Backlight with driving circuit design

(

)

Date

Approved by

slc
d

Customer

.co
m

Module

Date

MM/DD/YYYY

YW Lee

09/16/2013

Date

Prepared by

Date

Bing Ho

09/16/2013

w.y

Checked &
Approved by

ww

MM/DD/YYYY

Note: This Specification is subject to change
without notice.

B101XTN01.1

Document Version : 1.2

NBBU Marketing Division
AU Optronics corporation

1 of 31

Product Specification
AU OPTRONICS CORPORATION

Contents

.tw

1. Handling Precautions .............................................................. 4
2. General Description ................................................................ 5
2.1 General Specification ..........................................................................................................................5
2.2 Optical Characteristics ........................................................................................................................6

3. Functional Block Diagram ..................................................... 11

.co
m

4.1 Absolute Ratings of TFT LCD Module.............................................................................................12
4.2 Absolute Ratings of Environment .....................................................................................................12

5. Electrical Characteristics....................................................... 13
5.1 TFT LCD Module..............................................................................................................................13
5.2 Backlight Unit ...................................................................................................................................15

6. Signal Interface Characteristic.............................................. 16
6.1 Pixel Format Image ...........................................................................................................................16

slc
d

6.2 The Input Data Format ......................................................................................................................17
6.3 Integration Interface Requirement.....................................................................................................18
6.4 Interface Timing ................................................................................................................................20

7. Panel Reliability Test ............................................................ 23
7.1 Vibration Test ....................................................................................................................................23
7.2 Shock Test .........................................................................................................................................23
7.3 Reliability Test...................................................................................................................................23

w.y

8. Mechanical Characteristics.................................................... 24
8.1 LCM Outline Dimension...................................................................................................................24
Front View ...............................................................................................................................................24
Back View ...............................................................................................................................................25

9. Shipping and Package ........................................................... 26

ww

9.1.1 Shipping Label Format ...................................................................................................................26
9.1.2 Carton Label Format.......................................................................................................................26
9.2 Carton Package..................................................................................................................................27
9.3 Shipping Package of Palletizing Sequence........................................................................................27

10. Appendix: EDID Description................................................ 28

B101XTN01.1

Document Version : 1.2

2 of 31

Product Specification
AU OPTRONICS CORPORATION

Record of Revision

0.1

2012/08/23

0.2 2012/09/11

Page

Old description

All

First Edition for Customer

5

Anti-Glare, Hardness 3H,
Low Reflection

New Description

Remark

Renew shipping label and anti-glare

Only "Anti-Glare, Hardness 3H"

.tw

Version and Date

0.3 2012/09/17

26

Updated shipping & carton label

0.4 2012/11/26

11 &
28

Updated Functional Block Diagram &
Appendix: EDID Description

0.5 2012/12/14

18 &
19

1.1

2013/05/31

28

1.2

2013/09/16

Mating of MSAK24025P40 Or
Compatible

26

.co
m

All

Led Power Supply:7V-21V

6 & 12

Final 2013/01/24

Led Power Supply:6V-21V

Updated optical characteristic and
Absolutel Rating of TFT LCD Module

First Final Edition for Customer

Updated EDID format

Update Pixel Clock with 70MHz

Shipping label format UL Mark
Alteration

ww

w.y

slc
d

2012/12/24

Mating of MSAK24025P40

B101XTN01.1

Document Version : 1.2

3 of 31

Product Specification
AU OPTRONICS CORPORATION

1. Handling Precautions

ww

w.y

slc
d

.co
m

.tw

1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input
connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration
or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on
hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure
human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate
nor tilt the Interface Connector of the TFT Module.
11) After installation of the TFT Module into an enclosure (Notebook PC Bezel, for
example), do not twist nor bend the TFT Module even momentary. At designing the
enclosure, it should be taken into consideration that no bending/twisting forces are
applied to the TFT Module from outside. Otherwise the TFT Module may be
damaged.
12) Small amount of materials having no flammability grade is used in the LCD module. The
LCD module should be supplied by power complied with requirements of Limited Power
Source (IEC60950 or UL1950), or be applied exemption.
13) Disconnecting power supply before handling LCD modules, it can prevent electric shock,
DO NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT
module that a LED light bar build in as a light source of back light unit. It can prevent
electrostatic breakdown.

B101XTN01.1

Document Version : 1.2

4 of 31

Product Specification
AU OPTRONICS CORPORATION

2. General Description

.tw

B101XTN01.1 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel,
a driver circuit, and LED backlight system. The screen format is intended to support the 16:9
HD, 1366(H) x768(V) screen and 262k colors (RGB 6-bits data driver) with LED backlight
driving circuit. All input signals are LVDS interface compatible.
B101XTN01.1 is designed for a display unit of notebook style personal computer and
industrial machine.

Items
Screen Diagonal

Pixels H x V

Specifications

[mm]

255.28

222.52 x 125.11

1366x3(RGB) x 768

[mm]

0.1629X0.1629

R.G.B. Vertical Stripe

slc
d

Pixel Pitch

Display Mode

Unit

[mm]

Active Area

Pixel Format

condition:

.co
m

The following items are characteristics summary on the table at 25

?

2.1 General Specification

White Luminance (ILED=20mA)

Normally White

[cd/m2]

200 typ. (5 points average)

(Note: ILED is LED current)

[ms]

1.25 (5 points average)
400 typ
8 typ / 16 Max

Nominal Input Voltage VDD

[Volt]

+3.3 typ.

Power Consumption

[Watt]

2.6 max. (Include Logic and Blu power)

w.y

Luminance Uniformity
Contrast Ratio
Response Time

ww

Weight
Physical Size
Include bracket

Electrical Interface
Glass Thickness

[Grams] 170 max.
[mm]
Min.
Length
242.5
Width
146.0
Thickness
1 channel LVDS
[mm]

Typ.
243.0
146.5
3.3

Max.
243.5
147.0
3.6

0.5

Surface Treatment

Anti-Glare, Hardness 3H,

Support Color

262K colors ( RGB 6-bit )

B101XTN01.1

Document Version : 1.2

5 of 31

Product Specification
AU OPTRONICS CORPORATION

Temperature Range
Operating
Storage (Non-Operating)
RoHS Compliance

[oC]
[oC]

0 to +50
-20 to +60
RoHS Compliance

The optical characteristics are measured under stable conditions at 25

Symbol

White Luminance
ILED=20mA

Min.

Typ.

Max.

Unit

165

200

-

cd/m

40
40

45
45

-

degree

10
30

15
35

-

5 Points

-

-

1.25

1, 3, 4

13 Points

-

-

1.60

2, 3, 4

300

400

-

4, 6

4

4, 7

5 points average
?R
?L

Horizontal
CR = 10

?H
?L

Vertical
CR = 10

?5P
?13P
CR

(Right)
(Left)

(Upper)
(Lower)

slc
d

Luminance
Uniformity
Luminance
Uniformity
Contrast Ratio

(Room Temperature) :

Cross talk

%

Response Time

TRT

Red

Rising + Falling

-

8

16

Rx

0.543

0.573

Ry

0.303

0.333

0.303

0.333

0.564. 0.594

0.128

0.158

0.188

By

0.103

0.133

ww

White

0.163

Wx

0.283

0.313

0.343

Wy

0.299

0.329

NTSC

0.359

%

-

45

B101XTN01.1

4, 9

0.363

0.534

1, 4, 5.

0.363

Gx

Note

0.603

-

w.y

Green
Color /
Chromaticity
Coodinates
Blue

2

.co
m

Viewing Angle

Conditions

?

Item

.tw

2.2 Optical Characteristics

Gy
Bx

Document Version : 1.2

CIE 1931

msec

4, 8

4

6 of 31

Product Specification
AU OPTRONICS CORPORATION
Note 1: 5 points position (Ref: Active area)
W
W /4

W /4

W /4

W /4

H /4

2

.tw

1
H /4

3

H
H /4

5

.co
m

4
H /4

Note 2: 13 points position (Ref: Active area)

W

W /4
10

W /4

H /4

W /4

10

slc
d

10

W /4

2

1

4

3
5

H /4

6

H

8

7

H /4

w.y

9

H /4

10

11

12

10
13

ww

Note 3: The luminance uniformity of 5 or13 points is defined by dividing the maximum luminance values by the
minimum test point luminance

W5

=

W 13

=

Maximum Brightness of five points
Minimum Brightness of five points
Maximum Brightness of thirteen points
Minimum Brightness of thirteen points

?

?

Note 4: Measurement method
The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change
during measuring. In order to stabilize the luminance, the measurement should be executed after lighting
Backlight for 30 minutes in a stable, windless and dark room, and it should be measured in the center of screen.

B101XTN01.1

Document Version : 1.2

7 of 31

Product Specification
AU OPTRONICS CORPORATION

.tw

Photo detector

Field=2

°

LCD Panel

TFT-LCD Module

Definition of Average Luminance of Center (YLthe screen
White of ):

slc
d

Note 5

.co
m

50 cm

:

Measure the luminance of gray level 63 at 5 points

YL = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

,

L (x) is corresponding to the luminance of the point X at Figure in Note (1).

Definition of contrast ratio:
Contrast ratio is calculated with the following formula.

Brightness on the "White" state

w.y

:

Note 6

Contrast ratio (CR)=

Note 7

Brightness on the "Black" state

:

ww

Definition of Cross Talk (CT)

CT = | YB - YA | / YA × 100 (%)

Where

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

B101XTN01.1

Document Version : 1.2

8 of 31

Product Specification

.tw

AU OPTRONICS CORPORATION

Note 8: Definition of response time:

The output signals of BM-7 or equivalent are measured when the input signals are changed from "Black" to

.co
m

"White" (falling time) and from "White" to "Black" (rising time), respectively. The response time interval between
the 10% and 90% of amplitudes. Refer to figure as below.

" Black "

" White "

slc
d

10%
0%

Tr

" White "

Tf

ww

w.y

Signal(Relative value)

100%
90%

B101XTN01.1

Document Version : 1.2

9 of 31

Product Specification
AU OPTRONICS CORPORATION
Note 9. Definition of viewing angle

?

Viewing angle is the measurement of contrast ratio

10, at the screen center, over a 180° horizontal and

180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90°
(?) horizontal left and right and 90° (?) vertical, high (up) and low (down). The measurement direction is
typically perpendicular to the display surface with the screen rotated about its center to develop the desired

ww

w.y

slc
d

.co
m

.tw

measurement viewing angle.

B101XTN01.1

Document Version : 1.2

10 of 31

Product Specification
AU OPTRONICS CORPORATION

3. Functional Block Diagram

ww

w.y

slc
d

.co
m

.tw

The following diagram shows the functional block of the 10.1 inches wide Color TFT/LCD 40 Pin one
channel Module

B101XTN01.1

Document Version : 1.2

11 of 31

Product Specification
AU OPTRONICS CORPORATION
4. Absolute Maximum Ratings

An absolute maximum rating of the module is as following:

4.1 Absolute Ratings of TFT LCD Module
Symbol

Min

Max

Unit

Conditions

Logic/LCD Drive Voltage

Vin

3.0

3.6

[Volt]

Note 1,2

4.2 Absolute Ratings of Environment
Item

Symbol

Min

Max

Operating Temperature

TOP

0

+50

Operation Humidity

HOP

5

95

TST

Storage Humidity

HST

Note 1: At Ta (25

)

-20

+60

5

95

Unit
o

Conditions

[ C]

Note 4

[%RH]

Note 4

o

[ C]

Note 4

[%RH]

Note 4

.co
m

Storage Temperature

.tw

Item

?

Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: LED specification refer to section 5.2

Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).

ww

w.y

slc
d

Twb=39°C

Operating Range

B101XTN01.1

Document Version : 1.2

Storage Range

12 of 31

Product Specification
AU OPTRONICS CORPORATION

5. Electrical Characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;

?

PDD
IDD

Parameter
Logic/LCD Drive
Voltage
VDD Power
IDD Current

IRush

Inrush Current

VDDrp

Allowable
Logic/LCD Drive
Ripple Voltage

Min
3.0

Typ
3.3

Max
3.6

-

-

0.8

-

-

-

606
2000

-

100

Units
[Volt]

Note

[Watt]
[mA]

Note 1
Note 1

.co
m

Symble
VDD

and frame frenquency under 60Hz

.tw

The power specification are measured under 25

-

Note 1 : Maximum Measurement Condition

[mA]

Note 2

[mV]
p-p

Black Pattern at 3.3V driving voltage. (Pmax=V3.3 x Iblack)

:

Typical Measurement Condition : Mosaic Pattern
Measure Condition

:

ww

w.y

slc
d

Note 2

3.3V

90%

10%

0V
0.5ms

Vin rising time
B101XTN01.1

Document Version : 1.2

13 of 31

Product Specification
AU OPTRONICS CORPORATION

5.1.2 Signal Electrical Characteristics
Input signals shall be low or High-impedance state when VDD is off.
Signal electrical characteristics are as follows;

VTH

Differential Input High
Threshold (Vcm=+1.2V)
Differential Input Low
Threshold (Vcm=+1.2V)
Differential Input
Voltage

VTL
|VID|
VCM

Min

Differential Input
Common Mode Voltage

-100

Unit

100

[mV]

-

[mV]

100

600

[mV]

1.125

1.375

[V]

ww

w.y

slc
d

Note: LVDS Signal Waveform

-

Max

.tw

Condition

.co
m

Parameter

B101XTN01.1

Document Version : 1.2

14 of 31

Product Specification
AU OPTRONICS CORPORATION

5.2 Backlight Unit
5.2.1 LED characteristics
Symbol

Min

Typ

Max

Units

PLED

-

-

1.8

[Watt] (Ta=25 ), Note 1

N/A

15,000

-

.tw

LED Life-Time

Vin =12V

Hour

-

(Ta=25

?

Backlight Power
Consumption

Condition

?

Parameter

), Note 2

.co
m

IF=20 mA
Note 1: Calculator value for reference PLED = VF (Normal Distribution) * IF (Normal Distribution) / Efficiency
Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.

5.2.2 Backlight input signal characteristics

Min

Typ

Max

Units

VLED

6.0

12.0

21.0

[Volt]

slc
d

LED Power Supply

Symbol

LED Enable Input
High Level
LED Enable Input
Low Level

VLED_EN

[Volt]

-

-

0.5

[Volt]

-

Define as

5.5

[Volt]

Connector
Interface

-

-

0.5

[Volt]

FPWM

200

1K

10K

Hz

Duty

5

--

100

%

(Ta=25

)

ww

PWM Duty Ratio

5.5

VPWM_EN

PWM Logic Input
Low Level

PWM Input Frequency

-

2.5

w.y

PWM Logic Input
High Level

2.5

Remark

?

Parameter

Note 1 : Recommend system pull up/down resistor no bigger than 10kohm

B101XTN01.1

Document Version : 1.2

15 of 31

Product Specification
AU OPTRONICS CORPORATION

6. Signal Interface Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.

R GB R GB

R GB R GB

slc
d

.co
m

1st Line

1366

.tw

1

R GB R GB

R GB R GB

ww

w.y

768th Line

B101XTN01.1

Document Version : 1.2

16 of 31

Product Specification
AU OPTRONICS CORPORATION

Description
Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)
Red-pixel Data

Green Data 5 (MSB)
Green Data 4
Green Data 3
Green Data 2
Green Data 1
Green Data 0 (LSB)

Red-pixel Data
Each red pixel's brightness data consists of
these 6 bits pixel data.

Green-pixel Data
Each green pixel's brightness data consists of
these 6 bits pixel data.

slc
d

G5
G4
G3
G2
G1
G0

.co
m

Signal Name
R5
R4
R3
R2
R1
R0

.tw

6.2 The Input Data Format

Green-pixel Data
Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)

Blue-pixel Data
Each blue pixel's brightness data consists of
these 6 bits pixel data.

ww

w.y

B5
B4
B3
B2
B1
B0

RxCLKIN

Blue-pixel Data
Data Clock

DE

Display Timing

VS
HS

Vertical Sync
Horizontal Sync

The signal is used to strobe the pixel data and
DE signals. All pixel data shall be valid at the
falling edge when the DE signal is high.
This signal is strobed at the falling edge of
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed.
The signal is synchronized to RxCLKIN .
The signal is synchronized to RxCLKIN .

Note: Output signals from any system shall be low or High-impedance state when VDD is off.

B101XTN01.1

Document Version : 1.2

17 of 31

Product Specification
AU OPTRONICS CORPORATION

6.3 Integration Interface Requirement
6.3.1 Connector Description
Physical interface is described as for the connector on module.

.tw

These connectors are capable of accommodating the following signals and will be following
components.
Connector Name / Designation

For Signal Connector

Manufacturer

STM

Mating Housing/Part Number

6.3.2 Pin Assignment

MSAK24025P40

.co
m

Type / Part Number

Mating of MSAK24025P40

LVDS is a differential signal technology for LCD interface and high speed data transfer device.

3 VDD
4 V EEDID
5 TEST
6 Clk EEDID

Reserved, AUO will use this pin.
Power Supply, 3.3 V (typical)
Power Supply, 3.3 V (typical)
DDC 3.3V power

Panel Self Test
DDC Clock
DDC Data

w.y

7 DATA EEDID
8 Odd_Rin0-

Description

slc
d

Pin
Signal
1 Reserved
2 VDD

- LVDS differential data input (R0-R5, G0) (odd pixels)

9 Odd_Rin0+
10 VSS

+ LVDS differential data input (R0-R5, G0) (odd pixels)

11 Odd_Rin112 Odd_Rin1+

- LVDS differential data input (G1-G5, B0-B1) (odd pixels)

Ground - Shield

ww

+ LVDS differential data input (G1-G5, B0-B1) (odd pixels)

13 VSS
14 Odd_Rin2-

Ground - Shield

15 Odd_Rin2+
16 VSS

+ LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)

17 Odd_ClkIN18 Odd_ClkIN+

- LVDS differential clock input (odd pixels)

19 VSS
20 Reserved

Ground - Shield

21 Reserved
22 VSS

Reserved

23 Reserved

Reserved

B101XTN01.1

- LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
Ground - Shield
+ LVDS differential clock input (odd pixels)
Reserved
Ground - Shield

Document Version : 1.2

18 of 31

Product Specification
AU OPTRONICS CORPORATION

24 Reserved
25 VSS

Reserved
Ground - Shield

26 Reserved
27 Reserved

Reserved

28 VSS
29 Reserved

Ground - Shield

30 Reserved
31 VSS_LED

Reserved

.tw

Reserved
Ground - LED
Ground - LED
Ground - LED
No connection (Reserved)

.co
m

32 VSS_LED
33 VSS_LED
34 NC
35 PWM

Reserved

System PWM Signal Input (+3.3V Swing)

36 LED_EN
37 Reserved

LED enable pin (+3.3V Input)

38 VDDLED
39 VDDLED

LED Power Supply 6V - 21V

Reserved

LED Power Supply 6V - 21V

ww

w.y

slc
d

40 VDDLED
LED Power Supply 6V - 21V
Note 1: Start from right side

Connector

Pin 40

Pin 1

VLED

NC

Note1: Input signals shall be low or High-impedance state when VDD is off.
B101XTN01.1

Document Version : 1.2

19 of 31

Product Specification
AU OPTRONICS CORPORATION

6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings should match the 1366x768 /60Hz manufacturing guide line timing.

Symbol

Min.

Typ.

Max.

Unit

Frame Rate

-

-

60

-

Hz

Clock frequency

1/ TClock

66.9

72

80

MHz

Period

TV

788

824

Active

TVD

Blanking

TVB

20

56

Period

TH

1416

1456

Active

THD

Blanking

THB

Section

Horizontal
Section

768

768+A

TLine

A

.co
m

Vertical

.tw

Parameter

1366+B

TClock

1366

50

90

B

ww

w.y

slc
d

Note 1 : The above is as optimized setting
Note 2 : DE mode only
Note 3 : The maximum clock frequency = (1366+B)*(768+A)*60 & lt; 80MHz
Note 4 : Clock frequency number is for reference, real setting value refer to EDID (Clock frequency TBD MHz)

B101XTN01.1

Document Version : 1.2

20 of 31

Product Specification
AU OPTRONICS CORPORATION

6.4.2 Timing diagram

DOTCLK

Invaild
Data

Pixel
1

DE
THB

Pixel
2

Pixel
3

Pixel
N-1

Pixel
N

Invaild
Data

Pixel
1

.co
m

Input
Data

.tw

Input Timing Definition ( DE Mode)

TCLOCK

THD

TH

DE

TVD

slc
d

TVB

ww

w.y

TV

B101XTN01.1

Document Version : 1.2

21 of 31

Product Specification
AU OPTRONICS CORPORATION

6.5 Power ON/OFF Sequence

slc
d

.co
m

.tw

Power on/off sequence is as follows. Interface signals and LED on/off sequence are also shown in
the chart. Signals from any system shall be Hi-Z state or low level when VDD is off

Note 1 : If T3 & lt; 200ms, the display garbage may occur. (T3 & gt; 200ms is recommended)
Note 2 If T1 or T12 & lt; 0.5ms, the inrush current may cause the damage of fuse. If T1 or T12 & lt; 0.5ms, the inrush current
2
I t is under typical melt of fuse Spec, there is no mentioned problem.

:
:
:
:

0 could be acceptable

ww

?

w.y

Note 3 : T8,T9,T10,T11 value are recommended, T8,T9,T10,T11

B101XTN01.1

Document Version : 1.2

22 of 31

Product Specification
AU OPTRONICS CORPORATION

7. Panel Reliability Test
7.1 Vibration Test
Non-Operation
1.5 G
10 - 500Hz Random
30 Minutes each Axis (X, Y, Z)

7.2 Shock Test
Test Spec:

Test method:
Acceleration:
Active time:
Pulse:

.co
m

Test method:
Acceleration:
Frequency:
Sweep:

.tw

Test Spec:

Non-Operation
220 G , Half sine wave
2 ms
X,Y,Z .one time for each side

slc
d

7.3 Reliability Test

Required Condition

Note

Ta= 40?, 90%RH, 300h
?
Ta= 50?, Dry, 300h
?

ww

w.y

Items
Temperature
Humidity Bias
High Temperature
Operation
Low Temperature
Operation
High Temperature
Storage
Low Temperature
Storage
Thermal Shock
Test
ESD

Ta= 0?, 300h
?

Ta= 60?, 35%RH, 300h
?

Ta= -20?, 50%RH, 250h
?
Ta=-20?to 60?, Duration at 30 min, 100 cycles
?
?
Contact : ?8 KV

Note 1

Air : ?15 KV

Note1: According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. Self-recoverable.
No data lost, No hardware failures.
Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%

B101XTN01.1

Document Version : 1.2

23 of 31

tw

8. Mechanical Characteristics
8.1 LCM Outline Dimension

ww

w.y
s

lcd

.co
m.

Front View

B101XTN01.1

Document Version : 1.2

24 of 31

ww

w.y
s

lcd

.co
m.

tw

Back View

B101XTN01.1

Document Version : 1.2

25 of 31

9. Shipping and Package

9.1.1 Shipping Label Format
Year/Week code

slc
d

.co
m

.tw

Model name

Hardware Code

ww

w.y

9.1.2 Carton Label Format

B101XTN01.1

Document Version : 1.2

26 of 31

slc
d

.co
m

.tw

9.2 Carton Package

ww

w.y

9.3 Shipping Package of Palletizing Sequence

B101XTN01.1

Document Version : 1.2

27 of 31

10. Appendix: EDID Description
Address

FUNCTION

Value

Value

Value

HEX

BIN

DEC

00

00000000

0

01

FF

11111111

255

02

FF

11111111

255

HEX
00

.tw

Header

03

FF

11111111

255

11111111

255

.co
m

255

FF

06

11111111

FF

05

255

FF

04

11111111

07

00

00000000

0

08

EISA Manuf. Code LSB

06

00000110

6

09

Compressed ASCII

AF

10101111

175

11011100

220

00010000

16

00000000

0

00

00000000

0

00

00000000

0

00

00000000

0

Week of manufacture

00

00000000

0

Year of manufacture

16

00010110

22

EDID Structure Ver.

01

00000001

1

EDID revision #

04

00000100

4

90

10010000

144

16

00010110

22

0A

edoC tcudorP

DC

0B

tsrif BSL ,xeh

10

0C

32-bit ser #

00

0E
0F
10
11
12

w.y

13

slc
d

0D

14
15

Video input def.

(digital I/P, non-TMDS, CRGB)

Max H image size

(rounded to cm)

Max V image size (rounded to cm)

0D

00001101

13

17

Display Gamma
(=(gamma*100)-100)
Feature support (no DPMS, Active OFF, RGB, tmg

78

01111000

120

18

Blk#1)

02

00000010

2

19

Red/green low bits (Lower 2:2:2:2 bits)

BB

10111011

187

1A

Blue/white low bits (Lower 2:2:2:2 bits)

F5

11110101

245

1B

Red x (Upper 8 bits)

94

10010100

148

1C

Red y/ highER 8 bits

55

01010101

85

1D

Green x

54

01010100

84

1E

Green y

90

10010000

144

1F

Blue x

27

00100111

39

20

Blue y

23

00100011

35

21

White x

50

01010000

80

22

White y

54

01010100

84

23

Established timing 1

00

00000000

0

ww

16

B101XTN01.1

Document Version : 1.2

28 of 31

Established timing 2

00

00000000

0

25

Established timing 3

00

00000000

0

26

Standard timing #1

01

00000001

1

01

00000001

1

01

00000001

1

01

00000001

1

01

00000001

1

01

00000001

1

01

00000001

1

01

00000001

1

01

00000001

1

01

00000001

1

27
28

Standard timing #2

29
2A

Standard timing #3

2B
2C

Standard timing #4

2D
2E

Standard timing #5

30

.co
m

2F

.tw

24

Standard timing #6

33
34
35

1

01

00000001

1

00000001

1

01

00000001

1

00000001

1

58

Standard timing #8

00000001

01

Standard timing #7

1

01

32

00000001

01

31

01

01011000

88

Pixel Clock/10000 LSB

37

Pixel Clock/10000 USB

1B

00011011

27

38

Horz active Lower 8bits

56

01010110

86

39

Horz blanking Lower 8bits

5A

01011010

90

3A

HorzAct:HorzBlnk

50

01010000

80

Vertical Active Lower 8bits

00

00000000

0

Vertical Blanking

1E

00011110

30

30

00110000

48

3B

Upper 4:4 bits
Lower 8bits

w.y

3C

slc
d

36

3D

Vert Act : Vertical Blanking

3E

HorzSync. Offset

26

00100110

38

3F

HorzSync.Width

16

00010110

22

40

VertSync.Offset : VertSync.Width

36

00110110

54

00

00000000

0

Horz & Vert Sync Offset/Width Upper 2bits

ww

41

(upper 4:4 bit)

42

Horizontal Image Size Lower 8bits

DE

11011110

222

43

Vertical Image Size Lower 8bits

7D

01111101

125

44

Horizontal & Vertical Image Size (upper 4:4 bits)

00

00000000

0

45

Horizontal Border (zero for internal LCD)

00

00000000

0

46

Vertical Border (zero for internal LCD)

00

00000000

0

47

Signal (non-intr, norm, no stero, sep sync, neg pol)

18

00011000

24

48

00

00000000

0

49

descriptor #2

00

00000000

0

4A

00

00000000

0

4B

0F

00001111

15

4C
B101XTN01.1

Detailed timing/monitor

00

00000000

0

Document Version : 1.2

29 of 31

00

00000000

0

4E

00

00000000

0

4F

00

00000000

0

50

00

00000000

0

51

00

00000000

0

52

00

00000000

0

53

00

00000000

0

54

00

00000000

0

00

00000000

0

00

00000000

0

00

00000000

0

00

00000000

0

.tw

4D

55
56
57

.co
m

58
59

20

00100000

32

5A

Detailed timing/monitor

00

00000000

0

5B

descriptor #3

00

00000000

0

00

00000000

0

FE

11111110

254

00

00000000

0

41

01000001

65

5C
5D
5E
5F

65

slc
d

Manufacture

20

00100000

32

66

20

00100000

32

67

20

00100000

32

68

20

00100000

32

69

20

00100000

32

6A

20

00100000

32

6B

20

00100000

32

60
61
62
63

55

01010101

85

Manufacture

4F

01001111

79

0A

00001010

10

20

00100000

32

20

00100000

32

ww

w.y

64

Manufacture

6C

Detailed timing/monitor

00

00000000

0

6D

descriptor #4

00

00000000

0

6E

00

00000000

0

6F

FE

11111110

254

70

00

00000000

0

71

42

01000010

66

72

Manufacture P/N

31

00110001

49

73

Manufacture P/N

30

00110000

48

74

Manufacture P/N

31

00110001

49

75
B101XTN01.1

Manufacture P/N

Manufacture P/N

58

01011000

88

Document Version : 1.2

30 of 31

Manufacture P/N

54

01010100

84

77

Manufacture P/N

4E

01001110

78

78

Manufacture P/N

30

00110000

48

79

Manufacture P/N

31

00110001

49

7A

Manufacture P/N

2E

00101110

46

7B

Manufacture P/N

30

00110000

48

7C

20

00100000

32

7D

0A

00001010

10

00

00000000

0

0B

00001011

11

SUM
SUM to HEX

6144
1800

Extension Flag

7F

Checksum

ww

w.y

slc
d

.co
m

7E

.tw

76

B101XTN01.1

Document Version : 1.2

31 of 31


Pobierz plik - link do postu