IPHONE SE Schematics_Components.rar

Re: Iphone SE po wymianie wyświetlacz tyko mignięcie treści.

Układy są gdzieś dostępne bo niestety nie mam dawcy oraz które to są dokładnie. Uklady do kupienia od cinczyka np. aliexpress Schemat 839299

  • IPHONE SE Schematics_Components.rar
    • iPhone SE全套各内联座阻值维修图纸.pdf
    • iPhone SE元件分布图 820-00282.pdf
    • iPhone SE原理图N69 051-00648 4.0.0.pdf


Pobierz plik - link do postu

IPHONE SE Schematics_Components.rar > iPhone SE全套各内联座阻值维修图纸.pdf

iPhone SE????????????


IPHONE SE Schematics_Components.rar > iPhone SE元件分布图 820-00282.pdf

GPS_SP1_RF

UPPER_LBMB_ANT_RF

C5136_RF

SP3_RF

R5135_RF

C5106_RF

C5107_RF

R5104_RF

U_ANTPAC_RF

R5105_RF
L5107_RF

L5103_RF

C5104_RF

C5103_RF

C5102_RF

L5135_RF

*

C5101_RF

L5101_RF

C5105_RF

*
FL5146_RF

U_GPSLNA_RF
L5111_RF

*

FD0514

FD0501

C5129_RF

XW5100_RF

PP0701

J3200

TP5303_RF

C3002

FD0502

PP3105_RF
R3202

C3124

PP3120_RF

PP3185_RF
C3123

PP3123_RF

PP3173_RF
R5210_RF
L5123_RF

PP3155_RF

C3001

C3000

C3120

C0543

FL3153
PP3101_RF
FL3154

DZ3153

C3121

DZ3154

XW4302

R3101

J3100

C4309

L3100

R0809
FL3110
C3110

R5307_RF
R5306_RF

D4701

o
FL4207

C4207

C4204

C4206

C4220

C4221

C4230

C4222

C4208

C4211

C4212

FL4230

C4213

U0900

FL4213

FL4212

FL4211

*

C0900

*

C4325

C4318

C4311

L3102

R4303

FL4241

J4700

R4701

C4313
C4715
C4714

FL4712

DZ4712

R0904

C0511

C4004

R0920

R0960

R0808

C0512

C0510

R1002

R0804

R0805

C1301

C1310

R1204

R1200

R0803

R0801

C2203

C1320

R2261 R1202

R4020

R0721 R0907

C3612

R1203

R0802

C3396

C1314

C2042

C1300

C2081

C1313

C2031

0
0
1
2
W
X
5

0

1

0

8

2

C2014

X

200

W

2
X

W

XW1100

XW2

C0650 C0651

R0651 R0650

XW2070

XW2040

XW2030

PP1104
PP1105

C2019

3

C2013

0

W
XW3704
3

X

7

L2011

L2003

L2000

L2002

*

C2070
PP3190_RF
PP08

L2001

R0640

R1201

R0720

R0701

R0400

R0403

R0406

R0402

*

C2008
*

R0903

R0909

0

x
R0404

R0409

R0401

R0410

C2012

C1244

C1500

C2011

C2000

*

C2002

C1502

Q4500
*

R3101_RF

PP4500

C4503

R1561
C1560

C4504

R1560
C1554
L0601
U4500

C1524
L0602

C1525

*

C2305
C2300

C2320

U1500

C2311

PP07

C2330

*

*

L2300

R1500

*

U4040

F
0

2

_

*

R

w

1
3
W
X
C3407_RF

R3505_RF
C3212_RF
C3602_RF

XW3101_RF

C3414_RF

FL4624

C3418_RF
C3436_RF
C3214_RF

R3309_RF

L4301_RF

C3830_RF
C3823_RF
L4829_RF
C4826_RF

C3826_RF

*

C4501_RF

L4520_RF

XW4002_RF

L4003_RF
*

L4523_RF

L4526_RF

C4002_RF

XW4001_RF
C4001_RF

L4527_RF

C4505_RF
R4001_RF
C4008_RF

C4003_RF

C4006_RF

U_QPOET_RF

XW4004_RF

C4007_RF

C4201_RF
XW4200_RF
C4503_RF
U_VLB_SW_RF
C4224_RF

C3806_RF

L4601_RF

L4211_RF

L4322_RF

C4313_RF

C4818_RF
L4822_RF

FT_B40_RF

L4002_RF
L4004_RF
C4010_RF
C4506_RF

C4005_RF

C4418_RF

*
L4603_RF

FL_B39LP_RF
L4821_RF

L4001_RF

C4701_RF

L4713_RF
C4817_RF
L4704_RF
L4819_RF
C4703_RF
L4705_RF

C4311_RF
L4313_RF
L4602_RF
L4820_RF

*
L4604_RF

C2400
FL2400
*

RF
T_
AN
W_
LO

C3815_RF
L4421_RF

C4533_RF

J2400

C4314_RF
L4312_RF

L4706_RF

L4512_RF

XW4700_RF

L4407_RF
FRX34B39_RF

C4520_RF
L4516_RFL4528_RF

FD0512

C4522_RF

R4700_RF
R3702_RF

C4407_RF

FD0516

L4827_RF
L4823_RF
C4832_RF
C4720_RF

C4602_RF
L4315_RF

*

L4826_RF
C4831_RF

R4607_RF

FD0504

L4825_RF
C4820_RF

C4207_RF

C4827_RF
L4814_RF
U_WTR_RF

XW4300_RF

C4321_RF

L4817_RF

C4305_RF

L4813_RF
C4809_RF

C3825_RF

L4806_RF
C4803_RF
L4905_RF
C4901_RF

C4303_RF

C5001_RF

L4808_RF

C4301_RF

L4809_RF

L5002_RF

L5003_RF

C3828_RF

C3829_RF

C3801_RF

L4807_RF

XW3801_RF

XW3802_RF

C3833_RF
C3809_RF

C3824_RF

*
C4231_RF

L4223_RF

C3817_RF

TP05

XW2400

U_DSM_RF

U_ASM_RF_RF

L5129_RF
C5128_RF

C4816_RF
R4815_RF

C3807_RF

C2413
TP03

C4304_RF

U_LB_SW_RF
L4830_RF
L4816_RF

C4502_RF

TP02

L4402_RF

C4101

C4320_RF
FL_GPSRF_RF

C4808_RF
L4810_RF

L3802_RF L3801_RF

C2412

C4103

R2301

C4423_RF

R4116

*

FL_B17LP_RF
C3811_RF
XW3803_RF

C3803_RF

Q2301

C4104

C3808_RF

L4409_RF

*

R4111

C4102
FL4100

TP00

C4117

R2302

TP19

FL4143

C3813_RF

L4904_RF

C4100

XW3500

XW3902_RF

C3917_RF

L4902_RF

FD40B41A_RF

C4111
C4116

FL4110
C2116

*

L4903_RF
L4901_RF

C3902_RF

C3432_RF

L4405_RF
L4406_RF

C2115

C3421_RF
C3411_RF

C3429_RF

C4115
C4110
DZ4101

C4634C4635

C4106

C2113

C3910_RF
C3913_RF
C3916_RF
C3904_RF
R3901_RF

R3103_RF
R3102_RF

C3420_RF

C4600

FL4105
C4105

C3911_RF

C4413_RF

C3303_RF

C4620

U_WFR_RF

L4408_RF

C3409_RF
C3406_RF
C3433_RF

C4601

FL4112
C4112
C3915_RF
C3912_RF

C4042

*

C3601_RF

C4624

FL4107
C4107

L4401_RF

C3403_RF
C3412_RF

R4600
FL4114

C2410C2411

C3905_RF

XW3901_RF

C4697
DZ4604

R3506_RFC3415_RF
C3428_RF

FL4620
XW3900_RF

L4801_RF

C4699
DZ4610
DZ4602
C4696

C4223_RF

Q2300
*

C2306

C3404_RF

F
4
_
R
W
3
1
U_BB_RF

C3401_RF

DZ4603

C3215_RF
C3402_RF

C4206_RF

FL4601

J4600

R2230

C2230

C3901_RF

L4102_RF

C4112_RF
C4113_RF
*

*

SL0501

L4805_RF

L4804_RF
C4425_RF
L4404_RF
C4804_RF

L4403_RF
U_MBPAD_RF
L4524_RF

C3426_RF

C3203_RF
C3438_RF
C3424_RF
C3423_RF

C4640

C3903_RF

C4108_RF

L4216_RF
C4211_RF

C4317_RF

C3427_RF
C3501_RF

C3408_RF

FL4608

C4109_RF

L4316_RF

L4217_RF

PP3171_RF
PP3170_RF

R3104_RF
C3419_RF

C3405_RF

C4641

L4522_RF

L4515_RF

*

C4528_RF

L4507_RF

C4521_RF

FT_41BC_RF

L4517_RF

C3416_RF

C3417_RF

FL4612
C4612
FL4611
C4611

*

FTB40A41A_RF

*
U_HBPAD_RF

C3223_RF

C3422_RF

C4642
FL4641

C4118_RF

C4213_RF

L4506_RF

0

C4651
C4653

FL4642

FL4604

X

C4650

XW3301_RF

C4654

C4652
TP01

FL4605

R4640

L4802_RF
C4805_RF
L4101_RF

U_HBS_RF

R4531_RF
C4500_RF

FR38X40B_RF
L4708_RF
C4532_RF

R3502_RF

C3430_RF
U3501_RF
C3213_RF
C3434_RF
R3501_RF

C3437_RF

C4698
DZ4600

C4710_RF

L4525_RF R4509_RF
L4710_RF

L4709_RF

*

*

PP0620

C3211_RF

C3425_RF

FL4600
FL4603

Y3301_RF
*

R3308_RF
C3301_RF

L4040

R3507_RF

U_EEP_RF

*

FR40A41A_RF

PP0621

C3435_RF
04
3

C4

TP13

DZ4601

C4104_RF

C4107_RF

TP10

C3210_RF

FL4610
C4610

U_2GPA_RF

C4103_RF

L4320_RF
C4318_RF
L4306_RF
L4321_RF
C3821_RF
C3816_RFC3818_RF
C4221_RF
L4221_RF
C4219_RF
C4408_RF

*
DZ3102_RF
C3102_RF

C2310

C2331

C1531

C1530

C1508

R3508_RF
C3224_RF

w
*

C3220_RF

* L3202_RF

C3101_RF

C1526

C3237_RF

C3239_RF

* L3203_RF

C3218_RF

C3231_RF
C3238_RF

C3240_RF

C3209_RF

U_PMICRF_RF

R3312_RF

C3229_RF

* L3201_RF

U_BUFFER_RF

*

w

TP11

R3601_RF

*

L4712_RF
C4507_RF

TP12

C4606_RF

*

*

TP08

TP24

*

U_VLBPAD_RF

TP09

TP15

*

*

TP18

LOW_COAX_RF

R4100_RF

C4230_RF
L4224_RF
C4300_RFC4208_RF
C4227_RF
L4222_RF

5

FL4602

C3413_RF
C3410_RF

U_LBPAD_RF

5

R3301_RF

R3311_RF
C3205_RF
R3305_RF

C3604_RF

SH0500

6

C3201_RF R3307_RF

C3206_RF
R3306_RF

C3603_RF

C4041

4

C3202_RF

C3228_RF

PP3172_RF

PP3112_RF

*

C4309_RF

C

*

FD0505

5

1

R

*

C3219_RF

PP3199_RF PP3197_RF
PP3196_RF PP3198_RF

PP3111_RF

PP3104_RF

0

3

*

C3217_RF
C3226_RF
C3227_RF

C4040

C1528

*

* L3204_RF

C3270_RF

C3204_RF

PP3131_RF

*

C3222_RF C1527

PP3132_RF

*

C3208_RF

C3216_RF

C3221_RF

C3230_RF

C3232_RF

FD0503
PP3140_RF
PP3139_RF

PP3138_RF

*

C1507

*
C1504

TP14

FD0511

*

C1505

TP17

TP07

C2303

C2304

TP06

PP1503
PP1502

PP1501
PP1500

.c

U2300

C2302C2301C2414 R2300 R2303R2320

C2321

C2322C2307R2311R2310

TP16
PP1505
PP1504

PP3115_RF
PP3116_RF

h

C4502 C4501 R4510 C4510

C1561

C0704C0703C0702 C0701

J3101_RF

C4500

R4500

J3100_RF

*
VR3101_RF

R2200

PP1520
R1520R0730C0730

XW3103_RF

C1503

C1543

C2003

in

C1550

C0705

L2012
C2010

C2106

C1542

C0706

C0708

C0707

R1501

C2015

C2017

C2009
C2110

C1501

C3745

C1521

C1522

C3760

C3700

C2016

L2010

C1546

*
C3702

C2024

C2071

*

C3763

C2022

C2026

R0930

R0951

C1243

fi

C0602

C0744

C1330

C1123

L2070

C3742

C0604

C0741

R0945

C0610

R2201

C2131
R2205C2205

R2270
C0612

C1200

*
*
C0611

a

*

C3740

XW1120

R1205 R0411

C3650
U0901

R0950

C1322

C1241

C1154

C0603

R0407 R0408 C2112

C0601

C2200

C2201

*
FL0610

R0910 R0941R0940

*
*
*

6

0

0

2

C1509
C1510

0

C2023

C1104

C1103

*

C1548

C1523

R3735

FD0510

0

C1520

C1540

C1541

*

C2001

C2126

C1506

1

L3700

2

C3746
PP1521
R1521

2

C2132

C2085

C2124

C2051

Y0600

C2018

C1223

C2120

C2050

XW0650

XW0740

C2004

C

C3741

C2030

C1105

R0700

U3700

W

C1122

TP1100

XW2230

2

C2125

C1120

C2080

C2100

C2260

*

C2121

C2088

C1312
PP1003

* C1130

C2043

C2040

R2260

X

C2005

C1125
C2123

* C1136

* C1139

C2041

R0922

2

C2122

PP0902

C1323

* C1141

* C1126

U0600

2

C0742

C2114
PP0610

C0711

W

C2127

C2090 C0620

C0712

X

C0743

* C1222

C0513
C3373

C0709
C0710

4

C2089 C0731 C2091

C2093

C0750 PP0903

* C1127

* C1220

PP1004

*

C3709

C2094

* C1135

* C1128

BS0501

PP0906

2

C3730

* C1132

C0752

* C1203

* C1153

R0900

PP1006

C2240

2

C2092

C3729

* C1129

* C1134

C3130

W

L2020

C3129

X

L2021

* C1221

* C1138

* C1155

C3128

C4205

FL4205

PP3102_RF

R2240

0

C2103
U2000

0

C2007

5

* C1133

C2101

0

* C1131

* C1201

C2270

R0806

C2107
TP5301_RF

PP1010

2

C1121

PP1022
C2202

C1250

R3102

C4201 R5313_RF

PP0901
PP0905
PP0900
R0905
R0901
PP0904

C4716
PP1102

W

* C1137

* C1140

PP1020

PP1103
PP1023
PP3191_RF

X

*

*

C2104

L2050

PP1100

R0902

* C1246

* C1245

* C1109

C3112

FL4220

.c

C1156

PP1101

* C1112

* C1225

* C1226

C4203

XW3600

C1100

* C1317

PP1021
L2030

C3554

C3663

C3601

C3600
C3654
C1302

C0801

* C1106

C0600

* C1115

TP1120

FL1280

C1227

C1101

C1280

* C1107

C0522
C0521

R3729 R3515 C3504 R3550

C3506

PP0908

*
C2025
C0814

C2111

R0600
Y2200

C1249

C1247

R2250

R1020

R1021

C2032

C2044

C1551

C2095

C1228

C1240

* C1108

*
* C1316

C3505

C1150

*

*

C2250

* C1224

* C1113

L2060

FL4222
FL4221
R4220

FL4200

0
1

C2062

C4200

1

C2109

C3111

1

L2080

C0751

* C1114

C3113

W

C1321
C1157

C3653

* C1110

* C1116

C3125

X

C2130

* C1202

* C1117

C2102

C0815

C1151
C3670

* C1111

*

C2060

C4713
FL4713

C3662

C3651

C3661

PP0909

PP09010

U3500

U4000

C4003

L4000

C3640

C4241
C3143

FL3111

*

R3650
C3664

C3144

R3103

C3210
PP4302

C4202

C2108

C0520

R0405

C0523

*

C4007

C1242
C0740

C2061
*

L2041

C0802

L4201

J4200

C4712 R0906

BS0502

PP1002

C1248

*
DZ4711

C3552

R4307

C4317

C4320

C4312

DZ4301

L4301

C4315
*

C3665

R3503

C3602

R3502

D4020

*

*
L2040

C4022

*
D4021

C4006

L4202

SH0501

C4005
C3394

FL4711

C4722

C4023

U4020

XW3620

PP4303

L4200

C4711

C4703

L4020

L4021

C3385

C3384

C3660

*
DZ4710

*

XW4701

XW3660

*

C4002

C4702

C4721
DZ4713

C4302

C4324

*C4314

C3387

C4319
C3611

C3610

C4000

C3386

L3300

*

C2086

C4321

C4322

C4020

C4021

L5303_RF

PP1009

*

FL4702

PP3174_RF C2087
PP3129_RF

U3300

C4327

R4304

U4300
*

R4301

C4301

C5321_RF

C3010

R5309_RF
C5302_RF
C5324_RF
R5302_RF
R5301_RF

*

U0902

C4305
XW4301

U3020

C4303

*

R3020

C5310_RF

R5304_RF

C5322_RF

*

U5302_RF

C3011

*

C5303_RF
C3308

C2099

U3010

C3012

*

C5304_RF
C5330_RF
R5305_RF
R5310_RF
C5317_RF

U5301_RF

C4323

Q4701

C3146

*

L5301_RF

R4710
FL4701

*

C5323_RF

C4710

C4723
C4701

PP1008
R3022
PP1007

PP5303_RF

C3105

*

C4724
PP4304

C3013

C3145

XW3630

C3104

U3200

C4700

R4302

C3127

C3100
C3101

PP4301

TP23

*

C5309_RF

C4720
FL4700

*

L5302_RF
PP5302_RF

FL3100

C3200

FL3104

C4326
FL4720

*

C5308_RF

C4304

C3126

FL3156
DZ3156

PP5304_RF

C4316
C4308

R4720
U4301

PP0907

C3020
R3021

*

C3021
C3022

DZ3151

FL3155
DZ3155

*

L5201_RF

R5316_RF

R5303_RF

TP22

*

T5301_RF

TP21

R0952

*

*
C5201_RF

*

C5311_RF

m

DZ3152
FL3150
DZ3150

TP20

C4306

FL3125
R3143
FL3101
FL3146
FL3102
FL3126
FL3151 L3152
F
R0807

Q3140

C5319_RF
C5313_RF

C
C5314_RF5318_RF

R3203

W
X
C5316_RF
C5312_RF

2

0

C3233

C3203

C3208

C5315_RF

R5208_RF

3

C5204_RF
C3206 C3205

PP3186_RF
PP3124_RF
PP3152_RF
PP3119_RF

L5122_RF

C5205_RF

PP3128_RF

C3209 C3207
C5203_RF

PP3153_RF
PP3154_RF

C3122

C4310

PP3121_RF
R4305
PP3127_RF PP3162_RF
PP3158_RF
PP3163_RF

2
L3205

C3231

C3230
FL3232

PP3122_RF

UP_COAX_RF

C3204

C3232

C3299

C3202

C3201

FL3230

C3220 FL3231

U4302

C3221
X
W
FL3220
3
C3234
2
0
3
FL3201 R3204

C4307

FL3200

C3211

C3106

R3140

L5108_RF

L3204

PP4305

C5109_RF

R4306

*

R5137_RF

L5102_RF
*
L5121_RF

L3203

*

C0542

L3202

PP0700

*

R5101_RF

L5120_RF

R5214_RF

L3201

C5221_RF
C5222_RF

U_SWUANT_RF

*

C0541

FLCELWIF_RF

C5213_RF

C0540
PP1005

C5211_RF

PP0501

U3000

R5102_RF

FLWIFDIP_RF

L5106_RF

L3200

C5202_RF
PP3157_RF

*

U5201_RF

R5201_RF
R5206_RF

C2220

R5202_RF
R5205_RF

C5220_RF
PP4306

*

J4300

C5138_RF

FL5201_RF

C5139_RF
PP3193_RF

UPPER_HB_ANT_RF

C5212_RF

R0501

PP3192_RF

FD0515

*

*
PP3194_RF

1

5

C5110_RF L

*

0

PP3195_RF

*

*

F

R

_

9

*

R0500

R2210
C5130_RF

L5216_RF

R2220

C5215_RF

C2210
R5136_RF

SP0502

L5208_RF


IPHONE SE Schematics_Components.rar > iPhone SE原理图N69 051-00648 4.0.0.pdf

8

7

6

5

4

3

2

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

1

REV

ECN

CK
APPD

DESCRIPTION OF REVISION

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

DATE

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

4

0004752417

ENGINEERING RELEASED

2015-08-24

N69 MLB - EVT
D

D

LAST_MODIFICATION=Wed Aug 19 11:42:47 2015
& lt; CSA & gt;

CONTENTS

SYNC

DATE

PAGE

& lt; CSA & gt;

CONTENTS

SYNC

1

32

4

SYSTEM:N69 SPECIFIC [4]

33

49

page1

6

SYSTEM:MECHANICAL
SOC:JTAG,USB,XTAL

34

50

35

51

CELL:ALIASES

6

7

SOC:PCIE

36

AP INTERFACE & DEBUG CONNECTORS

7

8

SOC:CAMERA & DISPLAY

37

BASEBAND PMU (1 0F 2)

8

9

SOC:SERIAL & GPIO

38

BASEBAND PMU (2 OF 2)

9

10

SOC:OWL

39

BASEBAND (1 OF 2)

10

11

SOC:POWER (1/3)

40

BASEBAND (1 OF 2)

11

12

SOC:POWER (2/3)

41

MOBILE DATA MODEM (2 OF 2)

12

13

SOC:POWER (3/3)

42

RF TRANSCEIVER (1 0F 3)

13

15

NAND

43

RF TRANSCEIVER (2 OF 3)

14

20

SYSTEM POWER:PMU (1/3)

44

RF TRANSCEIVER (3 OF 3)

15

21

SYSTEM POWER:PMU (2/3)

45

QFE DCDC

16

22

SYSTEM POWER:PMU (3/3)

46

2G PA

17

23

SYSTEM POWER:CHARGER

47

VERY LOW BAND PAD

18

24

SYSTEM POWER:BATTERY CONN

48

LOW BAND PAD

19

30

SENSORS:MOTION SENSORS

49

20

31

CAMERA:FOREHEAD FLEX B2B

50

21

32

CAMERA:REAR CAMERA B2B

51

22

33

CAMERA:STROBE DRIVER

52

23

35

AUDIO:CALTRA CODEC (1/2)

53

24

36

AUDIO:CALTRA CODEC (2/2)

25

37

AUDIO:SPEAKER DRIVER

26

40

DISPLAY:POWER

27

41

MESA POWER AND IO FILTERS

28

42

DISPLAY FLEX

29

43

D403 (TOUCH B2B, DRIVER ICS)

30

45

I/O:TRISTAR 2

DATE

BASEBAND:RADIO SYMBOL

5

5

A

SYSTEM:BOM TABLES

4

SCH
BRD
MCO
BOM
BOM
BOM
BOM
BOM
BOM

31

3

3

051-00648
820-00282
056-01352
639-00931
639-01012
639-01231
639-01232
639-01271
639-01272

46

I/O:DOCK FLEX B2B

m

I/O:BUTTON FLEX B2B

o

.c

x

fi

a
in
h

HIGH BAND PAD
ANTENNA SWITCH
HIGH BAND SWITCH
RX DIVERSITY

GPS

56

ANTENNA FEEDS

57

WIFI/BT: MODULE AND FRONT END

58

STOCKHOLM

59

OMIT_TABLE_RF

60

w

RX DIVERSITY (2)

55

w

C

MID BAND PAD

54

w

B

TABLE OF CONTENTS

2

C

1

.c

PAGE

Radio Subdesign Ports

B

(N69 BETTER)
(N69H BETTER)
(N69 BEST)
(N69H BEST)
(N69 ULTRA)
(N69H ULTRA)

TABLE OF CONTENTS

A

DRAWING TITLE

SCH,MLB,N69
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

1 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

1 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

8

7

6

SCHEMATIC & PCB BOM CALLOUTS

5

4

3

QTY

DESCRIPTION

1

SCH,MLB,N69

1

ALTERNATE BOM OPTIONS
TABLE_5_HEAD

PART#

2

REFERENCE DESIGNATOR(S)

CRITICAL

CRITICAL

TABLE_ALT_HEAD

BOM OPTION

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

?
138S00032

138S0831

ALTERNATE

C0610

TY,2.2UF,0201

138S00049

138S0831

ALTERNATE

C0610

KYOCERA,2.2UF,0201

TABLE_5_ITEM

051-00648

SCH

TABLE_ALT_ITEM

TABLE_5_ITEM

820-00282

1

PCBF,MLB,N69

PCB

CRITICAL

?

NOT ALL REFERENCE DESIGNATORS LISTED.
USED 91 TIMES IN DESIGN.

TABLE_ALT_ITEM

USED 91 TIMES IN DESIGN.

TABLE_5_ITEM

825-6838

1

EEEE CODE FOR 639-00931 16GB

EEEE_GH6K

CRITICAL

EEEE_16G

825-6838

1

EEEE CODE FOR 639-01012 16GB

EEEE_GJYD

CRITICAL

EEEE_16GH

TABLE_ALT_ITEM

155S0660

155S0513

ALTERNATE

FL3100

USED 5 TIMES IN DESIGN.

MURATA,FERR,22-OHM

TABLE_5_ITEM

TABLE_ALT_ITEM

138S00005

138S00003

ALTERNATE

C1500

USED 61 TIMES IN DESIGN.

TY,15UF,0402

D

TABLE_5_ITEM

D

825-6838

1

EEEE CODE FOR 639-01231 32GB

EEEE_GN7J

CRITICAL

EEEE_32G

TABLE_ALT_ITEM

138S00048

138S00003

ALTERNATE

C1500

KYOCERA,15UF,0402

118S0764

118S0717

ALTERNATE

R2250

PANASONIC,3.92K-OHM,0201

USED 61 TIMES IN DESIGN.

TABLE_5_ITEM

825-6838

1

EEEE CODE FOR 639-01232 32GB

EEEE_GN7H

CRITICAL

EEEE_32GH

TABLE_ALT_ITEM

USED 1 TIME IN DESIGN.

TABLE_5_ITEM

825-6838

1

EEEE CODE FOR 639-01271 64GB

CRITICAL

EEEE_GP3V

EEEE_64G

TABLE_ALT_ITEM

138S00006

138S0835

ALTERNATE

C1106

TY,4.3UF,0402

USED 20 TIMES IN DESIGN.

TABLE_5_ITEM

825-6838

1

EEEE CODE FOR 639-01272 64GB

EEEE_GP3W

CRITICAL

EEEE_64GH

TABLE_ALT_ITEM

152S2052

152S1929

ALTERNATE

L2060

CYNTEC,1UH,1608

USED 1 TIME IN DESIGN.
TABLE_ALT_ITEM

155S0773

S3E NAND BOM OPTIONS

155S0453

ALTERNATE

FL3101

TY,FERR,120-OHM,01005

377S0168

377S0140

ALTERNATE

DZ3150

TDK,VARISTOR,6.8V,100PF,01005

USED 9 TIMES IN DESIGN.

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

TABLE_ALT_ITEM

155S00067

BOM OPTION

155S0581

ALTERNATE

FL4200

TDK,FERR,240-OHM,0201

USED 5 TIMES IN DESIGN.

TABLE_5_ITEM

335S00054

1

U1500

NAND,1YNM,16GX8,S3E,64G,T,SLGA70

CRITICAL

TABLE_ALT_ITEM

NAND_16G

155S00012

155S00009

ALTERNATE

L3100

MURATA,CHOKE,65-OHM,0605

USED 10 TIMES IN DESIGN.

TABLE_5_ITEM

335S00072

1

U1500

NAND,1YNM,32GX8,S3E,64G,T,SLGA70

CRITICAL

TABLE_ALT_ITEM

NAND_32G

138S0706

138S0739

ALTERNATE

C5302_RF

USED 4 TIMES IN DESIGN.

MURATA,CAP,CER,1UF,20%,10V,X5R,0201

TABLE_5_ITEM

335S00076

1

USED 35 TIMES IN DESIGN.
TABLE_ALT_ITEM

U1500

NAND,1YNM,64GX8,S3E,TLC,128G,H,ULGA70

CRITICAL

TABLE_ALT_ITEM

NAND_64G

138S0739

138S0945

C5302_RF

ALTERNATE

USED 4 TIMES IN DESIGN.

KYOCERA,CAP,CER,1UF,20%,10V,X5R,0201
TABLE_ALT_ITEM

155S00095

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

155S00068

ALTERNATE

FL1280

USED 1 TIME IN DESIGN.

FERR BD,100 OHM,25%,100MA,2 OHM,01005

COMMENTS:

TABLE_ALT_ITEM

138S0648

138S0652

ALTERNATE

C3650

TY,4.7UF,0402

USED 9 TIMES IN DESIGN.

TABLE_ALT_ITEM
TABLE_ALT_ITEM

335S00071

335S00054

NAND_16G

U1500

HYNIX 16G SLGA70

132S0400

132S0436

ALTERNATE

C1280

USED 1 TIME IN DESIGN.

CAP,CER,X5R,0.22UF,20%,6.3V,01005

TABLE_ALT_ITEM
TABLE_ALT_ITEM

335S00085

335S00072

NAND_32G

U1500

TOSHIBA 16G SLGA70

155S0960

155S0941

ALTERNATE

FL3151

USED 8 TIMES IN DESIGN.

FERR BD,70 OHM,25%,300MA,0.4 DCR,01005
TABLE_ALT_ITEM

138S00024

138S0986

ALTERNATE

C5201_RF

USED 1 TIME IN DESIGN.

CAP,CER,3-TERM,7.5UF,20%,4V,0402
TABLE_ALT_ITEM

335S00066

335S0946

ALTERNATE

U0900

USED 1 TIME IN DESIGN.

IC,EEPROM,16KX8,1.8V,I2C,WLCSP4
TABLE_ALT_ITEM

CARBON BOM OPTIONS
DESCRIPTION

Q2300

DIODES INC. ACT DIODE

USED 1 TIME IN DESIGN.

REFERENCE DESIGNATOR(S)

343S0688

343S0638

ALTERNATE

U4301

CUMULUS 2ND FLOW

BOM OPTION

m

QTY

ALTERNATE

TABLE_ALT_ITEM

TABLE_5_HEAD

PART#

376S00047

C

USED 1 TIME IN DESIGN.

TABLE_ALT_ITEM

138S00022

TABLE_5_ITEM

338S00017

1

U3010

IC,CARBON,MPU-6700-12,LGA16

138S0867

ALTERNATE

C1100

TY,10UF,0402

INVENSENSE_CARBON

o

C

376S00106

USED 51 TIMES IN DESIGN.

TABLE_ALT_ITEM

138S00020

TABLE_5_ITEM

338S1163

1

U3020

IC,ACCEL,3-AXIS,DIG,BMA282,LGA14

138S0867

ALTERNATE

C1100

MURATA,10UF,0402

INVENSENSE_CARBON

132S0316

1

CAP,CER,X5R,0.1UF,20%,6.3V,01005

C3020

INVENSENSE_CARBON

138S0692

1

CAP,CER,X5R,1UF,20%,6.3V,0201

C3021

INVENSENSE_CARBON

132S0316

1

CAP,CER,X5R,0.1UF,20%,6.3V,01005

C3022

INVENSENSE_CARBON

117S0202

1

RES,MF,20OHM,5%,1/32W,01005

R3020

INVENSENSE_CARBON

117S0202

1

RES,MF,20OHM,5%,1/32W,01005

R3021

INVENSENSE_CARBON

117S0202

1

RES,MF,20OHM,5%,1/32W,01005

R3022

USED 51 TIMES IN DESIGN.

.c

TABLE_5_ITEM

INVENSENSE_CARBON

TABLE_5_ITEM

x

TABLE_5_ITEM

fi

TABLE_5_ITEM

TABLE_5_ITEM

PMU/SOC BOM OPTIONS

a

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

1

U3010

IC,CARBON,MPU-6800-00,LGA16

INVENSENSE_CARBON_1_1

PART#

QTY

DESCRIPTION

in

338S00087

REFERENCE DESIGNATOR(S)

BOM OPTION
TABLE_5_ITEM

339S00121

POP,MALTA+2GB 25NM DDR,A1,M,DEV

U0600

MALTA

118S00009

1

RES,MF,3.01KOHM,1%,1/32W,01005

R0730

MALTA

131S0307

1

CAP,CER,NPO/COG,100PF,5%,16V,01005

C0730

NOSTUFF

118S00025

1

RES,MF,330OHM,1%,1/32W,01005

R0651

MALTA

132S0316

1

CAP,CER,X5R,0.1UF,20%,6.3V,01005

C0731

NOSTUFF

338S00170

1

U2000

MALTA

DESCRIPTION

h

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

w

QTY

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

PART#

TABLE_5_ITEM

.c

COMPASS PART NUMBER

1

IC,PMU,ANTIGUA,D2255A1,OTP-BG

1

U3000

IC,COMPASS,MAGNESIUM,601A-19,FLGA14

COMMON

B

PART#

w

TABLE_5_ITEM

338S00084

QTY

TABLE_5_HEAD

DESCRIPTION

REFERENCE DESIGNATOR(S)

B

BOM OPTION

w

TABLE_5_ITEM

339S00096

POP,MAUI+2GB 25NM DDR,C0,H,DEV

U0600

MAUI

118S0631

1

RES,MF,100OHM,1%,1/32W,01005

R0730

MAUI

131S0307

1

CAP,CER,NPO/COG,100PF,5%,16V,01005

C0730

MAUI

117S0161

1

RES,MF,0OHM,1/32W,01005

R0651

MAUI

132S0316

1

CAP,CER,X5R,0.1UF,20%,6.3V,01005

C0731

MAUI

338S00171

SHIELD PART NUMBERS

1

1

IC,PMU,ANTIGUA,D2255A1,OTP-YG

U2000

MAUI

TABLE_5_ITEM

TABLE_5_HEAD
TABLE_5_ITEM

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION
TABLE_5_ITEM

TABLE_5_ITEM

806-03629

1

SHIELD,EMI,UPPER FRONT,N69

SH0500

COMMON

806-03630

1

SHIELD,EMI,LOWER FRONT,N69

SH0501

COMMON

806-03556

1

SHIELD,EMI,BACK,N69

SH0503

COMMON

TABLE_5_ITEM
TABLE_5_ITEM

TABLE_5_ITEM
TABLE_5_ITEM



POWER INDUCTOR ALTERNATES

SOC ALTERNATES
TABLE_ALT_HEAD

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

152S00117

152S00074

?

L2000

TAIYO 2016 1.0UH

152S00121

152S00081

?

L2001

TAIYO 2012 0.47UH

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

339S00122

339S00121

ALTERNATE

U0600

MALTA DEV, H DRAM

339S00123

339S00121

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

339S00097

339S00096

ALTERNATE

U0600

MAUI DEV, M DRAM

339S00098

339S00096

ALTERNATE

U0600

MAUI DEV, S DRAM

TABLE_ALT_ITEM
TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

152S00120

152S00077

?

L2070

TAIYO 2016 1.0UH 0.65MM

152S00118

152S00075

?

L3700

TAIYO 2016 1.2UH

152S00123

152S1936

?

L4020

TAIYO 3225 15UH

TABLE_ALT_ITEM
TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

A

TABLE_ALT_ITEM

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SYSTEM:BOM TABLES
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

3 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

2 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

TESTPOINTS

2

N69 I2C DEVICE MAP
I2C BUS

BINARY

ANTIGUA PMU

1110100X

0X74

0XE8

CHESTNUT

0100111X

0X27

0X4E

BACKLIGHT

1100010X

0X62

0XC4

TIGRIS

1110101X

0X75

0XEA

SPEAKER AMP

1000000X

0X40

0X80

TRISTAR

0011010X

0X1A

0X34

I2C2

ALS

0101001X

0X29

0X52

OWL

UNUSED

N/A

N/A

N/A

AMUX

TP00
1

D

DEVICE

I2C0

POWER
A

TP-P6

POWER GROUND

TP16
1

PMU_AMUX_AY

16

TP01
1

A

TP-P6

VBUS

16

TP17
1

PMU_AMUX_BY

A

TP-P55
ROOM=TEST

MOJAVE

TP02
1

PP_BATT_VCC

A

TP-P6

ROOM=TEST

TP03
1

VBATT

27 26

TP18
1

MESA_TO_BOOST_EN

A

TP-P55

A

ROOM=TEST

TP-P6

ROOM=TEST
27 26

TP05
1

TP24
1

TP-P55

TP-P55

ROOM=TEST

TP19
1

PP11V3_MESA

A

TP-P55

TP 24 FOR USB
FIXTURE SI

ROOM=TEST

A

D

TP-P55

ROOM=TEST

33 18 17

8-BIT HEX

ROOM=TEST

I2C1

PP5V0_USB

7-BIT HEX

A

ROOM=TEST

31 30 17

1

A

ROOM=TEST

LCM
28

REAR CAM

TBD

TBD

1100011X

0X63

0XC6

FRONT CAM

TP20
1

PP_LCM_BL_CAT1_CONN

TBD

LED DRIVER

ISP I2C0

0110110X

0X36

0X6C

N/A

N/A

A

TP-P55
ROOM=TEST

RESET
A

TP-P55
ROOM=TEST
28

TP22
1

PP_LCM_BL_ANODE_CONN

A

TP-P55

DFU
ROOM=TEST

PP07

PP1V8

TP23
1

LCD_TO_AP_PIFA_CONN

A

TP-P55

A

TP-P55

28 21 20 14 13 12 9 8 7 6 5 3
29

28

1. FROM OFF MODE SHORT TP07 TO PP07
2. PLUG IN E75 CABLE TO FORCE DFU

P4MM-NSM
SM
1
PP

in

P4MM-NSM
SM
1
PP

.c

E75
31 30

TP08
1

A

TP-P55
ROOM=TEST

w

TRISTAR USB

TP09
1

A

TP-P55

B

ROOM=TEST

TP10
1

A

TP-P55

90_TRISTAR_DP2_CONN_N

8 OUT

8 OUT

PP_TRISTAR_ACC2

BOARD_REV2
BOARD_REV1
BOARD_REV0

8 OUT

5%

ROOM=SOC

1
MF

5%

2 1.00K
1/32W

PP1V8

0xA2

3 5 6 7 8 9 12 13 14 20 21 28
29

2 1.00K
1/32W

ROOM=SOC

1
MF

5%

2 1.00K
1/32W

B

ROOM=SOC

1
MF

5%

2 1.00K
1/32W

BOARD_REV[3:0]
FLOAT=LOW, PULLUP=HIGH
1111
PROTO0 MLB
1110
PROTO1
1101
PROTO2
1100
EVT
XXXX
CARRIER
XXXX
DVT

R0404

BOARD_ID4

01005

ROOM=SOC

1
MF

5%

2 1.00K
1/32W

SELECTED -- & gt;

NOSTUFF
8 OUT

TRISTAR ACCESSORY ID
ACCESSORY POWER

R0405

BOARD_ID3

01005

ROOM=SOC

1
MF

5%

2 1.00K
1/32W

BOARD_ID[4:0]

NOSTUFF
8

TP-P55

TP14
1

A

BI

R0406

BOARD_ID2

01005

R0407

8

01005

TP-P55
ROOM=TEST

TRISTAR_CON_DETECT_L

R0403
01005

ROOM=TEST

31 30

ROOM=SOC

1
MF

NOSTUFF

A

A

R0402
01005

TP12
1
TP13
1

R0401
01005

A

ROOM=TEST

R0400
01005

TP11
1

TP-P55

31 30

0x51

NOSTUFF

ROOM=TEST

PP_TRISTAR_ACC1

1010001X

NOSTUFF

TP-P55

31 30

BOARD_REV3

TRISTAR DEBUG UART

ROOM=TEST

31 30

8 OUT

w

90_TRISTAR_DP2_CONN_P

31 30

8 OUT

w

90_TRISTAR_DP1_CONN_N

31 30

SEP EEPROM

h

ROOM=TEST

90_TRISTAR_DP1_CONN_P

SEP I2C

BOOTSTRAPPING:BOARD REV
BOARD ID
BOOT CONFIG

a

PP08

DFU_STATUS

C

ROOM=TEST

ROOM=TEST

8

N/A

x

FORCE_DFU

FORCE DFU PROCEDURE:

fi

8

ROOM=TEST

TP07
1

UNUSED

TOUCH I2C

ROOM=TEST

SOC & BB RESET

m

TP06
1

A

TP-P55

o

PMU_TO_SYSTEM_COLD_RESET_L

PP_LCM_BL_CAT2_CONN

.c

C

16 9 5

28

ISP I2C1

TP21
1

ROOM=SOC

1
MF

5%

ROOM=SOC

1
MF

5%

2 1.00K
1/32W

FLOAT=LOW, PULLUP=HIGH
00010 N69 MLB
00011 N69 DEV

SELECTED -- & gt;

BOOT_CONFIG[2:0]

2 1.00K
1/32W

FLOAT=LOW, PULLUP=HIGH
000
SPI0
001
SPI0 TEST MODE
010
NVME0 x2 MODE
011
NVME0 x2 TEST MODE
100
NVME0 x1 MODE
101
NVME0 x1 TEST MODE
110
SLOW SPI0 TEST MODE
111
FAST SPI0 TEST MODE

NOSTUFF
8 OUT

TP15
1

R0408

BOARD_ID0

01005

ROOM=SOC

1
MF

5%

2 1.00K
1/32W

SELECTED -- & gt;

A

TP-P55
ROOM=TEST

NOSTUFF
8 OUT

BOOT_CONFIG2

01005

A
8 OUT

8

R0409

BOOT_CONFIG1

R0410
01005

BOOT_CONFIG0

R0411
01005

ROOM=SOC

1
MF

5%

ROOM=SOC

1
MF

5%

ROOM=SOC

1
MF

5%

2 1.00K
1/32W
2 1.00K
1/32W

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SYSTEM:N69 SPECIFIC [4]
DRAWING NUMBER

2 1.00K
1/32W

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:
RESISTOR
STUFF = HIGH '1'
RESISTOR NOSTUFF = LOW '0'

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

4 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

3 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

FIDUCIALS

SHIELDS

BOARD STANDOFFS

AND AC COUPLING CAPS FOR
COMPASS RETURN CURRENTS

FD0501
FID

D

TOP-SIDE, EAST

UPPER FRONT SHIELD
1

EAST_STANDOFF_AC_GND_SCREW

1

ROOM=ASSEMBLY

FD0502

SH0500

FID

SM
1

C0510
100PF

C0511

1

5%

1

+/-0.1PF
16V
2 CERM
01005

56PF

5%
16V
2 NP0-C0G
01005

C0512

1

3.3PF

2 16V
NP0-C0G
01005

C0513

BS0501

56PF
01005

WEST_STANDOFF_AC_GND_SCREW
1

100PF

C0521

1

56PF

5%
16V
2 NP0-C0G
01005

C0522

1

3.3PF

C0523

FID

0P5SM1P0SQ-NSP
1

ROOM=ASSEMBLY

SH0501

FD0505

SM

FID

0P5SM1P0SQ-NSP
1

SHLD-EMI-LOWER-FRONT-N69
OMIT_TABLE

1

ROOM=ASSEMBLY

FD0510

BS0502

FID

STDOFF-2.7OD1.4ID-1.04H-SM-1

0P5SQ-SMP3SQ-NSP
1

56PF

+/-0.1PF
16V
2 CERM
01005

5%
2 16V
NP0-C0G
01005

FD0503

LOWER FRONT SHIELD
TOP-SIDE, WEST

C0520

ROOM=ASSEMBLY

5%

2 16V
NP0-C0G

1

1

0P5SM1P0SQ-NSP
1

SHLD-EMI-UPPER-FRONT-N69
OMIT_TABLE

STDOFF-2.7OD1.4ID-1.04H-SM-1

5%

2 16V
NP0-C0G

ROOM=ASSEMBLY

PLATED SHIELD SLOT

01005

D

0P5SM1P0SQ-NSP
1

FD0511

SL0501
TH-NSP

FID

1

0P5SQ-SMP3SQ-NSP
1

SL-1.20X0.40-1.50X0.70-NSP

ROOM=ASSEMBLY

FD0512

m

FID

SP0502

SPRING-SUPER-COWLING-GROUND-X145
1

FID

0P5SQ-SMP3SQ-NSP
1

ROOM=ASSEMBLY

FD0515

x

CLIP-SM

FD0514

.c

TOP-SIDE, GROUND SPRING

FID

fi

0P5SQ-SMP3SQ-NSP
1

a

ROOM=ASSEMBLY

FD0504
FID

in

0P5SM1P0SQ-NSP
1

ROOM=ASSEMBLY

FD0516

h

NORTH WIFI UNDERFILL BLOCKING

FID

CKPLUS_WAIVE=TERMSHORTED

1

MF

R0501
01005

2

0%

1

MF

0.00

1/32W
2

0%

.c

01005

0P5SQ-SMP3SQ-NSP
1

0.00

ROOM=ASSEMBLY

w

R0500

C

ROOM=ASSEMBLY

o

C

0P5SQ-SMP3SQ-NSP
1

1/32W

w

CKPLUS_WAIVE=TERMSHORTED

B

w

B

COMPASS AC GROUNDING CAPS
COMPASS_AC_GND_SCREW
1

C0540
0.01UF

10%
25V
2 X5R-CERM
0201

1

C0541

1

2%

2%
50V
2 NP0-C0G-CERM
0201

100PF

2 50V
C0G

0201

C0542
56PF

1

1

SM
PP

PP0501
P4MM-NSM

C0543
3.3PF

+/-0.1PF
25V
2 C0G-CERM
0201

ROOM=ASSEMBLY
ROOM=ASSEMBLYROOM=ASSEMBLY
ROOM=ASSEMBLY

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SYSTEM:MECHANICAL
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

5 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

4 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - USB, JTAG, XTAL
D

D

VDD12_PLL_LPDP:1.14-1.26V @2mA MAX
VDD12_PLL_SOC: 1.14-1.26V @12mA MAX
VDD12_PLL_CPU: 1.14-1.26V @2mA MAX
VDD18_USB: 1.71-1.89V @20mA MAX
VDD18_XTAL:1.62-1.98V @2mA MAX

R0600
15 7 6

PP1V2

1

0.00

2

0%
1/32W
MF
01005

PP1V2_PLL

PP1V8
1

C0600
0.1UF

ROOM=SOC

20%
2 6.3V
X5R-CERM
01005

1

C0601

1

0.1UF

1

0.01UF

ROOM=SOC

C0603

1

0.01UF

ROOM=SOC

C0612

FL0610

1KOHM-25%-0.2A

0.1UF

20%
2 6.3V
X5R-CERM
01005

10%
2 6.3V
X5R
01005

10%
2 6.3V
X5R
01005

20%
2 6.3V
X5R-CERM
01005

ROOM=SOC

C0602

1

PP1V8_XTAL

ROOM=SOC

ROOM=SOC

1

C0611

1

C0610
ROOM=SOC

ROOM=SOC

PP3V3_USB

SM

PP

1

20%
6.3V
2 X5R-CERM
01005

m

ROOM=SOC

OMIT_TABLE

CRITICAL

U0600

ROOM=SOC

MAUI-2GB-25NM-DDR-H
BI

33

BI

50_AP_BI_BB_HSIC0_DATA
50_AP_BI_BB_HSIC0_STB

UH1_HSIC0_DATA
UH1_HSIC0_STB

ANALOGMUX_OUT AP24

FCMSP
SC58980X0B-A040

AP_TO_PMU_AMUX_OUT

SWD_DOCK_BI_AP_SWDIO
SWD_DOCK_TO_AP_SWCLK

16 9 3

IN

PMU_TO_SYSTEM_COLD_RESET_L

30 26 16 9

IN

PMU_TO_OWL_ACTIVE_READY

30

BI
30

ROOM=SOC

PP0610

16

P3MM-NSM
SM
1

OUT

AC31
H33
AR23

AP_TO_PMU_TEST_CLKOUT

B

13

OUT

AN23

AP_TO_NAND_RESET_L

USB_VBUS AP19

CFSB
TST_CLKOUT

H32

HOLD_RESET

AF6

90_USB_AP_DATA_P
90_USB_AP_DATA_N

L0601

BI
BI

15NH-250MA
1

30
30

2
0201 ROOM=TRISTAR

USB_VBUS_DETECT

IN

17

USB_ID AR19NC

COLD_RESET*

S3E_RESET*

0201

a

JTAG_TRST*
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK

2

ROOM=TRISTAR

90_USB_AP_DATA_AP_P
90_USB_AP_DATA_AP_N

in

JTAG_SEL

PP

1

h

IN

AC32
NC
AB31
NC
AA32
NC
AB32
AA31

USB_D_P AT20
USB_D_N AT19

.c

Y32

ROOM=SOC

ROOM=SOC

USB_REXT AP18

USB_REXT
1

w

1

L0602

15NH-250MA

R0640
200

1%
1/32W
MF
2 01005

w

SM

PP

UH2_HSIC1_DATA
UH2_HSIC1_STB

w

C16
NC
D15
NC

16

OUT

fi

SYM 1 OF 14

PP0621
P2MM-NSM

C

x

33

AN22
AN21

VDD33_USB:3.14-3.46V @5mA MAX

0.1UF

o

PP0620
P2MM-NSM

C0620

15

.c

C

VDD18_XTAL AL34

ROOM=PMU

VDD33_USB AN20

0201

VDD18_USB AL21

20%

2 6.3V
X5R

VDD12_PLL_LPDP F22
U20
T19
VDD12_PLL_SOC
W19
VDD12_PLL_CPU AF13

VDD12_UH1_HSIC0 AP21
VDD12_UH2_HSIC1 C15

1

0.22UF

ROOM=SOC

20%
2 6.3V
X5R-CERM
0201

20%
2 6.3V
X5R-CERM
01005

C0604

2
0201

2.2UF

0.1UF

1

3 6 7 8 9 12 13 14 20 21 28 29

B

ROOM=SOC

TESTMODE

AL22
AG25

WDOG Y33

XI0 AK35
XO0 AL35

FUSE1_FSRC
FUSE2_FSRC

AP_TO_PMU_WDOG_RESET
45_XTAL_AP_24M_IN
45_XTAL_AP_24M_OUT

OUT

16

1

R0650

CRITICAL

511K

2

1%
1/32W
MF
01005

ROOM=SOC

ROOM=SOC

R0651
1

0.00

2

0%
1/32W
MF
01005
ROOM=SOC

OMIT_TABLE

Y0600

1.60X1.20MM-SM

24.000MHZ-30PPM-9.5PF-60OHM
1
3
45_SOC_24M_O
1

C0650

2

4
1

12PF

C0651
12PF

5%
2 16V
CERM
01005

2

ROOM=SOC

45_AP_XTAL_GND

5%
16V
CERM
01005

XW0650

SHORT-10L-0.1MM-SM
1
2

ROOM=SOC

ROOM=SOC

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SOC:JTAG,USB,XTAL
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

6 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

5 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - PCIE INTERFACES
VDD12_PCIE_REFBUF:1.08-1.26V @50mA MAX
VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX
VDD12_PCIE:
1.14-1.26V @115mA MAX

VDD085_PCIE:0.802-TBDV @TBDmA MAX

PP1V2_PCIE_TXPLL

2

PP_FIXED

ROOM=SOC

20%
2 6.3V
X5R-CERM
0201
ROOM=SOC

C0741
1.0UF

20%
2 6.3V
X5R
0201-1

1

C0742

1

0.1UF

20%
2 6.3V
X5R-CERM
01005

ROOM=SOC

C0744

1

0.1UF

0.1UF

20%
2 6.3V
X5R-CERM
01005

ROOM=SOC

C0743

20%
2 6.3V
X5R-CERM
01005
ROOM=SOC

1

C0731
0.1UF

20%
2 6.3V
X5R-CERM
01005
ROOM=SOC

OMIT_TABLE

PCIE_EXT_C

OUT

C0704
ROOM=SOC

C0705
13

IN

13

IN

90_PCIE_NAND_TO_AP_RXD1_P
90_PCIE_NAND_TO_AP_RXD1_N

ROOM=SOC

C0706
ROOM=SOC

C0707
13

OUT

13

OUT

90_PCIE_AP_TO_NAND_TXD1_P
90_PCIE_AP_TO_NAND_TXD1_N

ROOM=SOC

C0708
ROOM=SOC

C0709
PCIE LINK 1

33

IN

33

IN

90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N

ROOM=SOC

C0710
ROOM=SOC

C0711
33

OUT

33

OUT

90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N

ROOM=SOC

C0712
ROOM=SOC

1
20%
6.3V

1
20%
6.3V

1
20%
6.3V

1
20%
6.3V

1
20%
6.3V

1
20%
6.3V

1
20%
6.3V

1
20%
6.3V

1
20%
6.3V

2

0.1UF

AT32
AR32

0.1UF

90_PCIE_NAND_TO_AP_RXD1_C_P
90_PCIE_NAND_TO_AP_RXD1_C_N

AM28
AN28

PCIE_RX1_P
PCIE_RX1_N

0.1UF

X5R-CERM
01005

2

0.1UF

90_PCIE_AP_TO_NAND_TXD1_C_P
90_PCIE_AP_TO_NAND_TXD1_C_N

AT31
AR31

90_PCIE_WLAN_TO_AP_RXD_C_P
90_PCIE_WLAN_TO_AP_RXD_C_N

AM27
AN27

PCIE_RX2_P
PCIE_RX2_N

90_PCIE_AP_TO_WLAN_TXD_C_P
90_PCIE_AP_TO_WLAN_TXD_C_N

AT28
AR28

PCIE_TX2_P
PCIE_TX2_N

PCIE_TX1_P
PCIE_TX1_N

X5R-CERM
01005

2

0.1UF

X5R-CERM
01005

2

0.1UF

X5R-CERM
01005

2

0.1UF

X5R-CERM
01005

2

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N

OUT

33

OUT

33

0.1UF

P2MM-NSM
SM
1
P2MM-NSM
SM
1

PCIE_CLKREQ0*
PCIE_CLKREQ1*
PCIE_CLKREQ2*
PCIE_CLKREQ3*

PP0700
PP0701
PP1V8

PCIE_REF_CLK3_P AM31NC
PCIE_REF_CLK3_N AN31NC

X5R-CERM
01005

2

13

0.1UF

X5R-CERM
01005

2

OUT

PCIE_REF_CLK2_P AM32
NC
PCIE_REF_CLK2_N AN32NC

X5R-CERM
01005

2

13

PP

SYM 2 OF 14
ROOM=SOC

PCIE_TX0_P
PCIE_TX0_N

OUT

PP

FCMSP
SC58980X0B-A040

90_PCIE_AP_TO_NAND_TXD0_C_P
90_PCIE_AP_TO_NAND_TXD0_C_N

90_PCIE_AP_TO_NAND_REFCLK_P
90_PCIE_AP_TO_NAND_REFCLK_N

m

13

MAUI-2GB-25NM-DDR-H

0.1UF

X5R-CERM
01005

ROOM=SOC

PCIE_REF_CLK1_P AN34
PCIE_REF_CLK1_N AP34

U0600

X5R-CERM
01005

2

ROOM=SOC

1

R0720

1

5%
1/32W
MF
01005

2

ROOM=SOC

3 5 7 8 9 12 13 14 20 21 28 29

C

R0721

100K

o

OUT

1
20%
6.3V

20%
2 6.3V
X5R-CERM
0201

AN35
AP35

PCIE_REF_CLK0_P
PCIE_REF_CLK0_N

CRITICAL

.c

C

PCIE LINK 0

13

ROOM=SOC

0.1UF

PCIE_RX0_P
PCIE_RX0_N

x

C0703
90_PCIE_AP_TO_NAND_TXD0_P
90_PCIE_AP_TO_NAND_TXD0_N

20%
6.3V

2

2.2UF

20%
2 6.3V
X5R
0201-1

100K
5%
1/32W
MF
01005

2

ROOM=SOC

AT11
AP12
AR12
NC
AT12
NC

PCIE_NAND_TO_AP_CLKREQ_L
PCIE_WLAN_TO_AP_CLKREQ_L

AR10
AT10
AP11
NC
AR11
NC

PCIE_AP_TO_NAND_RESET_L
PCIE_AP_TO_WLAN_RESET_L

BI

13

BI

33

fi

ROOM=SOC

1

90_PCIE_NAND_TO_AP_RXD0_C_P
90_PCIE_NAND_TO_AP_RXD0_C_N

a

C0702

C0750

OMIT_TABLE
AM30
AN30

PCIE_PERST0*
PCIE_PERST1*
PCIE_PERST2*
PCIE_PERST3*

in

IN

1

1.0UF

OUT

13

OUT

33

h

13

90_PCIE_NAND_TO_AP_RXD0_P
90_PCIE_NAND_TO_AP_RXD0_N

X5R-CERM
01005

ROOM=SOC

C0751

PCIE_EXT_C

0.1UF

X5R-CERM
01005

.c

IN

20%
6.3V

2

20%
2 6.3V
X5R-CERM
01005

1

1

PCIE_EXT_REF_CLK_P AR33
PCIE_EXT_REF_CLK_N AT33

B

PCIE_RX3_P
PCIE_RX3_N

w

AM26
NC
AN26
NC

AT26
NC
AR26
NC

2

5%
1/32W
MF
01005

ROOM=SOC

R0701
100K

2

5%
1/32W
MF
01005

ROOM=SOC

B

PCIE_RX_TX_BYPASS_CLK_P AT29
PCIE_RX_TX_BYPASS_CLK_N AR29

PCIE_RX4_P
PCIE_RX4_N

AR24
NC
AT24
NC

1

PCIE_TX3_P
PCIE_TX3_N

AM25
NC
AN25
NC

R0700
100K

w

13

ROOM=SOC

1

AP29

w

C0701

C0752
0.1UF

VDD12_PCIE

ROOM=SOC

1

D

7 11 14

VDD085_PCIE

2.2UF

1

AH28
AJ25
AL23
AJ29
AL29
AJ24
AK27
AJ27

C0740

VDD12_PCIE_REFBUF AJ26

1

VDD12_PCIE_TXPLL AL26

15 7 5

1

PP1V2

AK28
AK25
AL24
AL27

D

XW0740

SHORT-10L-0.1MM-SM

PCIE_TX4_P
PCIE_TX4_N

1

PCIE_RCAL_P AT30
PCIE_RCAL_N AR30

R0730
3.01K

1%
1/32W
MF
2 01005
ROOM=SOC

OMIT_TABLE

45_PCIE_RCAL_N

A

1

C0730
100PF

5%
2 16V
NP0-C0G
01005

ROOM=SOC

OMIT_TABLE

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SOC:PCIE
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

7 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

6 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - CAMERA & DISPLAY INTERFACES
D

D

0.756-0.893V @11mA MAX

1.62-1.98V @23mA MAX

PP_FIXED

PP1V8
1

0.1UF

C0802

1

0.1UF

20%
2 6.3V
X5R-CERM
01005

C0815
0.1UF

20%
2 6.3V
X5R-CERM
01005

ROOM=SOC

20%
2 6.3V
X5R-CERM
01005

ROOM=SOC

VDD085_MIPI

ROOM=SOC

C0801

NOTE:VDD12_LPDP SHOULD BE POWERED
EVEN WHEN LPDP IS NOT USED

ROOM=SOC

15 6 5

PP1V8

3 5 6 7 8 9 12 13 14 20 21 28
29

OMIT_TABLE

FCMSP
SC58980X0B-A040

21

IN

21
21

IN

45_RCAM_REXT
28

OUT

28

OUT

28

OUT

28

OUT

B14
A14

90_MIPI_AP_TO_LCM_DATA1_P
90_MIPI_AP_TO_LCM_DATA1_N

B4
A4

A7
NC
B7
NC

B
28

OUT

45_LCM_REXT

R0801

1

4.02K
1%
1/32W
MF
01005

ROOM=SOC

R0802

o

45_AP_TO_FCAM_CLK_R
AP_TO_FCAM_SHUTDOWN_L

SENSOR1_ISTRB C35 NC
AP_TO_MUON_BL_STROBE_EN
SENSOR1_XSHUTDOWN C34
MIPICSI_MUXSEL G35 NC
MIPI1C_REXT D14

MIPID_DATA2_P
MIPID_DATA2_N

MIPI1C_DATA0_P B17
MIPI1C_DATA0_N A17

MIPID_DATA3_P
MIPID_DATA3_N

45_FCAM_REXT

OUT

MIPID_CLK_P
MIPID_CLK_N
MIPID_REXT

MIPI1C_CLK_P A18
MIPI1C_CLK_N B18

21

R0809

1
1% MF

OUT

90_MIPI_FCAM_TO_AP_DATA0_P
90_MIPI_FCAM_TO_AP_DATA0_N

MIPI1C_DATA1_P B19 NC
MIPI1C_DATA1_N A19 NC

33.2

20

33.2

01005

01005

2

ROOM=SOC

BI

OUT

21 22
21 22

U0600
MAUI-2GB-25NM-DDR-H

20

A29
NC
B29
NC
A33
NC
B33
NC

2 45_AP_TO_RCAM_CLK
1/32W

OUT

21

45_AP_TO_FCAM_CLK

2
1/32W

OUT

20

ROOM=SOC

OUT

LPDP_TX0_P
LPDP_TX0_N
LPDP_TX1_P
LPDP_TX1_N

A31
NC
B31
NC

20

LPDP_AUX_P
LPDP_AUX_N

A32
NC
B32
NC

BI

LPDP_TX2_P
LPDP_TX2_N
LPDP_TX3_P
LPDP_TX3_N

33

NC
OUT

NC

26

NC
NC
IN

FCMSP
SC58980X0B-A040
SYM 4 OF 14
ROOM=SOC

CRITICAL

D24

LPDP_CAL_DRV_OUT

D25

LPDP_CAL_VSS_EXT

AL4

EDP_HPD

H35

DP_WAKEUP

20

IN

C

OMIT_TABLE

ROOM=SOC

20

90_MIPI_FCAM_TO_AP_CLK_P
90_MIPI_FCAM_TO_AP_CLK_N

B
IN

20

IN

20

1

1

R0803
4.02K

4.02K
1%
1/32W
MF
01005

OUT

A30
NC
B30
NC

1
1% MF

SENSOR0_ISTRB D34 NC
AP_TO_STOCKHOLM_DWLD_REQUEST
SENSOR0_XSHUTDOWN F32

MIPID_DATA1_P
MIPID_DATA1_N

A5
B5

45_AP_TO_RCAM_CLK_R
AP_TO_RCAM_SHUTDOWN_L

SENSOR1_CLK F33
SENSOR1_RST E34

MIPID_DATA0_P
MIPID_DATA0_N

D9

90_MIPI_AP_TO_LCM_CLK_P
90_MIPI_AP_TO_LCM_CLK_N

OUT

I2C_ISP_TO_FCAM_SCL
I2C_ISP_BI_FCAM_SDA

SENSOR0_CLK D33
SENSOR0_RST D32

MIPI0C_REXT

A3
B3

I2C_ISP_TO_RCAM_SCL
I2C_ISP_BI_RCAM_SDA

R0808

MIPI0C_CLK_P
MIPI0C_CLK_N

90_MIPI_AP_TO_LCM_DATA0_P
90_MIPI_AP_TO_LCM_DATA0_N

ISP_I2C0_SCL G31
ISP_I2C0_SDA G32
ISP_I2C1_SCL F35
ISP_I2C1_SDA G34

CRITICAL

MIPI0C_DATA3_P
MIPI0C_DATA3_N

A12
B12

B6
NC
A6
NC

28

MIPI0C_DATA0_P
MIPI0C_DATA0_N

D12

90_MIPI_RCAM_TO_AP_CLK_CONN_P
90_MIPI_RCAM_TO_AP_CLK_CONN_N

IN

ROOM=SOC

MIPI0C_DATA2_P
MIPI0C_DATA2_N

90_MIPI_RCAM_TO_AP_DATA3_CONN_P
90_MIPI_RCAM_TO_AP_DATA3_CONN_N

IN

21

2

ROOM=SOC

.c

IN

5%
1/32W
MF
01005

x

21

A13
B13

1.00K

fi

IN

2

5%
1/32W
MF
01005

a

21

R0807

1.00K

in

IN

MIPI0C_DATA1_P
MIPI0C_DATA1_N

ROOM=SOC

1

h

21

A9
B9

90_MIPI_RCAM_TO_AP_DATA2_CONN_P
90_MIPI_RCAM_TO_AP_DATA2_CONN_N

IN

2

5%
1/32W
MF
01005

R0806

.c

21

90_MIPI_RCAM_TO_AP_DATA1_CONN_P
90_MIPI_RCAM_TO_AP_DATA1_CONN_N

IN

1

1.00K

w

21

90_MIPI_RCAM_TO_AP_DATA0_CONN_P
90_MIPI_RCAM_TO_AP_DATA0_CONN_N

IN

ROOM=SOC

R0805

w

21

2

5%
1/32W
MF
01005

w

C

B8
A8

1

1.00K

MAUI-2GB-25NM-DDR-H

SYM 3 OF 14
ROOM=SOC

R0804

m

1

U0600

PP1V2

VDD12_LPDP

20%
2 6.3V
X5R-CERM
01005

1

E23
E25
E27
F24

0.1UF

3 5 6 7 8 9 12 13 14 20 21 28
29

VDD18_MIPI

C0814

D10
E7
D8
E11
E14

1

E10
E13
E8
D13

14 11 6

2

2

1%
1/32W
MF
01005

ROOM=SOC

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SOC:CAMERA & DISPLAY
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

8 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

7 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - GPIO & SERIAL INTERFACES
PP1V8

R0900 1

R0901

5%
1/32W
MF
01005 2

5%
1/32W
MF
01005

2.2K

D

1

2.2K

ROOM=SOC

ROOM=SOC

1

R0902

1

R0903

2.2K

2.2K

5%
1/32W
MF
01005

R0904
1.33K

5%
1/32W
MF
01005

2 ROOM=SOC

1

2 ROOM=SOC

2

3 5 6 7 8 9 12 13 14 20 21 28
29

1

R0905

D

1.33K

1%
1/32W
MF
01005

1%
1/32W
MF
01005

2

ROOM=SOC

2

ROOM=SOC

R0920

OUT

33

OUT

33

OUT

22

OUT

29

OUT

28

OUT

16

IN

33
3

C

3
33

OUT
IN

IN
OUT

33 29 28 9

IN

33

IN

33

IN

33

OUT

33

IN

3

IN

3

IN

3

OUT

3

IN

3

IN

24 16

IN

33

OUT

13

OUT

29

IN

3

IN

3

IN

3

IN

3

IN

33

OUT

33

IN

32 16 8

IN
OUT

21

OUT

BOOT_CONFIG0
AP_TO_BB_WAKE_MODEM
LCM_TO_AP_HIFA_BSYNC
BB_TO_AP_HSIC_DEVICE_RDY
BB_TO_AP_GPS_TIME_MARK
AP_TO_BB_HSIC_HOST_RDY
BB_TO_AP_RESET_DETECT_L
BOOT_CONFIG1
FORCE_DFU
DFU_STATUS
BOOT_CONFIG2
BOARD_ID4
CODEC_TO_AP_PMU_INT_L
AP_TO_BB_RADIO_ON_L
AP_TO_NAND_FW_STRAP
TOUCH_TO_AP_INT_L
BOARD_REV3
BOARD_REV2
BOARD_REV1
BOARD_REV0
AP_TO_BB_COREDUMP
BB_TO_AP_IPC_GPIO
BUTTON_RINGER_A
AP_TO_BB_MESA_ON
CAM_EXT_LDO_EN

24

OUT

FCMSP
SC58980X0B-A040
SYM 5 OF 14
ROOM=SOC

CRITICAL

33

UART0_RXD AE3
UART0_TXD AE4

OUT

UART_AP_DEBUG_RXD
UART_AP_DEBUG_TXD

IN
OUT

AT23
AR20
AP23
AP22

UART3_CTS*
UART3_RTS*
UART3_RXD
UART3_TXD

N4
P3
R3
R2

UART4_CTS*
UART4_RTS*
UART4_RXD
UART4_TXD

J33
J34
J35
K33

UART5_RTXD T32

33

IN

33

OUT

UART_BB_TO_AP_CTS_L
UART_AP_TO_BB_RTS_L
UART_BB_TO_AP_RXD
UART_AP_TO_BB_TXD

33

OUT

2

33

IN

UART_STOCKHOLM_TO_AP_CTS_L
UART_AP_TO_STOCKHOLM_RTS_L
UART_STOCKHOLM_TO_AP_RXD
UART_AP_TO_STOCKHOLM_TXD

OUT

OUT

25 24

OUT

25 24

IN

25 24

ROOM=SOC

25 24

OUT

20

OUT

33

IN

IN

33

33

OUT

33

IN

33

OUT

33

IN

OUT

IN

24

OUT

24

OUT

24

IN

24

OUT

33

OUT

IN

33

3

9 17

IN
IN

3

BI

3

IN

IN

24 8

IN

OUT

24

OUT

30

OUT

30

ROOM=SOC

OUT

OUT

24 8

29 8

SPI_AP_TO_TOUCH_SCLK

0.00

1
01005

0%

2
1/32W

IN

29 8

OUT

29

OUT

27

IN

27

R0960
29

OUT

27

IN

MF

ROOM=SOC

B

R0930

OUT

SPI_AP_TO_MESA_SCLK

w

27

SYM 6 OF 14

MAUI-2GB-25NM-DDR-H
ROOM=SOC

CRITICAL

OUT

I2C1_AP_SCL
I2C1_AP_SDA

OUT

I2C2_SCL L31
I2C2_SDA M32

I2C2_AP_SCL
I2C2_AP_SDA

OUT

PP1V8

R0906

1

2.2K

I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT

R32
R31
V32
P31
P32

FCMSP
SC58980X0B-A040

I2C0_AP_SCL
I2C0_AP_SDA

I2C1_SCL AH1
I2C1_SDA AG4

U0600

I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT

AM3
AM4
AN2
AP1
AN1

TRISTAR_TO_AP_INT
45_I2S_AP_TO_CODEC_MSP_BCLK
I2S_AP_TO_CODEC_MSP_LRCLK
I2S_CODEC_TO_AP_MSP_DIN
I2S_AP_TO_CODEC_MSP_DOUT

33

SWI_AP_BI_TIGRIS

UART7_RXD J31 NC
UART7_TXD J32 NC

I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT

I2C0_SCL E31
I2C0_SDA D35

OMIT_TABLE

ROOM=SOC

1
01005

0.00
0%

2
1/32W

MF

2

5%
1/32W
MF
01005

SEP_I2C_SCL V3
SEP_I2C_SDA Y4

AD4
AC3
AB2
AD3

SPI_CODEC_TO_AP_MISO
SPI_AP_TO_CODEC_MOSI
SPI_AP_TO_CODEC_SCLK
SPI_AP_TO_CODEC_CS_L

P33
V35
N32
M31

SPI_TOUCH_TO_AP_MISO
SPI_AP_TO_TOUCH_MOSI
SPI_AP_TO_TOUCH_SCLK_R
SPI_AP_TO_TOUCH_CS_L

E33
E35
F34
F31

NOSTUFF

AA2
Y2
AA3
AC4

R0910 1

10K

SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN

SPI_MESA_TO_AP_MISO
SPI_AP_TO_MESA_MOSI
SPI_AP_TO_MESA_SCLK_R
MESA_TO_AP_INT

SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN

10K

5%
1/32W
MF
01005 2

R0940
SOCHOT0 AM1

PMU_TO_AP_SOCHOT0_R_L

IN

A1

BUTTON_MENU_KEY_L

CLK32K_OUT H34

45_AP_TO_TOUCH_CLK32K_RESET_L

NAND_SYS_CLK AM24

AP_TO_NAND_SYS_CLK_R

OUT

B

0.00

2

AP_TO_NAND_SYS_CLK

8 12 14 15 16 17 24 26 30 33

R0950
U0901
5

1%
1/32W
MF
2 01005

74LVC1G34GX

SOT1226
4

2

26 16 8
26 16 8

BUTTON_MENU_KEY_BUFF_L

I2C0_AP_SCL
I2C0_AP_SDA

ROOM=SOC

PP0908

P2MM-NSM
SM
8 29 PP 1 SPI_CODEC_TO_AP_MISO

B2

1

OUT

9 16

P2MM-NSM
SM
8 29 PP 1 SPI_AP_TO_CODEC_MOSI

30 25 17 8

I2C1_AP_SCL
I2C1_AP_SDA

ROOM=SOC

P3MM-NSM
SM
1
PP

1

PP

PP09010

PP0900
PP0901

P3MM-NSM
SM
1
PP

1

8 12 15 17

P2MM-NSM
SM
1 SPI_AP_TO_CODEC_SCLK
PP

PP

PP0902
PP0903

SYNC_MASTER=N/A

SYNC_DATE=N/A

SOC:SERIAL & GPIO

P3MM-NSM

DRAWING NUMBER

74LVC1G34GX
SOT1226
4

Apple Inc.

ROOM=SOC

U0902
2

20 8

BUTTON_HOLD_KEY_BUFF_L

OUT

9 16

20 8

I2C2_AP_SCL
I2C2_AP_SDA

P3MM-NSM
SM
1
PP

1

PP

SM

PP0904
PP0905

3

P3MM-NSM

1

ROOM=SOC

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

9 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

8 OF 60

IV ALL RIGHTS RESERVED

7

6

5

8 24

PAGE TITLE

SM

NC

8

8 24

ROOM=SOC

NC

BUTTON_HOLD_KEY_L

P2MM-NSM
SM
1 SPI_AP_TO_TOUCH_MOSI
PP

ROOM=SOC

392K

IN

PP0909

SM

R0952

1%
1/32W
MF
2 01005

ROOM=SOC

PP0907

ROOM=SOC

PP1V8_ALWAYS

8

32

8 24

P3MM-NSM

3
IN

13

ROOM=SOC

8

BI

OUT

SPI PROBE POINTS

30 25 17 8

I2C_SEP_BI_EEPROM_SDA
I2C_SEP_TO_EEPROM_SCL

16

R0945

8 12 14 15 16 17 24 26 30 33

1
A2

OUT

29

PP0906

VCC

SDA

16

ROOM=SOC

NC

VSS

WLCSP

IN

CPU_ACTIVE_STATUS H31 NC

NC

27

PMU_TO_AP_SOCHOT0_L

1/32W

SOCHOT1 AM2

I2C PROBE POINTS

U0900

SCL

01005

2

ROOM=SOC

1

ROOM=SOC

B1

0.00

AP_TO_PMU_SOCHOT1_L

1
0% MF

P2MM-NSM
SM
1 SPI_TOUCH_TO_AP_MISO
PP

PP1V8_SDRAM

CRITICAL

M34128-FCS6_P/T

5%
1/32W
MF
2 01005
ROOM=SOC
ROOM=SOC

5%
1/32W
MF
01005

5

A

10K

5%
1/32W
MF
01005 2
ROOM=SOC

ROOM=SOC

R0909

ROOM=SOC

392K

ROOM=SOC

1

3 5 6 7 8 9 12 13 14 20 21 28
29

0%
1/32W
MF
01005

BUTTON_RINGER_A

PP1V8

8

8 12 15 17

PP1V8

SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN

NC

8

BI

PP1V8_ALWAYS

SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN

BOARD_ID2
BOARD_ID1
BOARD_ID0

OUT

ROOM=SOC
32 16 8

128kbit
APN:335S0946

20%
2 6.3V
X5R
0201-1

8 20

C

R0951

2

1.0UF

8 20

SEP_GPIO0 Y3 NC
SEP_GPIO1 AB4 NC

100K

C0900

8 17 25 30

3 5 6 7 8 9 12 13 14 20 21 28
29

I2C_SEP_TO_EEPROM_SCL
I2C_SEP_BI_EEPROM_SDA

R0941 1

PP1V8_SDRAM
1

1

BI

8 17 25 30

2

ROOM=SOC

BUTTON PULL-UP RESISTORS AND BUFFERS

28 21 20 14 13 12 9 8 7 6 5 3
29

BI

8 16 26

2.2K

1

ANTI-ROLLBACK EEPROM

BI

8 16 26

1

R0907

I2S4_MCK
I2S4_BCLK
I2S4_LRCK
I2S4_DIN
I2S4_DOUT

5%
1/32W
MF
01005

SEP_SPI0_SCLK W3 NC
SEP_SPI0_MISO AA4 NC
SEP_SPI0_MOSI U2 NC

33

OUT

ALS_TO_AP_INT_L
45_I2S_AP_TO_BB_BCLK
I2S_AP_TO_BB_LRCLK
I2S_BB_TO_AP_DIN
I2S_AP_TO_BB_DOUT

OUT

33

30 16

UART_ACCESSORY_TO_AP_RXD
UART_AP_TO_ACCESSORY_TXD

M4
M3
P1
N3
L4
U32
V33
U33
T33
V34

45_I2S_AP_TO_SPEAKERAMP_MCLK_R
45_I2S_AP_TO_CODEC_ASP_BCLK
I2S_AP_TO_CODEC_ASP_LRCLK
I2S_CODEC_TO_AP_ASP_DIN
I2S_AP_TO_CODEC_ASP_DOUT

IN

24 8

UART6_RXD AF1
UART6_TXD AE2

45_I2S_AP_TO_BT_BCLK
I2S_AP_TO_BT_LRCLK
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_DOUT

33

1%
1/32W
MF
01005

33

UART_WLAN_TO_AP_CTS_L
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD

NC

I2S0_MCK
I2S0_BCLK
I2S0_LRCK
I2S0_DIN
I2S0_DOUT

33

OUT

33.2

33

IN

UART2_CTS*
UART2_RTS*
UART2_RXD
UART2_TXD

33

OUT

K31
K32
L33
L32

30

IN

UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_RXD
UART_AP_TO_BT_TXD

UART1_CTS*
UART1_RTS*
UART1_RXD
UART1_TXD

1

30

IN

33

R0922

OUT

33

32

OUT

33

TMR32_PWM0 AE1 NC
TMR32_PWM1 AF2 AP_TO_VIBE_TRIG
TMR32_PWM2 AF3 NC

w

33

AP_TO_STOCKHOLM_DEV_WAKE
BOARD_ID3

MAUI-2GB-25NM-DDR-H

m

33

AP_TO_SPEAKERAMP_RESET_L
AP_TO_BT_WAKE
AP_TO_BB_RESET_L
PCIE_AP_TO_WLAN_DEV_WAKE
AP_TO_LED_DRIVER_EN
AP_TO_TOUCH_RESET_L
AP_TO_LCM_RESET_L
PMU_TO_AP_IRQ_L

IN

o

OUT

OUT

24 9

.c

25

24 9

ROOM=SOC

OUT

x

IN

U0600

24 9

fi

25

1%
1/32W
MF
01005

P34
R34
N34
N35
M33

45_I2S_AP_TO_CODEC_MCLK_R
45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
I2S_CODEC_TO_AP_OWL_XSP_DIN
I2S_AP_TO_CODEC_XSP_DOUT

2

in

IN

OUT

33.2

h

32 16

BUTTON_VOL_UP_L
BUTTON_VOL_DOWN_L
SPEAKERAMP_TO_AP_INT_L

25

45_I2S_AP_TO_SPEAKERAMP_MCLK

1

.c

IN

OMIT_TABLE
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42

45_I2S_AP_TO_CODEC_MCLK

w

32 16

C1
D2
D1
F1
E2
F3
NC
F2
H3
G3
J1
H4
K1
J3
K2
J4
NC
L2
K3
L3
NC
N1
AH2
AH3
AH4
AJ1
AJ2
AJ3
AJ4
AK1
AP3
AN4
AP4
AP5
AR2
AR3
AR4
AP6
AT3
AT4
AR6
AP7
AT5
AP8
AP9
AP10
NC
NC

OUT

a

24

4

3

2

.

1

SIZE

D

A

8

7

6

5

4

3

2

SOC - OWL

1

POWER STATE CONTROL PROBE POINTS
ROOM=SOC
16 9

OWL_TO_PMU_ACTIVE_REQUEST

P3MM-NSM
SM
1

PMU_TO_OWL_ACTIVE_READY

P3MM-NSM
SM
1

PP

PP1020

ROOM=SOC
30 26 16 9 5

D

PP

D

PP1021

ROOM=SOC
16 9

OWL_TO_PMU_SLEEP1_REQUEST

P3MM-NSM
SM
1

PMU_TO_OWL_SLEEP1_READY

P3MM-NSM
SM
1

PP

PP1022

ROOM=SOC
16 11 9

PP

PP1023

OMIT_TABLE

U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040

19

IN

19

IN

19 9 OUT
19

33 29 28 8

IN

IN
9

LCM_TO_AP_HIFA_BSYNC
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI

19 9 OUT
33

IN

33

OUT

33

OUT

33

OUT

24 8 OUT

B

24 8

IN

24 8 OUT

PP1005
P2MM-NSM

PP1006
P2MM-NSM

PP1007
P2MM-NSM

PP1008
P2MM-NSM

A

PP1009
P2MM-NSM

PP1010
P2MM-NSM

SM
PP

SM
PP

1

SPI_OWL_TO_IMU_MOSI

AK31
AK32
AL33

OWL_SPI_MISO
OWL_SPI_MOSI
OWL_SPI_SCLK

UART_BB_TO_OWL_RXD
UART_OWL_TO_BB_TXD

AJ32
AK33

OWL_UART0_RXD
OWL_UART0_TXD

OWL_TO_WLAN_CONTEXT_B
OWL_TO_WLAN_CONTEXT_A

AH30
AJ31

m

OUT
IN

DWI_PMU_TO_PMGR_MISO
45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
45_DWI_PMGR_TO_PMU_SCLK
45_DWI_PMGR_TO_BACKLIGHT_SCLK

AE33
AD35
NC
AC33
U31
T31
NC

9 16
5 9 16 26 30

IN

16

OUT

26

IN

SM
PP

16

OUT

1

PP

SWD_AP_PERIPHERAL_SWCLK

OUT

SWD_AP_BI_BB_SWDIO
SWD_AP_BI_NAND_SWDIO

C

P2MM-NSM

PP1002
P2MM-NSM

16

OUT

PMU_TO_OWL_CLK32K

PP1003

BI

1

SM
PP

PP1V8

16 26

PP1004

1

P2MM-NSM

3 5 6 7 8 12 13 14 20 21 28 29

R1002
1.00K

13 33

2

5%
1/32W
MF
01005

ROOM=SOC

33

OWL_UART1_RXD
OWL_UART1_TXD
OWL_UART2_RXD
OWL_UART2_TXD

AD34
AA34
AE32
NC
AE31

OWL_TO_PMU_ACTIVE_REQUEST
PMU_TO_OWL_ACTIVE_READY

SM

OWL_I2S_BCLK
OWL_I2S_DIN
OWL_I2S_MCK
OWL_I2S_LRCK

45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
I2S_CODEC_TO_AP_OWL_XSP_DIN
I2S_AP_OWL_TO_CODEC_XSP_LRCLK

HOLD_KEY* U3

BI

BUTTON_HOLD_KEY_BUFF_L

IN

8 16

BUTTON_MENU_KEY_BUFF_L

IN

13

8 16

SKEY* W4 NC
MENU_KEY* V4

.c

19 9 OUT

OWL_I2CM_SCL
OWL_I2CM_SDA

SPI_IMU_TO_OWL_MISO
SPI_OWL_TO_IMU_MOSI
SPI_OWL_TO_IMU_SCLK

RT_CLK32768 AD31
OWL_SWD_TCK_OUT
OWL_SWD_TMS0
OWL_SWD_TMS1
SWD_TMS2
SWD_TMS3

1

w

IN

PMGR_MISO
PMGR_MOSI
PMGR_SCLK0
PMGR_SSCLK1

3 5 16

w

19 9

IN

AH31
AH33

w

19

SPI_OWL_TO_DISCRETE_ACCEL_CS_L
ACCEL_TO_OWL_INT1_R

AJ34
NC
AJ33
NC

19 9 OUT

CRITICAL

AL2
AL1
AK4
AL3

IN

o

IN

OWL_FUNC_0
OWL_FUNC_1
OWL_FUNC_2
OWL_FUNC_3
OWL_FUNC_4
OWL_FUNC_5
OWL_FUNC_6
OWL_FUNC_7
OWL_FUNC_8
OWL_FUNC_9

PMU_TO_SYSTEM_COLD_RESET_L

.c

19

AWAKE_REQ AA33
AWAKE_RESET* AD32

a

19 9 OUT

AF35
AH32
AG32
AG31
AG30
AF33
AE34
NC
AF34
AF31
AF32
NC

CFSB_AOP W33

ROOM=SOC

x

SPI_OWL_TO_COMPASS_CS_L
COMPASS_TO_OWL_INT
ACCEL_TO_OWL_INT2_R
ACCEL_GYRO_TO_OWL_INT1
SPI_OWL_TO_ACCEL_GYRO_CS_L
ACCEL_GYRO_TO_OWL_INT2

SYM 7 OF 14

in

IN

OWL_DDR_REQ
OWL_DDR_RESET*

h

C

16 11 9

AD30
AB33

fi

OWL_TO_PMU_SLEEP1_REQUEST
PMU_TO_OWL_SLEEP1_READY

16 9 OUT

B

9 19

OWL SYSTEM SHUTDOWN OPTION
1

SPI_IMU_TO_OWL_MISO

9 19

NOSTUFF
SM
PP

SM
PP

SM
PP

SM
PP

1

1

SPI_OWL_TO_IMU_SCLK
SPI_OWL_TO_DISCRETE_ACCEL_CS_L

R1020
10

9 19

SWI_AP_BI_TIGRIS

1
2 1/32W
MF 5%
01005
ROOM=SOC

9 19

9

OWL_TO_PMU_SHDN_BI_TIGRIS_SWI

BI

8 17

NOSTUFF

R1021

1

1

SPI_OWL_TO_ACCEL_GYRO_CS_L
SPI_OWL_TO_COMPASS_CS_L

10

OWL_TO_PMU_SHDN

1
2 1/32W
MF 5%
01005
ROOM=SOC

9 19

SYNC_MASTER=N/A
OUT

16

SYNC_DATE=N/A

PAGE TITLE

SOC:OWL
DRAWING NUMBER

9 19

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

10 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

9 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

PP_GPU
0.8V @10.5A MAX
1

C1100
10UF

D

20%
2 6.3V
CERM-X5R
0402-9

1

C1101

1

10UF

1

2.2UF

20%
2 6.3V
CERM-X5R
0402-9

ROOM=SOC

C1103

1

2.2UF

20%
2 6.3V
X5R-CERM
0201

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

XW1110
SHORT-10L-0.1MM-SM

C1105

1

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

C1104
ROOM=SOC

2

45_BUCK1_PP_GPU_FB

OUT

14 16

ROOM=SOC

ROOM=SOC

TP1120
0.50MM
C1106

C1107

C1108

C1109

C1110

C1111

4.3UF

4.3UF

4.3UF

4.3UF

4.3UF

AA7
AA9
AA11
AB6
AB10
AB12
AC13
AD6
AD8
AD10
AD12
AE7
AE9
AE11
AE13
AF8
AF10
AF12
AH6
AH8
AH10
AH12
AJ5
AJ7
AJ9
AJ11
AJ13
AK6
AK10
AL7
AL9
AL11
AM6
AM8
AM10
AN7
AN11
AL13
Y8
Y10
Y12
AM12

ROOM=SOC

4.3UF

20%
4V
CERM
0402

1

3

1

20%
4V
CERM
0402

3

20%
4V
CERM
0402

1

3

1

3

1

3

20%
4V
CERM
0402

1

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

C1112

C1113

C1114

C1115

C1116

C1117

1UF

1UF

1UF

1UF

0.47UF

0.47UF

1

1

1

3

1

2 4

3

1

20%
4V
CERM
0402

2 4

20%
4V
CERM
0402
1

3

2 4

2 4

3

2 4

20%
4V
CERM
0402

2 4

20%
4V
CERM
0402

2 4

20%
4V
CERM
0402

2 4

20%
4V
CERM
0402

3

2 4

20%
6.3V
CERM
0402

2 4

3

20%
6.3V
CERM
0402

2 4

3

2 4

C
14 10

PP_CPU
0.625V @TBDA MAX
0.9V
@10.5A MAX
1.0V
@12.5A MAX

1

C1120
10UF

20%
2 6.3V
CERM-X5R
0402-9

1

C1121

1

10UF

1

2.2UF

20%
2 6.3V
CERM-X5R
0402-9

ROOM=SOC

C1122

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

C1125

1

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

C1123

20%
6.3V
2 X5R-CERM
0201

ROOM=SOC

ROOM=SOC

TP1100
0.50MM
SM

PP

1

PP_CPU

10 14

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

C1126

C1127

C1128

C1129

C1130

C1131

4.3UF

4.3UF

4.3UF

4.3UF

4.3UF

4.3UF

1

20%
4V
CERM
0402

3

1

3

1

2 4

20%
4V
CERM
0402

3

1

2 4

20%
4V
CERM
0402

3

1

2 4

20%
4V
CERM
0402

3

1

20%
4V
CERM
0402

2 4

3

2 4

U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 8 OF 14
ROOM=SOC

CRITICAL

VDD_CPU

VDD_GPU

G15
W13
T12
M6
U9
V12
W9
M12
M18
N15
N21
N9
F10
H14
H16
H20
H22
H6
H8
J11
J13
J17
J19
J23
J7
K10
K14
K16
K20
K22
K6
K8
L11
L13
L15
L17
L19
L21
M24
L7
L9
F8
M8
N11
N13

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

C1132

C1133

C1134

C1135

C1136

C1137

4.3UF

B

ROOM=SOC

4.3UF

1UF

1UF

1UF

1UF

1

20%
4V
CERM
0402

3

1

2 4

20%
4V
CERM
0402

3

1

2 4

ROOM=SOC

20%
4V
CERM
0402

20%
4V
CERM
0402
1

3

2 4

ROOM=SOC

3

2 4

ROOM=SOC

1

20%
4V
CERM
0402

w

ROOM=SOC

w

w

2 4

20%
4V
CERM
0402

OMIT_TABLE

20%
4V
CERM
0402
1

3

2 4

3

2 4

R19
G13
R9
T10
T14
T16
U11
V14

ROOM=SOC

C1138

C1139

C1140

C1141

0.47UF

0.47UF

0.47UF

0.47UF

1

1

1

1

20%
6.3V
CERM
0402

2 4

3

20%
6.3V
CERM
0402

2 4

3

20%
6.3V
CERM
0402

3

2 4

20%
6.3V
CERM
0402

3

V16
G7
R23
G9
H10
T24
P22
W17

2 4

XW1100

14

OUT

N17
N19
P10
G11
P12
P14
P16
P20
R15

45_BUCK0_PP_CPU_FB

SHORT-10L-0.1MM-SM
2
1
ROOM=SOC

N23
G17
G21
T18
T20

A
PP1100
P2MM-NSM

PP1101
P2MM-NSM

SM
PP

1

ROOM=SOC

SM
PP

AP_CPU_SENSE_P
AP_CPU_SENSE_N

U0600
MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040
SYM 9 OF 14
ROOM=SOC

CRITICAL

VDD_SOC

VDD_SOC

VSS

AJ20

VDD_SOC_SENSE

AK21

VSS_SOC_SENSE

VDD_GPU_SENSE G20

Y6 VDD_CPU_SENSE

W23
Y14
Y16
Y20
Y22
Y24
Y26
G29
AA27
F17
F20
L29
N29
V28

C1150
10UF

20%
6.3V
2 CERM-X5R
0402-9

L22
L24
L26
L28
M1
M5
M7
M9
M11
M13
M17
M21
M23
M25
M27
M29
M35
N6
N10
N12
N14
N16
N18
G19
N22
N24
N26
N28
N30
N33
P9
P11
P13
P15
P17
P19
P21
P23
P25
P27
P29
P35
R4
R6
R8
R10
R12
R14
M19
R18
R20
R22
R24
R26
R28
R30
T1
T2
R33
T9
T11
T13
T15
T17
P7
T23
T25
T27
T30
T35
U6
U10
U12

1

C1151

20%
2 6.3V
CERM-X5R
0402-9

XW1120

SHORT-10L-0.1MM-SM
1
2
45_BUCK2_PP_SOC_FB

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

C1153

C1154

C1155

C1156

C1157

4.3UF

1UF

1UF

1UF

D

ROOM=SOC

0.47UF

1

20%
4V
CERM
0402

3

1

20%
4V
CERM
0402

2 4

3

1

20%
4V
CERM
0402

3

2 4

20%
4V
CERM
0402

1

1

3
2

20%
6.3V
CERM
0402

3

2 4

4

C

B

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SOC:POWER (1/3)
DRAWING NUMBER

Apple Inc.

1

051-00648
REVISION

4.0.0

R

ROOM=SOC

PP1102
P2MM-NSM

PP1103
P2MM-NSM

SM
PP

1

AP_GPU_SENSE_N

AP_SOC_SENSE_N

ROOM=SOC

SM
PP

1

1

SM
PP

ROOM=SOC

AP_GPU_SENSE_P

AP_SOC_SENSE_P

ROOM=SOC

1

SM
PP

ROOM=SOC

NOTICE OF PROPRIETARY PROPERTY:

PP1105

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PP1104
P2MM-NSM

PAGE

11 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

P2MM-NSM

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

10 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

14

OUT

ROOM=SOC

VSS_GPU_SENSE H19

Y7 VSS_CPU_SENSE

14

0.825V @4.7A MAX
0.725V @TBDA MAX

10UF

ROOM=SOC

2 4

o

ROOM=SOC

1

OMIT_TABLE

.c

ROOM=SOC

x

ROOM=SOC

fi

ROOM=SOC

a

ROOM=SOC

AA17
AA19
AA23
AB14
AB16
AB20
AB22
AB24
AB26
AC17
AC19
AC23
AD16
AD20
AD22
AD24
AD26
AE5
AE15
AE17
AE19
AE23
AF14
AF16
AF20
AF22
AF24
AF26
AG17
AG19
AG23
AH16
AH20
AH22
AH24
AH26
AJ15
AJ17
AJ19
AJ23
AK14
J29
G23
AK22
F6
F14
AL15
AM5
G25
G27
H24
H26
H28
J27
K24
K26
K28
L27
L23
M26
M28
AL19
N7
N27
P24
P26
P28
R17
R27
R29
T22
T26
T7
T28
U17
V8
V20
V22
V24
V26
W7
W11
Y28

m

10 14

in

PP_GPU

h

1

.c

SM

PP

1
PP_SOC

SOC - CPU, GPU & SOC RAILS
14 10

2

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - POWER SUPPLIES
DDR IMPEDANCE CONTROL
1.06 - 1.17V @635mA MAX
INTERNALLY SUPPLIES VDDQ

D
14 11

14 11

D

PP1V1
1

PP1V1

R1200

1

240

C1240
10UF

20%
2 6.3V
CERM-X5R
0402-9

1

C1241
2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

ROOM=SOC

1

C1242

C1243

1

2.2UF

2.2UF

20%
2 6.3V
X5R-CERM
0201

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

1

C1245

C1246

1

20%
4V
CERM
0402

3

1

20%
2 6.3V
CERM-X5R
0402-9
ROOM=SOC

1

20%
4V
CERM
0402

20%
4V
CERM
0402
1

3

2 4

3

1

2 4

20%
6.3V
CERM
0402

2

3

4

B

VDD_CPU_SRAM
SYM 10 OF 14
ROOM=SOC

CRITICAL

ROOM=SOC

C1220

C1221

C1222

0.47UF

1UF

4.3UF

20%
6.3V
CERM
0402

1

2

VDD_GPU_SRAM

VDD_FIXED

H12
H18
R21
U15
J15
J21
J9
K12
K18
M10
M14
M16
M20
P18
R11
R13
U13
V10
M22

3

20%
4V
CERM
0402
1

3

1

20%
4V
CERM
0402

1

C1223
2.2UF

20%
2 6.3V
X5R-CERM
0201
ROOM=SOC

3

MAUI-2GB-25NM-DDR-H
FCMSP
SC58980X0B-A040

C21
AP17
V31
P5

DDR0_ZQ B21
DDR3_ZQ P2

SYM 11 OF 14

VDDIO11_DDR0

DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF

ROOM=SOC

ROOM=SOC

240

2

1%
1/32W
MF
01005

240

1

240

1%
1/32W
MF
01005

2

ROOM=SOC

R1203

2

ROOM=SOC

1%
1/32W
MF
01005

ROOM=SOC

R1204

1

240
2

R1205
240

1%
1/32W
MF
01005

2

ROOM=SOC

1%
1/32W
MF
01005
ROOM=SOC

45_DDR0_RREF
45_DDR1_RREF
45_DDR2_RREF
45_DDR3_RREF
45_DDR0_ZQ
45_DDR3_ZQ

CRITICAL
DDR0_RET*
DDR1_RET*
DDR2_RET*
DDR3_RET*

C18
AP15
Y31
U4

PMU_TO_OWL_SLEEP1_READY

VDDIO11_PLL_DDR

F19
AK18
W26
P8

IN

9 16

FL1280

100OHM-25%-0.12A

1.1V @7mA MAX

45_PP1V1_DDR_PLL

1

2

PP1V1

11 14

01005
1

ROOM=SOC

C1280
0.22UF

20%
2 6.3V
X5R
01005-1

ROOM=SOC

C

VDDIO11_DDR1

o

ROOM=SOC

U0600

.c

0.47UF

ROOM=SOC

14

OMIT_TABLE

1%
1/32W
MF
01005

1

R1202

VDDIO11_RET_DDR

D19
AN17
W31
T4

PP1V1_SDRAM

12 14 15

1.06 - 1.17V

x

1UF

AN19
AR18
AR21
AR8
AT13
AT16
AM14
AM16
AM18
AM20
AR15
AN13
AN15

4

2 4

2 4

fi

4.3UF

ROOM=SOC

0.8V @0.5A MAX

a

C1203

FCMSP
SC58980X0B-A040

PP_CPU_SRAM

PP_GPU_SRAM
ROOM=SOC

ROOM=SOC

ROOM=SOC

C1224

C1225

C1226

0.47UF

1UF

4.3UF

in

C1202

20%
2 6.3V
X5R
0201-1

ROOM=SOC

20%
6.3V
CERM
0402

1

2

3

4

20%
4V
CERM
0402
1

3

1

2 4

20%
4V
CERM
0402

2 4

3

ROOM=SOC

C1228
4.3UF
20%
4V
CERM
0402

1

3
2

4

1

C1227
2.2UF

20%
2 6.3V
X5R-CERM
0201

h

C1201

1.0UF

3

ROOM=SOC

.c

10UF

ROOM=SOC

U0600

MAUI-2GB-25NM-DDR-H

AC11
AC7
AC9
AA13
AG11
AG7
AG9
AK12

w

C1200

ROOM=SOC

AA15
AA21
AA25
AB18
AC15
AC21
AC25
AD14
AD18
AE21
AE25
AF18
AG15
AG21
AH25
AH14
AH18
AJ21
AK16
F12
G10
V18
AL17
J25
L25
N25
R25
R7
AN6
U25
W15
W21
W25
Y18
F21
F26
AB28
AC27
G18
AK20
F16
R16
T8
V7
U19
W27
U27
AF4
AF27
U21

C1249

0.8V @TBDA MAX
0.9V @TBDA MAX
1.0V @1.0A MAX

w

ROOM=SOC

1

20%
2 6.3V
X5R
0201-1

OMIT_TABLE

PP_FIXED

C1247

1

2 4

w

14 7 6

20%
4V
CERM
0402

A20
A22
B11
B15
B23
B25
D16
D20
D22
E15
E17
E19
E21

ROOM=SOC

1.0UF

1UF

2 4

C

1

2

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1248
2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

4.3UF

1

2.2UF

ROOM=SOC

0.802-TBDV @1.1A MAX

C1244

1

m

1

R1201

14

AB29
V29
Y29
Y35
AB35
AG34
M34
R35
T29
T34
AA30
U30
AC30

AA1
AC2
V6
W2
H2
M2
U5
P6
T6
U1
N5
R5
W5

DDR0_SYS_ALIVE
DDR1_SYS_ALIVE
DDR2_SYS_ALIVE
DDR3_SYS_ALIVE

C19
AP16
W32
T3

SYSTEM_ALIVE

IN

13 16 17

VDDIO11_DDR2

B

VDDIO11_DDR3

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SOC:POWER (2/3)

0.756-TBDV @44mA MAX
15

PP0V8_OWL
1

C1250
1.0UF

AH29
AD29
AF29

DRAWING NUMBER

VDD_LOW

Apple Inc.

20%
2 6.3V
X5R
0201-1

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

ROOM=SOC

BRANCH

PAGE

12 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

11 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

B

A

VSS

VSS

VSS

VSS

1.70-1.95V @100mA(TBD)

1

D

MAX

PP1V8_SDRAM

33 30 26 24 17 16 15 14 8

1

C1300

1

2.2UF

C1301

1

2.2UF

20%
2 6.3V
X5R-CERM
0201

2.2UF

20%
2 6.3V
X5R-CERM
0201

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

C1302

ROOM=SOC

ROOM=SOC

1.06-1.17V @1.3A(TBD) MAX
15 14 11

PP1V1_SDRAM
1

C1310

1

10UF

C1312

1

2.2UF

20%
2 6.3V
CERM-X5R
0402-9

1

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

C1313

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

C1314

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

C1316

C1317

1UF

1UF

20%
4V
CERM
0402

1

3

20%
4V
CERM
0402

1

2 4

m

2 4

3

1.62-1.98V @41mA MAX
28 21 20 14 13 12 9 8 7 6 5 3
29

PP1V8
1

o

CRITICAL

.c

SYM 14 OF 14
ROOM=SOC

C1320
10UF

20%
6.3V
2 CERM-X5R
0402-9

x

FCMSP
SC58980X0B-A040

2

SOC - POWER SUPPLIES

ROOM=SOC

1

C1321
2.2UF

20%
2 6.3V
X5R-CERM
0201
ROOM=SOC

1

C1322
2.2UF

20%
2 6.3V
X5R-CERM
0201

1

C1323
2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=SOC

ROOM=SOC

fi

CRITICAL

MAUI-2GB-25NM-DDR-H

E12
E16
E18
E20
E22
E24
E26
E29
E32
F4
F5
F7
F9
F11
F13
F15
F18
D18
F23
E30
F25
F27
F28
F29
G4
G5
G6
G8
G12
G14
G16
E6
G22
G24
G26
G28
G33
H1
H7
H9
H11
H13
H15
H17
E28
H21
H23
H25
H27
H29
J2
J5
J6
J30
J8
J10
J12
J14
J16
J18
J20
J22
J24
J26
J28
K7
K9
K11
K13
K15
K17
K19
K21
K23
K25
K27
K29
K34
K35
L1
L5
L6
K4
L8
L10
L12
L14
L16
L18
L20

3

a

SYM 13 OF 14
ROOM=SOC

U0600

in

FCMSP
SC58980X0B-A040

OMIT_TABLE

VDDIO18_GRP10:1.62-1.98V @8mA
VDDIO18_LPOSC:1.62-1.98V @1mA

h

MAUI-2GB-25NM-DDR-H

AN12
AN14
AN18
AN29
AN33
AP2
AP13
AP14
AP20
AP25
AP26
AP27
AP30
AP31
AP32
AP33
AR1
AR5
AR9
AR14
AR16
AR25
AR34
AR35
AT1
AT2
AT6
AT8
AT9
AT14
AT17
AT18
AT21
AT25
AT34
AT35
B1
B2
B16
B20
B22
B24
B27
B34
B35
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C20
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
D3
D4
D5
D6
D11
D17
D21
D23
D26
D27
D28
D29
D30
E1
E3
E4
E5
D7
E9

4

.c

U0600

AF23
AF25
AF30
AG1
AG2
AG3
AG6
AG8
AG10
AG14
AG16
AG18
AG20
AG22
AG24
U7
AG29
AG33
AG35
AH5
AH7
AH9
AH11
AH13
AH15
AH17
AH19
AH21
AH23
AH27
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
W8
AJ22
AG12
AK24
AJ28
AK2
AK3
AK5
AK7
AK9
AK11
AK13
AK15
B28
AK17
M15
AP28
AK26
AK30
AK34
AK29
AL6
AL8
AL10
AL12
AF28
AL14
AM29
AL16
AR27
AL18
Y30
AL20
AL25
AL28
AL30
AL31
AM7
AM9
AM11
AM13
AM15
AM17
AM19
AM21
AM33
AM34
AM35
AN3
AN5
AN16
AN8
AN10

5

19 14

17 15 8

28 21 20 14 13 12 9 8 7 6 5 3
29

w

C

OMIT_TABLE

6

w

D

A1
A2
A11
A16
A21
A24
A25
A27
A34
A35
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA24
AA26
N8
AA28
AA35
AB1
C17
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AB27
AB30
AC1
AC6
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AC26
T5
AC28
AC34
AC35
AD5
AD7
AD9
AD11
AD15
AD17
AD19
AD21
AD23
AD25
AD27
AD33
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE22
AE24
AE26
AE29
AE30
AE35
AF5
AF7
AF9
AF11
AF15
AF17
AF19
AF21

7

MAX
MAX

PP1V8_IMU_OWL
PP1V8_ALWAYS

1.62-1.98V @1mA

MAX

PP1V8
VDD18_FMON :1.62-1.98V @1mA MAX
VDD18_UVD :1.62-1.98V @5mA MAX
VDD18_AMUX :1.62-1.98V @1mA MAX
VDD18_TSADC:1.645-1.89V @2mA MAX

1

C1330
2.2UF

20%
2 6.3V
X5R-CERM
0201
ROOM=SOC

w

8

A10
A26
AD1
AH35
AT22
AT7
G1
L35
A15
A23
AB34
AD2
AH34
AR13
AR17
AR22
AR7
AT15
B10
B26
G2
L34
N2
R1
U34
V2
W35

OMIT_TABLE

U0600
MAUI-2GB-25NM-DDR-H
VDD1

SYM 12 OF 14
ROOM=SOC

CRITICAL

VDD2

F30
H30
K30
M30
VDDIO18_GRP1
N31
P30
H5
VDDIO18_GRP2
K5
AN9
AA5
AC5
VDDIO18_GRP3
AG5
AL5
AM23 VDDIO18_GRP4
AE28
VDDIO18_GRP10
AG28
Y5 VDDIO18_GRP11
AG26
AM22
AD13
AN24
AG13
AK8
AB8
N20
U23
AK23

FCMSP
SC58980X0B-A040

VDD18_LPOSC
VDD18_FMON
VDD18_UVD
VDD18_AMUX

VDD18_TSADC

VSS

(OWL)
(AON)

U14
U16
U18
U22
U24
U26
U28
U35
V1
V5
AA29
U29
V9
V11
V13
V15
V17
V19
V21
V23
V25
V27
W30
W1
W6
W10
W12
W14
W16
W18
W20
W22
W24
W28
W29
W34
Y1
Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
Y27
Y34
AC29
AD28
AE27
AG27
AJ30
AJ35
AK19
AT27
D31
G30
L30
P4
U8
V30
A28
AL32
T21

C

B

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SOC:POWER (3/3)
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

13 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

12 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

S3E NAND
R1530
28 21 20 14 13 12 9 8 7 6 5 3
29

PP1V8

1

24.9

PP1V8_NAND_AVDD

2

1%
1/32W
MF
01005

D

1

C1520
15UF

20%
2 6.3V
X5R
0402-1

1

C1521

1

1

C1524

20%
2 6.3V
X5R-CERM
01005

ROOM=NAND

ROOM=NAND

NAND_AGND

0.1UF

20%
6.3V
2 CERM-X5R
0402-9

20%
2 6.3V
X5R
0402-1

ROOM=NAND

C1522

10UF

15UF

0.1UF

20%
2 6.3V
X5R-CERM
01005

20%
2 6.3V
X5R-CERM
0201
13

ROOM=NAND

1

C1525

C1526

15UF

5%
2 16V
NP0-C0G
01005

ROOM=NAND

C1523

1

100PF

5%
2 16V
NP0-C0G
01005

ROOM=NAND

ROOM=NAND

1

100PF

D

C1531

1

2.2UF

ROOM=NAND

1

C1530

20%
2 6.3V
X5R
0402-1

ROOM=NAND

ROOM=NAND

PP3V0_NAND
1
1

C1527

1

2.2UF

C1528

PP0V9_NAND

20%
2 6.3V
X5R
0402-1

1

C1540
15UF

20%
2 6.3V
X5R
0402-1

1

C1541

10UF

15UF

20%
6.3V
2 CERM-X5R
0402-9

20%
2 6.3V
X5R
0402-1

ROOM=NAND

C1542

1

C1504

1

ROOM=NAND

ROOM=NAND

ROOM=NAND

15UF

20%
6.3V
2 X5R
0402-1

20%
2 6.3V
X5R
0402-1

20%
2 6.3V
X5R
0402-1

H8
H6

PCIE_REFCLK_P
PCIE_REFCLK_M

G9

IN

13 6

IN

90_PCIE_AP_TO_NAND_REFCLK_P
90_PCIE_AP_TO_NAND_REFCLK_N

OUT

PCIE_NAND_TO_AP_CLKREQ_L

6

ROOM=NAND

NOSTUFF

45_PCIE_NAND_RESREF
1

R1501
3.01K

2

B

1%
1/20W
MF
201

ROOM=NAND

13 6

IN

13 6

IN

13 6

IN

13 6

IN

6
6

OUT
OUT

6

OUT

6

OUT

M6

1

ROOM=NAND

C1505
15UF

20%
2 6.3V
X5R
0402-1

ROOM=NAND

ROOM=NAND

1

M8
K8

100PF

5%
2 16V
NP0-C0G
01005

90_PCIE_AP_TO_NAND_TXD1_P
90_PCIE_AP_TO_NAND_TXD1_N
90_PCIE_NAND_TO_AP_RXD0_P
90_PCIE_NAND_TO_AP_RXD0_N
90_PCIE_NAND_TO_AP_RXD1_P
90_PCIE_NAND_TO_AP_RXD1_N

P8
N7

M2
K2

C1507

1

100PF

100PF

5%
2 16V
NP0-C0G
01005

5%
2 16V
NP0-C0G
01005

ROOM=NAND

ROOM=NAND

1

C

C1510
100PF

5%
2 16V
NP0-C0G
01005

ROOM=NAND

OA0
OA10
OD0
OD10
OG0
OG10

ROOM=NAND

C1508

VCC
VCC
VCC
VCC
VCC
VCC

A5
OB0
OB10
OF0
OF10
R5

.c

fi

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

x

A3
A7
F2
J1
J9
R3
R7

1

WLGA
EXT_D0
EXT_D1
EXT_D2
EXT_D3
EXT_D4
EXT_D5
EXT_D6
EXT_D7

ROOM=NAND
CRITICAL

PCIE_RX1_P
PCIE_RX1_M

G3
J3
H2
E3
E7
F6
C7
B8

EXT_NCE

VER-1

PCIE_RX0_P
PCIE_RX0_M

N5
N3

C1509

U1500

BOMOPTION=OMIT_TABLE

PCI_RESREF

90_PCIE_AP_TO_NAND_TXD0_P
90_PCIE_AP_TO_NAND_TXD0_N

VDD
VDD
VDD
VDD
VDD
VDD
VDD

E5
VREF

C3
AVDD1

PCIE_CLKREQ*

13 6

1%
1/32W
MF
01005

ROOM=NAND

THGBX5G7D2KLFXG

CLK_IN

IN

R1561

K4
K6

D2

8

10K

2

NAND_VREF
AP_TO_NAND_SYS_CLK

a

1%
1/32W
MF
01005

in

1

0.01UF

10%
2 6.3V
X5R
01005

R1560

.c

C1561

ROOM=NAND

w

2

ROOM=NAND

1

ROOM=NAND

10%
2 6.3V
X5R-CERM
01005

10K

0.01UF

10%
2 6.3V
X5R
01005

ROOM=NAND

1000PF

G1

EXT_NRE

PCIE_TX0_P
PCIE_TX0_M

NC
NC
NC
NC
NC

G5

EXT_CLE

H4

EXT_ALE

IN

16

IN

8

ROOM=NAND

P3MM-NSM
SM
1

PP1520

PP

SYSTEM_ALIVE

IN

11 16 17

PCIE_AP_TO_NAND_RESET_L

C5

EXT_RNB

PCIE_TX1_P
PCIE_TX1_M

PMU_TO_NAND_LOW_BATT_BOOT_L
AP_TO_NAND_FW_STRAP

F4

EXT_NWE

w

C1560

20%
2 6.3V
X5R-CERM
01005

20%
2 6.3V
X5R-CERM
01005

C1554

w

1

0.1UF

h

ROOM=NAND

NOSTUFF

C1551

PCI_VDD1
PCI_VDD2

PP1V8

0.1UF

1

J7

20%
2 6.3V
X5R
0402-1

C1550

1

PCI_AVDD_H

15UF

1

M4
J5

C1546

PCI_AVDD_CLK1
PCI_AVDD_CLK2

1

1

C1503

10UF

20%
6.3V
2 CERM-X5R
0402-9

ROOM=NAND

ROOM=NAND

C1506
15UF

ROOM=NAND

C1543

o

ROOM=NAND

1

m

C1548
15UF

28 21 20 14 13 12 9 8 7 6 5 3
29

1

ROOM=NAND

20%
2 6.3V
X5R
0402-1

C

C1502
15UF

ROOM=NAND

15UF

1

1

20%
2 6.3V
X5R
0402-1

ROOM=NAND

1

15

C1501
15UF

20%
2 6.3V
X5R
0402-1

20%
2 6.3V
X5R-CERM
0201

ROOM=NAND

1

15UF

2.2UF

20%
2 6.3V
X5R-CERM
0201

C1500

15

IN

6

SWD_AP_BI_NAND_SWDIO_R
SWD_AP_NAND_SWCLK_R

R1520
0.00

1
0% MF

D4

1/32W

01005

BI

9

ROOM=NAND

B

R1521
1
0% MF

NC

SWD_AP_BI_NAND_SWDIO

2

0.00

SWD_AP_PERIPHERAL_SWCLK

2
1/32W

01005

IN

9 33

ROOM=NAND

NC

1

PP

PP1521

SM

P3MM-NSM

45_NAND_ZQ
1

D8

TRST*

D6

ZQ

R1500
34.8

2

0.5%
1/32W
MF
01005

ROOM=NAND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NC

RESET*

B4
B6
OE10
G7
L3
L5
L7
P2
P4
P6
OC0
OC10
OE0

F8

AP_TO_NAND_RESET_L

VSSA

IN

B2

5

NAND_AGND

13

ROOM=NAND

PCIE RECEIVE-SIDE PROBE POINTS
ROOM=NAND
13 6
13 6

90_PCIE_AP_TO_NAND_REFCLK_P
90_PCIE_AP_TO_NAND_REFCLK_N

P3MM-NSM
SM
1
PP

1

PP

PP1500
PP1501

SM

P3MM-NSM
ROOM=NAND

A

ROOM=NAND
13 6
13 6

90_PCIE_AP_TO_NAND_TXD0_P
90_PCIE_AP_TO_NAND_TXD0_N

SYNC_MASTER=N/A

P3MM-NSM
SM
1
PP

1

PP

PP1502
PP1503

SYNC_DATE=N/A

PAGE TITLE

NAND
DRAWING NUMBER

SM

P3MM-NSM

Apple Inc.

ROOM=NAND

13 6

90_PCIE_AP_TO_NAND_TXD1_P
90_PCIE_AP_TO_NAND_TXD1_N

P3MM-NSM
SM
1
PP

1

PP

REVISION

4.0.0

R

ROOM=NAND
13 6

051-00648

NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PP1504
PP1505

BRANCH

PAGE

15 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

SM

P3MM-NSM

II NOT TO REPRODUCE OR COPY IT

ROOM=NAND

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

13 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

ANTIGUA PMU - Buck Supplies
CRITICAL

D

OMIT_TABLE

U2000

ANTIGUA-D2255A080

10UF

20%
20%
VOLTAGE=6.3V 2 VOLTAGE=6.3V
CERM-X5R
CERM-X5R
0402-9
0402-9
ROOM=PMU

ROOM=PMU

A4
B4
C4

2.2UF

20%
2 VOLTAGE=6.3V
X5R-CERM
0201

ROOM=PMU

2.2UF

20%
2 VOLTAGE=6.3V
X5R-CERM
0201

ROOM=PMU

C2092
2.2UF

20%
2 VOLTAGE=6.3V
X5R-CERM
0201

ROOM=PMU

A8
B8
C8

C2093
2.2UF

20%
VOLTAGE=6.3V
2 X5R-CERM
0201

1

C2094

20%
2 VOLTAGE=6.3V
X5R-CERM
0201

ROOM=PMU

C2095

1

2.2UF

20%
2 VOLTAGE=6.3V
CERM-X5R
0402-9
ROOM=SOC

J17
J18
J19

C

ROOM=PMU

T18
T19
V12
Y12
Z12
N17
N18
N19

19 12

B
11

PP1V8_TOUCH
PP1V8_IMU_OWL

VOLTAGE=1.8V
VOLTAGE=1.8V

PP1V1

VOLTAGE=1.1V

CRITICAL

BUCK0_LX2

1.1A MAX

BUCK5

C2050

1

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

20%
2 VOLTAGE=6.3V
X5R
0402-1

400mA MAX

BUCK6

C2060
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

20%
2 VOLTAGE=6.3V 2
X5R
0402-1

5%
VOLTAGE=16V
NP0-C0G
01005

15UF

ROOM=PMU

1

C2070

1

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

A

45_BUCK5_FB

C2071
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

ROOM=PMU

CRITICAL
45_BUCK6_FB
CRITICAL

100PF

21

IN

VDD_BUCK1_01

BUCK0_LX3

VDD_BUCK2

VOLTAGE=1.0V
0.80V/0.90V/1.0V

1.1A MAX

BUCK8

PP_GPU_SRAM

C2080

1

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

C2081
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

BUCK0_LX3

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1
ROOM=PMU

C2008

1

15UF

C2009

1

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

20%
VOLTAGE=6.3V
2 X5R
0402-1

ROOM=PMU

ROOM=PMU

C2010
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1
ROOM=PMU

1

C2011
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1
ROOM=PMU

ROOM=PMU

CRITICAL
45_BUCK0_PP_CPU_FB

IN

L2010

BUCK1_LX0

A17
B17
C17

1

BUCK1_LX0

10

PP_GPU

2
ROOM=PMU

1

CRITICAL

L2011

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

0.47UH-20%-3.8A-0.048OHM
BUCK1_LX1

VDD_BUCK4

A15
B15
C15

1

BUCK1_LX1

C2012

2

1

C2013
15UF

20%
VOLTAGE=6.3V
2 X5R
0402-1

ROOM=PMU

1

C2014
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

BUCK1_LX2

BUCK1_LX3

VDD_BUCK8

BUCK1_FB F12

BUCK3_SW1

BUCK4_SW1

A11
NC
B11
NC
C11
NC

BUCK2_LX0

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

C2016

C

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

ROOM=PMU

CRITICAL

BUCK1_LX2

2

1

1

C2017
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

PIQA20161T-SM
ROOM=PMU

CRITICAL

1

C2018
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

1

C2019
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

2X 15UF BULK CAPS
REMOVED FOR N69

ROOM=PMU

4TH PHASE INDUCTOR
REMOVED FOR N69

45_BUCK1_PP_GPU_FB

IN

L2020

10 16

1.0UH-20%-3.6A-0.060OHM
H17
H18
H19

1

BUCK2_LX0

PP_SOC

2
ROOM=PMU

CRITICAL

1

15UF

0.47UH-20%-3.8A-0.048OHM
K17
K18
K19

BUCK2_FB J14

BUCK2_LX1

1

C2022

20%
2 VOLTAGE=6.3V
X5R
0402-1

2

1

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

PIQA20121T-SM

C2023

1

C2024
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

1

C2025
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

1

10

VOLTAGE=0.825V
0.725V/0.825V

PIQA20161T-SM

L2021

BUCK2_LX1

15UF

1

ROOM=PMU

L2012

A13
B13
C13

C2015

PIQA20121T-SM

1.0UH-20%-3.6A-0.060OHM

VDD_BUCK5

1

10

VOLTAGE=0.9V
0.70V/0.80V/0.9V

PIQA20161T-SM

VDD_BUCK3

U16 BUCK3_SW2
U15 BUCK3_SW3
V16
Y16
Z16

1
PIQA20121T-SM

C2026
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

B

ROOM=PMU

ROOM=PMU

CRITICAL
45_BUCK2_PP_SOC_FB

IN

10

L2030

1.0UH-20%-3.6A-0.060OHM
M17
M18
M19

BUCK5_LX0

BUCK3_LX0

R18
R19

BUCK3_LX0
CRITICAL

1

BUCK3_FB

V19

XW2030

1

SHORT-10L-0.1MM-SM
1
2

45_BUCK3_FB

H1
H2

VBUCK3_SW
BUCK6_LX0

8 12 15 16 17 24 26 30 33

VOLTAGE=1.8V

PIQA20161T-SM

ROOM=PMU

M13 BUCK5_FB

PP1V8_SDRAM

2

U17
V17
Y17
Z17

C2030
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

1

C2031
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

1

C2032
100PF

5%
2 VOLTAGE=16V
NP0-C0G
01005

ROOM=PMU

ROOM=PMU

L2040

F1
F2

BUCK4_LX0

BUCK7_LX0

V11
Y11
Z11

1

BUCK4_LX0

C1 BUCK7_FB

ROOM=PMU

L2080

BUCK4_LX1

BUCK8_LX0

PIXB2016FE-SM
ROOM=PMU

CRITICAL

F17
F18
F19

BUCK4_FB T9
BUCK8_LX0

11 12 15

VOLTAGE=1.1V

ROOM=PMU

CRITICAL

1

BUCK4_LX1
CRITICAL

1

2
PIQA20121T-SM

C2040
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1
ROOM=PMU

1

C2041
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1
ROOM=PMU

1

C2042
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1
ROOM=PMU

1

C2043
15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1
ROOM=PMU

1

C2044
100PF

5%
2 VOLTAGE=16V
NP0-C0G
01005
ROOM=PMU

SYNC_MASTER=N/A

ROOM=PMU

SYNC_DATE=N/A

PAGE TITLE

XW2040
SHORT-10L-0.1MM-SM
45_BUCK4_FB

1

SYSTEM POWER:PMU (1/3)

2

DRAWING NUMBER

ROOM=PMU

XW2080

45_BUCK8_FB

V13
Y13
Z13

PP1V1_SDRAM

2
PIQA20161T-SM

0.47UH-20%-3.8A-0.048OHM

45_BUCK7_FB

SHORT-10L-0.1MM-SM
2
1

1

1.0UH-20%-3.6A-0.060OHM

VDD_BUCK7

U18
V18
Y18
Z18

2

L2041

1

1

C2007

1.0UH-20%-3.6A-0.060OHM

ROOM=PMU

2
1

A9
B9
C9

BUCK0_FB F8

VDD_BUCK1_23

1.0UH-20%-2.25A-0.15OHM
11

CRITICAL

XW2070
SHORT-10L-0.1MM-SM

ROOM=PMU

1

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

J5 BUCK6_FB

PIXB2016FE-SM

2

C2006
15UF

PIQA20161T-SM

L2070

ROOM=PMU

1

1

ROOM=PMU

1.0UH-20%-2.25A-0.15OHM
2
1
BUCK7_LX0

PP_CPU_SRAM
VOLTAGE=1.0V
0.80V/0.90V/1.0V

1

0603

C2062

C2061

2

L2003

L2060

1

1

BUCK0_LX2

ROOM=PMU

PP1V2_CAMERA
1

1.1A MAX

2

ROOM=PMU

VOLTAGE=1.2V

11

XW2050
SHORT-10L-0.1MM-SM
1UH-20%-1.2A-0.320OHM
2
1
BUCK6_LX0

ROOM=PMU

BUCK7

ROOM=PMU

15UF

ROOM=PMU

21

C2051

A7
B7
C7

VBUCK4_SW

C19 BUCK8_FB

Apple Inc.

V15
Y15
Z15

051-00648
REVISION

4.0.0

R

ROOM=PMU

NOTICE OF PROPRIETARY PROPERTY:

ROOM=PMU

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

ROOM=PMU

PAGE

20 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

14 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

BUCK4

1

PIQA20161T-SM

ROOM=PMU

4.7A MAX

VOLTAGE=0.85V

20%
2 VOLTAGE=6.3V
X5R
0402-1

BUCK3

PP_FIXED

ROOM=PMU

15UF

1.5A MAX

11 7 6

ROOM=PMU

C2005

L2002

L2050

1.0UH-20%-3.6A-0.060OHM
2
1
BUCK5_LX0

20%
2 VOLTAGE=6.3V
X5R
0402-1

1

ROOM=PMU

VDD_BUCK6

E17
E18
E19

29

ROOM=PMU

15UF

CRITICAL
1.0UH-20%-3.6A-0.060OHM

VDD_BUCK0_23

E1
E2

VOLTAGE=1.8V

20%
2 VOLTAGE=6.3V
X5R
0402-1

C2004

PIQA20121T-SM

VDD_BUCK0_01

J1
J2

PP1V8

1

15UF

20%
2 VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

C2003

BUCK1

5%
2 VOLTAGE=16V
NP0-C0G
01005

29 28 21 20 13 12 9 8 7 6 5 3

ROOM=PMU

1

15UF

BUCK2

100PF

20%
2 VOLTAGE=6.3V
X5R
0402-1

C2002

4.7A MAX

C2099

1

15UF

10.5A MAX

1

2

C2001

0.47UH-20%-3.8A-0.048OHM

A12
B12
C12

10UF

ROOM=PMU

1

ROOM=PMU

A16
B16
C16
1

20%
2 VOLTAGE=6.3V
X5R
0402-1

m

20%
2 VOLTAGE=6.3V
X5R-CERM
0201

C2091

1

BUCK0_LX1

1

.c

2.2UF

C2090

1

BUCK0_LX1

A5
B5
C5

C2000
15UF

0.47UH-20%-3.8A-0.048OHM

x

C2089

1

L2001

fi

1

1

10

VOLTAGE=1.03V
0.625V/0.9V/1.03V

a

ROOM=PMU

ROOM=PMU

CRITICAL

in

20%
VOLTAGE=6.3V 2
CERM-X5R
0402-9

PP_CPU

2
PIQA20161T-SM

o

10UF

C2088

1

BUCK0

ROOM=PMU

10UF

1

BUCK0_LX0

12.5A MAX

20%
2 VOLTAGE=6.3V 2
CERM-X5R
0402-9

C2087

1

A3
B3
C3

h

10UF

C2086

.c

1

w

C2085

BUCK0_LX0

w

1

SYM 2 OF 5
ROOM=PMU
BAT/USB

PP_VCC_MAIN

1.0UH-20%-3.6A-0.060OHM

CSP

BUCK INPUT

33 26 25 24 22 21 17 15

IN

V3 VDD_MAIN_SNS
R6
F10
L13
L5 VDD_MAIN
R8
L4

w

15

VCC_MAIN_SNS

D

L2000

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

ANTIGUA LDO SPECS

ANTIGUA PMU - LDOs

14

OUT

VCC_MAIN_SNS

10UF

20%
2 6.3V
CERM-X5R
0402-9

XW2105

C2121

20%
2 6.3V
CERM-X5R
0402-9

ROOM=PMU

+/-2.5%

50mA

2.5-3.3V

+/-2.5%

50mA

0.7-1.2V

+/-2.5%

50MA

LDO5 (F)

2.5-3.3V

+/-2.5%

1000mA

LDO6 (C1)

1.2-3.6V

+/-2.5%

150mA

LDO7 (C)

2.5-3.3V

+/-25MV

200MA

2.5-3.3V

+/-25mV

200MA

LDO9 (C)

2.5-3.3V

+/-25mV

250mA

LDO10 (G)

0.7-1.2V

+/-2.5%

1335mA

LDO11 (C)

2.5-3.3V

+/-25mV

250mA

LDO12 (E)

10UF

1.2-1.9V

LDO8 (C)

C2120

1

50mA

LDO4 (D)

1.8V

+/-5%

10mA

LDO13 (C)

2.5-3.3V

+/-25mV

250mA

LDO14 (H)

0.8-1.5V

+/-2.5%

250mA

LDO15 (B)

PP_VCC_MAIN
1

+/-2.5%

LDO3 (A)

1

2.5-3.3V

LDO2 (B)

D

ACCURACY

LDO1 (A)

33 26 25 24 22 21 17 14

ADJ.RANGE

1.2-2.0V

+/-2.5%

50mA

LDO#

C2122

MAX.CURRENT

D

10UF

20%
2 6.3V
CERM-X5R
0402-9

ROOM=PMU

ROOM=PMU

SHORT-10L-0.1MM-SM
2
1
ROOM=PMU

10UF

20%
2 6.3V
CERM-X5R
0402-9

20%
2 6.3V
CERM-X5R
0402-9

U2000

ANTIGUA-D2255A080

ROOM=PMU

CSP
M3
V2
M2
U1
U2
L2
Y6
Y4
Y3
Y9
Z9
R3
Y5
Y7
N2
K3

PP1V1_SDRAM

C2130

1

2.2UF

20%
6.3V
X5R-CERM 2
0201

C

C2131

1

2.2UF

20%
6.3V
X5R-CERM 2
0201

ROOM=PMU

ROOM=PMU

PP1V8_SDRAM

C2132

OMIT_TABLE

1

2.2UF

20%
6.3V 2
X5R-CERM
0201

SYM 1 OF 5
ROOM=PMU

VDD_LDO1_3
VDD_LDO2
VDD_LDO4

VLDO1
VLDO2
VLDO3
VLDO4

VDD_LDO5
VDD_LDO6
VDD_LDO7
VDD_LDO8
VDD_LDO9

VLDO5

VDD_LDO10
VDD_LDO11
VDD_LDO13
VDD_LDO14
VDD_LDO15
VDD_BYPASS

VLDO6
VBYPASS
VLDO7
VLDO8
VLDO9
VLDO9_FB
VLDO10

P12 VPP_OTP

VLDO11
VLDO12
VLDO13
VLDO14
VLDO15

ROOM=PMU

M1
V1
L1
N1
T1
T2
K1
K2
Z6
Z4
Z3
Y2
Y8
Z8
R2
K6
Z5
Z7
P2

1

RCAM_AF_FB

VPUMP U19

U2000

ROOM=PMU

45_PMU_VPUMP
1

A

NC

.c

OMIT_TABLE

ROOM=PMU

U2000

w

CRITICAL

20%
2 6.3V
X5R-CERM
01005

ANTIGUA-D2255A080
CSP
A1
A10
A14
A18
A19
A2
A6
B1
B10
B14
B18
B19
B2
B6
C10
C14
C18
C2
C6
D1
D19
E14
G1
G17
G18
G19
G2
H7
J6
K12
K7
L17
L18
L19
L6
L7

SYM 4 OF 5
ROOM=PMU

CRITICAL
OMIT_TABLE

VSS

L9
M8
M9
N10
N12
N13
N9
P10
P11
P18
P19
P5
R10
R11
R12
R9
T16
T3
T6
T8
U3
U9
V10
V14
V8
V9
Y1
Y10
Y14
Y19
Z1
Z10
Z14
Z19
Z2

w

ROOM=PMU

J15
J16
J3
J4
K15
K16
L15
L16
M14
M15
M16
N14
N15
N16
P13
P14
P15
P16
P17
R13
R14
R15
R16
R17
T10
T11
T12
T13
T14
T15
T17
U10
U11
U12
U13
U14
U4
U5
U6
V4
V5
V6

C2100
47NF

VPUMP:10nF min. @ 4.6V

SYM 5 OF 5

NC

SHORT-10L-0.1MM-SM

1

C2101

1

2.2UF

2.2UF

20%
2 6.3V
X5R-CERM
0201

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=PMU

C2102

1

20%
2 6.3V
X5R-CERM
0201
ROOM=PMU

45_PMU_VSS_RTC

C2104
2.2UF

20%
2 6.3V
X5R-CERM
0201
ROOM=PMU

1

C2106
2.2UF

20%
2 6.3V
X5R-CERM
0201
ROOM=PMU

1

1

1

2.2UF

C2110
2.2UF

20%
6.3V
2 X5R-CERM
0201

20%
2 6.3V
X5R-CERM
0201

ROOM=PMU

ROOM=PMU

C2112
0.1UF

20%
2 6.3V
X5R-CERM
01005
ROOM=SOC

LDO6

PP3V0_PROX_ALS
PP3V1_VIBE
PP2V5_RCAM_AF
PP0V9_NAND
PP3V0_PROX_IRLED
PP1V8_ALWAYS
PP3V1_MESA
PP1V2
PP1V9_MESA

C2115
2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=PMU

1

30

1

20%
2 6.3V
X5R-CERM
0201

ROOM=PMU

C2108

C2113
2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=PMU

1

C2111
2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=PMU

2.2UF

C2109
2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=PMU

1

1

PP3V3_ACC

VOLTAGE=3.0V
VOLTAGE=1.8V
VOLTAGE=3.1V
VOLTAGE=1.2V
VOLTAGE=1.9V

C2107

13

VOLTAGE=3.0V
VOLTAGE=3.1V
VOLTAGE=2.5V

1

26 30 31 33

LDO1
LDO2
LDO3
LDO4
LDO5

VOLTAGE=3.3V

C2103

PP3V3_USB
PP1V8_VA
PP3V0_TRISTAR
PP0V8_OWL
PP3V0_NAND

VOLTAGE=0.9V

w

B

D10
D11
D12
D13
D14
D15
D16
D17
D18
D2
D5
D6
D7
D8
D9
D3
E10
E11
E12
E13
D4
E15
E16
E3
E4
E5
E7
E8
E9
F14
F15
F16
F3
F4
G14
G15
G16
G3
G4
H15
H16
H3
H4

XW2100

2

ANTIGUA-D2255A080
CSP

VOLTAGE=3.3V
VOLTAGE=1.8V
VOLTAGE=3.0V
VOLTAGE=0.8V
VOLTAGE=3.0V

m

ROOM=PMU

33 30 26 24 17 16 14 12 8

CRITICAL

10UF

20%
2 6.3V
CERM-X5R
0402-9

14 12 11

C2127

o

1

10UF

ROOM=PMU

.c

C2126

20%
2 6.3V
CERM-X5R
0402-9

LDO

1

ROOM=PMU

10UF

x

ROOM=PMU

C2125

fi

20%
2 6.3V
CERM-X5R
0402-9

1

a

10UF

C2124

in

1

h

C2123

LDO INPUT

1

ROOM=PMU

1

1

5
24 25

11

21

LDO7
LDO8
LDO9

13

LDO10

20
32

LDO11
LDO12
LDO13
LDO14
LDO15

20
8 12 17
27
5 6 7
27

C2116
2.2UF

20%
2 6.3V
X5R-CERM
0201
ROOM=PMU

C2114
2.2UF

20%
2 6.3V
X5R-CERM
0201

B

ROOM=PMU

16

NOTE: T3 IS XTAL REF GND

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SYSTEM POWER:PMU (2/3)
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

21 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

15 OF 60

IV ALL RIGHTS RESERVED

8

7

C

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

CONTROL PIN NOTES:

ANTIGUA PMU - GPIOs, NTCs

NOTE
NOTE
NOTE
NOTE

(1):INPUT PULL-DOWN 100-300k
(2):INPUT PULL-DOWN 1M
(3):INPUT PULL-UP OR DOWN 100k-300k
(4):OUTPUT OPEN-DRAIN, REQUIRES PULL-UP

D

D
CRITICAL
ROOM=PMU

100K

2

5%
1/32W
MF
01005

ROOM=PMU

ANTIGUA-D2255A080
CSP

R2261

SYM 3 OF 5

100K

2

5%
1/32W
MF
01005

5
30

IN

8

ROOM=PMU

IN

PMU_TO_SYSTEM_COLD_RESET_L

C2260

9

10%
2 6.3V
X5R-CERM
01005

9

OWL_TO_PMU_SHDN

IN

IN

1

1000PF

11 9 OUT

ROOM=PMU

9

IN

30 26 9 5 OUT
9 OUT
33 16

OUT

OUT

RESET_IN1
RESET_IN2
RESET_IN3
RESET*
SHDN
SLEEP1_REQ
SLEEP1_RDY
ACTIVE_REQ
ACTIVE_RDY

N3
N7
P3
P4

PMU_TO_OWL_CLK32K
45_PMU_TO_WLAN_CLK32K

(3)
(3)
(4)

C

26 16 8
26 8

1

C2270

R2270
200K

0.22UF

20%
2 6.3V
X5R
0201

1%
1/20W
MF
201

2

ROOM=PMU

PRE_UVLO M5

(4)

PMU_TO_AP_SOCHOT0_L

R2201
VDROOP G5

0.00

PMU_VDROOP_OUT

1
MF 0%

2

1/32W
01005

ROOM=PMU

VDROOP_DET H5

L3 TMPR_DET

8

OUT

PMU_VDROOP_DET_IN

(2)
(4)

1
MF 1%

1

R7 SCL
T7 SDA

C2205

R2205
2
150

45_BUCK1_PP_GPU_FB

1/32W
01005

NOTE:VDROOP_DET R/C Low-pass Fc=1.06MHz

ROOM=PMU

1000PF

10 14

IN

NO_XNET_CONNECTION=1

C

10%
2 10V
X5R
01005

ROOM=PMU

R2210

1

100PF

5%
16V 2
NP0-C0G
01005
ROOM=PMU

10KOHM-1%
2

28 26
30 16

FOREHEAD_NTC_RETURN

IN
IN

26 16

01005
ROOM=PMU

IN

3 OUT
33

33

IN

IN

33 16

IN

33

IN

32 8

1

IN

33

B

R2220

1

100PF

5%
16V 2
NP0-C0G
01005
ROOM=PMU

10KOHM-1%
2

IN

3 OUT

RCAM_NTC_RETURN

01005
ROOM=PMU

FOREHEAD_NTC
REAR_CAMERA_NTC
RADIO_PA_NTC
AP_NTC
45_PMU_TCAL

SHORT-10L-0.1MM-SM
1
2
ROOM=PMU

XW2210

SHORT-10L-0.1MM-SM
1
2
ROOM=PMU

XW2220

C2230

SHORT-10L-0.1MM-SM
1
2
ROOM=PMU

XW2230

R2230

1

100PF

5%
16V 2
NP0-C0G
01005
ROOM=PMU

10KOHM-1%
2

PA_NTC_RETURN

01005
ROOM=PMU

M6
M7
N4
N5
N6

PMU_VDD_RTC
1

SHORT-10L-0.1MM-SM
1
2
ROOM=PMU

AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_B4
AMUX_B5
AMUX_B6
AMUX_B7
AMUX_BY
TDEV1
TDEV2
TDEV3
TDEV4
TCAL

P1 XTAL1
R1 XTAL2

45_PMU_XTAL1
45_PMU_XTAL2

RADIO PA NTC
1

N11
M12
NC
L11
M10
L14
L12
M11
L10
K14

w

C2220

BB_TO_PMU_AMUX_LDO5
BUTTON_VOL_DOWN_L
45_PMU_TO_WLAN_CLK32K
BB_TO_PMU_AMUX_LDO11
BUTTON_VOL_UP_L
BB_TO_PMU_AMUX_SMPS4
PMU_AMUX_BY

IN

32 8

REAR CAMERA NTC

BB_TO_PMU_AMUX_SMPS1

w

C2210

C2203
1000PF

G6
F6
E6
F5

10%

TRISTAR_TO_PMU_USB_BRICK_ID
CHESTNUT_TO_PMU_ADCMUX

IN

2 6.3V
X5R-CERM

16 30

01005

ROOM=CHESTNUT

BUTTON_MENU_KEY_BUFF_L
BUTTON_HOLD_KEY_BUFF_L
BUTTON_RINGER_A

IN

8 9 16

IN

8 9 16

IN

BUTTON1 + BUTTON2 ASSERTED FOR
& gt; TBD SECONDS CAUSES TWO-FINGER RESET

8 16 32

NC

F7
TIGRIS_TO_PMU_INT_L
G7 BB_TO_PMU_HOST_WAKE_L
J7
PMU_TO_BB_PMIC_RESET_R_L
G8 TRISTAR_TO_AP_INT
H8
STOCKHOLM_TO_PMU_HOST_WAKE
J8
PMU_TO_NAND_LOW_BATT_BOOT_L
K8
WLAN_TO_PMU_HOST_WAKE
F9
CODEC_TO_PMU_MIKEY_INT_L
G9 PMU_TO_BT_REG_ON
H9
BT_TO_PMU_HOST_WAKE
J9
PMU_TO_WLAN_REG_ON
G10
NC
H10 PMU_TO_CODEC_DIGLDO_PULLDN
J10 CODEC_TO_AP_PMU_INT_L
F11 PMU_TO_BB_USB_VBUS_DETECT
G11 PMU_TO_STOCKHOLM_EN
H11 WLAN_TO_PMU_PCIE_WAKE_L
K9
NC
J11 PMU_TO_LCM_PANICB
G12
NC
H12 I2C0_AP_SCL

IN

17

IN

33

R2200
1

IN

8 30

IN

33

OUT

13

IN

33

OUT

33

33

IN

OUT

5%
1/32W
MF
01005
ROOM=PMU

24

OUT

PMU_TO_BB_PMIC_RESET_L

33

IN

1.00K 2

33

OUT
IN

B

24
8 24

OUT

33

OUT

33

IN

33

OUT

28

IN

8 16 26

0.22UF

XW2240

20%
2 6.3V
X5R
0201

ROOM=PMU

CRITICAL

Y2200

32.768KHZ-20PPM-12.5PF
1

R2240

1

100PF

5%
16V 2
NP0-C0G
01005
ROOM=PMU

1

16 26

C2202

1

A

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

P6 VDD_RTC

AP NTC

C2240

.c

x

IN

ADC

16 9 8

IN

BRICK_ID T5
ADC_IN R5

BUTTON1
BUTTON2
BUTTON3
BUTTON4

BUTTONS

IN

1

GPIO

IN

5

fi

32 16 8

FOREHEAD NTC

IN

AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_A4
AMUX_A5
AMUX_A6
AMUX_A7
AMUX_AY

AMUX

16 9 8

F13
G13
J12
H13
H14
K10
K11
K13
J13

AP_TO_PMU_AMUX_OUT
BUTTON_MENU_KEY_BUFF_L
BUTTON_RINGER_A
AP_TO_PMU_TEST_CLKOUT
BUTTON_HOLD_KEY_BUFF_L
LCM_TO_CHESTNUT_PWR_EN
TRISTAR_TO_PMU_USB_BRICK_ID
CHESTNUT_TO_PMU_ADCMUX
PMU_AMUX_AY

IN

NTC

5

XTAL

OUT

(1)

a

9

(1)

in

IN

h

26 9

U7 SCLK
U8 MOSI
V7 MISO

45_DWI_PMGR_TO_PMU_SCLK
45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
DWI_PMU_TO_PMGR_MISO

.c

IN

w

9

PMGR

o

BI

1

(1)

L8 IRQ*

I2C0_AP_SCL
I2C0_AP_SDA

IN

PMU_VREF

ROOM=PMU

H6 SYS_ALIVE

PMU_TO_AP_IRQ_L

VREF M4

(1)

T4 SLEEP_32K
R4 OUT_32K

NC

45_PMU_IREF

(1)

OWL_TO_PMU_SLEEP1_REQUEST
PMU_TO_OWL_SLEEP1_READY
OWL_TO_PMU_ACTIVE_REQUEST
PMU_TO_OWL_ACTIVE_READY

SYSTEM_ALIVE

8 OUT

IREF K5

(3)

m

17 13 11

P7
P8
P9
K4
N8

AP_TO_PMU_WDOG_RESET
TRISTAR_TO_PMU_HOST_RESET
AP_TO_PMU_SOCHOT1_L

IN

REFS

R2260

1

COMPARATOR

1

9 5 3 OUT

OMIT_TABLE

U2000

PP1V8_SDRAM

RESETS

33 30 26 24 17 15 14 12 8

10KOHM-1%
2

1

C2250
100PF

AP_NTC_RETURN

1

5%
2 16V
NP0-C0G
01005
ROOM=PMU 2

01005
ROOM=PMU

C2200

R2250

2

1.60X1.00-SM

1

1

ROOM=PMU

18PF

3.92K

18PF

5%
2 16V
CERM
01005

5%
16V 2
CERM
01005

0.1%
1/20W
MF
0201
ROOM=PMU

ROOM=PMU

C2201

15

45_PMU_VSS_RTC

ROOM=PMU

XW2200

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SHORT-10L-0.1MM-SM
1
2

SYSTEM POWER:PMU (3/3)

ROOM=PMU

DRAWING NUMBER

Apple Inc.

NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

22 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

16 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

D

D

TIGRIS CHARGER
APN:343S00033
PP_VCC_MAIN
VOLTAGE=4.3V

C2330

1

10UF

C2331
10UF

20%
2 6.3V
CERM-X5R
0402-9

20%
2 6.3V
CERM-X5R
0402-9
ROOM=CHARGER

TIGRIS_LDO

F5

PP5V0_USB
1

C2310
4.2UF

15 12 8

10%
2 16V
X5R-CERM
0402-1

PP1V8_ALWAYS
1

ROOM=CHARGER

R2310

C2311
100PF

5%
2 35V
NP0-C0G
01005

ROOM=CHARGER
30 25 8

5%
1/32W
MF
01005

BI

30 25 8

100K

2

1

IN

16 13 11

ROOM=CHARGER

R2311
16

OUT

TIGRIS_TO_PMU_INT_L

1

100

2

1%
1/32W
MF
01005

30

IN

SYSTEM_ALIVE

1

TRISTAR_TO_TIGRIS_VBUS_OFF

F4

VBUS_OVP_OFF

TIGRIS_TO_PMU_INT_R_L

G2

INT

TIGRIS_VBUS_DETECT

F1

VBUS_DET

2

1

10%
16V
X5R
0201

D

ROOM=CHARGER

C2301

ROOM=CHARGER

C2302

1

100PF

TIGRIS_BUCK_LX

30.1K 2
1%
1/32W
MF
01005

1

100PF

5%
16V
NP0-C0G 2
01005

5%
16V
NP0-C0G 2
01005

ROOM=CHARGER

ROOM=CHARGER

PP_BATT_VCC

BAT_SNS E1

VBATT_SENSE

ACT_DIODE E2

HDQ_HOST G1
HDQ_GAUGE F2

2
PIQA20161T-SM

A1
B1
D1
C1

SDA
SCL

F3 TEST

o

.c

BAT
BAT
BAT
BAT

SYS_ALIVE

A4
B4
D4
C4

1

BGA
ROOM=CHARGER

1.0UH-20%-3.6A-0.060OHM

0.047UF

TIGRIS_BOOT

Q2300

G

L2300

C2300

CRITICAL

CSD68827W

A1

CRITICAL

IN

1

TIGRIS_ACTIVE_DIODE
SWI_AP_BI_TIGRIS
TIGRIS_TO_BATTERY_SWI_1V8

C2306
100PF

BI

3 18 33

18

NOSTUFF

8 9

R2300

17

1

100K

5%
2 16V
NP0-C0G
01005
ROOM=CHARGER

5%
1/32W
MF
01005
ROOM=CHARGER

A3
B3
D3
C3

USB_VBUS_DETECT

BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW

CRITICAL

E3

S

ROOM=CHARGER

w

OUT

ROOM=CHARGER

I2C1_AP_SDA
I2C1_AP_SCL

R2320
5

BOOT G5

WCSP

G3
E4

ROOM=CHARGER

B

VBUS
VBUS
VBUS
VBUS
VBUS

SN2400AB0

.c

31 30 3

A5
B5
D5
C5
E5

LDO G4

U2300

PMID

fi

ROOM=CHARGER

a

ROOM=CHARGER

20%
2 6.3V
X5R-CERM
0201

ROOM=CHARGER

w

ROOM=CHARGER

5%
2 35V
NP0-C0G
01005

2.2UF

x

100PF

10%
2 16V
X5R-CERM
0402-1

10%
2 16V
X5R-CERM
0402-1

C2322

in

4.2UF

C2305

h

C2321

1

5%
2 16V
NP0-C0G
01005

w

4.2UF

1

A2
VDD_MAIN
B2
VDD_MAIN
D2
VDD_MAIN
C2
VDD_MAIN

C2320

1

100PF

PGND
PGND
PGND
PGND

1

C2307

1

TIGRIS_PMID

C
A2
A3
B1
B2
B3

C

C1
C2
C3

ROOM=CHARGER

m

1

14 15 21 22 24 25 26 33

1

C2303
2.2UF

20%
2 6.3V
X5R-CERM
0201
ROOM=CHARGER

1

C2304
2.2UF

20%
2 6.3V
X5R-CERM
0201

B

ROOM=CHARGER

2

ROOM=CHARGER

R2303
18

BI

TIGRIS_TO_BATTERY_SWI

R2301
0.00

1
MF 0%

TIGRIS_TO_BATTERY_SWI_1V8_R

1

100

2

TIGRIS_TO_BATTERY_SWI_1V8

17

5%
1/32W
MF
01005

2 1/32W
01005

NOSTUFF

ROOM=CHARGER

3

D

33 30 26 24 16 15 14 12 8

PP1V8_SDRAM

2

Q2301

G
S

A

1

DFN0806

SYNC_MASTER=N/A

R2302
40.2K

2

DMN2990UFA

1%
1/32W
MF
01005

SYNC_DATE=N/A

PAGE TITLE

SYSTEM POWER:CHARGER

1

DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

23 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

17 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

D

C

m

D

--- & gt;

516S00104 (RCPT)
516S00105 (PLUG)

.c

THIS ONE ON MLB

o

BATTERY CONNECTOR
1

fi

F-ST-SM
11

1

5

3

TIGRIS_TO_BATTERY_SWI

2

4

TIGRIS_BATTERY_SWI_CONN

01005

6

ROOM=BATTERY_B2B

1

C2400
56PF

9

5%
2 16V
NP0-C0G
01005

10

in

BI

h

17

2

1

C2413
56PF

5%
2 16V
NP0-C0G
01005

5%
2 16V
NP0-C0G
01005
ROOM=BATTERY_B2B

8

FL2400

1

3 17 33

ROOM=BATTERY_B2B

1

C2410
56PF

5%
2 16V
NP0-C0G
01005
ROOM=BATTERY_B2B

1

C2411

1

100PF

C2412
220PF

5%
2 16V
NP0-C0G
01005

10%
2 10V
X7R-CERM
01005

ROOM=BATTERY_B2B

ROOM=BATTERY_B2B

a

7

120-OHM-210MA

C2414
27PF

RCPT-BATT-2BLADES

PP_BATT_VCC
VOLTAGE=4.3V

x

CRITICAL

ROOM=BATTERY_B2B

J2400

C

XW2400

SHORT-10L-0.25MM-SM
1
2

VBATT_SENSE

OUT

17

ROOM=BATTERY_B2B

.c

12

w

w

ROOM=BATTERY_B2B

B

w

B

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SYSTEM POWER:BATTERY CONN
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

24 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

18 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

D

6

5

4

3

MAGNESIUM - COMPASS

INVENSENSE
(APN 338S00017): C3013=0.22UF
INVENSENSE 1.1 (APN 338S00087): C3013=0.22UF

ALPS (APN:338S00084)

PP1V8_IMU_OWL

PP1V8_IMU_OWL
12 14 19

0.1UF

0.1UF

20%
2 6.3V
X5R-CERM
01005

20%
2 6.3V
X5R-CERM
01005
ROOM=CARBON

C3012
2.2UF

20%
2 6.3V
X5R-CERM
0201

VDD

VDDIO

NC
NC
NC

MPU-6700-12-COMBO
LGA
5
8
14

SPI_OWL_TO_ACCEL_GYRO_CS_L

IN

GYRO_CHARGE_PUMP

CS
FSYNC/GND
REGOUT/GND_CAP

SCL/SPC
SDA/SDI
SA0/SDO

2
3
4

SPI_OWL_TO_IMU_SCLK
SPI_OWL_TO_IMU_MOSI
SPI_IMU_TO_OWL_MISO

IN

9 19

DRDY/INT1 6

INT/INT2

IN

9 19

OUT

9 19

19 14 12

FLGA-POP

C2 VPP
B1
B3
D1
D2

ACCEL_GYRO_TO_OWL_INT1

OUT

ROOM=MAGNESIUM

SDO B4

SPI_IMU_TO_OWL_MISO

OUT

9 19

SPI_OWL_TO_IMU_MOSI

IN

9 19

SPI_OWL_TO_IMU_SCLK

IN

9 19

SPI_OWL_TO_COMPASS_CS_L

IN

9

OUT

9

CSB A2
TRG/SE C3 NC

114K INT PD

COMPASS_TO_OWL_INT

ROOM=MAGNESIUM

C

CRITICAL
VSS

o
h

in

a

fi

x

.c

15 GND6

13 GND5

12 GND4

11 GND3

ROOM=CARBON

10 GND2

9 GND1

20%
2 6.3V
X5R
01005-1

20%
2 6.3V
X5R-CERM
0201

OMIT_TABLE

9

CRITICAL

0.22UF

2.2UF

SCL/SCK A3

1.09M INT PU

OMIT_TABLE

C3013

C3000

SDA/SDI A4

RSV
RSV
RSV
RSV

D4 RST*

PP1V8_IMU_OWL

ROOM=CARBON

1

ROOM=MAGNESIUM

1

C1

C

OUT

20%
2 6.3V
X5R-CERM
01005

114K INT PU

m

9

7

0.1UF

ROOM=MAGNESIUM

DRDY A1

ACCEL_GYRO_TO_OWL_INT2

C3001

COMPASS-MODULE

U3010
9

1

5%
2 16V
NP0-C0G
01005

U3000

ROOM=CARBON

C3002
56PF

VDD

1

16

ROOM=CARBON

1

C4

C3011

1

12 14 19

NOSTUFF

1

C3010

1

D

CARBON - ACCEL & GYRO

1

2

.c

DISCRETE ACCEL

0.1UF

20%
2 6.3V
X5R-CERM
01005
OMIT_TABLE

1

C3021

1

1.0UF

C3022
0.1UF

20%
2 6.3V
X5R
0201-1

VDD

OMIT_TABLE

20%
2 6.3V
X5R-CERM
01005

VDDIO

B

w

C3020

7

1

8

B

12 14 19

w

PP1V8_IMU_OWL

w

BOSCH (APN:338S1163)

OMIT_TABLE

U3020
BMA282

9

IN

SPI_OWL_TO_DISCRETE_ACCEL_CS_L

LGA
OMIT_TABLE

4 CS*

SCX 1
SDX 2
SDO 3

OMIT_TABLE

R3021
OUT

ACCEL_TO_OWL_INT1_R

1
OMIT_TABLE

R3020
9

OUT

ACCEL_TO_OWL_INT2_R

1

20.0

2

20.0
5%
1/32W
MF
01005

IN
IN

OMIT_TABLE

9 19
9 19

R3022
1

6 INT1
5 INT2

PS 13

GND
9
11
12
14

5%
1/32W
MF
01005

2

SPI_IMU_TO_OWL_MISO

OUT

9 19

5%
1/32W
MF
01005

2

ACCEL_TO_OWL_INT1
ACCEL_TO_OWL_INT2

20.0

GNDIO
10

9

SPI_OWL_TO_IMU_SCLK
SPI_OWL_TO_IMU_MOSI
ACCEL_TO_OWL_SDO

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SENSORS:MOTION SENSORS
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

30 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

19 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

FOREHEAD FLEX (FCAM)

4

3

THIS ONE ON MLB

C3120
100PF

5%
2 16V
NP0-C0G
01005

1

C3121

1

0.1UF

C3122

1

1

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=CG_B2B

C3123

39

1

PP1V8_FCAM_CONN

0201
ROOM=CG_B2B

1

C3101

15

2

PP3V0_PROX_ALS

1

1

100PF

ROOM=CG_B2B

20

5%
16V
NP0-C0G
01005

ROOM=CG_B2B

28

21

1

PP2V85_CAM_AVDD_LDO

C3106

2

PP2V85_FCAM_AVDD_CONN

0201
ROOM=CG_B2B

C3105

1

20%
2 6.3V
X5R-CERM
01005

1

2

1

20%
6.3V
X5R-CERM 2
0201
ROOM=CG_B2B

C3104

ROOM=CG_B2B

1

2.2UF

20%
6.3V
X5R-CERM 2
0201

100PF

0.1UF

2.2UF

C3130

20

5%
16V
NP0-C0G
01005

ROOM=CG_B2B

C3129
2.2UF

1

20%
6.3V
X5R-CERM 2
0201
ROOM=CG_B2B

C3128

20

2

120-OHM-210MA
1

01005
ROOM=CG_B2B

2.2UF

C3127
0.1UF

20%
2 6.3V
X5R-CERM
01005

20%
6.3V
X5R-CERM 2
0201
ROOM=CG_B2B

20

PP3V0_ALS_CONN
1

8
10

11

12

13

14
16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

CUMULUS_TO_PROX_RX_EN_1V8_CONN

20

FL3126

FERR-22-OHM-1A-0.055OHM

6

7

45_PROX_TO_CUMULUS_RX_CONN

20

1

5

PP3V0_PROX_CONN

20

ROOM=CG_B2B

FL3104

4

34

38

I2C_ISP_TO_FCAM_SCL_CONN
AP_TO_FCAM_SHUTDOWN_CONN_L
I2C_ISP_BI_FCAM_SDA_CONN

20

100PF

2

3

37

20

C3125

1

ROOM=CG_B2B

5%
16V
NP0-C0G
01005

2

PP3V0_PROX_CONN

01005

2

ROOM=CG_B2B

20

120-OHM-210MA

C3100

1

0.1UF

20%
2 6.3V
X5R-CERM
01005

20

36

15

ROOM=CG_B2B

FL3125

2

F-ST-SM

35

20%
2 6.3V
X5R-CERM
0201

20

PP1V8

AA22L-S034VA1

C3124

20

FERR-22-OHM-1A-0.055OHM

J3100

(RCPT)
(PLUG)

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=CG_B2B

FL3100

516S0986
516S0987

9

2.2UF

20%
2 6.3V
X5R-CERM
01005

ROOM=CG_B2B

CAMERA POWER
29 28 21 14 13 12 9 8 7 6 5 3

--- & gt;

PP3V0_PROX_IRLED
1

1

FOREHEAD CONNECTOR

PROX & ALS POWER
20 15

D

2

1

20

20
20

C3126

20

100PF

I2C2_AP_BI_ALS_SDA_CONN
ALS_TO_AP_INT_CONN_L
I2C2_AP_TO_ALS_SCL_CONN
PP3V0_ALS_CONN
CODEC_TO_HAC_CONN_N
CODEC_TO_HAC_CONN_P
CODEC_TO_RCVR_CONN_P
CODEC_TO_RCVR_CONN_N

5%
2 16V
NP0-C0G
01005

ROOM=CG_B2B

ROOM=CG_B2B

AP_TO_FCAM_CLK_CONN

90_MIPI_FCAM_TO_AP_CLK_CONN_N 20
90_MIPI_FCAM_TO_AP_CLK_CONN_P 20

PP2V85_FCAM_AVDD_CONN

PP1V8_FCAM_CONN 20
FRONTMIC3_TO_CODEC_AIN4_CONN_P 20
FRONTMIC3_TO_CODEC_AIN4_CONN_N 20
PP_CODEC_TO_FRONTMIC3_BIAS_CONN 20
PGND_IRLED_K 20
PP3V0_PROX_IRLED 15

1

24

1

PP_CODEC_TO_FRONTMIC3_BIAS

2
01005

1

ROOM=CG_B2B

FL3110
01005

1

x

FL3151

100PF

5%
16V
NP0-C0G
01005

2

70-OHM-25%-0.28A
23

ROOM=CG_B2B

IN

2

CODEC_TO_HAC_N

1
01005

120-OHM-210MA
01005

1

20

5%
16V
NP0-C0G
01005

23

IN

2

CODEC_TO_HAC_P

ROOM=CG_B2B

1

OUT

20

C3112

w

IN

56PF

B

5%
2 16V
NP0-C0G
01005
ROOM=CG_B2B

23

IN

CODEC_TO_RCVR_N

w

7

I2C_ISP_TO_FCAM_SCL_CONN

1/32W
01005

BI

I2C_ISP_BI_FCAM_SDA

0.00

1
MF 0%

2

2

I2C_ISP_BI_FCAM_SDA_CONN

ROOM=CG_B2B

1

BI

2
1

C3113

BI

I2C2_AP_SDA
MAKE_BASE=TRUE

1

90_MIPI_FCAM_TO_AP_DATA0_N

3

2

CODEC_TO_RCVR_CONN_P
1

IN

I2C2_AP_SCL
MAKE_BASE=TRUE

90_MIPI_FCAM_TO_AP_DATA0_CONN_N

20

23

OUT

FRONTMIC3_TO_CODEC_AIN4_N

TAM0605
SYM_VER-2

1

ALS_TO_AP_INT_L

7

OUT

2

2

ROOM=CG_B2B

1

ROOM=CG_B2B

ALS_TO_AP_INT_CONN_L
1

20

C3146
100PF

5%
2 16V
NP0-C0G
01005

20

NO_XNET_CONNECTION=1

1

C3145

FL3146

FRONTMIC3_TO_CODEC_AIN4_CONN_N

20

ROOM=CG_B2B

DZ3155

6.8V-100PF
01005

2 ROOM=CG_B2B

90_MIPI_FCAM_TO_AP_CLK_CONN_P

FL3156

20

A
3

01005

5%
2 16V
NP0-C0G
01005

120-OHM-210MA
90_MIPI_FCAM_TO_AP_CLK_N

I2C2_AP_TO_ALS_SCL_CONN

2

01005

CRITICAL

4

ROOM=CG_B2B

120-OHM-210MA

01005

C3144

56PF

FL3155

ROOM=CG_B2B

90_MIPI_FCAM_TO_AP_CLK_P

1

DZ3154

2

B
20

5%
2 16V
NP0-C0G
01005

20

8 OUT

L3102
65-OHM-0.1A-0.7-2GHZ
OUT

1

NO_XNET_CONNECTION=1

ROOM=CG_B2B

7

01005

1

2

1

I2C2_AP_BI_ALS_SDA_CONN

120-OHM-210MA

2 ROOM=CG_B2B

20

ROOM=CG_B2B

NOSTUFF

FL3102

120-OHM-210MA
OUT

5%
2 16V
NP0-C0G
01005

2

12V-33PF
01005-1

90_MIPI_FCAM_TO_AP_DATA0_CONN_P

C3143
56PF

DZ3153

70-OHM-25%-0.28A

CRITICAL

7

1

20

56PF

FL3154

IN

1

20

8

L3100
65-OHM-0.1A-0.7-2GHZ
1

2

45_PROX_TO_CUMULUS_RX_CONN

ROOM=CG_B2B

2 ROOM=CG_B2B

CODEC_TO_RCVR_P

2

ROOM=CG_B2B

12V-33PF
01005-1

23

0.00

NO_XNET_CONNECTION=1

ROOM=CG_B2B

SYM_VER-2

DZ3152

CODEC_TO_RCVR_CONN_N

01005

4

1

45_PROX_TO_CUMULUS_RX

0%
1/32W
MF
01005

8

01005

CAMERA MIPI
90_MIPI_FCAM_TO_AP_DATA0_P

OUT

FL3153

20

ROOM=CG_B2B

OUT

29

20

70-OHM-25%-0.28A
1

5%
2 16V
NP0-C0G
01005

7

12V-33PF
01005-1

FL3101

56PF

TAM0605

DZ3151

120-OHM-210MA

ROOM=CG_B2B

1/32W
01005

ROOM=CG_B2B

1.00M

20

12V-33PF
01005-1

R3103
7

R3140

DFN1006H4-3
SYM_VER_1

5%
1/32W
MF
2 01005
ROOM=CG_B2B

CODEC_TO_HAC_CONN_P
1

w

R3102
2

CODEC_TO_HAC_CONN_N

NO_XNET_CONNECTION=1

ROOM=CG_B2B

0.00

1

DMN3730UFB4

R3143

1

01005

1
MF 0%

Q3140

G
S

70-OHM-25%-0.28A

ROOM=CG_B2B

I2C_ISP_TO_FCAM_SCL

1

FL3152

100PF

2

CUMULUS_TO_PROX_TX_EN_BUFF

CRITICAL

2 ROOM=CG_B2B

C3111

ROOM=CG_B2B

IN

h

IN

.c

7

AP_TO_FCAM_SHUTDOWN_CONN_L

1

in

FL3111

29

NO_XNET_CONNECTION=1

ROOM=CG_B2B

2

D

2 ROOM=CG_B2B

20

C3110

ROOM=CG_B2B

1

PGND_IRLED_D
3

fi

AP_TO_FCAM_CLK_CONN

a

2

C

20

6.8V-100PF
01005

120-OHM-210MA

AP_TO_FCAM_SHUTDOWN_L

DZ3150

R3101

1%
1/20W
MF
2 201

PROX & ALS INTERFACE

PP_CODEC_TO_FRONTMIC3_BIAS_CONN

.c

CAMERA I/O

20

11.5

o

FL3150

120-OHM-210MA

1

90_MIPI_FCAM_TO_AP_CLK_CONN_N

20

ROOM=CG_B2B

23

OUT

FRONTMIC3_TO_CODEC_AIN4_P

2

1
01005

FRONTMIC3_TO_CODEC_AIN4_CONN_P

SYNC_MASTER=N/A

1

SYNC_DATE=N/A

PAGE TITLE

20

NO_XNET_CONNECTION=1

CAMERA:FOREHEAD FLEX B2B

DZ3156

2

ROOM=CG_B2B

ROOM=CG_B2B

6.8V-100PF
01005

DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

31 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

20 OF 60

IV ALL RIGHTS RESERVED

8

7

20

40

m

C

45_AP_TO_FCAM_CLK

20

ROOM=CG_B2B

MIC3/HAC/RCVR INTERFACE

IN

D

90_MIPI_FCAM_TO_AP_DATA0_CONN_N 20
90_MIPI_FCAM_TO_AP_DATA0_CONN_P 20

PGND_IRLED_K

7

20

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

REAR CAMERA FLEX

2

1

RCAM CONNECTOR
21 15

PP2V5_RCAM_AF

1
1%
MF

3.00

THIS ONE ON MLB

XW3202
SHORT-10L-0.1MM-SM

R3202
2
PP2V5_RCAM_AF_COMP
1/32W
01005

1

--- & gt;

516S00100 (RCPT)
516S00101 (PLUG)

2

CRITICAL

ROOM=RCAM_B2B

ROOM=RCAM_B2B

J3200

D

AA27D-S030VA1

D

F-ST-SM
32

PP_VCC_MAIN

25 24 22 17 15 14
33 26

20

1

PP2V85_CAM_AVDD_LDO

2

20%
2 6.3V
X5R-CERM
0201

C3200

1

2.2UF

GND EPAD

2.2UF

01005

C3211

ROOM=RCAM_B2B

20%
2 6.3V
X5R-CERM
0201

C3201

20%
2 6.3V
X5R-CERM
01005

20%
6.3V
2 X5R-CERM
0201

ROOM=RCAM_B2B

1

0.1UF

2.2UF

ROOM=RCAM_B2B

1

21
21

C3202

13

16

15

18

IN

17
19

22

21

24

OUT

23

26

IN

25
27

30

21

I2C_ISP_BI_RCAM_SDA_CONN
I2C_ISP_TO_RCAM_SCL_CONN
PP1V8_RCAM_CONN
AP_TO_RCAM_SHUTDOWN_CONN_L
RCAM_TO_LED_DRIVER_STROBE_EN_CONN
AP_TO_RCAM_CLK_CONN
PP2V85_RCAM_AVDD_CONN

29
33

90_MIPI_RCAM_TO_AP_DATA3_CONN_N
90_MIPI_RCAM_TO_AP_DATA3_CONN_P

BI

7

BI

7

90_MIPI_RCAM_TO_AP_DATA1_CONN_N
90_MIPI_RCAM_TO_AP_DATA1_CONN_P

BI

7

BI

7

BI

7

BI

7

90_MIPI_RCAM_TO_AP_DATA0_CONN_N
90_MIPI_RCAM_TO_AP_DATA0_CONN_P

BI

7

BI

7

90_MIPI_RCAM_TO_AP_DATA2_CONN_N
90_MIPI_RCAM_TO_AP_DATA2_CONN_P

BI

7

BI

7

90_MIPI_RCAM_TO_AP_CLK_CONN_N
90_MIPI_RCAM_TO_AP_CLK_CONN_P

100PF

5%
2 16V
NP0-C0G
01005

ROOM=RCAM_B2B

ROOM=RCAM_B2B

CAM_EXT_LDO_EN

C

FL3201

14

1

PP1V2_CAMERA

2

PP1V2_RCAM_DIGITAL_CONN

21

C3203

1

2.2UF

XW3203
SHORT-10L-0.1MM-SM
1

1

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=RCAM_B2B

ROOM=RCAM_B2B

1

C3205
100PF

5%
2 16V
NP0-C0G
01005

ROOM=RCAM_B2B

DIGITAL I/O
FL3230

fi

ROOM=RCAM_B2B

C3206
2.2UF

20%
2 6.3V
X5R-CERM
0201

20%
2 6.3V
X5R-CERM
0201

ROOM=RCAM_B2B

C3204

x

1

2

.c

0201
ROOM=RCAM_B2B

C

o

FERR-22-OHM-1A-0.055OHM

14

14

PP1V2_RCAM_DIGITAL_CONN

m

8

1

3 EN

C3210

5

1

PP2V85_RCAM_AVDD_CONN

2

VOLTAGE=2.85V
ROOM=RCAM_B2B

21

11

34

10-OHM-1.1A

9

28

IN
21

LP5907SNX-2.85
X2SON
4 VIN
VOUT 1

7

20

BI

21

5

12

FL3200

6
10

U3200

3

8

21

21

1

4

21

2

PP2V5_RCAM_AF_CONN

21

CAMERA POWER

31

45_BUCK6_FB

2

PP1V8_RCAM_CONN
1

ROOM=RCAM_B2B

C3220

1

1.0UF

C3221
100PF

20%
2 6.3V
X5R
0201-1

5%
2 16V
NP0-C0G
01005

ROOM=RCAM_B2B

ROOM=RCAM_B2B

L3205

1

PP2V5_RCAM_AF_CONN

2

0201
1

ROOM=RCAM_B2B

B

C3207

1

1.0UF

C3208

1

1.0UF

100PF

20%

20%

2 6.3V
X5R

2 6.3V
X5R

0201-1

0201-1

ROOM=RCAM_B2B

C3209

ROOM=RCAM_B2B

5%
2 16V
NP0-C0G
01005
ROOM=RCAM_B2B

21

C3299

1

100PF

5%
16V
NP0-C0G
01005

2

5%
16V
NP0-C0G
01005

2

ROOM=RCAM_B2B

ROOM=RCAM_B2B

FL3231

120-OHM-210MA
7

IN

1

AP_TO_RCAM_SHUTDOWN_L

2

AP_TO_RCAM_SHUTDOWN_CONN_L

01005
ROOM=RCAM_B2B

1

21

C3231
100PF

5%
2 16V
NP0-C0G
01005

w

PP2V5_RCAM_AF

21

NOSTUFF

ROOM=RCAM_B2B

1

ROOM=RCAM_B2B

w

21 15

AP_TO_RCAM_CLK_CONN

01005

w

FERR-22-OHM-1A-0.055OHM

2

100PF

h

0201

21

1

45_AP_TO_RCAM_CLK

C3230

.c

1

PP1V8

IN

in

FERR-22-OHM-1A-0.055OHM
29 28 20 14 13 12 9 8 7 6 5 3

7

a

FL3220

120-OHM-210MA

B

FL3232

120-OHM-210MA
22

OUT

1

RCAM_TO_LED_DRIVER_STROBE_EN

2

RCAM_TO_LED_DRIVER_STROBE_EN_CONN

01005
ROOM=RCAM_B2B

1

IN

21

C3232
100PF

5%
2 16V
NP0-C0G
01005

MIPI COMMON-MODE CHOKES

ROOM=RCAM_B2B

L3200

65-OHM-0.1A-0.7-2GHZ
TAM0605
SYM_VER-2
4
1

R3203
22 7

3

BI

I2C_ISP_BI_RCAM_SDA

0.00

1
MF 0%

2

ROOM=RCAM_B2B

2

I2C_ISP_BI_RCAM_SDA_CONN

1/32W
01005

1

ROOM=RCAM_B2B

L3201

65-OHM-0.1A-0.7-2GHZ
TAM0605
SYM_VER-2
4
1

2

L3203

65-OHM-0.1A-0.7-2GHZ
TAM0605
SYM_VER-2
4
1

3

ROOM=RCAM_B2B

A

IN

I2C_ISP_TO_RCAM_SCL

0.00

1
MF 0%

2

1

TAM0605
SYM_VER-2

1

C3234
56PF

5%
2 16V
NP0-C0G
01005

L3204
65-OHM-0.1A-0.7-2GHZ
4

I2C_ISP_TO_RCAM_SCL_CONN

1/32W
01005

ROOM=RCAM_B2B

2

NOSTUFF

L3202
65-OHM-0.1A-0.7-2GHZ
SYM_VER-2

21

ROOM=RCAM_B2B

R3204

ROOM=RCAM_B2B

NOSTUFF

TAM0605

OUT

C3233

5%
2 16V
NP0-C0G
01005

22 7

4

21

56PF

NOSTUFF

3

BI

ROOM=RCAM_B2B

1

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

3

2
ROOM=RCAM_B2B

NOSTUFF

3

CAMERA:REAR CAMERA B2B

2
ROOM=RCAM_B2B

NOSTUFF

DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

PLACEHOLDER FOOTPRINTS

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

32 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

21 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

D

D

C

m

DUAL LED STROBE DRIVER
C

o

APN:353S3899

PP_LED_BOOST_OUT

ROOM=STROBE

20%
6.3V 2
X5R-CERM
0201
ROOM=STROBE

C3386
2.2UF

1

20%
6.3V 2
X5R-CERM
0201
ROOM=STROBE

C3387

1

CRITICAL

WLCSP

L3300

10UF

20%
6.3V 2
CERM-X5R
0402-9

PIQA20161T-SM

A2
B2

VOLTAGE=5.0V

IN

21 7

BI

21 7

IN

BB_TO_LED_DRIVER_GSM_BURST_IND
I2C_ISP_BI_RCAM_SDA
I2C_ISP_TO_RCAM_SCL

C3394
10UF

20%
2 6.3V
CERM-X5R
0402-9

1

C3396
10UF

20%
2 6.3V
CERM-X5R
0402-9

ROOM=STROBE

ROOM=STROBE

A4
B4

PP_LED_DRIVER_COOL_LED

LED1

C4
D4

PP_LED_DRIVER_WARM_LED

LED2

INT 200K PD

ENABLE
INT 200K PD
STROBE
INT 200K PD
TORCH
INT 200K PD
TX
SDA
SCL
GND

a

NC

VOLTAGE=5.0V

32

32

VOLTAGE=5.0V
1

C3308
100PF

TEMP E1

5%
2 16V
NP0-C0G
01005

AGND

ROOM=STROBE

1

C3373
100PF

5%
2 16V
NP0-C0G
01005
ROOM=STROBE

LED_MODULE_NTC

OUT

32

w

w

.c

33 26

D3
E3
C2
E4
E2
D2

A3
B3
C3

1

SW

in

IN

h

IN

21

AP_TO_LED_DRIVER_EN
RCAM_TO_LED_DRIVER_STROBE_EN

CRITICAL

OUT

ROOM=STROBE
8

ROOM=STROBE

D1 IN

1.0UH-20%-3.6A-0.060OHM
1
2
PP_LED_DRIVER_SW

ROOM=STROBE

.c

2.2UF

1

x

20%
6.3V 2
X5R-CERM
0201

C3385

fi

2.2UF

1

LM3564A1TMX

C1

C3384

VOLTAGE=5.0V

U3300

PP_VCC_MAIN

A1
B1

33 26 25 24 21 17 15 14

B

w

B

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

CAMERA:STROBE DRIVER
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

33 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

22 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS)
D

D

U3500
31

L2
L1

LOWERMIC1_TO_CODEC_AIN1_P
LOWERMIC1_TO_CODEC_AIN1_N

NC
NC

K3
L3

WLCSP-1
AIN1+
AIN1-

AOUT1+ L9
AOUT1- M9

AIN2+
AIN2-

CODEC_TO_RCVR_P
CODEC_TO_RCVR_N

AOUT2+ L8
AOUT2- M8

SYM 1 OF 3

CS42L71

VOICE MIC

31

CODEC_TO_HAC_P
CODEC_TO_HAC_N

HPOUTA K10
HPOUTB K11

ROOM=CODEC
CRITICAL

CODEC_TO_HPHONE_L
CODEC_TO_HPHONE_R

20
20

20
20

31
31

20

J3
J4

FRONTMIC3_TO_CODEC_AIN4_P
FRONTMIC3_TO_CODEC_AIN4_N

HSIN+ D1
HSIN- E1

AIN4+
AIN4-

.c

AIN3+
AIN3-

o

HS3_REF L10
HS4_REF M10

CODEC_HSIN_P
CODEC_HSIN_N

in

F2
F3

AIN6+
AIN6-

31

R3515

0.1UF

CODEC_HSIN_R_P

1
2
20%
01005
6.3V
X5R-CERM

1

C3504
220PF

NO_XNET_CONNECTION=1

10%
2 10V
X7R-CERM
01005

C3506

1.33K 2
1%
1/32W
MF
01005

ROOM=CODEC

1

ROOM=CODEC

R3550
1

CODEC_HSIN_R_N

ROOM=CODEC

HPHONE_TO_CODEC_DETECT

31

1.33K 2
1%
1/32W
MF
01005
ROOM=CODEC

NO_XNET_CONNECTION=1

31

ROOM=CODEC

C3552
100PF

w

NC
NC

.c

h

NC
NC

AIN5+
AIN5-

C3505

C

ROOM=CODEC

1
2
20%
01005
6.3V
X5R-CERM

HPDETECT J9
F1
G1

CODEC_TO_HPHONE_HS3_REF
CODEC_TO_HPHONE_HS4_REF

0.1UF

a

ANC ERROR MIC

20

31

x

32

K2
K1

REARMIC2_TO_CODEC_AIN3_P
REARMIC2_TO_CODEC_AIN3_N

CODEC_TO_HPHONE_HS4

fi

ANC REF MIC

32

31

HS4 M4

C

CODEC_TO_HPHONE_HS3

m

HS3 M5

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

G2
G3

w

NC
NC

1

A4
B4

DMIC1_CLK
DMIC1_DATA

C4
C3

DMIC2_CLK
DMIC2_DATA

A3
B3

DP J12
DN H12

90_MIKEYBUS_CALTRA_DATA_P
90_MIKEYBUS_CALTRA_DATA_N

MBUS_REF G10 MBUS_REF_U3500

XW3500
1
2
SHORT-10L-0.1MM-SM
ROOM=CODEC

DMIC3_CLK
DMIC3_DATA

20.0
5%
1/32W
MF
01005

90_MIKEYBUS_DATA_P
90_MIKEYBUS_DATA_N

ROOM=CODEC

1

20.0

30

2

5%
1/32W
MF
01005

C3554
100PF
1

PDM_CLK
PDM_DATA

30

R3503

DMIC4_CLK
DMIC4_DATA

A9
B9

B

2

ROOM=CODEC

A2
B2

2

5%
16V
NP0-C0G
01005

R3502

AIN7+
AIN7-

w

B

1

2

5%
16V
NP0-C0G
01005
ROOM=CODEC

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

AUDIO:CALTRA CODEC (1/2)
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

35 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

23 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

CALTRA AUDIO CODEC (POWER & I/O)
25 15

PP1V8_VA
1

D

C3640

D

2.2UF

20%
2 6.3V
X5R-CERM
0201
ROOM=CODEC

CODEC_AGND
1

C3600

1

10UF

C3601
0.1UF

1

C3602
0.1UF

20%
2 6.3V
X5R-CERM
01005

ROOM=CODEC

ROOM=CODEC

ROOM=CODEC

PP1V8_SDRAM

33 30 26 24 17 16 15 14 12 8

1

C3610

1

10UF

C3611
0.1UF

1

1

20%
6.3V
2 X5R-CERM
01005
ROOM=CODEC

2

PP1V2_VD_FILT

FLYP K12

U3500

CALTRA_FLYP

WLCSP-1

20%
6.3V
X5R-CERM1
402

SYM 2 OF 3

NC
NC

L6
J7

1

CS42L71

ROOM=CODEC

MIC2_BIAS
MIC2_BIAS_FILT

FLYC L12

CALTRA_FLYC

XW3630
2

ROOM=CODEC

fi
FLYN M12

C3653
FRONTMIC3_BIAS_FILT_RET

4.7UF
1

2

20

J6
K5

PP_CODEC_TO_FRONTMIC3_BIAS
FRONTMIC3_BIAS_FILT_IN

8

SPI_AP_TO_CODEC_MOSI
SPI_CODEC_TO_AP_MISO

B8
A8

MOSI
MISO

8

C3660

45_I2S_AP_TO_CODEC_MCLK

C12

20%
6.3V
X5R-CERM1
402
ROOM=CODEC

w

GNDCP

25 8

1

C3661
9 8

20%
2 6.3V
X5R-CERM
0201

9 8
8

ROOM=CODEC
9 8

8

CALTRA_VCP_FILTP

8
8

1

L11

CALTRA_GNDCP

C3662

8

4.7UF

XW3660
SM

CRITICAL
ROOM=CODEC

1

20%
2 6.3V
X5R-CERM1
402

16

C6
C5
B5
B6

45_I2S_AP_TO_CODEC_ASP_BCLK
I2S_AP_TO_CODEC_ASP_LRCLK
I2S_AP_TO_CODEC_ASP_DOUT
I2S_CODEC_TO_AP_ASP_DIN

B11
C11
A11
A10

45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
I2S_AP_TO_CODEC_XSP_DOUT
I2S_CODEC_TO_AP_OWL_XSP_DIN

ASP_SCLK
ASP_LRCK/FSYNC
ASP_SDIN
ASP_SDOUT
XSP_SCLK
XSP_LRCK/FSYNC
XSP_SDIN/DAC2B_MUTE
XSP_SDOUT

45_I2S_AP_TO_CODEC_MSP_BCLK
I2S_AP_TO_CODEC_MSP_LRCLK
I2S_AP_TO_CODEC_MSP_DOUT
I2S_CODEC_TO_AP_MSP_DIN

B7
C7
D8
A7

MSP_SCLK
MSP_LRCK/FSYNC
MSP_SDIN
MSP_SDOUT

PMU_TO_CODEC_DIGLDO_PULLDN

H5
J5

DIGLDO_PULLDN
DIGLDO_PDN

ROOM=CODEC

2
ROOM=CODEC

w

B

25 8
25 8

CALTRA_FLYN

+VCP_FILT J10

MIC4_BIAS
MIC4_BIAS_FILT

1

C3663
4.7UF

20%
2 6.3V
X5R-CERM1
402
ROOM=CODEC

-VCP_FILT M11

CALTRA_VCP_FILTN

LP_FILT+ F12

CALTRA_LP_FILTP
1

C3665
0.1UF

M3
M2

CALTRA_HS_BIAS_FILT
1

C3654

20%
6.3V
2 X5R-CERM
01005
ROOM=CODEC

HS_BIAS_FILT
HS_BIAS_FILT_REF

JTAG_TMS
JTAG_TCK
JTAG_TDI
JTAG_TDO

FILT+ H1

D3
D4
D2
C2

NC
NC
NC
NC

TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO

D11
B10
D5
D6
E5
E6
E7
K4

TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI

C10
D10
D7
D9
E8
E9
G11
H4
M1

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

A1
A12
B12
E2
E3
E4
E10
F4
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
H6
H7
H8
H9

MCLK

25 8

2.2UF

a

20%
6.3V
X5R-CERM1
402

SHORT-10L-0.1MM-SM
1

2

MIC3_BIAS
MIC3_BIAS_FILT

in

ROOM=CODEC

1

CS*
CCLK

8

h

REARMIC2_BIAS_FILT_RET

PP_CODEC_TO_REARMIC2_BIAS
REARMIC2_BIAS_FILT_IN

.c

2

32

C9
C8

ROOM=CODEC

w

1

4.7UF

K6
L5

SPI_AP_TO_CODEC_CS_L
SPI_AP_TO_CODEC_SCLK

8

20%
2 6.3V
X5R-CERM
0201

ROOM=CODEC

C3651

INT*

2.2UF

CRITICAL
ROOM=CODEC

XW3620
SHORT-10L-0.1MM-SM

WLCSP-1

WAKE*

K9

8

m

2

MIC1_BIAS
MIC1_BIAS_FILT

K8

CODEC_TO_PMU_MIKEY_INT_L
CODEC_TO_AP_PMU_INT_L

16 8

.c

1

M6
K7

PP_CODEC_TO_LOWERMIC1_BIAS
LOWERMIC1_BIAS_FILT_IN

RESET*

SYM 3 OF 3

x

LOWERMIC1_BIAS_FILT_RET

31

16

o

ROOM=CODEC

4.7UF

H3

U3500

VP_MBUS H10

VCP J11

20%
2 6.3V
X5R
0201-1

C

ROOM=CODEC

C3670
1.0UF

C3650

5%
1/32W
MF
01005

CODEC_RESET_L
VA J1

1

VPROG_CP H11

ROOM=CODEC

VP M7

ROOM=CODEC

VL A5

20%
2 6.3V
X5R-CERM
01005

R3650
1.00K

0.1UF

20%
2 6.3V
CERM-X5R
0402-9

31

PP1V8_SDRAM

C3612

VD_FILT C1
VD_FILT E12

33 30 26 24 17 16 15 14 12 8

20%
2 6.3V
X5R-CERM
01005

CS42L71

20%
2 6.3V
CERM-X5R
0402-9

VD D12
VD G12

33 26 25 22 21 17 15 14

24

PP_VCC_MAIN

NC
NC
NC
NC
NC
NC
NC
NC

C

B

CALTRA_FILTP
GND J8

4.7UF

1

20%
2 6.3V
X5R-CERM1
402

C3664
10UF

20%
2 6.3V
CERM-X5R
0402-9
J2 GNDA

ROOM=CODEC

L7 GNDP

A6
B1
E11
F11

GNDD
GNDD
GNDD
GNDD

CALTRA_HS_BIAS_FILT_IN

L4 GNDHS

ROOM=CODEC

FILT- H2

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

AUDIO:CALTRA CODEC (2/2)
XW3600

DRAWING NUMBER

SHORT-10L-0.1MM-SM
1
2

24

Apple Inc.

CODEC_AGND

051-00648
REVISION

4.0.0

R

ROOM=CODEC

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

36 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

24 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

D

D

SPEAKER AMPLIFIER
APN: 338S1285

33 26 24 22 21 17 15 14

PP_VCC_MAIN

PP1V8_VA
1

C3709

1

0.1UF

15 24

C3730
2.2UF

20%
2 6.3V
X5R-CERM
01005

20%
2 6.3V
X5R-CERM
0201

ROOM=SPKR_AMP

ROOM=SPKR_AMP

VOLTAGE=8.0V

PP_SPKR_VBOOST

C

1

C3745
0.1UF

22UF

10%
16V
2 X5R-CERM
0201

20%
2 10V
X5R-CERM
0603-1

ROOM=SPKR_AMP

ROOM=SPKR_AMP

1

C3746
100PF

5%
2 16V
NP0-C0G
01005

VA

ROOM=SPKR_AMP

VBST

m

20%
10V
2 X5R-CERM
0402-8

C3742

F5

10UF

1

A4
A5

C3741

A1
B1
C1
D1

1

VP

L3700

I2C1_AP_SCL

D6

SPEAKERAMP_TO_AP_INT_L

A7

ROOM=SPKR_AMP
30 17 8

BI

30 17 8

IN
8 OUT

AP_TO_SPEAKERAMP_RESET_L

R3729
5%
1/32W
MF
01005

C7 ADO

IREF+ B7

1M INT PD

IN
IN

45_I2S_AP_TO_CODEC_ASP_BCLK

IN

I2S_AP_TO_CODEC_ASP_LRCLK

IN

I2S_AP_TO_CODEC_ASP_DOUT

ROOM=SPKR_AMP
24 8

24 8

24 8

24 8 OUT

MCLK
1M INT PD

E6

SCLK
1M INT PD

F6

LRCK/FSYNC
1M INT PD

F7

SDIN
1M INT PD

I2S_CODEC_TO_AP_ASP_DIN

E5

SDOUT
1M INT PD

20%
2 6.3V
CER-X5R
0402

ROOM=SPKR_AMP

ROOM=SPKR_AMP

XW3703

SHORT-10L-0.1MM-SM
1
2

SPEAKERAMP_IREF
1

h

8

45_I2S_AP_TO_SPEAKERAMP_MCLK

E7

NC
NC

OUT+ D2
OUT- C2

D7 ALIVE

100K

2

RESET*

.c

1

ISENSE- F1
ISENSE+ E1

INT*

4.7UF

20%
2 6.3V
X5R-CERM
0201

XW3704

SHORT-10L-0.1MM-SM
1
2

R3735
44.2K

2

1%
1/32W
MF
01005

ROOM=SPKR_AMP

w

IN

SCL

VSENSE_NEG
VSENSE_POS

C3740

GNDA

w

A3
B3
B4
C3
C4
D3
D4

GNDP

B5
B6
C6
E4
F3
F4

8

A6

CRITICAL

SDA

SPEAKERAMP_FILT
SPEAKERAMP_LDO_FILT

VSENSE- E3
VSENSE+ E2

VER1
ROOM=SPKR_AMP

2.2UF

C

x

D5

SW

FILT+ F2
LDO_FILT C5

C3729

1

fi

I2C1_AP_SDA

WLCSP

a

PIQA20161T-SM

CS35L21-XWZR

in

VOLTAGE=8.0V

A2
B2

PP_SPEAKERAMP_SW

2

.c

U3700

1.2UH-20%-3.0A-0.080OHM
1

o

CRITICAL

1

B

SPEAKERAMP_TO_SPEAKER_OUT_POS

31

w

B

SPEAKERAMP_TO_SPEAKER_OUT_NEG

C3760
1000PF

1

10%
10V 2
X5R
01005

ROOM=SPKR_AMP

A

1

C3763
1000PF

10%
2 10V
X5R
01005

ROOM=SPKR_AMP

C3700

1

1000PF

10%
10V 2
X5R
01005

1

31

C3702
1000PF

10%
2 10V
X5R
01005

ROOM=SPKR_AMP

ROOM=SPKR_AMP

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

AUDIO:SPEAKER DRIVER
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

37 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

25 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

DISPLAY & TOUCH - POWER SUPPLIES
D

D

CHESTNUT DISPLAY PMU
APN:338S1172
PP_VCC_MAIN

C4000

1

1

10UF

CRITICAL

20%
VOLTAGE=6.3V 2
CERM-X5R
0402-9

L4000

1.0UH-20%-2.25A-0.15OHM

BGA

ROOM=CHESTNUT

D1 VIN

2

ROOM=CHESTNUT

VOLTAGE=6.3V

A2 SYNC
D3 SCL

BI

I2C0_AP_SDA

D2 SDA

OUT

CHESTNUT_TO_PMU_ADCMUX

ROOM=CHESTNUT

PP6V0_LCM_BOOST
VOLTAGE=6.0V

PN5V7_SAGE_AVDDN

28 29

VOLTAGE=-5.7V

200K INT PD

C2 RESET*

HVLDO1 A4

VOLTAGE=5.7V

PP5V7_SAGE_AVDDH

29

HVLDO2 A3

VOLTAGE=5.7V

PP5V7_LCM_AVDDH

28

VOLTAGE=5.1V

PP5V1_GRAPE_VDDH

29

NO INT PULL

E1 ADCMUX

C

m

16

PMU_TO_OWL_ACTIVE_READY

PN_CHESTNUT_CN

VNEG(SUB) E2

C3 LCM_EN

LCM_TO_CHESTNUT_PWR_EN

B1 PGND1
D4 PGND2

30 16 9 5

IN
IN

28 16

20%
2 VOLTAGE=10V
X5R-CERM
0402-8

VOLTAGE=-6.0V

VNEG E3

C1 AGND

26 16 8

I2C0_AP_SCL

C4002
10UF

LCMBST B3
CPUMP B4

NO INT PULL

IN

1

CF1 C4
CF2 E4

CRITICAL

B2 SW

PP_CHESTNUT_SW

26 16 8

VOLTAGE=6.0V

TPS65730A0PYFF

ROOM=CHESTNUT

PIXB2016FE-SM

PP_CHESTNUT_CP

U4000

HVLDO3 A1
1

C4003

1

1UF

10UF

20%
2 VOLTAGE=10V
X5R-CERM
0402-8

.c

20%
2 VOLTAGE=16V
CER-X5R
0201

C4004

o

33 26 25 24 22 21 17 15 14

C4005
10UF

20%
2 VOLTAGE=10V
X5R-CERM
0402-8

ROOM=CHESTNUT

1

C4006

1

10UF

22UF

20%
VOLTAGE=10V
2 X5R-CERM
0402-8

ROOM=CHESTNUT

C4007

20%
2 VOLTAGE=10V
X5R-CERM
0603-1

ROOM=CHESTNUT

ROOM=CHESTNUT

h

in

a

fi

x

ROOM=CHESTNUT

1

C

10UF

1

20%
VOLTAGE=6.3V 2
CERM-X5R
0402-9
ROOM=BACKLIGHT

C4021

A

VOLTAGE=25V

PIQA20161T-SM

NSR05F30NXT5G

ROOM=BACKLIGHT

1

K

ROOM=BACKLIGHT

10UF

CRITICAL

20%
VOLTAGE=6.3V 2
CERM-X5R
0402-9

PP_VCC_MAIN

C4040

D4020

15UH-20%-0.72A-0.9OHM

ROOM=BACKLIGHT

33 26 25 24 22 21 17 15 14

CRITICAL

L4020

1

2

A

PP13V0_MESA_SW

2

VOLTAGE=18.0V

0403

1

ROOM=MOJAVE

10UF

K

PP12V0_MOJAVE_LDOIN
VOLTAGE=12.0V

SOD-923-1

ROOM=BACKLIGHT

ROOM=BACKLIGHT
ROOM=BACKLIGHT

U4020

D4 IN

PP1V8_SDRAM

16 9

IN

9

IN

R4020
200K

2

26 16 8

A

BI

26 16 8

IN

7

IN

33 22

IN

VOLTAGE=35V
OUT A1

1%
1/32W
MF
01005

PP_LCM_BL_ANODE

SW1 C4

C2 SDI
C3 SCK

LED1 C1
LED2 B1

1

I2C0_AP_SDA
I2C0_AP_SCL
AP_TO_MUON_BL_STROBE_EN
BB_TO_LED_DRIVER_GSM_BURST_IND

D2 INHIBIT

C4023

CRITICAL

A2 VIN

C2 LDOIN

C4042
56PF

VOUT C3

5%
2 VOLTAGE=25V
NP0-C0G
0201
ROOM=MOJAVE

VOLTAGE=11.5V
1

C4043
2.2UF

20%
2 VOLTAGE=25V
X5R-CERM
0402-1
ROOM=MOJAVE

PMID C1

1

C4041

33 31 30 15
28
27 3

IN
IN

20%
2 VOLTAGE=25V
X5R-CERM
0402-1

PP3V0_TRISTAR
MESA_TO_BOOST_EN

ROOM=MOJAVE

10UF

5%
2 VOLTAGE=35V
NP0-C0G
01005

20%
2 VOLTAGE=35V
X5R-CERM
0603

ROOM=BACKLIGHT

VOLTAGE=21V

PP_LCM_BL_CAT1
PP_LCM_BL_CAT2

ROOM=BACKLIGHT

28
28

VOLTAGE=21V

D1 TRIG

ROOM=BACKLIGHT

C4022

1

100PF

SW2_1 A3
SW2_2 A4

B2 SDA
A2 SCL

45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
45_DWI_PMGR_TO_BACKLIGHT_SCLK
1

D3 VIO/HWEN

1

B3 GND
B4 GND

33 30 24 17 16 15 14 12 8

CRITICAL

ROOM=MOJAVE

B
3 27

2.2UF

LM3539A1
DSBGA

B1 SW

B2 EN_M
A3 EN_S

ROOM=MOJAVE

VOLTAGE=25V

PITA32251T-SM

1

PP11V3_MESA

BGA

20%
VOLTAGE=6.3V 2
CERM-X5R
0402-9

NSR0530P2T5G

PP_BL_SW1

LM3638A1

1.0UH-20%-0.4A-0.636OHM

B3 AGND

C4020

PP_BL_SW2

2

L4040

w

1

U4040

CRITICAL

A1 PGND

D4021
DSN2

1.0UH-20%-3.6A-0.060OHM

PP_VCC_MAIN

APN:353S4207 (A1)

w

CRITICAL

L4021

33 26 25 24 22 21 17 15 14

MOJAVE MESA BOOST

w

CRITICAL

B

.c

LED BACKLIGHT DRIVER
APN:353S00640

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

DISPLAY:POWER
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

40 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

26 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

MESA POWER AND IO FILTERS
D

D

MESA POWER
FL4100

80-OHM-25%-1000MA

PP3V1_MESA

15

1
1

C4104

1

2.2UF

C4103

1

2.2UF

20%
2 6.3V
X5R-CERM
0201

0201

1

ROOM=MAMBA_MESA

1

ROOM=MAMBA_MESA

31

C4100
100PF

20%
2 6.3V
X5R-CERM
01005

20%
2 6.3V
X5R-CERM
0201

ROOM=MAMBA_MESA

C4101
0.1UF

2.2UF

20%
2 6.3V
X5R-CERM
0201

ROOM=MAMBA_MESA

C4102

PP3V1_MESA_CONN

2

5%
2 16V
NP0-C0G
01005

ROOM=MAMBA_MESA

ROOM=MAMBA_MESA

FL4105

70-OHM-25%-0.28A
15

1

PP1V9_MESA
1

2

PP1V9_MESA_CONN

31

PP11V3_MESA_CONN

31

01005

C4106

ROOM=MAMBA_MESA

1

2.2UF

C4105
100PF

20%
2 6.3V
X5R-CERM
0201

5%
2 16V
NP0-C0G
01005

ROOM=MAMBA_MESA

ROOM=MAMBA_MESA

FL4107

C

26 3

1

PP11V3_MESA

2

m

70-OHM-25%-0.28A
01005
1

C4107

o

ROOM=MAMBA_MESA

C

100PF

.c

5%
2 35V
NP0-C0G
01005

fi

x

ROOM=MAMBA_MESA

in

a

MESA DIGITAL I/O
FL4110

120-OHM-210MA

SPI_AP_TO_MESA_MOSI

1

SPI_AP_TO_MESA_MOSI_CONN

2
01005

ROOM=MAMBA_MESA

1

31

h

IN

C4110

.c

8

56PF

5%
2 16V
NP0-C0G
01005

w

ROOM=MAMBA_MESA

R4111
SPI_AP_TO_MESA_SCLK

1

0.00

SPI_AP_TO_MESA_SCLK_CONN

2

0%
1/32W
MF
01005

B

1

5%
2 16V
NP0-C0G
01005

FL4112

SPI_MESA_TO_AP_MISO

1

B

ROOM=MAMBA_MESA

120-OHM-210MA
OUT

C4111
56PF

ROOM=MAMBA_MESA

8

31

w

IN

w

8

SPI_MESA_TO_AP_MISO_CONN

2
01005

ROOM=MAMBA_MESA

1

31

C4112
56PF

5%
2 16V
NP0-C0G
01005

FL4114

ROOM=MAMBA_MESA

120-OHM-210MA
8

OUT

MESA_TO_AP_INT

1

MESA_TO_AP_INT_CONN

2
01005

ROOM=MAMBA_MESA

1

31

C4115
100PF

5%
2 16V
NP0-C0G
01005

ROOM=MAMBA_MESA

R4116
26 3

OUT

MESA_TO_BOOST_EN

1

681

MESA_TO_BOOST_EN_CONN

2

1%
1/32W
MF
01005

1

C4116
56PF

ROOM=MAMBA_MESA

5%
2 16V
NP0-C0G
01005

FL4143

A

31

ROOM=MAMBA_MESA

SYNC_MASTER=N/A

120-OHM-210MA
8

OUT

BUTTON_MENU_KEY_L

1
1

C4117

BUTTON_MENU_KEY_CONN_L

2

PAGE TITLE

MESA POWER AND IO FILTERS

31

NOSTUFF

01005
ROOM=MAMBA_MESA

1

56PF

DZ4101

DRAWING NUMBER

12V-33PF
01005-1

5%
2 16V
NP0-C0G
01005

SYNC_DATE=N/A

Apple Inc.

2

051-00648
REVISION

4.0.0

R

ROOM=MAMBA_MESA

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

41 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

27 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

THIS ONE ON MLB

2

2.2UF

C4201

C4202

1

2.2UF

20%
6.3V
X5R-CERM 2
0201

0201

1

ROOM=LCM_B2B

PP5V7_LCM_AVDDH_CONN

1
1

ROOM=LCM_B2B

2.2UF

20%
6.3V
X5R-CERM 2
0201

ROOM=LCM_B2B

D

C4203

20%
2 6.3V
X5R-CERM
0201

ROOM=LCM_B2B

ROOM=LCM_B2B

C4204

1

J4200

100PF

2.2UF

20%
6.3V
X5R-CERM 2
0201

CRITICAL

28

BM15AP-0.8-22DP-0.35V

5%
16V
NP0-C0G
01005

2

ROOM=LCM_B2B

24

PP1V8

PP1V8_LCM_CONN

1
0201

1

ROOM=LCM_B2B

C4205

100PF

2.2UF

20%
6.3V
2 X5R-CERM
0201

2

28

ROOM=LCM_B2B
28 3

70-OHM-25%-0.28A

PN5V7_SAGE_AVDDN

29 26

2

PN5V7_SAGE_AVDDN_CONN

1
01005

OUT

LCD_TO_AP_PIFA_CONN

C4208

1
28

28

56PF

5%
2 16V
NP0-C0G
01005

100PF

5%
16V
NP0-C0G
01005

2

90_MIPI_AP_TO_LCM_CLK_CONN_P
90_MIPI_AP_TO_LCM_CLK_CONN_N

28

C4207

1

ROOM=LCM_B2B

90_MIPI_AP_TO_LCM_DATA1_CONN_P
90_MIPI_AP_TO_LCM_DATA1_CONN_N

28

8

7
9

12

11

14

13
15

18

17

20

19

22

5%
16V
NP0-C0G
01005

ROOM=LCM_B2B

FL4207

28

5

16

DISPLAY CONTROL SIGNALS

3

6

PN5V7_SAGE_AVDDN_CONN
PP5V7_LCM_AVDDH_CONN
PP1V8_LCM_CONN
LCM_TO_CHESTNUT_PWR_EN_CONN
AP_TO_LCM_RESET_CONN_L
LCM_TO_AP_HIFA_BSYNC_CONN
PMU_TO_LCM_PANIC_CONN
LCD_TO_AP_PIFA_CONN
PP_LCM_BL_ANODE_CONN
PP_LCM_BL_CAT1_CONN
PP_LCM_BL_CAT2_CONN

1

10

28

C4206

1

90_MIPI_AP_TO_LCM_DATA0_CONN_P
90_MIPI_AP_TO_LCM_DATA0_CONN_N

28

2
4

PN_SAGE_TO_TOUCH_VCPL

29

240OHM-350MA
2

D

M-ST-SM

23

ROOM=LCM_B2B

FL4205

29 21
9 8 7 6 5 3
20 14 13 12

516S1051 (RCPT)
516S1050 (PLUG)

240OHM-350MA

PP5V7_LCM_AVDDH

C4200

--- & gt;

FL4200

DISPLAY POWER
1

1

DISPLAY CONNECTOR

DISPLAY FLEX
26

2

21

28
28
28
28
28
28
28
3 28
3 28
3 28
3 28

25
26

ROOM=LCM_B2B

ROOM=LCM_B2B

240OHM-350MA

PP_LCM_BL_ANODE_CONN

2

2

1
01005

C4211

ROOM=LCM_B2B

ROOM=LCM_B2B

ROOM=LCM_B2B

FL4221

FL4212

120-OHM-210MA

240OHM-350MA
26

PP_LCM_BL_CAT1

PP_LCM_BL_CAT1_CONN

2
0201

1

ROOM=LCM_B2B

8

2

AP_TO_LCM_RESET_L

IN

3 28

R4220

C4212

1%
1/32W
MF
01005

5%
2 35V
NP0-C0G
01005

01005

1

ROOM=LCM_B2B

ROOM=LCM_B2B

FL4213

16

5%
2 16V
NP0-C0G
01005

2

1

ROOM=LCM_B2B

IN

FL4222

2

PMU_TO_LCM_PANICB

1
01005

3 28

ROOM=LCM_B2B

C4213

CRITICAL

B

IN

90_MIPI_AP_TO_LCM_CLK_N

SYM_VER-2

3

1

2

90_MIPI_AP_TO_LCM_CLK_CONN_P
90_MIPI_AP_TO_LCM_CLK_CONN_N

w

4

28

28

33 29 9 8 OUT

ROOM=LCM_B2B

CRITICAL

7

IN

90_MIPI_AP_TO_LCM_DATA0_P

7

IN

90_MIPI_AP_TO_LCM_DATA0_N

3

2

LCM_TO_AP_HIFA_BSYNC

ROOM=LCM_B2B

FL4230

120-OHM-210MA
2

90_MIPI_AP_TO_LCM_DATA0_CONN_P

01005
ROOM=LCM_B2B

90_MIPI_AP_TO_LCM_DATA0_CONN_N

7

IN

90_MIPI_AP_TO_LCM_DATA1_P

1

28

PROX TO TOUCH INTERFACE
FL4241
29

90_MIPI_AP_TO_LCM_DATA1_CONN_P

OUT

CUMULUS_TO_PROX_RX_EN_1V8

1

2

120-OHM-210MA

28

ROOM=LCM_B2B

7

IN

90_MIPI_AP_TO_LCM_DATA1_N

2

B

C4230
ROOM=LCM_B2B

01005
3

1

28

5%
2 16V
NP0-C0G
01005

CRITICAL
SYM_VER-2

LCM_TO_AP_HIFA_BSYNC_CONN

28

L4202
65-OHM-0.1A-0.7-2GHZ
TAM0605

1

56PF

ROOM=LCM_B2B

4

100PF

w

L4201

65-OHM-0.1A-0.7-2GHZ
TAM0605
SYM_VER-2
4
1

C4222

OWL TO TOUCH INTERFACE

w

7

90_MIPI_AP_TO_LCM_CLK_P

1

28

.c

ROOM=LCM_B2B

L4200
65-OHM-0.1A-0.7-2GHZ
IN

PMU_TO_LCM_PANIC_CONN

h

5%
2 35V
NP0-C0G
01005

TAM0605

28

5%
2 16V
NP0-C0G
01005

100PF

DISPLAY MIPI

C

ROOM=LCM_B2B

in

PP_LCM_BL_CAT2_CONN

2
0201

7

C4221

1

120-OHM-210MA

240OHM-350MA
1

AP_TO_LCM_RESET_CONN_L
100PF

ROOM=LCM_B2B

PP_LCM_BL_CAT2

1

100K

100PF

26

C4220

1

5%
2 16V
NP0-C0G
01005

5%
35V
2 NP0-C0G
01005

1

28

100PF

100PF

C

LCM_TO_CHESTNUT_PWR_EN_CONN

m

1

ROOM=LCM_B2B

LCM_TO_CHESTNUT_PWR_EN

OUT

o

0201

26 16

3 28

.c

1

x

PP_LCM_BL_ANODE

120-OHM-210MA

fi

26

FL4220

FL4211

a

BACKLIGHT

90_MIPI_AP_TO_LCM_DATA1_CONN_N

CUMULUS_TO_PROX_RX_EN_1V8_CONN
1

20

C4241
100PF

5%
2 16V
NP0-C0G
01005

28

ROOM=LCM_B2B

ROOM=LCM_B2B

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

DISPLAY FLEX
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

42 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

28 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

6

5

D403 (B2B,DRIVER ICS)

4

3

2

SAGE2 C0

PN_SAGE_TO_TOUCH_VCPL

29 28

-12V

1

0.1UF

1

1UF

C4311

1

1UF

1UF

10%
2 16V
X6S-CERM
0402

10%
2 16V
X6S-CERM
0402

ROOM=SAGE

ROOM=SAGE

ROOM=SAGE

ROOM=SAGE

APN: 343S0645 (CD3246C0, T6)

C4316

10%
16V
2 X6S-CERM
0402

10%
2 16V
X5R-CERM
0201

ROOM=SAGE

C4309

29

PP_SAGE_TO_TOUCH_VCPH
13.5V

C4324

C4325

1

0.1UF

4.7

ROOM=SAGE

1%
1/32W
MF
01005

1

20%
2 10V
X5R-CERM
0402-1
ROOM=SAGE

XW4302
SM
1

PP1V8_CUMULUS_VDDLDO

2

PP1V8_TOUCH

PP_CUMULUS_VDDANA

27PF

5%
16V 2
NP0-C0G
01005
ROOM=CUMULUS

ROOM=CUMULUS

P2MM-NSM
PP4301 SM
P2MM-NSM
PP4302 SM

PP
PP

1
1

8
8

E4
F1
D3
D2
E1

SPI_AP_TO_TOUCH_CS_L
TOUCH_TO_AP_INT_L

SPI_AP_TO_TOUCH_SCLK
8 SPI_AP_TO_TOUCH_MOSI
8

R4302
1
2

8 SPI_TOUCH_TO_AP_MISO

MF
01005

ROOM=CUMULUS

NC
29

B

XW4301
SM
8

45_AP_TO_TOUCH_CLK32K_RESET_L

1

2

ROOM=CUMULUS

PP1V8_CUMULUS_VDDLDO

45_AP_TO_TOUCH_CLK32K_RESET_L_XW
8

C4
C3
E2
C6

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS

AP_TO_TOUCH_RESET_L

NOTE: LCM_TO_AP_HIFA_BSYNC_BUFF

29
29
29
29
29
29
29

CUMULUS_TO_PROX_RX_EN_1V8

R4303

2

5%
1/32W
MF
01005

29
29
29
29
29
29
29
29
29

THESE ARE ROUTED TOGETHER
SPECIAL - CANNOT SWAP
SPECIAL - CANNOT SWAP

29

29
29

29
29

29

29

29

29
29
29
29
29

PP4303

100K

C7
C9
G2

29

29
29
29
29
29

J4300
AA21

516S1071 PLUG
516S1070 RCPT

M-ST-SM

29
29

C4310
0.01UF

1

10%
6.3V 2
X5R
01005

28

ROOM=SAGE

C4313

C4318

1

A

C5
C4
C0
C3
GS1
C2
C1
GS0
29
VGL
VGH
R10
R7
R1
R5
R6
R8
R9
R4
R3
R2
R0_LEFT

29
29
29
29
29
29
29
29
28
29
29
29
29
29
29
29
29
29
29
29
29

TOUCH_TO_SAGE_SENSE_IN & lt; 5 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 4 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 0 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 3 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 11 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 2 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 1 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 10 & gt;
PN_SAGE_TO_TOUCH_VCPL
PP_SAGE_TO_TOUCH_VCPH
SAGE_TO_TOUCH_VSTM_OUT & lt; 10 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 7 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 1 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 5 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 6 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 8 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 9 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 4 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 3 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 2 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 0 & gt;

44

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

1

C4327
0.1UF

20%
2 6.3V
X5R-CERM
01005
ROOM=SAGE

VBIAS

CUMULUS_TO_SAGE_VSTM_OUT & lt; 4 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 19 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 13 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 16 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 3 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 2 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 0 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 11 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 17 & gt;

0.01UF

0.1UF

10%
6.3V 2
X5R
01005

ROOM=SAGE

PP_SAGE_VBST_OUTH
PN_SAGE_VBST_OUTL

10%
6.3V 2
CERM-X5R
0201

PP_SAGE_LX
PP_SAGE_LY

ROOM=SAGE

GCM_TEST F9
GO F7

SAGE_TO_CUMULUS_IN & lt; 4 & gt;
SAGE_TO_CUMULUS_IN & lt; 3 & gt;
SAGE_TO_CUMULUS_IN & lt; 5 & gt;
SAGE_TO_CUMULUS_IN & lt; 0 & gt;
SAGE_TO_CUMULUS_IN & lt; 12 & gt;
SAGE_TO_CUMULUS_IN & lt; 7 & gt;
SAGE_TO_CUMULUS_IN & lt; 10 & gt;
SAGE_TO_CUMULUS_IN & lt; 1 & gt;
SAGE_TO_CUMULUS_IN & lt; 11 & gt;
SAGE_TO_CUMULUS_IN & lt; 2 & gt;
SAGE_TO_CUMULUS_IN & lt; 13 & gt;
SAGE_TO_CUMULUS_IN & lt; 14 & gt;
SAGE_TO_CUMULUS_IN & lt; 8 & gt;
SAGE_TO_CUMULUS_IN & lt; 9 & gt;
SAGE_TO_CUMULUS_IN & lt; 6 & gt;

29
29
29
29
29
29
29
29
29
29
29
29
29
29
29

SAGE_TO_TOUCH_VSTM_OUT & lt; 8 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 6 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 12 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 1 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 7 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 15 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 14 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 18 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 5 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 9 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 10 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 4 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 19 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 13 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 16 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 3 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 2 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 0 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 11 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 17 & gt;
LCM_TO_AP_HIFA_BSYNC
CUMULUS_TO_SAGE_GCM_SEL

29

39

40

41

42

45

29
29
29
29
29
29
29
29
29
29
29
29
29
29

1

29

1

C4314

14 29

1

0.33UF

29 26

C4319

C4321

1

1000PF

29

ROOM=SAGE

29
29

8 9 28 29 33

1

SM
PP

PP4305
P4MM-NSM
ROOM=SAGE

29

TOUCH_TO_SAGE_VCM_IN

I2C_SCL F5 NC
I2C_SDA G5 NC
CUMULUS_TO_SAGE_BOOST_EN
BOOST_EN B2

29

B
29

SM
PP

PP4304
P4MM-NSM
ROOM=SAGE

L4301

10%
25V
X7R-CERM 2
0201

ROOM=SAGE

PP4306
P4MM-NSM

1

1000PF

10%
25V
X7R-CERM 2
0201

20%
20V 2
TANT
0402

SM
PP

NC

VCM_IN J5

10UH-0.32A-1.56OHM
PSB12101T-SM

ROOM=SAGE

ROOM=SAGE

PP5V7_SAGE_AVDDH
2

TOUCH B2B
TOUCH_TO_SAGE_SENSE_IN & lt; 6 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 13 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 7 & gt;
SAGE_TO_TOUCH_VCPH_REF
SAGE_TO_TOUCH_VCPL_REF
TOUCH_TO_SAGE_VCM_IN
TOUCH_TO_SAGE_SENSE_IN & lt; 12 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 9 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 8 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 14 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 17 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 16 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 15 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 14 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 13 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 12 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 11 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 0 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 18 & gt;
SAGE_TO_TOUCH_VSTM_OUT & lt; 19 & gt;

29
29
29
29
29
29
29
29
29
29

29
29
29
29
29
29
29
29
29
29

C6
GS3
C7
VGH_REF
VGL_REF
VCOM
GS2
C9
C8
GS4

0603-LLP
TANT
25V
20%

C4320

2

1UF-10OHM

C4315

10%
25V
X7R-CERM 2
0201

1

ROOM=SAGE

R17
R16
R15
R14
R13
R12
R11
R0_RIGHT
R18
R19

1

1000PF

ROOM=SAGE

C4322

1

1000PF

10%
25V
X7R-CERM 2
0201

ROOM=SAGE

PP1V8_TOUCH
1

VCC

R4305

1

100K
5%
1/32W
MF
01005

46

20

CUMULUS_TO_PROX_TX_EN_BUFF

74AUP2G3404GN
SOT1115
2
1A 1
6 1Y
4 2Y

ROOM=CUMULUS

PAGE TITLE

R4306

D403 (TOUCH B2B, DRIVER ICS)

100K

U4302

LCM_TO_AP_HIFA_BSYNC_BUFF

2A 3

5%
1/32W
MF
01005

DRAWING NUMBER

Apple Inc.
LCM_TO_AP_HIFA_BSYNC

8 9 28 29 33

051-00648
REVISION

4.0.0

R

ROOM=CUMULUS

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

CUMULUS_TO_PROX_TX_EN_1V8_L

GND
2

A

14 29

PAGE

29

43 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

ROOM=CUMULUS

II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

29 OF 60

IV ALL RIGHTS RESERVED

8

C

29

1

ROOM=CUMULUS

PP1V8_TOUCH

L_X
L_Y

G6
H6
J6
K6
L6
G7
H7
J7
K7
L7
L8
K8
J8
H8
G8
L9
K9
J9
H9
G9

BSYNC K5

VBST_OUTH
VBST_OUTL

C1
D1

E5
D5
C5
B5
A5
A7
B7
C7
D7
E7
E9
D9
C9
B9
A9

DRV_OUT0
DRV_OUT1
DRV_OUT2
DRV_OUT3
DRV_OUT4
DRV_OUT5
DRV_OUT6
DRV_OUT7
DRV_OUT8
DRV_OUT9
DRV_OUT10
DRV_OUT11
DRV_OUT12
DRV_OUT13
DRV_OUT14
DRV_OUT15
DRV_OUT16
DRV_OUT17
DRV_OUT18
DRV_OUT19

VCPH_REF/EN
VCPL_REF/EN

B1
E1

SNS_OUT0
SNS_OUT1
SNS_OUT2
SNS_OUT3
SNS_OUT4
SNS_OUT5
SNS_OUT6
SNS_OUT7
SNS_OUT8
SNS_OUT9
SNS_OUT10
SNS_OUT11
SNS_OUT12
SNS_OUT13
SNS_OUT14

22

23

D3

CSP
ROOM=SAGE

DRV_IN0
DRV_IN1
DRV_IN2
DRV_IN3
DRV_IN4
DRV_IN5
DRV_IN6
DRV_IN7
DRV_IN8
DRV_IN9
DRV_IN10
DRV_IN11
DRV_IN12
DRV_IN13
DRV_IN14
DRV_IN15
DRV_IN16
DRV_IN17
DRV_IN18
DRV_IN19

1

5

43

G1
H1
J1
K1
L1
G2
H2
J2
K2
L2
L3
K3
J3
H3
G3
L4
K4
J4
H4
G4

A2
F2

2

ON MLB - & gt;
ON FLEX- & gt;

CUMULUS_TO_SAGE_VSTM_OUT & lt; 8 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 6 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 12 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 1 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 7 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 15 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 14 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 18 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 5 & gt;

SAGE_TO_TOUCH_VCPH_REF
SAGE_TO_TOUCH_VCPL_REF

ROOM=SAGE

ROOM=TOUCH_B2B

SNS_IN0
SNS_IN1
SNS_IN2
SNS_IN3
SNS_IN4
SNS_IN5
SNS_IN6
SNS_IN7
SNS_IN8
SNS_IN9
SNS_IN10
SNS_IN11
SNS_IN12
SNS_IN13
SNS_IN14

SAGE_VBIAS

CUMULUS_TO_SAGE_BOOST_EN
29
SM
ROOM=CUMULUS
1
U12_GPIO_3
PP
P4MM-NSM
CUMULUS_TO_SAGE_GCM_SEL
29

1

GND

m

G1
D4
F2
F3

29

o

VDDLDO A1

CUMULUS_TO_SAGE_VSTM_OUT & lt; 2 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 5 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 16 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 18 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 17 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 11 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 13 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 7 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 3 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 9 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 10 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 1 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 4 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 8 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 12 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 0 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 15 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 19 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 14 & gt;
CUMULUS_TO_SAGE_VSTM_OUT & lt; 6 & gt;

TM_ACS* C2
TM_OVR G3

E3 BCFG_RTCK
D1 CLKIN/RESET*
D9 RSTOVR*

CUMULUS_TO_PROX_TX_EN_1V8_L

29

H_CS*
H_INT*
H_SCLK
H_SDI
H_SDO

TOUCH_TO_AP_SPI1_MISO_R
1%
1/32W

10.2

WLBGA

E9
E5
F7
E6
E7
F8
G9
D6
D7
D8
F9
D5
F6
F5
G4
E8
G8
G7
G6
G5

GPIO_1/CK
GPIO_2/SD
GPIO_3
GPIO_4

CUMULUS-C1

VSTM_0
VSTM_1
VSTM_2
VSTM_3
VSTM_4
VSTM_5
VSTM_6
VSTM_7
VSTM_8
VSTM_9
VSTM_10
VSTM_11
VSTM_12
VSTM_13
VSTM_14
VSTM_15
VSTM_16
VSTM_17
VSTM_18
VSTM_19

.c

1

29

x

C4303

29

fi

ROOM=CUMULUS

29

a

2
MF
01005

29

2
MF
01005

in

10%
6.3V
X5R-CERM
01005

22.1K

220K

1
5%
1/32W

h

1
1%
1/32W

45_PROX_TO_CUMULUS_RX_FILT

U4301

ROOM=CUMULUS

.c

R4301

IN0_0
IN1_0
IN2_0
IN3_0
IN4_0
IN5_0
IN6_0
IN7_0
IN8_0
IN9_0
IN10_0
IN11_0
IN12_0
IN13_0
IN14_0
IN14_1

VDDIO

R4304

29

w

B9
B8
A9
B7
B6
A8
B5
B4
A7
B3
A6
A3
A5
A4
B2
A2

SAGE_TO_CUMULUS_IN & lt; 2 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 1 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 6 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 7 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 4 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 8 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 3 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 5 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 9 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 0 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 14 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 10 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 13 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 11 & gt;
29 SAGE_TO_CUMULUS_IN & lt; 12 & gt;
45_PROX_TO_CUMULUS_RX_IN

C5
F4

ROOM=CUMULUS

29

ROOM=CUMULUS

29

ROOM=CUMULUS

w

2

20%
2 6.3V
X5R-CERM1
402

20

1000PF
1

4.7UF

E4
D4
C4
B4
A4
A6
B6
C6
D6
E6
E8
D8
C8
B8
A8

w

C

29

29

VDDH C8

ROOM=CUMULUS

ROOM=CUMULUS

29
29

29

VDDCORE C1

20%
2 6.3V
X5R-CERM1
402

C4301

C4306

C4305
VDDANA B1

4.7UF

45_PROX_TO_CUMULUS_RX

29
29

ROOM=CUMULUS

1

20%
10V
X5R-CERM 2
0402-4

TOUCH_TO_SAGE_SENSE_IN & lt; 4 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 3 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 5 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 0 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 12 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 7 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 10 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 1 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 11 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 2 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 13 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 14 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 8 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 9 & gt;
TOUCH_TO_SAGE_SENSE_IN & lt; 6 & gt;

29

14 29

20%
2 6.3V
X5R
0201-1

ROOM=CUMULUS

C4304

1

10UF

TO CLAMP THE
NEGATIVE RAIL

29

1.0UF

1

ROOM=SAGE

3 5 6 7 8 9 12 13 14 20 21 28

C2
B3
F4
F8
E3
L5

1

PP_CUMULUS_VDDCORE

20%
2 10V
X5R-CERM
0402-1

PP1V8

SAGE2-C06

ROOM=CUMULUS

10UF

C4323

GDZ-0201

K

PP5V7_SAGE_AVDDH

5.45-5.98V

U4300
29

C4302

1

29 26

DZ4301
GDZT2R6.2B

ROOM=SAGE

343S0638

PP5V1_GRAPE_VDDH

A

10UF

ROOM=SAGE

D

ROOM=SAGE

C4317

1

20%
2 10V
X5R-CERM
0402-1

CUMULUS C1
26

C4312
10UF

ROOM=SAGE

(TURN ON LATER THAN PP1V8_TOUCH)
(TURN OFF SAME TIME AS PP1V8_TOUCH)

10%
25V
X5R-CERM 2
0201

PN5V7_SAGE_AVDDN_INT

2

1

0.01UF

ROOM=SAGE

D2
A3
F3
F6

1

PN5V7_SAGE_AVDDN

C4326

10%
16V
X5R-CERM 2
0201

AVDDH1
AVDDH2
AVDDH3
AVDDH4

28 26

3.5V

0.1UF

10%
16V
X5R-CERM 2
0201

R4307

PP_SAGE_VCPL_F

1

VCPL_F E2

10%
2 16V
X5R-CERM
0201

C4308

VCPL F1

0.1UF

1

VCPH A1

C4307

AVDDL1 H5

1

1

VDDIO C3

7

AGND1
AGND2
AGND3
AGND4
AGND5
AGND6

8

7

6

5

4

3

2

1

SIZE

D

8

7

6

5

4

3

2

1

D

D

TRISTAR 2 (A3)
APN:343S0695
PP3V3_ACC

20%
2 6.3V
X5R-CERM
01005

ROOM=TRISTAR

33 26 24 17 16 15 14 12 8

D

PP1V8_SDRAM
1

ROOM=TRISTAR

Q4500

C4502
0.01UF

REVERSE_GATE

C

VDD_1V8 F3

10%
2 6.3V
X5R
01005

ROOM=TRISTAR

CRITICAL
ROOM=TRISTAR

OUT

TRISTAR_TO_PMU_USB_BRICK_ID

1
1

C4510
0.01UF

10%
2 6.3V
X5R
01005

BI

6.34K 2
1%
1/32W
MF
01005

5

BI

5

BI

ROOM=PMU
8
8

IN

8

OUT

90_USB_AP_DATA_P
90_USB_AP_DATA_N

A3
B3

UART_AP_TO_ACCESSORY_TXD
UART_ACCESSORY_TO_AP_RXD

E2
E1

F2
F1

UART_AP_DEBUG_TXD
UART_AP_DEBUG_RXD

5
5

BI

SWD_DOCK_TO_AP_SWCLK
SWD_DOCK_BI_AP_SWDIO

w

B

OUT

w

w

OUT

8

ROOM=PMU

IN

BRICK_ID

NC

D2
D1
A5
B5

fi

C2

USB1_DP
USB1_DN

USB0_DP
USB0_DN

UART0_TX
UART0_RX

1

0402

S

R4500
10K

2

PP_TRISTAR_PIN
PP_TRISTAR_ACC1
PP_TRISTAR_ACC2

C

CRITICAL

5%
1/32W
MF
01005
ROOM=TRISTAR

3 31

90_TRISTAR_DP1_CONN_P
90_TRISTAR_DP1_CONN_N
90_TRISTAR_DP2_CONN_P
90_TRISTAR_DP2_CONN_N

POW_GATE_EN* D6

UART1_TX
UART1_RX

SWITCH_EN E4
HOST_RESET B6

UART2_TX
UART2_RX

SDA
SCL
INT
BYPASS

D3
D4
C6
E6

1

3 31

DP1 A2
DN1 B2

CON_DET_L E3

JTAG_CLK
JTAG_DIO

CSD68822F4

G

ROOM=TRISTAR

DP2 A4
DN2 B4

a

R4510

33

BI

A1
B1

DIG_DN

P_IN F6
ACC1 C5
ACC2 E5

3 31

BI

3 31

BI

3 31

IN

PMU_TO_OWL_ACTIVE_READY
TRISTAR_TO_PMU_HOST_RESET
I2C1_AP_SDA
I2C1_AP_SCL
TRISTAR_TO_AP_INT
TRISTAR_BYPASS

20%
2 16V
CER-X5R
0201

3 31

BI

TRISTAR_TO_TIGRIS_VBUS_OFF

C4503
1UF

BI

TRISTAR_CON_DETECT_L

OUT
IN
OUT
IN
BI
OUT

ROOM=TRISTAR

3 31

17 30

5 9 16 26
16

8 17 25
8 17 25
8 16

B

DVSS
DVSS
DVSS

33

90_USB_BB_DATA_P
90_USB_BB_DATA_N

WLCSP

in

BI

DIG_DP

h

23

C3
C4

.c

BI

90_MIKEYBUS_DATA_P
90_MIKEYBUS_DATA_N

TRISTAR_USB_BRICK_ID_R

23

1

x

U4500
CBTL1610A3UK

16

3 17 31

2

0.1UF

m

20%
2 6.3V
X5R
0201-1

C4501

o

1.0UF

1

.c

C4500

ACC_PWR D5

1

PP5V0_USB
15

3

PP3V0_TRISTAR

VDD_3V0 F4

33 31 26 15

1

C4504
1.0UF

F5
C1
A6

20%
2 6.3V
X5R
0201-1

ROOM=TRISTAR

ROOM=TRISTAR
30 17

A

TRISTAR_TO_TIGRIS_VBUS_OFF

P3MM-NSM
SM
1
PP

PP4500

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

I/O:TRISTAR 2
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

45 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

30 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

ANTENNA

2

THIS ONE ON MLB

FL4620

2

PP3V0_TRISTAR

33 30 26 15

1

R4600
HPHONE_TO_CODEC_DETECT

1

3.3K

HPHONE_TO_CODEC_DETECT_CONN

2

CRITICAL

J4600

5%
16V
NP0-C0G
01005

2

AA27D-S038VA1
F-ST-SM
40

1

2

CODEC_TO_HPHONE_HS3_CONN

DZ4600

1

6.8V-100PF
01005
ROOM=DOCK_B2B

2

NO_XNET_CONNECTION=1

1

27

220PF

27

10%
2 10V
X7R-CERM
01005

1

2

31

CODEC_TO_HPHONE_HS4_CONN

0201

DZ4601

1

6.8V-100PF
01005

2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=1

FL4602

1

31

31

31

C4698

FL4608

220PF

10%
2 10V
X7R-CERM
01005

33

ROOM=DOCK_B2B

1

2

IN

1

BB_LAT_GPIO2

0201

2

BB_LAT_GPIO2_CONN
1

24

30 17 3

120-OHM-210MA

12

CODEC_TO_HPHONE_HS3_REF_CONN

1

BB_LAT_GPIO1

IN

2
01005

31

1

ROOM=DOCK_B2B

DZ4603

1

BB_LAT_GPIO1_CONN

C4624
56PF

5%
2 16V
NP0-C0G
01005

6.8V-100PF
01005

ROOM=DOCK_B2B
2 NO_XNET_CONNECTION=1

ROOM=DOCK_B2B

14

CODEC_TO_HPHONE_L_CONN
6.8V-100PF
01005

2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=1

1

31

C4697
220PF

10%
2 10V
X7R-CERM
01005

CODEC_TO_HPHONE_R_CONN

DZ4610

1

ROOM=DOCK_B2B

6.8V-100PF
01005

2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=1

LOWER MIC1

1

31

C4696
220PF

10%
2 10V
X7R-CERM
01005
ROOM=DOCK_B2B

120-OHM-210MA

22

1
01005

B

LOWERMIC1_TO_CODEC_AIN1_CONN_P

SPEAKER

31

C4610

1

ROOM=DOCK_B2B

56PF

31 25

24
26

2

LOWERMIC1_TO_CODEC_AIN1_N

28

LOWERMIC1_TO_CODEC_AIN1_CONN_N

30

2

1
01005

29

32

31

34

33

36

35

38

37
41

C4611

PP_CODEC_TO_LOWERMIC1_BIAS_CONN
1

10%
25V 2
X5R
0201

ROOM=DOCK_B2B

C4653

1

0.1UF

1

56PF

10%
25V 2
X5R
0201

C4654
100PF

5%
25V
NP0-C0G-CERM 2
01005

ROOM=DOCK_B2B

ROOM=DOCK_B2B

1

5%
35V
NP0-C0G 2
01005

ROOM=DOCK_B2B

C4655

27
31
31
31
31

BI
BI
BI
BI

3
30
3
30
3
30
3
30

31
31
31

1

C

220PF

10%
25V
X7R-CERM 2
0201
ROOM=DOCK_B2B

TRISTAR
30 3

OUT

TRISTAR_CON_DETECT_L

R4640
1

1/32W 2
5%
MF

TRISTAR_CON_DETECT_CONN_L

1.00K
01005

1

ROOM=DOCK_B2B

PP_TRISTAR_ACC1

31 25

C4640

5%
2 16V
NP0-C0G
01005
ROOM=DOCK_B2B

1

PP_TRISTAR_ACC1_CONN

2

100PF

5%
16V
NP0-C0G
01005

2

FL4642

30 3

PP_TRISTAR_ACC2

1

2
01005
ROOM=DOCK_B2B

PP_TRISTAR_ACC2_CONN

31

C4642

1

100PF

5%
16V
NP0-C0G
01005

2

SPEAKERAMP_TO_SPEAKER_OUT_NEG

B

ROOM=DOCK_B2B

10-OHM-1.1A

5%
16V
NP0-C0G
01005

31

C4641

1

ROOM=DOCK_B2B

C4634

31

27PF

ROOM=DOCK_B2B

ROOM=DOCK_B2B

1

C4635
100PF

ROOM=DOCK_B2B

ROOM=DOCK_B2B

TRISTAR_CON_DETECT_CONN_L
PP_TRISTAR_ACC1_CONN
PP_TRISTAR_ACC2_CONN

01005

31

5%
2 16V
NP0-C0G
01005

120-OHM-210MA

ROOM=DOCK_B2B

0.1UF

C4652

100PF

56PF

FL4612

10%
25V 2
X5R
0201

1

30 3

2

1

ROOM=DOCK_B2B

PP_CODEC_TO_LOWERMIC1_BIAS

27

27

90_TRISTAR_DP1_CONN_P
90_TRISTAR_DP1_CONN_N
90_TRISTAR_DP2_CONN_N
90_TRISTAR_DP2_CONN_P

FL4641

ROOM=DOCK_B2B

1
01005

24

25

10-OHM-1.1A

1

120-OHM-210MA
OUT

23

SPEAKERAMP_TO_SPEAKER_OUT_POS

w

5%
2 16V
NP0-C0G
01005

FL4611

23

21

w

OUT

2

0.1UF

C4651

w

FL4610

LOWERMIC1_TO_CODEC_AIN1_P

19

h

0201

23

17

20

.c

FL4605

1

in

ROOM=DOCK_B2B

FERR-33-OHM-0.8A-0.09-OHM
1
2
CODEC_TO_HPHONE_R

C4650

fi

DZ4604

1

ROOM=DOCK_B2B

IN

15

27

PP5V0_USB

a

0201

23

13

27

x

FL4604

FERR-33-OHM-0.8A-0.09-OHM
1
2
CODEC_TO_HPHONE_L

31

m

33

o

2
0201

IN

11

27

.c

1
ROOM=DOCK_B2B

23

9

D
27

VOLTAGE=5.0V

FL4624

FL4603

CODEC_TO_HPHONE_HS3_REF

7

PP3V1_MESA_CONN
MESA_TO_BOOST_EN_CONN
SPI_AP_TO_MESA_SCLK_CONN
BUTTON_MENU_KEY_CONN_L
SPI_AP_TO_MESA_MOSI_CONN
MESA_TO_AP_INT_CONN
HPHONE_TO_CODEC_DETECT_CONN
PP3V0_LAT_CONN
BB_LAT_GPIO2_CONN
BB_LAT_GPIO1_CONN

ROOM=DOCK_B2B

600-OHM-25%-0.28A-0.75OHM
OUT

C4601

31

5%
2 16V
NP0-C0G
01005

31

2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=1

23

31

56PF

6.8V-100PF
01005

C

31
31

DZ4602

1

31

01005
ROOM=DOCK_B2B

CODEC_TO_HPHONE_HS4_REF_CONN

ROOM=DOCK_B2B

31

120-OHM-210MA

600-OHM-25%-0.28A-0.75OHM

CODEC_TO_HPHONE_HS4_REF

8
10

CODEC_TO_HPHONE_L_CONN
CODEC_TO_HPHONE_HS4_REF_CONN
CODEC_TO_HPHONE_R_CONN
CODEC_TO_HPHONE_HS3_CONN
CODEC_TO_HPHONE_HS4_CONN
CODEC_TO_HPHONE_HS3_REF_CONN
LOWERMIC1_TO_CODEC_AIN1_CONN_P
LOWERMIC1_TO_CODEC_AIN1_CONN_N
PP_CODEC_TO_LOWERMIC1_BIAS_CONN
LOWERMIC1_BIAS_FILT_RET

31

ROOM=DOCK_B2B

OUT

5

42

C4699

ROOM=DOCK_B2B

FL4601

23

6

18

31

FERR-33-OHM-0.8A-0.09-OHM

CODEC_TO_HPHONE_HS4

3

NC
NC

SPEAKERAMP_TO_SPEAKER_OUT_NEG
PP11V3_MESA_CONN
PP1V9_MESA_CONN
SPI_MESA_TO_AP_MISO_CONN

31 25
27

0201

BI

4

SPEAKERAMP_TO_SPEAKER_OUT_POS

31 25

ROOM=DOCK_B2B

ROOM=DOCK_B2B

23

1

16

5%
2 16V
NP0-C0G
01005

39

2

ROOM=DOCK_B2B

FERR-33-OHM-0.8A-0.09-OHM

CODEC_TO_HPHONE_HS3

516S00116 (RCPT)
516S00117 (PLUG)

ROOM=DOCK_B2B

100PF

31

56PF

FL4600

BI

--- & gt;

31

C4620

1

ROOM=DOCK_B2B

C4600

1

ROOM=DOCK_B2B

D

PP3V0_LAT_CONN

01005

5%
1/32W
MF
01005

23

1

120-OHM-210MA

AUDIO JACK
OUT

3

DOCK FLEX CONNECTOR

DOCK FLEX CONNECTOR
23

4

2

5%
16V
NP0-C0G
01005

ROOM=DOCK_B2B
31

C4612
100PF

5%
2 16V
NP0-C0G
01005

ROOM=DOCK_B2B

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

I/O:DOCK FLEX B2B
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

46 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

31 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

BUTTON FLEX
BUTTON FLEX CONNECTOR
THIS ONE ON MLB

FL4700

D

516S1040 (PLUG)
516S1041 (RCPT)

--- & gt;

D

120-OHM-210MA
24

2

PP_CODEC_TO_REARMIC2_BIAS

1

PP_CODEC_TO_REARMIC2_BIAS_CONN

01005
1

ROOM=BUTTON_B2B

32

BUTTON_B2B
CRITICAL

J4700

C4700

205847-018

100PF

F-ST-SM

5%
2 16V
NP0-C0G
01005

20
19

ROOM=BUTTON_B2B

MIC2
ANC REF MIC

2

23

OUT

REARMIC2_TO_CODEC_AIN3_P

1

32

ROOM=BUTTON_B2B

1

C4701
56PF

15

5%
2 16V
NP0-C0G
01005

32

1

ROOM=BUTTON_B2B

100PF

120-OHM-210MA
OUT

2

REARMIC2_TO_CODEC_AIN3_N

REARMIC2_TO_CODEC_AIN3_CONN_N

01005
1

ROOM=BUTTON_B2B

C4716
4.7UF

5%
2 16V
NP0-C0G
01005

BUTTON_B2B

1

C4715

1

100PF

5%
2 16V
NP0-C0G
01005

FL4702

23

C4714

1

20%
2 6.3V
X5R-CERM1
402

BUTTON_B2B

32

K

15
17

VIBE_RETURN
BUTTON_VOL_UP_CONN_L

21
22

BUTTON_RINGER_A_CONN
BUTTON_VOL_DOWN_CONN_L

13

18

PP3V1_VIBE

11

16

BUTTON_HOLD_KEY_CONN_L

9

14

32

7

12

REARMIC2_TO_CODEC_AIN3_CONN_P

01005

5

8
10

2

3

6

FL4701

120-OHM-210MA

1

4

PP_LED_DRIVER_WARM_LED

32 22

PP_LED_DRIVER_COOL_LED 22

D4701
LLP-DFN1006-2
BAS40LP

BUTTON_B2B

LED_MODULE_NTC_CONN 32
PP_CODEC_TO_REARMIC2_BIAS_CONN 32
REARMIC2_TO_CODEC_AIN3_CONN_P 32
REARMIC2_TO_CODEC_AIN3_CONN_N 32

32

32

A BUTTON_B2B
32

C4702

3

56PF

5%
2 16V
NP0-C0G
01005

D

XW4701
SM

C

8

AP_TO_VIBE_TRIG

1
1

2

VIBE_PWM_G

R4701

S

1

C

5%
2 16V
NP0-C0G
01005

DFN1006H4-3
SYM_VER_1

BUTTON_B2B
2

fi

x

.c

o

C4703
100PF

DMN3730UFB4
BUTTON_B2B

10K

1%
1/32W
MF
2 01005
BUTTON_B2B

1

Q4701

G

m

ROOM=BUTTON_B2B

32 22

PP_LED_DRIVER_WARM_LED

C4723

a
C4710

0.00

BUTTON_HOLD_KEY_CONN_L

2

0%
1/32W
MF
01005

1

27PF

5%
6.3V 2
NP0-C0G
0201

32

1

DZ4710

ROOM=BUTTON_B2B

5.5V-6.2PF

0201

ROOM=BUTTON_B2B

ROOM=BUTTON_B2B

STROBE:
WARM LED
COOL LED
MODULE NTC

32 22

PP_LED_DRIVER_COOL_LED

C4721

OUT

BUTTON_RINGER_A

C4711

5%
2 16V
NP0-C0G
01005
ROOM=BUTTON_B2B

B

FL4720

120-OHM-210MA
22

OUT

1

LED_MODULE_NTC

2

LED_MODULE_NTC_CONN

32

01005

R47201

2

BUTTON_RINGER_A_CONN

51.1K

1%
1/32W
MF
01005 2

32

01005

1

C4722
27PF

5%
16V
NP0-C0G 2
01005

FL4711
16 8

1

100PF

120-OHM-210MA
1

1

ROOM=BUTTON_B2B

w

B

ROOM=BUTTON_B2B

ROOM=BUTTON_B2B

w

2

5%
2 16V
NP0-C0G
01005

5%
16V 2
NP0-C0G
01005

in
1

.c

OUT

BUTTON_HOLD_KEY_L

w

8

27PF

100PF

h

R4710

C4724

1

1

ROOM=BUTTON_B2B

1

27PF

ROOM=BUTTON_B2B

DZ4711

5%
6.3V
NP0-C0G 2
0201

ROOM=BUTTON_B2B

1

C4720
100PF

5%
2 16V
NP0-C0G
01005

ROOM=BUTTON_B2B

5.5V-6.2PF

0201

ROOM=BUTTON_B2B

ROOM=BUTTON_B2B

2

BUTTONS:
HOLD
RINGER
VOL UP/DOWN

FL4712

120-OHM-210MA
16 8

OUT

1

BUTTON_VOL_DOWN_L

C4712

2
01005

1

ROOM=BUTTON_B2B

BUTTON_VOL_DOWN_CONN_L
1

100PF

32

DZ4712

12V-33PF
01005-1

5%
16V 2
NP0-C0G
01005

2

ROOM=BUTTON_B2B

ROOM=BUTTON_B2B

FL4713

A

120-OHM-210MA
16 8

OUT

1

BUTTON_VOL_UP_L

C4713

2
01005

1

ROOM=BUTTON_B2B

BUTTON_VOL_UP_CONN_L
1

SYNC_DATE=N/A

PAGE TITLE

32

I/O:BUTTON FLEX B2B

DZ4713

12V-33PF
01005-1

100PF

5%
16V 2
NP0-C0G
01005

SYNC_MASTER=N/A

2

DRAWING NUMBER

ROOM=BUTTON_B2B

Apple Inc.

051-00648
REVISION

4.0.0

R

ROOM=BUTTON_B2B

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

47 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

32 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

BASEBAND, WLAN, BT & STOCKHOLM

3

2

1

RF
I566
N69 CELLULAR/WLAN/BT/STOCKHOLM SUBDESIGN SYMBOL

36 16
33 30 26 24 17 16 15 14 12 8
58 57 56
56 31 30 26 15

IN
IN
IN
IN

PP1V8_SDRAM

ADC_SMPS4

PP_WL_BT_VDDIO_AP
RFFE_VIO_S2R
BB_USB_VBUS
PP_STOCKHOLM_1V8_S2R

PMU_TO_BB_USB_VBUS_DETECT
PP1V8_SDRAM
PP3V0_TRISTAR

BI

36 8

OUT

36 8

IN

36 16

OUT

41 8

IN

36 30

BI

36 30

BI

36 8

IN

36 8 OUT
36 8

IN

36 16

IN

36 8 OUT

C

50_AP_BI_BB_HSIC0_DATA
50_AP_BI_BB_HSIC0_STB
BB_TO_AP_HSIC_DEVICE_RDY
AP_TO_BB_HSIC_HOST_RDY
BB_TO_PMU_HOST_WAKE_L
AP_TO_BB_WAKE_MODEM

IN

36 8
36 8
36 8

OUT
IN
IN

36 9 OUT

OSCAR_CONTEXT_A
OSCAR_CONTEXT_B

WLAN_UART_RXD

BB_RESET_DET_L

WLAN_UART_CTS_L

BB_RST_L
RF_PMIC_RESET_L

WLAN_UART_RTS_L

BB_I2S_TXD

WLAN_PCIE_PERST_L
WLAN_PCIE_CLKREQ_L

BB_I2S_RXD
BB_I2S_WS

90_WLAN_PCIE_REFCLK_N
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_RDN

BB_UART_TXD
BB_UART_RXD

90_WLAN_PCIE_RDP
90_WLAN_PCIE_TDN
90_WLAN_PCIE_TDP

BB_UART_CTS_L
BB_UART_RTS_L

BLUETOOTH
BB_FORCE_PWM

UART_OWL_TO_BB_TXD
UART_BB_TO_OWL_RXD

BB_OTHER_RXD
BB_OTHER_TXD

in

IN

SWD_AP_BI_BB_SWDIO
SWD_AP_PERIPHERAL_SWCLK

BB_JTAG_TMS
BB_JTAG_TCK

41 8
36 8 OUT

.c

BB_TO_AP_GPS_TIME_MARK

BB_GPS_SYNC

AP_TO_BB_COREDUMP

BB_CORE_DUMP

BB_TO_AP_IPC_GPIO
AP_TO_BB_MESA_ON

BB_IPC_GPIO1
AP_TO_BB_MESA_ON

B
41 26 22

OUT

9 36

BB_TO_LED_DRIVER_GSM_BURST_IND

GSM_TXBURST_IND

ANTENNA

41 31

OUT

BB_LAT_GPIO1

41 31

OUT

OUT

8 36

IN

8 36

IN

8 36

OUT

8 36

OUT

8 57

OUT

16 57

IN
BI

C

6 57
6 57

BB_LAT_GPIO2

90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_WLAN_TO_AP_RXD_P

IN

6 57

IN

6 57

IN

6 36

IN

6 36

OUT

6 36

OUT

6 36

IN

8 36

OUT

8 36

I2S_AP_TO_BT_DOUT
I2S_BT_TO_AP_DIN
45_I2S_AP_TO_BT_BCLK
I2S_AP_TO_BT_LRCLK

BT_PCM_IN
BT_PCM_OUT
BT_PCM_CLK
BT_PCM_SYNC

PMU_TO_BT_REG_ON
AP_TO_BT_WAKE
BT_TO_PMU_HOST_WAKE
45_PMU_TO_WLAN_CLK32K

BT_REG_ON
WAKE_BT

w

IN

IN

HOST_WAKE_BT
CLK32K_AP

OUT

8 36

IN

8 36

IN

8 36

OUT

8 36

BI
IN

8 36
8 36

IN

16 36

IN

8 36

OUT

16 36

IN

16 36

w

36 8

9 36

B

w

36 8 OUT

IN

UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_RTS_L

BT_UART_RXD
BT_UART_TXD

h

40 13 9

16 36

BB_I2S_CLK

BT_UART_CTS_L

BI

IN

PCIE_AP_TO_WLAN_DEV_WAKE
WLAN_TO_PMU_PCIE_WAKE_L
PCIE_AP_TO_WLAN_RESET_L
PCIE_WLAN_TO_AP_CLKREQ_L

PCIE_DEV_WAKE
WLAN_PCIE_WAKE_L

BT_UART_RTS_L

36 9

16 36

UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_CTS_L

WLAN_UART_TXD

RADIO_ON_L

I2S_BB_TO_AP_DIN

36 9

36 8

WLAN_REG_ON

90_BB_USB_P

LCM_TO_AP_HIFA_BSYNC

IN

RADIO_MLB

90_BB_USB_N

AP_TO_BB_RADIO_ON_L
BB_TO_AP_RESET_DETECT_L
AP_TO_BB_RESET_L
PMU_TO_BB_PMIC_RESET_L

IN

IN

36 8

HOST_WAKE_WLAN

BB_WAKE_HOST_L
AP_WAKE_MODEM

90_USB_BB_DATA_N
90_USB_BB_DATA_P

36 29 28 9 8

36 8

OUT

D

BB_DEVICE_RDY
BB_HOST_RDY

OUT

IN

16 36

50_BB_HSIC_STROBE

45_I2S_AP_TO_BB_BCLK
I2S_AP_TO_BB_DOUT
I2S_AP_TO_BB_LRCLK
UART_BB_TO_AP_RXD
UART_AP_TO_BB_TXD
UART_AP_TO_BB_RTS_L
UART_BB_TO_AP_CTS_L

36 8

OUT

50_BB_HSIC_DATA

x

36 5

16 36

WLAN

a

BI

OUT

PAC_VDD_3V0

BASEBAND
36 5

16 36

OWL_TO_WLAN_CONTEXT_A
OWL_TO_WLAN_CONTEXT_B

ADC_SMPS1

OUT

WLAN_TO_PMU_HOST_WAKE
PMU_TO_WLAN_REG_ON

ADC_PP_LDO11
PP_VCC_MAIN

16 36

m

33 30 26 24 17 16 15 14 12 8
58 57 56

PP_VCC_MAIN

OUT

o

D

IN

BB_TO_PMU_AMUX_LDO5
BB_TO_PMU_AMUX_LDO11
BB_TO_PMU_AMUX_SMPS1
BB_TO_PMU_AMUX_SMPS4

ADC_PP_LDO5

PP_BATT_VCC

.c

58 26 25 24 22 21 17 15 14

IN

SHARED POWER

PP_BATT_VCC

fi

51 18 17 3

STOCKHOLM

STOCKHOLM_UART_TXD

BB_LAT_GPIO1

STOCKHOLM_UART_RXD

BB_LAT_GPIO2

STOCKHOLM_UART_RTS
STOCKHOLM_UART_CTS

AP_TO_STOCKHOLM_EN
AP_TO_STOCKHOLM_FW_DWLD_REQ
STOCKHOLM_TO_PMU_HOST_WAKE
AP_TO_STOCKHOLM_DEV_WAKE

UART_STOCKHOLM_TO_AP_RXD
UART_AP_TO_STOCKHOLM_TXD
UART_STOCKHOLM_TO_AP_CTS_L
UART_AP_TO_STOCKHOLM_RTS_L

PMU_TO_STOCKHOLM_EN
AP_TO_STOCKHOLM_DWLD_REQUEST
STOCKHOLM_TO_PMU_HOST_WAKE
AP_TO_STOCKHOLM_DEV_WAKE

IN

8 36

OUT

8 36

OUT

8 36

IN

8 36

IN

16 36

IN

7 36

OUT
IN

16 36
8 58

A

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

BASEBAND:RADIO SYMBOL
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

49 OF 49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

33 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2

1

REV

ECN

CK
APPD

DESCRIPTION OF REVISION

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

DATE

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

D

4

0004752417

ENGINEERING RELEASED

2015-08-24

N69 RADIO_MLB SUBDESIGN - EVT
8/19/2015

D

LAST_MODIFICATION=Wed Aug 19 10:34:24 2015

11
12
13
15
20
21
22
23
24
30
31
32
33
35
36
37
40
41

m

10

42

B

C

o

9

.c

8

x

7

BASEBAND PMU (1 0F 2)
BASEBAND PMU (2 OF 2)
BASEBAND (1 OF 2)
BASEBAND (1 OF 2)
MOBILE DATA MODEM (2 OF 2)
RF TRANSCEIVER (1 0F 3)
RF TRANSCEIVER (2 OF 3)
RF TRANSCEIVER (3 OF 3)
QFE DCDC
2G PA
VERY LOW BAND PAD
LOW BAND PAD
MID BAND PAD
HIGH BAND PAD
ANTENNA SWITCH
HIGH BAND SWITCH
RX DIVERSITY
RX DIVERSITY (2)
GPS
ANTENNA FEEDS
WIFI/BT: MODULE AND FRONT END
STOCKHOLM
OMIT_TABLE_RF
Radio Subdesign Ports

fi

6

a

5

DATE

in

4

SYNC

h

3

CONTENTS
page1
CELL:ALIASES
AP INTERFACE & DEBUG CONNECTORS

.c

1

w

C

& lt; CSA & gt;

w

PAGE
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60

B

w

43
45

?

A

A

DRAWING TITLE

SCH,MLB,N69
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

1 OF 55

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

8

7

6

5

4

3

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

34 OF 60

IV ALL RIGHTS RESERVED

2

1

SIZE

D

8

7

6

5

4

3

2

1

BLANK PAGE
D

m

D

C

w

w

.c

h

in

a

fi

x

.c

o

C

B

w

B

A

A
PAGE TITLE

CELL:ALIASES
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

30 OF 55

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

8

7

6

5

4

3

SHEET

35 OF 60

IV ALL RIGHTS RESERVED

2

1

SIZE

D

8

7

6

5

4

3

2

1

AP INTERFACE & DEBUG CONNECTORS
NOT UNDER SIM

UNDER THE SIM

PP3105_RF
P2MM-NSM
SM
PP

1 CLK32K_AP

OPTIONAL

24 27

PP3119_RF
P2MM-NSM
SM

D

PP

1 BT_UART_TXD

NOSTUFF

J3100_RF

24 27

PP3120_RF
P2MM-NSM
1 BT_UART_RXD

PP3131_RF
P4MM-NSM
7
SM PP3132_RF
1

24 27

WIFI_BT

PP3101_RF
P2MM-NSM
SM
PP

1

BT_UART_CTS_L

PP3102_RF
P2MM-NSM
SM
PP

24 27

P2MM-NSM
SM
1

SM
PP

1

STOCKHOLM

SM
PP

WIFI_BT

1

SM
PP

STOCKHOLM_TO_SIM_SWP

PP3173_RF
P2MM-NSM

PP

PP

PP

1 WAKE_BT

1

45_BBPMU_TO_STOCKHOLM_19P2M_CLK

PP

SM
PP

27 25 3

1

SM
PP

1 WLAN_REG_ON

24 27

SM

WIFI_BT

PP

SM

1 BT_REG_ON

24 27

PP

WIFI_BT

SM
PP

1 HOST_WAKE_WLAN

PP

1

WLAN_UART_RTS_L

1

25 6 4 3

4

WLAN_UART_CTS_L

24 27

31

34

33

36

35

38

37

40

39

42

41

44

43

46

45

90_WLAN_PCIE_RDP

24 27

90_WLAN_PCIE_TDN

24 27

90_WLAN_PCIE_TDP

24 27

WIFI_BT

1
WIFI_BT

1
WIFI_BT

SM
PP

1 WLAN_UART_RXD

1

BB_UART_TXD

8 27

BB_UART_RXD

8 27

PP3197_RF
P2MM-NSM
1

PP3198_RF
P2MM-NSM
SM

1 WLAN_UART_TXD

PP

24 27

1

BB_UART_CTS_L

8 27

WIFI_BT

SM

8 12 13 14 15 16 17

1

50

49

54

1 50_BB_HSIC_DATA

8 27

PP

8 27

PP
25

1 SPMI_DATA

1 SPMI_CLK

5 7

5 7

PP3104_RF
P4MM-NSM

27

BB_OTHER_TXD
BB_OTHER_RXD

7 27

PP3112_RF
P4MM-NSM

SM

SM

AP_TO_STOCKHOLM_FW_DWLD_REQ
AP_TO_STOCKHOLM_EN

7 27

PP3111_RF
P4MM-NSM

8 27

BB_I2S_WS
BB_I2S_RXD
BB_I2S_TXD

8 27

SM

8 27

PP

1

MDM_CLK

5 7

C

52

BB_COEX_UART_RXD
BB_COEX_UART_TXD

8 24
8 24

ESD5004

BB_SIM_DATA

B

1

8 3

BB_SIM_RESET

2

DZ3102_RF

5.5V-6.2PF
8 3

BB_UART_RTS_L

VR3101_RF

8 3

1

BB_SIM_DETECT

STOCKHOLM_TO_SIM_SWP

2

3

8 27
8 3

0201

BB_SIM_CLK

4

2

RFFE1_DATA

1

47

1 50_BB_HSIC_STROBE

LGA-1

PP3199_RF
P2MM-NSM

RFFE1_CLK

1

48

SM

SIM CARD ESD PROTECTION

24 27

WIFI_BT

8 12 13 14 15 16 17

1

C3102_RF
100PF

NP0-C0G
01005
5%
10V

RFFE2_CLK

1

8 18 19 21

SIM CARD CONNECTOR
RADIO_BB

1

TABLE_ALT_HEAD

PART NUMBER

R3103_RF

1

R3104_RF

10K

1%
1/32W
MF
01005 2

PP_LDO11

25 6 4 3

1%
1/32W
MF
01005 2

PP_LDO5

1
R3101_RF

PP_LDO5

VREG_SMPS4_2V075

1

15.00K
1%

1/32W
MF
2 01005

VCC

J3101_RF

XW3103_RF
SHORT-10L-0.1MM-SM
ADC_PP_LDO5
1
2
XW3104_RF
SHORT-10L-0.1MM-SM
ADC_SMPS4
1
2

REF DES

COMMENTS:

371S00044

ALTERNATE

VR3101

ESD ALTERNATIVE

TABLE_ALT_ITEM

10K

XW3102_RF
SHORT-10L-0.1MM-SM
ADC_PP_LDO11
1
2

BOM OPTION

1

BOOT_HSIC
BOOT_HSIC_USB
WATCHDOG_DISABLE

VREG_SMPS1_0V90

ALTERNATE FOR
PART NUMBER

377S0163

RADIO_BB

XW3101_RF
SHORT-10L-0.1MM-SM
ADC_SMPS1
1
2

8

32

SM

41 36

OUT

33 60

IN

IN

BB_SIM_RESET

2 RST

BB_SIM_CLK

SIM-CARD-N48

3 CLK

F-ST-SM

OUT

C3101_RF

2.2UF

20%
2 6.3V
X5R-CERM
0201

SYNC_MASTER=N/A
I/O 7

DETECT 12

GND

1

SWP 6

BB_SIM_DATA
BB_SIM_DETECT
STOCKHOLM_TO_SIM_SWP

BI

OUT

OUT

SYNC_DATE=N/A

PAGE TITLE

36 41

AP INTERFACE & DEBUG CONNECTORS
DRAWING NUMBER

36 41

Apple Inc.
BI

36 58

051-00648
REVISION

4.0.0

R

33 60

8
9
10
11
13
5

12 11 10 8 7 6 4 3

29

WIFI_BT

1

41 36

6 4

30

24 27

SM

WIFI_BT

1%
1/32W
MF
01005 2

8

PP

90_WLAN_PCIE_RDN

1

PP

10K

A

8 27

24

PP3196_RF
P2MM-NSM

24 27

WIFI_BT

R3102_RF

8

BB_DEVICE_RDY

STOCKHOLM_UART_RXD
STOCKHOLM_UART_TXD
STOCKHOLM_UART_CTS
STOCKHOLM_UART_RTS
STOCKHOLM_TO_PMU_HOST_WAKE

WIFI_BT

RADIO_BB

8

27

CORONA PCIE RX/TX TP

PP_LDO11

12 11 10 8 7 6 4 3

28

o

WLAN_JTAG_SWDIO

24 27

PP3172_RF
P2MM-NSM
SM

PP3116_RF
P4MM-NSM

WIFI_BT

PP3195_RF
P2MM-NSM

PP3171_RF
P2MM-NSM
PP

27 25 3
27 25 3

1

PP

SM

24

WIFI_BT

PP
PP3194_RF
P2MM-NSM

PP3170_RF
P2MM-NSM
SM

27 25 3

WLAN_JTAG_SWDCLK

PP3193_RF
P2MM-NSM

PP3163_RF
P2MM-NSM

B

25

7 5

5 25

STOCKHOLM

PP3192_RF
P2MM-NSM

24 27

WIFI_BT

PP3162_RF
P2MM-NSM
SM

8 27

26

5 27

5 27

.c

PP

PP3158_RF
P2MM-NSM
SM

23

8

BB_FORCE_PWM

1

x

WIFI_BT

PP3157_RF
P2MM-NSM
SM

PP

PP

fi

SM

PP3155_RF
P2MM-NSM
SM

8 27

24

BB_WAKE_HOST_L
BB_GPS_SYNC

SM

a

PP

21

PP3191_RF
P2MM-NSM

in

HOST_WAKE_BT

1

PP3154_RF
P2MM-NSM
SM

22

PP

h

PP

PP3115_RF
P4MM-NSM

5

PP3186_RF
P2MM-NSM

PP3153_RF
P2MM-NSM
SM

19

27 5

PP3152_RF
P2MM-NSM
PP

8 27

20

8

PP3185_RF
P2MM-NSM
PP

SM

25

27 25 3

WIFI_BT

PP

BB_RESET_DET_L
8 27

STOCKHOLM

BT_PCM_OUT

SM

17

27 5

PP3129_RF
P2MM-NSM

SM

C

18

P4MM-NSM

.c

PP

BB_RST_L

12 11 10 8 7 6 4 3

PP3174_RF
P2MM-NSM

BT_PCM_IN

1

15

25 6 4 3

PP3128_RF
P2MM-NSM
SM

16

8 3

BT_PCM_SYNC

1

13

90_BB_USB_P

w

PP

14

8 3

w

SM

8 27

11

8 3

PP3127_RF
P2MM-NSM

AP_TO_BB_MESA_ON

1

12

w

PP

1

PP

SM

9

8 3

STOCKHOLM

1

SM

SM

10

OSCAR_CONTEXT_B

PP3122_RF
P2MM-NSM
SM

PP3190_RF
P2MM-NSM

SM

BB_I2S_CLK

27

STOCKHOLM

BT_PCM_CLK

PP3138_RF
1
PP 27 8 PP3139_RF
1
PP3140_RF
P4MM-NSM
PP

P4MM-NSM

PS_HOLD_PMIC
PMIC_RESOUT_L

25 5 3

1

8

BB_DEBUG_ERROR
RF_PMIC_RESET_L

24 27

PP

7

BB_CORE_DUMP
BB_USB_VBUS
90_BB_USB_N

BB_SIM_RESET
BB_SIM_CLK
BB_SIM_DATA
BB_SIM_DETECT
PP_LDO5
PP_LDO11
RADIO_ON_L

7

WIFI_BT

SM

5

8

BB_JTAG_TDI
BB_JTAG_TRST_L
STOCKHOLM_TO_BBPMU_CLK_REQ

7

PP

PP3121_RF
P2MM-NSM

3

BB_HOST_RDY

OSCAR_CONTEXT_A

PP3124_RF
P2MM-NSM

BB_DEBUG_STATUS

6

BB_JTAG_TDO

7

1

4

27 7 BB_JTAG_TMS

1

PP3123_RF

BT_UART_RTS_L

1

SM
PP

WIFI_BT

2

BB_JTAG_RST_L
27 7 BB_JTAG_TCK_IN

P4MM-NSM

PP

51

5

PP

53

M-ST-SM

m

SM

D

AXE650124

WIFI_BT

NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

33 60

BRANCH

PAGE

31 OF 55

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
OUT

7

33 60

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

6

5

4

3

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

36 OF 60

IV ALL RIGHTS RESERVED

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

BASEBAND PMU (1 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

SWITCHERS OUTPUT CAPS
VREG_SMPS1_0V90
RADIO_PMIC

20UF
20%

2

FOOTPRINT SAME AS 138S0716

RADIO_PMIC

1 C3231_RF

20UF
20%

6.3V
CERM-X5R
0402

2

2

1 C3224_RF

2.2UF
20%

100PF
2

5%
16V
NP0-C0G
01005

2

6.3V
X5R-CERM
0201

RADIO_PMIC
1 C3223_RF

2.2UF
20%

2

6.3V
X5R-CERM
0201

1

2.2UF
20%

2

C3216_RF
15UF

20%
2 6.3V
X5R
0402-1

6.3V
X5R-CERM
0201

1

C3221_RF
15UF

20%
2 6.3V
X5R
0402-1

VREG_SMPS3_0V95
RADIO_PMIC

2

RADIO_PMIC

RADIO_PMIC
1 C3238_RF

20UF
20%

6.3V
CERM-X5R
0402

2

6.3V
CERM-X5R
0402

2

VREG_RF_CLK_BYP

SWITCHERS BULK CAPS

01005

0201-1

4

C3217_RF

4

15UF

4

20%
2 6.3V
X5R
0402-1

VBATT_S1

VDD_INT_BYP
REF_BYP
GND_REF
VDD_S1

88
94

VBATT_S2

4

4

VBATT_S4

1

4

VBATT_S2

VBATT_S3

47

VREG_SMPS2_1V25

PP_VCC_MAIN
MAKE_BASE=TRUE

4 3

VREG_SMPS4_2V075

77
72

VBATT_S3

4

VREG_SMPS3_0V95

38

VREG_SMPS4_2V075

85

C3219_RF
15UF

40

20%
2 6.3V
X5R
0402-1

46 37 33
58 57

PP_VCC_MAIN
MAKE_BASE=TRUE

IN

60
57
37 33
46
58

VBATT_S4

VBATT_S4
1

VDD_S4

VREG_S3 62
VSW_S3_1 53
VSW_S3_2 58

VDD_L1

1

VDD_L7_8_11
VDD_L9
VDD_L10
VDD_L12
VDD_XO_RFC

OUT
IN

GND

MAKK2016-SM

2

1235MA

PP_VSW_S2

1

MAKK2016-SM

2

1100MA

L3204_RF
2.2UH-20%-1.5A-0.16OHM

VOLTAGE=4.50V

PP_VSW_S3

1

MAKK2016-SM

2

1350MA

36 37 39

VREG_SMPS2_1V25

OUT

37

VREG_SMPS3_0V95

OUT

37

VREG_SMPS4_2V075

OUT

36 37

PP_LDO1

OUT

39 43 44

PP_LDO2

OUT

39

PP_LDO3

OUT

38 39

PP_LDO4

OUT

39

PP_LDO5

OUT

36 39 25

PP_LDO7

OUT

39 41

PP_LDO8

OUT

43 44

PP_LDO9

OUT

39

PP_LDO10

OUT

39

PP_LDO11

OUT

36 39 40 41 43 44 45

PP_LDO12

OUT

39

PP_LDO13

OUT

39 56

OUT

47 48 56

VOLTAGE=4.50V

L3202_RF

RADIO_PMIC

2.2UH-20%-1.2A-0.15OHM

PP_VSW_S4

1

550MA

2 0806

VOLTAGE=4.50V

VREG_RX

VOLTAGE=1.225V

VREG_L2 7

VOLTAGE=1.80V

VREG_L3 8

VOLTAGE=1.80V

VREG_L4 68

VOLTAGE=3.075V

VREG_SIM

VREG_L5 59

MDM_VREF_LPDDR2

VREF_DDR2

VREG_L6 48

PP_VCC_MAIN

43

VIN_VPH1

VOLTAGE=1.80V

VREG_L7 10

VIN_VPH2

OUT

L3203_RF
2.2UH-20%-1.5A-0.16OHM

VREG_L1 86

52

54

VREG_SMPS1_0V90

VOLTAGE=4.50V

VREG_S4 23
VSW_S4_1 6
VSW_S4_2 12

VDD_L2_3

4

49

60

VDD_S3

4
4 3

VBATT_S3
1

VREG_S2 82
VSW_S2 93

PP_VSW_S1

.c

VREG_SMPS4_2V075

4

20%
2 6.3V
X5R
0402-1

IN

2

C3218_RF
15UF

46 37 33
58 57

VDD_S2
VDD_S2

L3201_RF
2.2UH-20%-1.5A-0.16OHM

4
4 3

60

92

VREG_XO_PMIC

VREG_S1 27
VSW_S1_1 11
VSW_S1_2 16

4

VBATT_S2
1

REG

w

PP_VCC_MAIN
MAKE_BASE=TRUE

IN

VREG_RFCLK 91
VREG_XO 74

6.3V
CERM-X5R
0402

x

26
21
15
22

20%
4V
2 X5R

w

1

20%
2 10V
X5R-CERM

2

C

fi

VBATT_S1

1.0UF

4

0201-1

h

VBATT_S1

BGA
SYM 5 OF 5

w

PP_VCC_MAIN
MAKE_BASE=TRUE

IN

20%
2 10V
X5R-CERM

PM8019

1 RADIO_PMIC
C3227_RF

0.1UF

1.0UF

a

1 RADIO_PMIC
C3226_RF

U_PMICRF_RF

6.3V
CERM-X5R
0402

20UF
20%

.c

1 RADIO_PMIC
C3228_RF

in

FOOTPRINT SAME AS 138S0716

RADIO_PMIC

o

AVDD_BYP
REF_BYP

3 4

1 C3240_RF

20UF
20%

C

B

VREG_SMPS4_2V075

1 C3232_RF

20UF
20%

46 37 33
58 57

6.3V
CERM-X5R
0402

RADIO_PMIC
1 C3222_RF

1 C3230_RF

60

2

m

C3270_RF

4

RADIO_PMIC

RADIO_PMIC
1

46 37 33
58 57

20UF
20%

6.3V
CERM-X5R
0402

PP_VCC_MAIN

27 25 24 13 4

60

1 C3239_RF

20UF
20%

6.3V
CERM-X5R
0402

D

RADIO_PMIC

1 C3237_RF

4

RADIO_PMIC
1 C3229_RF

6 4 3

D

VREG_SMPS2_1V25

NC
VOLTAGE=1.90V

VREG_TX

VREG_L8 3

VOLTAGE=2.05V

4

VREG_L9 71

VOLTAGE=1.20V

VREG_L10 83

VOLTAGE=0.90V

4

VREG_IO

VREG_L11 9

C3220_RF

VOLTAGE=1.80V

VREG_L12 33

VOLTAGE=2.95V

VREG_L14 28

20%
2 6.3V
X5R
0402-1

VOLTAGE=0.95V

VREG_L13 34

15UF

B

VOLTAGE=5.0V

1 RADIO_PMIC 1RADIO_PMIC 1
C3202_RF
C3201_RF
10UF
1.0UF
20%
20%
6.3V
2 10V
2
2
X5R-CERM
0201-1

CERM-X5R
0402-9

RADIO_PMIC 1 RADIO_PMIC 1 RADIO_PMIC 1 RADIO_PMIC
C3203_RF
C3204_RF
C3205_RF
C3206_RF

1.0UF

1.0UF

20%
10V

20%
2 10V
X5R-CERM

X5R-CERM
0201-1

0201-1

1.0UF

20%
10V
2 X5R-CERM
0201-1

1.0UF

20%
10V
2 X5R-CERM
0201-1

PP_LDO14_RFSW

RADIO_PMIC
1 C3208_RF 1RADIO_PMIC 1RADIO_PMIC 1RADIO_PMIC 1 RADIO_PMIC 1RADIO_PMIC 1 RADIO_PMIC 1
C3209_RF C3210_RF C3211_RF
C3213_RF
C3212_RF
C3214_RF
10UF
10UF
10UF
10UF
1.0UF
1.0UF
1.0UF
20%
20%
20%
20%
20%
20%
20%
6.3V
6.3V
6.3V
6.3V
2 10V
2 10V
2 10V
2
2 CERM-X5R
2 CERM-X5R
2 CERM-X5R
2 CERM-X5R
X5R-CERM
X5R-CERM
X5R-CERM
0201-1

0402-9

0402-9

0402-9

0201-1

0201-1

0402-9

58

RADIO_PMIC
C3215_RF

1.0UF
20%
10V

X5R-CERM
0201-1

A

A
PAGE TITLE

BASEBAND PMU (1 0F 2)
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

32 OF 55
37 OF 60

1

SIZE

D

8

7

6

5

4

3

2

1

C401
R411
L400
U404

BASEBAND PMU (2 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

SKU_ID
0.5V
1.1V

REVISION
N69/69H PRE-PROTO
SPARE
N69/69H PROTO1
N69/69H PROTO2
N69/69H EVT1
N69/69H EVT2
SPARE
N69/69H DVT
SPARE
N69/69H PVT

BOARD_ID

0.00V
0.50V
0.70V
0.90V
1.10V
1.30V
1.40V
1.50V
1.60V
1.70V

REVISION
N69
N69H

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

197S0565

197S0593

ALTERNATE

Y3301_RF

XTAL 19MHZ

197S0598

197S0593

ALTERNATE

Y3301_RF

XTAL 19MHZ

TABLE_ALT_ITEM

D

TABLE_ALT_ITEM

RADIO_PMIC

Y3301_RF
19.2MHZ-10PPM-7PF-80OHM
2.0X1.6-SM
1
3
RADIO_PMIC

1%
1/32W
MF
01005

PM8019
BGA

1.10V(EVT)
BOARD_ID

5
5

5
39

OUT

2

VREF_DAC_BIAS

NC
NC

39
29
18
44
35
24

SYM 4 OF 5

MPP_01
MPP_02
MPP_03
MPP_04
MPP_05
MPP_06

MPP_GPIO

GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06

13
NC BB_GPS_ENABLE
30 STOCKHOLM_TO_BBPMU_CLK_REQ
55
NC
19
NC
14 BB_BUA_SIM
25 BB_FORCE_PWM

36 58

IN

39 38 37

IN

41

IN

33 36

IN

PP_LDO3

100K 2
1%
1/32W
MF
01005

GND_XO

79

R3308_RF

1

XTAL_19M_IN
XTAL_19M_OUT

73

XTAL19M_OUT

57
46

XO_THERM_Y1

1000PF

SYM 2 OF 5

90
84

XO_OUT_D0_EN

IN

C3303_RF

BGA

RADIO_PMIC

XO_OUT_A0

CLOCK

64

1

50_A0_PMCLK

45_BBPMU_TO_STOCKHOLM_19P2M_CLK
10%

67

SLEEP_CLK

80

SLEEP_CLK_32K

OUT

XO_OUT_D0

78

MDM_CLK

OUT

PA_THERM1
PA_THERM2

XO_THERM
GND_XOADC

R3309_RF

1

100

2

50_RF_CLK

50_PMIC_RF_CLK

XO_OUT_A1

XO_OUT_D0_EN

2

RADIO_PMIC

42
NC
32

OUT

PA_CTL_QFE

6.3V
X5R-CERM
01005
40

OUT

1%
MF
1/32W 01005

C

36 40

12

RADIO_PMIC

1 C3301_RF

BATT_ID_THERM

37

1000PF

60

10%
2 6.3V
X5R-CERM
01005

100K
1%

NOSTUFF

XW & lt; 2.0MM FROM XTAL GROUND PATCH

w

5

2
01005

2

w

1%
1/32W
MF

B
U_PMICRF_RF
PM8019
BGA

1

162K

1

w

OMIT_TABLE

1/32W
MF
2 01005

R3312_RF

SHORT-10L-0.25MM-SM

.c

R3311_RF

B

XW3301_RF

4 5 6

1 RADIO_PMIC

SKU_ID

XO_GND

h

PP_LDO3

in

a

1

150K

OUT

BOARD_ID
SKU_ID
VDDPX_BIAS

40

fi

R3306_RF

41

1%
1/32W
MF
01005

CALCULATE
WITH 10M
IN PARALLEL
TO GND

U_PMICRF_RF

RADIO_PMIC

PM8019

2

o

1

R3305_RF
90.9K

m

2

C

.c

IN

4

x

39 38 37

PP_LDO3

U_PMICRF_RF

XTAL19M_IN

5
87
63
17

U_PMICRF_RF
PM8019
BGA

RADIO_PMIC

R3301_RF
60

36 33

IN

BB_RST_L

1

1.00K 2

60
36 33

1%
MF
1/32W 01005
RADIO_PMIC

R3307_RF

40

IN

PS_HOLD

40 36

OUT

20.0K 2
1
5%
MF
1/32W 01005

3

36 33
60

IN

40 36

BI

40 36

BI

70
31

CBL_PWR*
PON_TRIG

PMIC_RESOUT_L

75

PON_RST*

PS_HOLD_PMIC

65

PS_HOLD

RF_PMIC_RESET_L

20

SPMI_CLK
SPMI_DATA

81
76

INPUT_PWR

GND
GND
GND
GND
GND
GND
GND
GND

36
40
41
50
51
60
61
69

SPMI_CLK
SPMI_DATA

CONTROL

OPT 66

GND_S1
GND_S2
GND_S3
GND_S4

RESIN*

RADIO_ON_L

IN

SYM 1 OF 5

SYM 3 OF 5

NC

GND 89
GND 56
GND 45

A

A
PAGE TITLE

BASEBAND PMU (2 OF 2)
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

33 OF 55
38 OF 60

1

SIZE

D

8

7

6

5

4

3

2

1

C538
R500
L500
U502

BASEBAND (1 OF 3)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
RADIO_BB

U_BB_RF

ASIC-MDM9625M-2
WLBGA

RADIO_BB

ASIC-MDM9625M-2
IN
IN

J19
K2
V2
V5
V19

36 37 39 40 41 43 44 45

PP_LDO5

IN

36 37
25

PP_LDO9

IN

37 39

VDDPX_BIAS

IN

IN

37 39

VDD_USB_1P8 U11

PP_LDO2

IN

37 39

VDD_USB_3P3 V10

PP_LDO4

IN

37

VDD_A2 C12
VDD_A2 C9

PP_LDO7

IN

37 39 41

IN

37 39 43 44

PP_LDO1

IN

37 39 43 44

PP_LDO10

IN

37 39

PP_LDO3

IN

37 38 39

PP_LDO11

IN

36 37 39 40 41 43 44 45

(LPDDR2_CORE)
PP_LDO9

IN

37 39

(QFUSE PROGRAMMING)
PP_LDO3

IN

VDD_USB_CORE V13

o

PP_LDO1

VDD_A1 B15
VDD_PLL
VDD_PLL
VDD_PLL
VDD_PLL2

U13
R12
D17
E16

VDD_ALWAYS_ON T17 NC
(LPDDR2)
VDD_DDR_CORE_1P8 J20
VDD_DDR_CORE_1P8 K1
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2

E20
H1
P1
P20

VDD_QFPROM_PRG W8

IN

39 37

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

1 C3401_RF

1 C3404_RF

1 C3407_RF

1 C3410_RF

1 C3413_RF

2.2UF

2.2UF

2.2UF

2.2UF

2.2UF

2

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

58

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

IN

(EBI1 PAD)
PP_LDO9

w

RADIO_BB

PP_LDO10

20%
4V
X5R-CERM
0201

.c

(MODEM
VREG_SMPS1_0V90 SUB SYSTEM)F6 VDD_MODEM

B12
B9
C6
B6

(HSIC PAD)

x

VDD_A2
VDD_A1
VDD_A2
VDD_A1

(UIM2 PAD)

m

VREF_SDC A19
VREF_UIM U20

(MSM CORE)
RADIO_BB

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

SYM 6 OF 6
GND

M10
M11
M14
M15
M20
N1
N6
N9
N10
N13
N14
P6
P8
P9
P12
R20
T20
V20
W1
W5
W9
W20
W12
A12
A6
E12
E9
A9
E6
A17
C17
B17
P13
R13
R14

37 38 39

(UIM1 PAD)

B
39 37

58

38 39

PP_LDO12

WLBGA

A2
A20
C14
C20
E14
F12
F13
F14
F20
G7
G11
G12
H6
H7
H10
H11
H14
H15
J1
J6
J9
J10
J13
J14
K8
K9
K12
K13
K19
K20
L1
L7
L8
L11
L12
L15
M6
M7

37 39 56

VDD_P6 V9

VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM

D

U_BB_RF

VDD_P4 R19 NC
VDD_P5 U19

VDD_MEM

F7
F10
F11
G6
G9
G10
G13
G14
G15
H8
H9
H12
H13
J7
J8
J11
J12
K6
K7
K11
L6

37 39

fi

IN

VDD_P3
VDD_P3
VDD_P3
VDD_P3
VDD_P3
VDD_P3

VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM

E5

IN

a

F8
F9
F15
G8
K10
L9
L10
N15
P14
P15
R7
R8

(EBI1 PAD)
PP_LDO9

(SDC1 PAD)
PP_LDO13
VDD_P2 B20
B2 (GENIO PAD)
PP_LDO11

(MSM MEMORY) E15
VDD_MEM

PP_LDO12

C
39 37 36

PWR

F19
L19
L20
M1
T19

in

IN

VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P1

C

GND A15

.c

39 37

VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE

h

D

SYM 5 OF 6

w

IN

PP_LDO10

J15
K14
K15
L13
L14
M8
M9
M12
M13
N7
N8
N11
N12
P7
P10
P11

w

39 37

(MSM CORE)

B
RADIO_BB
39 37

RADIO_BB

RADIO_BB

1 C3416_RF

1 C3419_RF

1 C3422_RF

2.2UF

2.2UF

IN

(HSIC PAD)
PP_LDO9

2.2UF

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

RADIO_BB
39 37

IN

RADIO_BB
44 43 39 37

IN

(GPS ADC)
PP_LDO1
45

RADIO_BB

44 43 41 40 39 37 36
58
RADIO_BB

IN

(LPDDR2)
PP_LDO11

RADIO_BB

RADIO_BB

1 C3424_RF

1 C3427_RF

1 C3430_RF

1 C3432_RF

1 C3435_RF

2.2UF

20%
4V
X5R-CERM
0201

RADIO_BB

(USB 1.8V)
PP_LDO2

2.2UF

0.1UF

2.2UF

2.2UF

20%
4V
X5R-CERM
0201

2

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R
01005

2

RADIO_BB

20%
4V
X5R-CERM
0201

20%

2 4V
X5R-CERM
0201

NOSTUFF
(MSM MEMORY)
RADIO_BB
39 37

IN

RADIO_BB

PP_LDO12

56 39 37

IN

(SDC1 PAD)
NOSTUFF
PP_LDO13

RADIO_BB
39 38

IN

(SDC/UIM)
VDDPX_BIAS

RADIO_BB
41 39 37

IN

RADIO_BB
39 37

IN

RADIO_BB
39 37

IN

(LPDDR2 CORE)
PP_LDO9

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

1 C3402_RF

1 C3405_RF

1 C3408_RF

1 C3411_RF

1 C3414_RF

1 C3417_RF

1 C3420_RF

1 C3425_RF

1 C3428_RF

1 C3433_RF

1 C3436_RF

1 C3438_RF

2.2UF

2.2UF

2.2UF

2.2UF

2.2UF

2.2UF

2.2UF

0.1UF

2.2UF

2.2UF

2.2UF

2.2UF

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

RADIO_BB

(PLL)
PP_LDO10

RADIO_BB

RADIO_BB

RADIO_BB

(COMBO DAC/BBRX)
PP_LDO7

20%
4V
X5R
01005

2

RADIO_BB

20%
4V
X5R-CERM
0201

2

NOSTUFF
RADIO_BB
39 37 36

IN

(MODEM SUB SYSTEM)
VREG_SMPS1_0V90

RADIO_BB
45 44 43 41 40 39 37 36
58

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

RADIO_BB

1 C3403_RF

1 C3406_RF

1 C3409_RF

1 C3412_RF

1 C3415_RF

2.2UF

2.2UF

2.2UF

2.2UF

2.2UF

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

IN

(GENIO PAD)
PP_LDO11

RADIO_BB
39 37

IN

(USB CORE)
PP_LDO12

44 43 39 37

IN

(BBRX)
PP_LDO1

RADIO_BB
39 38 37

RADIO_BB

RADIO_BB

1 C3418_RF

1 C3421_RF

1 C3423_RF

1 C3426_RF

2.2UF

2.2UF

2.2UF

IN

(PLL)
PP_LDO3

RADIO_BB
39 38 37

RADIO_BB

1 C3429_RF

2.2UF

2.2UF

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

20%
4V
X5R-CERM
0201

2

2

20%
4V
X5R-CERM
0201

20%

2 4V
X5R-CERM
0201

NOSTUFF
RADIO_BB

RADIO_BB

20%
4V
X5R-CERM
0201

RADIO_BB

20%
4V
X5R-CERM
0201

2

IN

(QFUSE)
PP_LDO3
RADIO_BB

1 C3434_RF

2.2UF

20%
4V
X5R-CERM
0201

1 C3437_RF

2.2UF

2

20%
4V
X5R-CERM
0201

20%

2 4V
X5R-CERM
0201

NOSTUFF

A

A
PAGE TITLE

BASEBAND (1 OF 2)
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

34 OF 55
39 OF 60

1

SIZE

D

8

7

6

5

4

3

2

1

C600
R606
L600
U602

BASEBAND (2 OF 3)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D

26 11 9 7

PP_LDO11

5

U3501_RF

IN

BB_JTAG_TCK

SOT1226
4

2

.c

RADIO_BB

U_BB_RF

40 38 36
38

IN

IN
OUT

R11
NC
R9
NC
W19
V18

MDM_CLK
XO_OUT_D0_EN

NC

60

B

36 33

IN

7 5 3

N19

B19
NC
C19
NC
U12
V12
NC
W13

BB_USB_VBUS
MDM_CLK

HSIC_CAL U9
HSIC_DATA U10
HSIC_STROBE R10

MODE_0
MODE_1

UIM1_RESET M19 NC
UIM1_CLK N18 NC
UIM1_DATA P19 NC
SDC1_DATA_3 B18 NC
SDC1_DATA_2 A18 NC
SDC1_DATA_1 D20 NC
SDC1_DATA_0 D19 NC
USB_HS_DP V11
USB_HS_DM W11
USB_HS_REXT W10

CXO
CXO_EN
UIM1_DETECT
SDC1_CMD
SDC1_CLK
USB_HS_VBUS
USB_HS_ID
USB_HS_SYSCLK

36

SPMI_DATA
SPMI_CLK

BI
BI

36 38

BI

33 36

60

BI

BB_HSIC_CAL
50_BB_HSIC_DATA
50_BB_HSIC_STROBE

36 38

33 36

60

U_BB_RF

RADIO_BB

fi

PMIC_SPMI_DATA W15
PMIC_SPMI_CLK V15

OUT

RADIO_BB

R3505_RF
240 2
1

a

TCK
TDI
TMS
TRST*

BB_JTAG_TDO

38

in

36

IN

TDO P5

OUT

h

36 33

IN

R2
P3
P2
T4

BB_JTAG_TCK_IN
BB_JTAG_TDI
BB_JTAG_TMS
BB_JTAG_TRST_L

DIGITAL

PS_HOLD

ASIC-MDM9625M-2
WLBGA
R1

EBI1_CAL

MF
1%
1/32W 01005

BDM_ZQ

RADIO_BB

1 RADIO_BB
R3502_RF

R3506_RF
240 2
1

1/32W
MF
2 01005

1%
MF
1/32W 01005

240
1%

.c

60

IN

RESOUT* V17 NC
PS_HOLD W18

SYM 1 OF 6

NC
NC
NC
NC
NC
NC

G1
F18
F16
G20
G19
G18
G16

EBI1_CAL

SYM 2 OF 6
EBI1_EBI2

EBI1_ZQ
EBI2_CS*
EBI2_CLE*
EBI2_ALE*
EBI2_WE*
EBI2_OE*
EBI2_BUSY*

EBI1_VREF N20
EBI1_VREF M5
EBI1_VREF R16
EBI2_AD_7
EBI2_AD_6
EBI2_AD_5
EBI2_AD_4
EBI2_AD_3
EBI2_AD_2
EBI2_AD_1
EBI2_AD_0

H20
H19
H18
H16
J18
K18
J16
K16

MDM_VREF_LPDDR2

IN

37 40

NC
NC
NC
NC
NC
NC
NC
NC

w

36

IN

WLBGA

RESIN*
SRST*
SLEEP_CLK

90_BB_USB_P
90_BB_USB_N
BB_USB_TRXTUNE

w

38

W14
N2
W17

PMIC_RESOUT_L
BB_JTAG_RST_L
SLEEP_CLK_32K

BI

33 36

60

BI

33 36

60

B

w

36

IN

x

ASIC-MDM9625M-2
38 36

C

o

NC

C

m

1

NC

60 33

74AUP1G34GX

1 RADIO_BB
R3501_RF

200
1%

MDM_VREF_LPDDR2

1/32W
MF
2 01005

1

4 7

C3501_RF
1.0UF

PP_LDO11

2

3 4 6 7 8 10 11 12

3 4 6 7 8 10 11 12

A1

PP_LDO11

20%
6.3V
X5R
0201-1

VCC

1
R3507_RF

8 7

BB_EEPROM_SCL

CAT24C08C4A
WLCSP

B1 SCL

SDA

A2

1/32W
MF
2 01005

10K
1%

B2

BB_EEPROM_SDA

VSS

A

1
R3508_RF

1/32W
MF
2 01005

U_EEP_RF

8 7

8 7

7 8

10K
1%

BB_EEPROM_SCL

BB_EEPROM_SDA

A
PAGE TITLE

BASEBAND (1 OF 2)
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

35 OF 55
40 OF 60

1

SIZE

D

8

7

6

5

4

3

2

1

C704
R700
L700
U702

BASEBAND (3 OF 3)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D

PP_LDO11

3 4 6 7 8 10 11 12

RADIO_BB

RADIO_BB

1
R3601_RF

U_BB_RF

10K

1%
1/32W
MF
01005 2

ASIC-MDM9625M-2
WLBGA
36

BB_SIM_DETECT

U_BB_RF

41 36

IN

36

RADIO_BB

3 8

OUT

IN

42

IN

42

IN

42

C

42

IN
IN

44

IN

44

IN

44

IN

44

IN

44

IN

44

IN

44

IN

44

IN

42

IN
IN

42

IN

42

IN

IN

60

36 33

OUT

WTR_TX_IDAC
VREF_DAC_BIAS

A14
B14
B13
A13

WTR_BB_TX_I_P
WTR_BB_TX_I_N
WTR_BB_TX_Q_P
WTR_BB_TX_Q_N

BBRX_IP_CH0
BBRX_IM_CH0
BBRX_QP_CH0
BBRX_QM_CH0

WTR_BB_DRX_I_P
WTR_BB_DRX_I_N
WTR_BB_DRX_Q_P
WTR_BB_DRX_Q_N

B11
A11
B10
A10

BBRX_IP_CH1
BBRX_IM_CH1
BBRX_QP_CH1
BBRX_QM_CH1

TX_DAC1_IREF C8
TX_DAC1_VREF E8

WFR_BB_PRX_I_P
WFR_BB_PRX_I_N
WFR_BB_PRX_Q_P
WFR_BB_PRX_Q_N

B5
A5
B4
A4

BBRX_IP_CH2
BBRX_IM_CH2
BBRX_QP_CH2
BBRX_QM_CH2

A8
B8
A7
B7

WFR_BB_DRX_I_P
WFR_BB_DRX_I_N
WFR_BB_DRX_Q_P
WFR_BB_DRX_Q_N

C4
C5
B3
A3

WTR_BB_GPS_I_P
WTR_BB_GPS_I_N
WTR_BB_GPS_Q_P
WTR_BB_GPS_Q_N

C15
C16
B16
A16

ANALOG

TX_DAC0_IP
TX_DAC0_IM
TX_DAC0_QP
TX_DAC0_QM

TX_DAC1_IP
TX_DAC1_IM
TX_DAC1_QP
TX_DAC1_QM

ET_DAC_M C7
ET_DAC_P E7

BBRX_IP_CH3
BBRX_IM_CH3
BBRX_QP_CH3
BBRX_QM_CH3

DNC
DNC
DNC
DNC

GNSS_BB_IP
GNSS_BB_IM
GNSS_BB_QP
GNSS_BB_QM

PP_LDO7

OUT

41 42

5 8

OUT

42

OUT

42

OUT

42

OUT

42
60

OUT

60

4 6 8

36 33
36 33

IN

60

36 33

OUT

60 36 33

OUT

ET_DAC_N
ET_DAC_P

45

OUT

45

60

36 33

OUT

60

36 33

IN

40

BI

40

OUT

V16
NC
W16
NC
D4
NC
C3
NC

BI

60

36 33
60 33

OUT
IN

BB_I2S_WS
BB_I2S_RXD
BB_I2S_TXD
BB_I2S_CLK

BB_OTHER_TXD
BB_OTHER_RXD
BB_EEPROM_SDA
BB_EEPROM_SCL
BB_RESET_DET_L
AP_WAKE_MODEM
BB_LAT_GPIO0
BB_LAT_GPIO1
BB_LAT_GPIO2
BB_LAT_GPIO3
BB_LAT_GPIO4
BB_LAT_GPIO5

.c

h

in

42

36 33

TX_DAC0_IREF C13
TX_DAC0_VREF E13

E11
C11
E10
C10

m

IN

60

SYM 4 OF 6

WTR_BB_PRX_I_P
WTR_BB_PRX_I_N
WTR_BB_PRX_Q_P
WTR_BB_PRX_Q_N

o

42

IN

.c

IN

36 33

x

42

OUT

60

fi

IN

36 33

a

IN

42

OUT

60

WLBGA
42

36

ASIC-MDM9625M-2

R18
U18
T18
P18
U15
U14
V14
U16
U3
NC
U4
NC
W2
NC
V3
NC
V7
V6
W7
U8
M18
NC
M16
NC
N16
NC
L16
NC
D18
C18
E19
E18
P16
L18
L5
NC
M3
NC
K3
NC
L3
NC
M2
NC
K5
NC
B1
NC
C2
NC
J5
L2
J3
J2
NC

BB_SIM_DATA
BB_SIM_DETECT
BB_SIM_RESET
BB_SIM_CLK
BB_UART_TXD
BB_UART_RXD
BB_UART_CTS_L
BB_UART_RTS_L

8 5

RADIO_BB

1 C3601_RF

1 C3603_RF

0.1UF
10%

2200PF
10%

PP_LDO7

2200PF
10%

2 6.3V
X5R-CERM

01005

0201
8 6 4

RADIO_BB
1 C3604_RF

2 6.3V
X5R-CERM

2 6.3V
X7R

IN

36

IN

w

VREF_DAC_BIAS

RADIO_BB

B

36

WATCHDOG_DISABLE
BOOT_HSIC
BOOT_HSIC_USB

01005

GPIO

BLSP1

BLSP2

GRFC

BLSP3

BLSP4

BLSP5

SSBI

BLSP6

GRFC

RFFE

GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
GPIO_58
GPIO_59
GPIO_60
GPIO_61
GPIO_62
GPIO_63
GPIO_64
GPIO_65
GPIO_66
GPIO_67
GPIO_68
GPIO_69
GPIO_70
GPIO_71
GPIO_72
GPIO_73
GPIO_74
GPIO_75

H5
H2
H3
G3
G2
F1
F2
D3
C1
G5
F3
E3
F5
N5
N3
T3
E2
D1
D2
E1
T1
R6
R3
U7
V8
W4
W3
U6
T2
R15
V4
U17
V1
W6
U2
U5
U1
R5

GSM_TXBURST_IND

OUT

33 60

OUT

33 60

CTRL_FWD_REV

NC

BB_IPC_GPIO1
UAT_SELECT
UAT_SELECT
LAT_SELECT
BB_UAT_GPIO0
BB_UAT_GPIO1
BB_UAT_GPIO3

23

NC
NC
NC
NC
NC
NC
NC
NCWLAN_TX_BLANK
NC
NC

BB_COEX_UART_TXD
BB_COEX_UART_RXD
WTR_SSBI_TX_GPS
WTR_SSBI_PRX_DRX

NC

OUT
IN

36 57

OUT

42

IN

42

OUT

WFR_SSBI

C

36 57

44

OUT

42

OUT

42

NC BB_DEBUG_SYNC (DEV)

GSM_TX_PHASE_D1
GSM_TX_PHASE_D0
BB_CORE_DUMP
BB_DEBUG_STATUS
BB_DEBUG_ERROR

33 36

IN
OUT
OUT

60

36
36

NC BB_SWD_ENABLE

AP_TO_BB_MESA_ON
BB_HOST_RDY
BB_WAKE_HOST_L
BB_DEVICE_RDY
BB_BUA_SIM
BB_GPS_SYNC

NC

RFFE2_DATA
RFFE2_CLK
RFFE1_DATA
RFFE1_CLK

33 36

BI

60

IN

33 36

60

OUT

33 36

60

33 36

60

OUT

38

IN
OUT

33 36

60

41 51 52 54

BI
BI

36 41 51 52 54

BI

36 45 46 47 48 49 50

BI

36 45 46 47 48 49 50

w

WTR_TX_IDAC

IN

SYM 3 OF 6

B

w

9 8

36

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37

NOSTUFF

U_BUFFER_RF
RF1352
RFFE_VIO

21 19 18 17 16 14 13 8

21 19 18 8 3

21 19 18 8

4 VIO

RFFE2_CLK

GPO1 1
GPO2 8

BB_LAT_GPIO1
BB_LAT_GPIO2

3 SDATA

OUT

33 60

OUT

33 60

RFFE2_CLK_BUFFER

OUT

56

SDATA_A 6

2 SCLK

RFFE2_DATA

WLCSP

RFFE2_DATA_BUFFER

OUT

56

RFFE_VIO

8 13 14 16 17 18 19 21

SCLK_A 5

7

GND

MAKE_BASE=TRUE

PP_LDO11

12 11 10 8 7 6 4 3

VOLTAGE=1.80V

A

A
PAGE TITLE

MOBILE DATA MODEM (2 OF 2)

RFFE2_DATA

DRAWING NUMBER

1

Apple Inc.

C3602_RF
R

22PF
5%
2 16V
CERM
01005

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

36 OF 55
41 OF 60

1

SIZE

D

8

7

6

5

4

3

2

1

C802
R802
L800
U803

WTR TRANSCEIVER (1 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D
U_WTR_RF

U_WTR_RF

WTR1625

WTR1625

BGA

BGA
102

50_B8_PRX_WTR_IN

PRX_LB1_IN

SYM 1 OF 5

PRX_BB_IP
PRX_BB_IM
PRX_BB_QP
PRX_BB_QM

99
108
107
97

WTR_BB_PRX_I_P
WTR_BB_PRX_I_N
WTR_BB_PRX_Q_P
WTR_BB_PRX_Q_N

SYM 2 OF 5

DC
15

LB2

DC
15

LB3

DC
14

LB4

DC
44

MB1

65
50_B13_B17_B28_B29_PRX_WTR_IN
91

50_WFR_PRX_LB_CA_IN

PRX_LB3_IN

50

DC
DC

51

50_B34_B39_PRX_WTR_IN

15

DRX_LB2_IN

20

50_B26_B28A_DRX_WTR_IN

16

DRX_LB3_IN

50_B20_B29_DRX_WTR_IN

7

DRX_LB4_IN

DC

41

LB3

DC

LB4

DC

MB1

NO DC

43

50_WFR_DRX_LB_CA_IN

32

50_WFR_DRX_MB_CA_OUT
50_B34_DRX_WTR_IN

29
28

DRX_MB_CA_IN
DRX_MB1_IN

50_B39_DRX_WTR_IN

20

50_PCS_WTR_IN

27

PRX_MB3_IN

1

50_B40A_PRX_WTR_IN

19

PRX_HMB4_IN

DC

2
4

DC

9

50_B41A_PRX_WTR_IN

17

50_B7_PRX_WTR_IN

18

HB3

DC

20

50_B40_DRX_WTR_IN
50_B38X_DRX_WTR_IN

HBMB4

NO DC

20

50_B41A_DRX_WTR_IN

12

20

50_B7_DRX_WTR_IN

13

C

NC

OUT
OUT

41

RADIO_WTR
RADIO_WTR
RADIO_WTR
RADIO_WTR

30

OUT
OUT

41

NC

DRX_HB_CA_OUT

36
44

DNC 37

OUT

DRX_HB3_IN

GNSS_RF_INP
GNSS_RF_INM

PRX_HB_CA_OUT

17

OUT

DRX_HB2_IN

PRX_HB3_IN

33

DC
20

PRX_HB2_IN

19

NO DC

WTR_BB_GPS_I_P
WTR_BB_GPS_I_N
WTR_BB_GPS_Q_P
WTR_BB_GPS_Q_N

OUT

RADIO_WTR
RADIO_WTR
RADIO_WTR
RADIO_WTR

DRX_HMB4_IN
DRX_HB1_IN

NC

PRX_HB1_IN

50_B40B_B38X_PRX_WTR_IN

60
53
67
85

OUT

DRX_MB3_IN

IN

NO DC

HB2

WTR_BB_DRX_I_P
WTR_BB_DRX_I_N
WTR_BB_DRX_Q_P
WTR_BB_DRX_Q_N

DRX_MB2_IN

OUT

DC

HB1

76
86
61
68

GNSS_BB_IP
GNSS_BB_IM
GNSS_BB_QP
GNSS_BB_QM

DRX_LB_CA_OUT

20

DC

MB3

PRX_MB2_IN

NO DC

DRX_BB_IP
DRX_BB_IM
DRX_BB_QP
DRX_BB_QM

20

MB2

PRX_MB1_IN

50_DCS_WTR_IN

19

HBMB4

OUT

PRX_MB_CA_IN

19

HB3

50_B13_B17_DRX_WTR_IN

DC

41

PRX_LB_CA_OUT

20

HB2

20

41

OUT

LB1
LB2

OUT

PRX_LB4_IN

20

HB1

DRX_LB1_IN

44

50_WFR_PRX_MB_CA_OUT

IN
18

MB3

73

50_B26_PRX_WTR_IN

PRX_LB2_IN

5

44

NO DC
44

MB2

OUT

92

50_B20_PRX_WTR_IN

50_B8_B28B_DRX_WTR_IN

41

m

LB1

OUT

20

20

15

NC
22

C

in

a

fi

x

.c

o

22

100_GPS_WTR_IN_P
100_GPS_WTR_IN_N

U_WTR_RF

8

GSM_TX_PHASE_D0
GSM_TX_PHASE_D1

8
8

B

GP_DATA0
GP_DATA1
GND

TX_MB1_OUT
TX_MB2_OUT
TX_MB3_OUT
TX_MB4_OUT

146
138
139
155

GND

TX_HB1_OUT 130

50_B7_WTR_TX_OUT

71

RTUNE

TX_HB2_OUT 121

50_B40_B38_B41_WTR_TX_OUT

123
104
141

R3702_RF

4.75K2
1

WTR_RTUNE

1%
1/32W
MF
01005

w

RADIO_WTR

SYM 3 OF 5

.c

8

162
NC
153
163
154

TX_BB_IP
TX_BB_IM
TX_BB_QP
TX_BB_QM
DAC_REF

w

8

TX_LB1_OUT
TX_LB2_OUT
TX_LB3_OUT
TX_LB4_OUT

151
160
152
161
127

w

8

11 5

GND

55
118
105
95

GND
GND
SSBI_TX_GNSS
SSBI_PRX_DRX

50_LB_2G_WTR_TX_OUT
50_B8_B26_B20_WTR_TX_OUT
50_B13_B17_B28_WTR_TX_OUT
50_B3_B4_WTR_TX_OUT
50_HB_2G_WTR_TX_OUT
50_B1_B25_B34_B39_WTR_TX_OUT

13
15
14

16
13
16

B

NC
17

17

GND

131

8

140

156

WTR_SSBI_TX_GPS
WTR_SSBI_PRX_DRX

8

BGA

94

WTR_BB_TX_I_P
WTR_BB_TX_I_N
WTR_BB_TX_Q_P
WTR_BB_TX_Q_N
WTR_TX_IDAC

8

h

WTR1625

XO_IN

ADC_IN 109
PDET_RFFB 117

50_FWD_OR_REV_RF

18

GND 122

50_RF_CLK

A

A
PAGE TITLE

RF TRANSCEIVER (1 0F 3)

RF_CLK IS SHARED BETWEEN WTR AND WFR.

DRAWING NUMBER

LENGTH DIFFERENCE BETWEEN THE TWO SHOULD BE & lt; 5MM.

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

37 OF 55
42 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C934
R926
L3802_RF
U902

WTR TRANSCEIVER (2 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
XW3801_RF

11 4

PP_LDO8
MAKE_BASE=TRUE

6 4
11

XW3802_RF

PP_LDO1

VREG_2V_WTR
VREG_1P3V_WTR

WTR DECOUPLING CAPS
L3801_RF

10

10

MAKE_BASE=TRUE

22NH-3%-0.25A

RADIO_WTR
10

VREG_2V_WTR

VDD_DRX_BB_2V

MAKE_BASE=TRUE

10

10

D

VREG_1P3V_WTR

1

MAKE_BASE=TRUE

2 VDD_PRX_PLL_1P3V

10

VREG_1P3V_WTR

VDD_PRX_LO_HB_1P3V

MAKE_BASE=TRUE

10

0201

WTR DECOUPLING SHARED WITH C3808_RF

D

RADIO_WTR

RADIO_WTR

RADIO_WTR
1 C3801_RF

1 C3830_RF

RADIO_WTR
1 C3808_RF

10UF

0.1UF
20%

10UF

U_WTR_RF

2 4V
X5R
01005

20%
6.3V
2 CERM-X5R

20%
2 6.3V
CERM-X5R

VDD_PRX_VCO_1P3V

90

VDD_PRX_VCO_2V

80

VDD_RF2_P_VCO

10

VDD_PRX_LO_HB_1P3V

25

VDD_RF1_P_HB_LO

10

VDD_PRX_LB_1P3V

72

VDD_RF1_P_LB

10

VDD_PRX_HBMB_1P3V

34

VDD_RF1_P_HMB

10

VDD_PRX_LO_HBMB_1P3V

57

10

VDD_PRX_PLL_1P3V

10

VDD_PRX_BB_2V

10

VDD_PRX_2V

10

VDD_DRX_LO1_1P3V

10

10

0402-9

WTR1625

VDD_RF1_P_VCO

10

0402-9

BGA

1 C3821_RF

100PF
5%

0.1UF
20%

2 10V
NP0-C0G
01005

2 4V
X5R
01005

RADIO_WTR
10

VDD_PRX_HBMB_1P3V

10

VDD_PRX_LB_1P3V

10

I188

VDD_SHDR_VCO_1P3V
RADIO_WTR

RADIO_WTR
1 C3815_RF

1 C3823_RF

0.1UF
20%

0.1UF
20%

VDD_RF1_T_LO 135

VDD_TX_LO_1P3V

10

VDD_RF1_P_HMB_LO

VDD_RF2_T_BB 126

VDD_TX_BBF_2V

10

79

VDD_RF1_P_PLL

VDD_RF2_FBRX 116

VDD_FBRX_2V

10

98

VDD_RF2_P_BB

VDD_RF2_T_VCO 157

VDD_TX_VCO_2V

10

100

VDD_RF2_P_RX

VDD_RF1_T_VCO 149

VDD_TX_VCO_1P3V

10

14

VDD_RF1_D_LB_LO

VDD_RF1_T_SYN 115

VDD_TX_SYNTH_1P3V

10

VDD_DRX_LO2_1P3V

38

VDD_RF1_D_LOM

VDD_RF2_T_PLL 114

VDD_TX_PLL_2V

10

VDD_DRX_LB_1P3V

31

VDD_RF1_D_LB

VDD_RF1_G_LNA 52

VDD_GPS_LNA_1P3V

10

VDD_DRX_HB_1P3V

22

VDD_RF1_D_HB

VDD_RF1_G_VCO 74

VDD_GPS_VCO_1P3V

10

VDD_DRX_MB_1P3V

11

VDD_RF1_D_MB

VDD_RF1_G_PLL 93

VDD_GPS_PLL_1P3V

10

VDD_DRX_BB_2V

54

VDD_RF2_D_BB

VDD_RF1_G_BB 59

10

VDD_SHDR_VCO_1P3V

48

VDD_RF1_S_VCO

GND 113

2 4V
X5R
01005

VDD_SHDR_VCO_2V

62

VDD_RF2_S_VCO

VDD_RF2_XO 147

VDD_SHDR_PLL_1P3V

78

VDD_RF1_S_PLL

VDD_PRX_VCO_1P3V

10

10

1 C3833_RF

0.1UF
20%

2 4V
X5R
01005

VDD_DRX_LO1_1P3V

DELETED C3805 PR REVIEW FEEDBACK

C

VDD_XO_2V

10

VDD_MSM_1P8V

10

10

0.1UF
20%

2 4V
X5R
01005

RADIO_WTR
1 C3817_RF

1 C3806_RF

2 4V
X5R
01005

VDD_DRX_HB_1P3V

w

10

w

B

2 4V
X5R
01005

VDD_TX_LO_1P3V

VDD_XO_2V
10
RADIO_WTR

0.1UF
20%

RADIO_WTR

1 C3803_RF

1 C3825_RF

2 10V
X5R-CERM
0201

2 4V
X5R
01005

0.1UF
10%

VDD_FBRX_2V

VDD_TX_UPC_1P3V

10

10

2 4V
X5R
01005

VDD_GPS
MAKE_BASE=TRUE

VDD_GPS_BB_1P3V

2 10V
NP0-C0G
01005

0.1UF
20%

VDD_GPS_PLL_1P3V
MAKE_BASE=TRUE
RADIO_WTR

100PF
5%

PP_LDO11

MAKE_BASE=TRUE

0.1UF
20%

RADIO_WTR
2 4V
X5R
01005
VDD_MSM_1P8V

VDD_TX_VCO_1P3V
RADIO_WTR

10

1 C3811_RF

2 6.3V
X5R-CERM
0201-1

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

U_WTR_RF
WTR1625
BGA

GND 111

SYM 5 OF 5

GND 101
GND 110
GND
GND
GND
GND
GND
GND
GND
GND
GND

145
144
143
128
120
119
106
150
134

GND
GND
GND
GND
GND
GND
GND
GND
GND

159
142
125
124
148
158
133
112
132

GND
GND
GND
GND

45
66
84
75

B

GND 164

10

1 C3807_RF
2 4V
X5R
01005

1.0UF
10%

A

10

1 C3829_RF

XW3803_RF
12 11 8 7 6 4 3

10

RADIO_WTR
1 C3826_RF

2 4V
X5R
01005

VDD_PRX_2V

0.1UF
20%

10

RADIO_WTR

10

1 C3828_RF

0.1UF
20%

1 C3818_RF

I175

VDD_GPS_LNA_1P3V
MAKE_BASE=TRUE
RADIO_WTR

10

GND
GND
GND
GND

47
87
77
96

RADIO_WTR

1 C3824_RF

GND
GND
GND
GND

49
69
88
70
63
40

10

GND
GND
GND
GND
GND
GND
GND

10
3
23
46

.c

w

VDD_TX_SYNTH_1P3V

10

GND
GND
GND
GND
GND

35
8
26
64
42
41
81

10

2 4V
X5R
01005

0.1UF
20%

0.1UF
20%

VDD_TX_PLL_2V

VDD_DRX_MB_1P3V

89
56
83
82
58

21
6
24
39

10
VDD_PRX_LO_HBMB_1P3V
RADIO_WTR

10

h

VDD_TX_VCO_2V

in

a

2 4V
X5R
01005

VDD_DIO 103

VDD_GPS_BB_1P3V

1 C3809_RF

fi

0.1UF
20%

VDD_RF1_T_UPC 136

RADIO_WTR

x

RADIO_WTR
1 C3816_RF

10

RADIO_WTR

o

2 4V
X5R
01005

VDD_SHDR_VCO_2V

VDD_DRX_LO2_1P3V

m

10

.c

VDD_PRX_VCO_2V

10

10

MAKE_BASE=TRUE

NBC

VDD_TX_UPC_1P3V

10

1 C3813_RF

VDD_PRX_BB_2V
VDD_TX_BBF_2V

10

RADIO_WTR

RADIO_WTR

RADIO_WTR

VDD_TX_DA_1P3V

10

10

VDD_RF1_T_DA 137

10

VDD_DRX_LB_1P3V

10

10

10

VDD_SHDR_PLL_1P3V

10

VDD_TX_DA_2V

10

VDD_TX_DA_2V

VDD_RF2_T_DA 129

SYM 4 OF 5

VDD_GPS_VCO_1P3V

10

0.1UF
20%

RADIO_WTR

A
PAGE TITLE

RF TRANSCEIVER (2 OF 3)

L3802_RF

DRAWING NUMBER

8.2NH-3%-0.19A-1.6OHM
1

2

VDD_TX_DA_1P3V

Apple Inc.
10
R

01005

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

38 OF 55
43 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C1019
R1016
L1000
U1002

WFR TRANSCEIVER

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
XW3900_RF
10 4

PP_LDO8

VREG_2V_WFR

U_WFR_RF

11

MAKE_BASE=TRUE

WFR1620
BGA

D

MB1

DC

MB2

10 6

16
16

XW3901_RF
4 PP_LDO1

NO DC

MB3

VDD_DIG_1P3V

PPLDO1_WFR

11

MAKE_BASE=TRUE

MAKE_BASE=TRUE

11

VREG_2V_WFR

VDD_PRX_VCO_WFR_2V

MAKE_BASE=TRUE

1 C3904_RF
0.1UF
20%
4V
2 X5R
01005

1 RADIO_WFR
C3901_RF

10UF

20%
2 6.3V
CERM-X5R

10UF

42

MB1

IN

DC
20

MB2

NO DC

MB3

20%
6.3V
2 CERM-X5R

27
3

PRX_LB_CA_IN

50_B25_DRX_WFR_IN
50_B1_B4_DRX_WFR_IN
50_B3_DRX_WFR_IN

49
54
66

DRX_MB1_IN
DRX_MB2_IN
DRX_MB3_IN

43

DRX_HB_CA_IN

36

DRX_LB_CA_IN

DC

20
20

0402-9

NC

0402-9

NC

VDD_DRX_LO_1P3V

11
VDD_XO_WFR_2V
RADIO_WFR
1 C3913_RF

11

RADIO_WFR
1 C3905_RF
0.1UF
20%
2 4V
X5R
01005

VDD_DRX_LB_WFR_1P3V

RADIO_WFR
50_WFR_DRX_LB_CA_IN
IN

42

RADIO_WFR
R3901_RF

0.1UF
20%

WFR_RTUNE

4.75K2

1

2 4V
X5R
01005

52

61

SSBI_PRX_DRX 13
GND

8

34

50_WFR_PRX_MB_CA_OUT

OUT

42

DRX_MB_CA_OUT 65

50_WFR_DRX_MB_CA_OUT

OUT

42

PRX_BB_IP
PRX_BB_IM
PRX_BB_QP
PRX_BB_QM

29
28
25
30

WFR_BB_PRX_I_P
WFR_BB_PRX_I_N
WFR_BB_PRX_Q_P
WFR_BB_PRX_Q_N

DRX_BB_IP
DRX_BB_IM
DRX_BB_QP
DRX_BB_QM

R_TUNE

7

WFR_SSBI

PRX_MB_CA_OUT 5

GND

19

RX_OTHER

D

1

GND

PRX_HB_CA_IN

50_WFR_PRX_HB_CA_IN

11

1 C3912_RF
0.1UF
20%
2 4V
X5R
01005

RADIO_WFR
1 C3903_RF

PRX_MB1_IN
PRX_MB2_IN
PRX_MB3_IN

50_B3_PRX_WFR_IN
50_B1_B4_PRX_WFR_IN
50_B25_PRX_WFR_IN

DC

RADIO_WFR

RADIO_WFR

22
16
6

50_WFR_PRX_LB_CA_IN

16

GND

SYM 1 OF 2

62
63
57
64

WFR_BB_DRX_I_P
WFR_BB_DRX_I_N
WFR_BB_DRX_Q_P
WFR_BB_DRX_Q_N

8
8
8
8

8
8
8
8

XO_IN

1%
1/32W
MF
01005

11

50_RF_CLK

m

9 5

C

o

C
I113

VDD1_DRX_BB_2V

11

11

.c

VDD_DRX_MB_HB_FE_1P3V

x

RADIO_WFR
1 C3915_RF
0.1UF
20%
2 4V
X5R
01005

fi

U_WFR_RF

VDD_PRX_MBHB_FE_1P3V

VDD1_PRX_BB_2V

11

WFR1620
BGA

a

I114
11

11

in

RADIO_WFR
1 C3916_RF
0.1UF
20%
2 4V
X5R
01005

VDD_PRX_VCO_WFR_2V

37

VDD_RF2_P_VCO

GND 46

SYM 2 OF 2
PWR_GND

0.1UF
20%

GND 42

VDD_PRX_PLL_WFR_1P3V

44

VDD_RF1_P_PLL

GND 53

VDD_PRX_LB_FE_1P3V

15

VDD_RF1_P_LB_FE

GND 20

VDD1_PRX_BB_2V

23

VDD_RF2_P_BB

GND 51

VDD_PRX_MBHB_FE_1P3V

10

VDD_RF1_P_MHB_FE

GND 41

VDD_DRX_LO_1P3V

47

VDD_RF1_D_LO

GND 45

VDD1_DRX_BB_2V

56

VDD_RF2_D_BB

GND 50

11

39

VDD_RF1_D_LB_FE

GND 9

11

VDD_DRX_MB_HB_FE_1P3V

59

VDD_RF1_D_MHB_FE

GND 11

11

VDD_DIG_1P3V

24

VDD_RF1_DIG

GND 21

14

11

VDD_DRX_LB_WFR_1P3V

GND

GND 32

VDD_DIO

GND 4

VDD_RF2_XO

GND 38

0.1UF
20%

2 4V
X5R
01005

2 4V
X5R
01005

B

GND 18

VDD1_1P8V
RADIO_WFR
1 C3917_RF

MAKE_BASE=TRUE

VDD_RF1_P_LO

11

.c
PP_LDO11

31

11

w
12 10 8 7 6 4 3

VDD_PRX_LO_WFR_1P3V

11

XW3902_RF

VDD_PRX_VCO_WFR_1P3V
11
RADIO_WFR
1 C3910_RF

GND 35

11

w

B

VDD_RF1_P_VCO

11

w

11

33

11

VDD_PRX_LB_FE_1P3V

VDD_PRX_VCO_WFR_1P3V

11

h

11

11

11

2

VDD1_1P8V
VDD_XO_WFR_2V

17

GND 55

VDD_PRX_PLL_WFR_1P3V
11
RADIO_WFR
1 C3911_RF

GND 40
GND 60

0.1UF
20%

GND 48

2 4V
X5R
01005

GND 58
GND 26
GND 8

11
VDD_PRX_LO_WFR_1P3V
RADIO_WFR

GND 12

1 C3902_RF

0.1UF
20%

2 4V
X5R

01005

A

A
PAGE TITLE

RF TRANSCEIVER (3 OF 3)
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

39 OF 55
44 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C1110
R1102
L1104
U1101

QFE DCDC

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D

XW4001_RF
SHORT-10L-0.25MM-SM

NOSTUFF
SHOULD BE PLACED
MAX 0.25MM AWAY
FROM QPOET
XW4002_RF
SHORT-10L-0.25MM-SM

1

2

VBATT_SW
27
C4001_RF

PP_BATT_VCC

1

21 19 18 12

10UF

17 16 15 14 12

20%
2 6.3V
CERM-X5R
0402-9

VPA_ET

2
0201

QPOET_BATT
14 BYP_BATT
10 BYP_LOAD

12

VBATT_SW

28

SW_GROUND

27

41

50 49 48 47 46 41 36

50 49 48 47 46 41 36

7
2

IN

ET_DAC_P
ET_DAC_N

BI

RFFE1_DATA

26

RFFE1_CLK

21
13
20

VSW_BOOST

PA_CTL_QFE
PP_BATT_VCC
1

BST_L
2

AMP_INP
AMP_INM
SDATA

19

USID_LSB

22

VPA_APT

GND

(USID)

RADIO_QPOET

1 C4008_RF

VOUT_BOOST

12

X5R
01005

C

VPA_ET_FILTER
1

RADIO_QPOET

R4001_RF

2.2

RADIO_QPOET

1

10%
2 10V

2 10V
X5R-CERM
0402

GSM_CAP

14 15 16
17

470PF

4.7UF
20%

RADIO_QPOET

5%
1/32W
MF
2 01005

CRITICAL TO STAY
@ 4.7UF TO MEET
QPOET TIMING

C4005_RF
20UF

20%
2 6.3V
CERM-X5R
0402

(CAN BE CHANGED TO 20UF)

fi

12

X5R
01005

a

2

12

VPA_BATT

GND_AMP 3

VOUT_BOOST_GND

VPA_ET

VPA_APT

12
13 17

GSM_CAP

VOUT_BOOST 25

12 18 19 21
27

15 14 12
17 16

1 C4007_RF

PA_VBAT 18

GND_BOOST

12 14 15 16 17

RADIO_QPOET

RADIO_QPOET

10%
10V

VPA_ET

GND 1

1 C4010_RF

470PF

2
PSB25201T-SM

RADIO_QPOET

C_GSM 6

L4001_RF
PP_BATT_VCC

3 4 6 7 8 10 11 12

1.5UH-1.95A-0.111OHM

C_SW_BUCK 8
C_SW_BUCK 9

RADIO_QPOET

24

12

PP_LDO11

C_BUCK 11
C_BUCK 12

0805

2.2UH-20%-0.7A-0.23OHM

12 18 19 21 27

APT_VINPUT

VDD_1P8 17
QPOET_VSW
1
VSW_BUCK 23
L4003_RF
AMP_OUT 4

MPP1

BI
5

27 21 19 18 12

VDD_AMP 5

SCLK

IN

PP_BATT_VCC

VDD_BATT 15
VDD_BATT 16

GND_BUCK

12

41

BGA

VDD_BUCK

12

SW_GROUND

NOSTUFF
BOTH XW'S
& gt; 1.0MM
TO CREATE
INDUCTANCE

C

QFE1100

22-OHM-25%-1800MA

RADIO_QPOET

1

U_QPOET_RF

L4002_RF

12

m

2

o

1

.c

PP_BATT_VCC

x

27 21 19 18 12

w

w

.c

h

in

MITIGATE RX1 DESENSE
IN VLB (B13)

B

BOOST FILTER

w

B

I/O @ 1.8V

L4004_RF

22-OHM-25%-1800MA
12 11 10 8 7 6 4 3

PP_LDO11

12

1

VOUT_BOOST

2

APT_VINPUT

12

0201
RADIO_QPOET
1 C4002_RF

RADIO_QPOET
1 C4003_RF

RADIO_QPOET
1 C4006_RF

10UF

10UF

10UF

20%
2 6.3V
CERM-X5R

20%
6.3V
2 CERM-X5R

0402-9

20%

6.3V
2 CERM-X5R

0402-9

12

0402-9

VOUT_BOOST_GND

2

XW4004_RF
SHORT-10L-0.25MM-SM
NOSTUFF
1

A

A
PAGE TITLE

QFE DCDC
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

40 OF 55
45 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C1208
R1200
L1204
U1201

2G PA

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D

R4100_RF

600-OHM-25%-0.1A
27 25 24 4

PP_VCC_MAIN

1

2

VPA_APT

2G_PA_VBATT_10UA

0201-1

RADIO_2G

RADIO_2G

1 C4108_RF

1 C4109_RF

2.2UF

2.2UF

12 17

RADIO_2G

1 C4107_RF

56PF
5%

2 16V
NP0-C0G
01005

2

20%
6.3V
X5R-CERM
0201

2

20%
6.3V
X5R-CERM
0201

1

L4101_RF

C4112_RF

4.7NH+/-0.3%-0.4A

100PF
5%

2 16V
NP0-C0G

1

50_LB_2G_PA_OUT

2

01005

0201

50_LB_2G_ASM_IN
1

18

C4118_RF
0.5PF

+/-0.05PF
2 16V
C0G-CERM
01005
RADIO_2G

C4104_RF

100PF

VBATT

50_LB_2G_PA_IN

2

U_2GPA_RF
SKY77357

5%
16V
NP0-C0G
01005

C

VCC

m

1

LGA
LBRFIN

LBRFOUT

HBRFIN

HBRFOUT

RADIO_2G

50_HB_2G_WTR_TX_OUT

1

2

50_HB_2G_PA_IN

17 16 15 14 12 8 3
17 16 15 14 12 8 3

RFFE_VIO
RFFE1_DATA
RFFE1_CLK

VIO
SDATA
SCLK
GND

5%
16V
NP0-C0G
01005

EPAD

x

9

21 19 18 17 16 14 8

.c

C4103_RF

100PF

C

o

50_LB_2G_WTR_TX_OUT

9

fi

L4102_RF

1.5NH+/-0.1NH-1.0A
50_HB_2G_PA_OUT

1

a

RADIO_2G

1 C4113_RF

2

50_HB_2G_ASM_IN

18

0201

in

0.8PF
+/-0.1PF
16V
NP0-C0G
01005
NOSTUFF

w

w

.c

h

2

B

w

B

A

A
PAGE TITLE

2G PA
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

41 OF 55
46 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C1332
R1300
L4215_RF
U1304

VERY LOW BAND PAD (B13, B17, B28)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

OMIT_TABLE

L4216_RF
7.5NH+/-3%-0.2A

D

1

2

50_B28A_ASM_TRX

D

18

01005

OMIT_TABLE
1

C4211_RF
2.2PF

VPA_ET

17 16 15 12

+/-0.1PF

2 16V
NP0-C0G
01005-1

1

C4208_RF
68PF

5%
2 16V
NP0-C0G
01005

OMIT_TABLE

L4217_RF
10NH-3%-0.170A

VPA_BATT

17 16 15 12

PLACE INDUCTOR CLOSE TO PA

1

2

50_B28B_ASM_TRX

18

01005

RADIO_VLB_PAD

OMIT_TABLE

1 C4207_RF

1

1.0UF
20%

C4213_RF
2.5PF

2 10V
X5R-CERM
0201-1

+/-0.1PF
2 16V
NP0-C0G
01005

FL_B17LP_RF

BAND17
LFL15710MTCTD717

C

14

B28_IN
B17_IN
B13_IN

CTRL_VLB_BAND_SELECT_1
CTRL_VLB_BAND_SELECT_2

U_VLBPAD_RF
SKY77802-23
LGA
USE OMIT TABLE TO SELECT SKU VARIANT.

SW1
SW2

14

B29_RX_IN

1

.c
THRM

GND

15

1

50_B29_PAD_ANT

RFFE_VIO

8 13 16 17 18 19
21

fi

18

C

5.1NH-3%-0.250A
2

C4230_RF

2

50_B13_ASM_TRX

18

OMIT_TABLE

01005

15PF

a

50_B17_ASM_TRX

2

L4223_RF
1

in

OUT

OMIT_TABLE

3 8 12 13 15 16 17

1

PAD

IN

GND

C4227_RF

+/-0.1PF
2 16V
NP0-C0G
01005-1

2

RFFE1_CLK
RFFE1_DATA

01005

4

2.7PF

L4224_RF

1
LB_VLB_VIO

50_B17_PAD_LPF_IN

x

VIO
SCLK
SDATA

2
01005

22-OHM-25%-0.2A-0.9DCR

RX_OUT

0402

7.5NH+/-3%-0.2A
PLACE INDUCTOR CLOSE TO PA

m

14

50_B28_PAD_IN
50_B12B17_PAD_IN
50_B13_PAD_IN

o

14

L4222_RF

50_B28A_PAD_ANT
50_B28B_PAD_ANT
50_B17_PAD_ANT
50_B13_PAD_ANT

B28A_ANT
B28B_ANT
B17_ANT
B13_ANT

OMIT_TABLE

1
3

VBAT VCC

1

5%
16V
NP0-C0G-CERM
01005

C4231_RF
1.5PF

+/-0.05PF
2 16V
NP0-C0G-CERM
01005

.c

h

PLACE INDUCTOR CLOSE TO PA

L4221_RF
2.4NH+/-0.1NH-0.370A

w

1

2

50_B29_ASM_TRX

18

w

01005

B

w

B

L4211_RF

C4221_RF

22NH-5%-0.1A

100PF
1

50_B13_B17_B28_B29_PAD_RX

5%
16V
NP0-C0G
01005

XW4200_RF

SHORT-10L-0.1MM-SM

VCC_VLB_SW

2

50_B13_B17_B28_B29_MCH_RX

1

2

50_B13_B17_B28_B29_PRX_WTR_IN
9

01005

1 C4219_RF

1.0PF

PP_LDO14_RFSW
4 15 23

2

+/-0.1PF
16V
NP0-C0G
01005

NOSTUFF

1 C4201_RF

47PF
5%

2 16V
CERM
01005

C4206_RF
100PF
5%
10V
NP0-C0G
01005

14
14

CTRL_VLB_BAND_SELECT_1
CTRL_VLB_BAND_SELECT_2

A

C4224_RF
100PF

VDD

U_VLB_SW_RF
CXA2973GC
V1
V2

BGA

RF1
RF2
RF3
RF4

GND

50_B13_B17_B28_WTR_TX_OUT
50_B12B17_PAD_IN 14
50_B13_PAD_IN
50_B28_PAD_IN
14

5%
10V
NP0-C0G
01005

NOSTUFF
1 C4223_RF

PAGE TITLE

3.3PF
+/-0.1PF

2 16V
NP0-C0G
01005

OUT
RF3
RF2
RF4

14

9

V2
0
1
1

V1
1
0
1

VERY LOW BAND PAD
DRAWING NUMBER

Apple Inc.

BAND
B12B17
B13
B28

A

OMIT_TABLE

P2 DOE

R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

42 OF 55
47 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C4318_RF
R1400
L4322_RF
U1402

LOW BAND PAD (B8, B26, B20)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

L4322_RF

C4309_RF
100PF

1

D

2

18NH-3%-0.140A
50_B20_MATCH_1

50_B20_PRX_WTR_IN

5%
16V
NP0-C0G
01005

C4314_RF

L4312_RF

47PF

7.5NH+/-3%-0.2A
1
01005

1

2

50_B26_MATCH

C4300_RF

8.2NH-3%-0.19A-1.6OHM

1

01005

5%
16V 2
CERM
01005

CAPACITOR THAT'S SUPPOSED TO GO HERE IS LOCATED ON
VERY LOW BAND PAD. THE 2 PAD'S NEED TO SHARE DECOUPLING

C4304_RF
100PF

1

2

VPA_BATT

17 16 14 12

50_B20_WTR_TX_OUT

2

m

5%
10V
NP0-C0G
01005

50_B20_PAD_IN
50_B26_PAD_IN
50_B8_PAD_IN

18PF

1

C4321_RF

2

5%
16V
CERM
01005

LGA

0.7PF

B20ANT
B26ANT
B8ANT
VIO
SCLK
SDATA

.c

h

+/-0.1PF
16V
NP0-C0G
01005

2 50_B8_MATCH_1

1

2

50_B8_PRX_WTR_IN

9

01005
1

C4313_RF
0.9PF

+/-0.05PF
2 16V
CERM
01005

50_B20_PAD_RX
50_B26_PAD_RX
50_B8_PAD_RX
50_B20_PAD_ANT
50_B26_PAD_ANT
50_B8_PAD_ANT

L4316_RF

5.1NH-3%-0.250A
LB_VLB_VIO
RFFE1_CLK
RFFE1_DATA

14

1

2

3 8 12 13 14 16 17

50_B20_ASM_TRX

18

01005

3 8 12 13 14 16 17

1

THRM

C4317_RF
1.0PF

PAD

+/-0.1PF
2 16V
NP0-C0G
01005

w

w

GND

B20RX
B26RX
B8RX

15NH-3%-0.140A

5%
16V
NP0-C0G
01005

.c

TQF6410

B20IN
B26IN
B8IN

in

50_B26_WTR_TX_OUT

15

U_LBPAD_RF

a

15

C4303_RF

SW1
SW2

fi

CTRL_LB_BAND_SELECT_1
CTRL_LB_BAND_SELECT_2

x

VBATT VCC1 VCC2
15

1

C

L4315_RF

C4311_RF
100PF

o

C

50_B26_PRX_WTR_IN

L4313_RF

12 14 16 17

47PF

15

2

5%
16V
CERM
01005

1

VPA_ET

D

9

01005-1

L4320_RF

B

5.6NH-3%-0.23A-1.3OHM

w

B

1

2

50_B26_ASM_TRX

18

01005

1

C4318_RF
1.5PF

+/-0.1PF
2 16V
NP0-C0G
01005

XW4300_RF
SHORT-10L-0.1MM-SM

PP_LDO14_RFSW

VCC_LB_SW

C4305_RF

L4321_RF

47PF
5%
16V
CERM
01005

3.3NH+/-0.1NH-290MA
1

2

50_B8_ASM_TRX

18

01005

15

1

CTRL_LB_BAND_SELECT_1
CTRL_LB_BAND_SELECT_2

1

15

RADIO_LB_PAD

L4306_RF

VDD
50_LB_SW_MCH_IN

U_LB_SW_RF
CXA2973GC

L4301_RF

C4301_RF
9

A

WTR OUTPUT HAS DC
FIRST SHUNT MUST
BE A CAPACITOR.

6.8NH-140MA

100PF

1

2 50_LB_SW_T_MCH 1

2

50_LB_SW_MCH_IN

15

GND

01005

5%
10V
NP0-C0G
01005

BGA

RF1
RF2
RF3
RF4

6
5
7
4

50_B8_PAD_IN
50_B26_WTR_TX_OUT
50_B20_WTR_TX_OUT

01005

15
15
15

V2
0
1
1

V1
1
0
1

NOSTUFF

BAND
B8
B26
B20

2

A

8
9

50_B8_B26_B20_WTR_TX_OUT

3 V1
2 V2

18NH-3%-140MA

15

1

PAGE TITLE

LOW BAND PAD

C4320_RF

DRAWING NUMBER

2.7PF

+/-0.1PF
2 16V
NP0-C0G
01005

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

43 OF 55
48 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C4426_RF
R1500
L4409_RF
U1501

MID BAND PAD (B1, B25, B3, B4, B34, B39)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

L4404_RF

C4425_RF

2.2NH+/-0.1NH-0.380A
1

1

50_B3_PRX_WFR_IN

11

D

5%
16V
NP0-C0G-CERM
01005

L4403_RF

3.6NH+/-0.1NH-0.280A
1

2

50_B3_PRX_MATCH

01005

D

33PF

2

RADIO_WFR

2
01005

VPA_ET

L4405_RF

12 14 15 17

RADIO_MB_PAD

1.5NH+/-0.1NH-0.400A

1 C4408_RF

1

47PF
5%

2

50_B1_B4_PRX_WFR_IN

11

01005

2 16V
CERM
01005

L4406_RF
2.7NH+/-0.1NH-0.370A
1

2
01005
RADIO_WFR

VPA_BATT
RADIO_MB_PAD

17 15 14 12

L4409_RF

1 C4407_RF

1

1.0UF
20%

m

AFEM-8020-AP1

x

LGA

fi

5%
16V
NP0-C0G-CERM
01005
RADIO_WFR

C

B3RX 12 50_B3_PAD_RX
B1/4RX 10 50_B1_B4_PAD_RX
B25RX 5 50_B25_PAD_RX

OMIT_TABLE
FL_B39LP_RF
BAND34-39
LFL151G95TCSD734
0402

OMIT_TABLE

L4421_RF

B1/3/4ANT 16 50_B1_B3_B4_PAD_ANT
B25ANT 8 50_B25_PAD_ANT
B34_39_OUT 24 50_B34_B39_PAD_ANT

4

01005

50_B34_B39_LPF_IN

IN

8 13 14 17 18 19
21
3 8 12 13
14 15 17
3 8 12 13
14 15 17

OUT

2

50_B34_B39_HB_SWITCH_IN

19

GND

EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD

RFFE_VIO
RFFE1_CLK
RFFE1_DATA

0.8NH+/-0.1NH-0.630A

37
38
39
40
41
42
43
44
45
46
47
48

h

11

01005

VIO 1
SCLK 2
SDATA 3

a
in

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

50_B1_B25_B34_B39_WTR_TX_OUT

4
6
7
9
11
14
13
15
17
18
19
20
21
22
23
25
28
29
30
31
32
33

9

50_B25_PRX_WFR_IN

1
3

RADIO_MB_PAD

B1/25/34/39IN

2

2

U_MBPAD_RF

34

50_B25_PRX_MATCH

2.2NH+/-0.1NH-200MA

o

B3/4IN

VCC1 27
VCC2
26

VBATT 36

35

50_B3_B4_WTR_TX_OUT

01005

L4402_RF

.c

9

33PF

1

2

1

2 10V
X5R-CERM
0201-1

C

C4423_RF

1.2NH+/-0.1NH-220MA

L4407_RF

.c

1.3NH+/-0.1NH-0.400A
1

2

50_B1_B3_B4_ASM_TRX

w

1

C4418_RF
0.2PF

w

+/-0.1PF
2 16V
NP0-C0G
01005

NOSTUFF

B

w

B

18

01005

L4401_RF

L4408_RF

2.5NH+/-0.1NH-0.2A
2

1

3.6NH+/-0.1NH-180MA

50_B25_ASM_MATCH

1

01005

2

50_B25_ASM_TRX

18

01005

1

C4413_RF
1.4PF
+/-0.1PF

2 16V
NP0-C0G
01005

A

A
PAGE TITLE

MID BAND PAD
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

44 OF 55
49 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C4533_RF
R1600
L1616
U1601

HIGH BAND PAD (B7, B38, B40, B41, XGP)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

L4512_RF
3.3NH+/-0.1NH-290MA
1

2

RADIO_WTR

D

VPA_ET

12 14 15 16

1

50_B7_PRX_WTR_IN

9

01005

D

OMIT_TABLE

C4522_RF
1.8PF

1

C4507_RF

OMIT_TABLE

68PF

OMIT_TABLE

+/-0.1PF
2 16V
NP0-C0G
01005

5%
2 16V
NP0-C0G
01005

R4509_RF
1

RADIO_HB_PAD

C4501_RF
18PF

1

50_B7_WTR_TX_OUT

9

1

OMIT_TABLE

2

0.00
0%
1/32W
MF
01005

C4500_RF
0.7PF

2%
16V
CERM
01005

50_B7_ASM_TRX

2

+/-0.1PF
2 16V
NP0-C0G
01005

OMIT_TABLE
RADIO_HB_PAD

VPA_BATT

16 15 14 12

1 C4503_RF

1.0PF
+/-0.1PF

OMIT_TABLE

OMIT_TABLE

RADIO_HB_PAD

1 C4505_RF

2 16V
NP0-C0G
01005

VPA_APT

1.0UF
20%

OMIT_TABLE

L4522_RF

2.7NH+/-0.1NH-0.6A

12 13

50_B41B_FILTER_IN

RADIO_HB_PAD

1 C4506_RF

2 10V
X5R-CERM
0201-1

1

1.0UF
20%

17

C4532_RF

0201

68PF

2 10V
X5R-CERM

2

0201-1

1

5%
25V
NP0-C0G-CERM
01005

5%
16V
NP0-C0G
01005

OMIT_TABLE
RADIO_HB_PAD

1

VIO
SCLK
SDATA

C4502_RF

R4531_RF
1

L4506_RF

B

OMIT_TABLE

B40A_PORT
B41A_PORT

50_B41A_TX_HB_SWITCH_IN
19

1

9.1NH-3%-0.17A-1.7OHM
01005

2

2

OMIT_TABLE

L4515_RF

2.7NH+/-0.1NH-0.6A
50_B41C_FILTER_IN
0201

17

OMIT_TABLE

1
1

L4528_RF

C4528_RF
OMIT_TABLE
0.3PF

7.5NH-5NH%-140MA

+/-0.1PF
2 16V
NP0-C0G
01005

01005

OMIT_TABLE

2

C4521_RF

B

3.0PF
1

GND
GND
GND
GND
GND
GND

17

2

L4523_RF

01005

w

FTB40A41A_RF

SAW-BAND-40A-41A-TDD-LX
885058
7
4
ANT_B40A
LGA
8
1
50_B40A_B41A_FILTER_IN
ANT_B41A

OMIT_TABLE
1

9.1NH-3%-0.17A-1.7OHM

w

01005

OMIT_TABLE

01005

OMIT_TABLE

w

4.3NH-3%-0.270A

OMIT_TABLE

50_B40B_TX_FILTER_IN

L4527_RF

.c

0%
1/32W
MF
01005

1

1

21
8 13 14
16 18 19
3 8 12 16
13 14 15
3 8 12 16
13 14 15

RFFE_VIO
RFFE1_CLK
RFFE1_DATA

h

50_B40A_TX_HB_SWITCH_MCH

0.00 50_B40A_TX_HB_SWITCH_IN
2

2

L4526_RF

LGA
2.2NH+/-0.1NH-0.380A
OMIT_TABLE
1
2 50_B40B_TX_HB_SWITCH_IN
1 UNBAL_PRT1
4
UNBAL_PRT450_B40B_TX_FILTER_OUT

01005

in

EPAD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

2

+/-0.1PF
16V
NP0-C0G
01005

1

a

1PF

OMIT_TABLE

m

B41B
B40B
B41C
B40A/B41A

LGA

B38_40_41

L4520_RF

GND
GND
GND

50_B38_B40_B41_PAD_IN

TX-BAND40-LTE
SAFFU2G35MA0F57

2
3
5

OMIT_TABLE

2

C

FT_B40_RF

1.3NH+/-0.1NH-0.400A

50_B41B_TX_PAD
50_B40B_TX_PAD
50_B41C_TX_PAD
50_B40A_B41A_TX_PAD

fi

1

TQF6430

o

100PF

9

U_HBPAD_RF

.c

C4533_RF

RADIO_HB_PAD

B7IN

x

50_B7_PAD_IN

OMIT_TABLE

50_B7_RX_PAD
50_B7_ANT_PAD

B7RX
B7ANT

RADIO_HB_PAD

OMIT_TABLE

+/-0.5PF
2 16V
CERM
01005

VAPT

VCC1
VCC2

VBATT

C

C4520_RF
0.3PF

OMIT_TABLE

50_B40_B38_B41_WTR_TX_OUT

18

OMIT_TABLE

+/-0.1PF
16V
NP0-C0G
01005

1

50_B40A_B41A_FILTER_IN
OMIT_TABLE

10
9
6
5
2
3

1

2

L4517_RF

L4516_RF

L4507_RF

1.5NH+/-0.1NH-0.400A

3.1NH-+/-0.1NH-0.29A

7.5NH+/-3%-0.2A

01005

01005

01005

2

2

OMIT_TABLE

2

OMIT_TABLE

OMIT_TABLE
OMIT_TABLE

L4524_RF
1.8NH+/-0.1%-0.380A
1

OMIT_TABLE
OMIT_TABLE

RADIO_HB_PAD

2
50_B41B_TX_HB_SWITCH_IN
01005

FT_41BC_RF

A

SAW-BAND-41B-41C-TDD-TX
SAWEN2G58QA0F57

17

9 RF2/
B41BOUT
6 RF4/

B41COUT

RF1/

LGA

B41BIN

RF3/
B41CIN

1
4

50_B41B_TX_HB_SWITCH_MCH
50_B41C_TX_HB_SWITCH_MCH

PAGE TITLE

HIGH BAND PAD

50_B41C_TX_HB_SWITCH_IN
0201

GND
GND
GND
GND
GND
GND

17

50_B41B_FILTER_IN
50_B41C_FILTER_IN

A

L4525_RF

1.4NH+/-0.1NH-1.1A

DRAWING NUMBER

OMIT_TABLE

10
8
7
5
3
2

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

45 OF 55
50 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C1702
R1700
L4608_RF
U1702

ANTENNA SWITCH

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D

R4607_RF
0.00

1

VCC_ASM_FILTERED

1 C4602_RF
47PF

1
2
3

RF1
RF3
RF7

4
22
23
24

RX1
TRX6
TRX7
TRX8

50_B34_B39_FILT_RX

16

13

1 INPUT

50_HB_2G_ASM_IN
50_HB_DIVERSITY_ASM

20

HBRF2

50_B17_ASM_TRX
50_B8_ASM_TRX
50_B28A_ASM_TRX
50_B28B_ASM_TRX
50_B26_ASM_TRX
50_B13_ASM_TRX
50_B20_ASM_TRX
50_B29_ASM_TRX

8
18
9
10
16
17
11
7

TRX2
TRX3
TRX0
TRX1
TRX4
TRX5
TRX11
RX2

OUT_FIL1 9

01005

OUT_FIL2 6

1

16

3.3NH+/-0.1NH-180MA

2
3
4
5
7
8
10

L4602_RF

GND

01005

2

TO DIVERSITY MODULE

OMIT_TABLE

14

14

.c

14
15
14

w

15
14

50_LB_2G_ASM_IN

1

L4604_RF

1.0NH+/-0.1NH-0.22A-0.9OHM
01005

01005

21

A1

5

14 LBTX

50_LB_DIVERSITY_ASM

19

VIO
SCLK
SDATA

50_FWD_OR_REV_RF

9

50_ANT2_CONN

23

50_ANT1_CONN

26 RFFE_VIO
28 RFFE2_CLK
27 RFFE2_DATA

23

8 13 14 16 17 19 21
3 8 19 21
8 19 21

LBRF2
1

GND

NOSTUFF

2

32

B

C4606_RF
22PF

1.0NH+/-0.1NH-0.22A-0.9OHM

NOSTUFF

FWD/REV

A2

LGA

13
15
25
30
6
31
33

L4603_RF

21

w

B

w

TO DIVERSITY MODULE

RF5159

12 HBTX

h

15

1

U_ASM_RF_RF

a

2

in

1

50_B39_RX_ASM_OUT
50_B34_RX_ASM_OUT
50_B1_B3_B4_ASM_TRX
50_B25_ASM_TRX

21

50_B34_B39_PRX_WTR_IN

19

LGA

2.4NH+/-0.1NH-200MA
9

19

fi

17

L4601_RF

50_HB_SWITCH_TX
50_HB_SWITCH_RX
50_B7_ASM_TRX

C

x

BAND34-39
SAWFD1G90LC0F57

.c

FRX34B39_RF

OMIT_TABLE

12 19 21 27

o

29

C
VDD

PP_BATT_VCC

m

5%
2 16V
CERM
01005

OMIT_TABLE

2

0%
1/32W
MF
01005

2

5%
16V
CERM
01005

2

A

A
PAGE TITLE

ANTENNA SWITCH
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

46 OF 55
51 OF 60

SIZE

D

8

7

6

5

4

3

2

1

HIGH BAND SWITCH

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D

OMIT_TABLE

C4703_RF
18PF
9

1

50_B40A_PRX_WTR_IN

2

50_B40A_PRX_FILTER

5%
16V
CERM
01005

XW4700_RF
SHORT-10L-0.1MM-SM

1

VCC_HBS
OMIT_TABLE

L4705_RF

OMIT_TABLE

2.0NH+/-0.1NH-0.380A

47PF

5%
2 16V
CERM
01005

885055
2

19

50_B40A_B41A_RX

1

50_B41A_PRX_MATCH

2

1

0.00

16
17

0%
1/32W
MF
01005

5%
6.3V
CERM
01005

2

50_B41A_PRX_FILTER

2
1

OMIT_TABLE

x

L4706_RF
1.4NH+/-0.1NH-0.4A

19
19

21 18 17 16 14 13 8
21 18 8 3

2.7NH+/-0.1NH-0.370A

5%
10V
NP0-C0G
01005

B

1

2
01005

1

50_B40B_B38X_PRX_FILTER

RF3/RX_B40B 9
2 RF1/ANT LGA
RF2/RX_B38X 6

1

OMIT_TABLE

L4704_RF

L4712_RF

3.7NH-+/-0.1NH-0.27A

19 50_B40B_RX
50_B38X_RX

1

OMIT_TABLE

RADIO_HBSWITCH

TX RF1 5

50_HB_SWITCH_TX

RX RF1 16

50_HB_SWITCH_RX

18

4 VIO
3 SCLK
2 SDATA
THRM
GND

PAD

L4710_RF

12NH-3%-0.140A

B

01005

OMIT_TABLE

2.9NH-+/-0.1NH-0.36A
01005

OMIT_TABLE

01005

OMIT_TABLE

RFFE_VIO
RFFE2_CLK
RFFE2_DATA

UQFN
OMIT_TABLE

1

L4708_RF

2.7NH+/-0.1NH-0.370A

01005

2

19

w

2 50_B40B_B38X_PRX_MATCH2

w

1

1
3
4
5
7
8
10

50_B40B_B38X_PRX_WTR_IN

885056

GND
GND
GND
GND
GND
GND
GND

100PF
9

FR38X40B_RF
SAW-BAND-40B-38X-TDD-RX

w

C4701_RF

14 RX1
13 RX2
15 RX3

C

CXM3652UR

.c

OMIT_TABLE
OMIT_TABLE
L4713_RF

21 18 8

50_B40A_B41A_RX
50_B38X_RX
50_B40B_RX

TX1
TX2
TX3
TX4
TX5
TX6

h

in

a

2

17

19

fi

01005

17

11
12
7
8
9
10

17

100PF

17

R4700_RF

U_HBS_RF

50_B40B_TX_HB_SWITCH_IN
50_B41B_TX_HB_SWITCH_IN
50_B34_B39_HB_SWITCH_IN
50_B40A_TX_HB_SWITCH_IN
50_B41C_TX_HB_SWITCH_IN
50_B41A_TX_HB_SWITCH_IN

6

50_B41A_PRX_WTR_IN

01005

o

9

2.2NH+/-0.1NH-200MA

OMIT_TABLE

C4720_RF

VBATT

.c

OMIT_TABLE

1
OMIT_TABLE

L4709_RF

10
8
7
5
4
3
1

C

OMIT_TABLE

1

GND
GND
GND
GND
GND
GND
GND

ANT

m

9 RX_B40A
6 RX_B41A LGA

2

12 18 21 27

1 C4710_RF

FR40A41A_RF
SAW-BAND-40A-41A-TDD-RX

01005

PP_BATT_VCC

2

2

2

A

A
PAGE TITLE

HIGH BAND SWITCH
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

47 OF 55

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

52 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

8

7

6

5

4

3

2

1

C4826_RF
R1800
L1829
U1801

RX DIVERSITY (1)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

MIDBAND
MIDBAND DIVERSITY - WFR

D

HIGHBAND DIVERSITY - WTR
OMIT_TABLE

L4806_RF

1

50_B1_B4_DRX_WFR_IN

22NH-5%-0.1A

3.3NH+/-0.1NH-290MA

2

50_B1_B4_DRX_DSM

21

1

50_B7_DRX_WTR_IN

9

01005

2

50_B7_DRX_DSM

1

50_B8_B28B_DRX_WTR_IN

21

2

1
50_B3_DRX_MATCH

OMIT_TABLE

50_B3_DRX_DSM

9

21

1

50_B38X_DRX_WTR_IN

2

50_B38X_DRX_DSM

L4801_RF

1

9

2

50_B13_B17_DRX_DSM

21

01005

OMIT_TABLE
1

L4814_RF

2

1

C4831_RF
0.8PF

1.8NH+/-0.1%-0.380A

01005

C

21

50_B13_B17_DRX_WTR_IN

5%
10V
NP0-C0G
01005

2.4NH+/-0.1NH-0.370A
1

L4826_RF
22NH-5%-0.1A

C4827_RF
100PF

2

+/-0.05PF
16V
C0G-CERM
01005

+/-0.1PF
16V
NP0-C0G
01005

01005

5%
16V
NP0-C0G
01005

0.3PF

2

1.8NH+/-0.1%-0.380A

2

C4820_RF

2

+/-0.05PF
16V
2 C0G-CERM
01005

m

1

1

L4805_RF

100PF

50_B3_DRX_WFR_IN

11

1

1.1PF

+/-0.1PF
2 16V
NP0-C0G
01005-1

21

NOSTUFF

OMIT_TABLE
C4809_RF

C4803_RF
2.2PF

C4805_RF

50_B8_B28B_DRX_DSM

01005

01005

1

D

L4825_RF

L4813_RF

1.1NH+/-0.1NH-220MA
11

LOWBAND DIVERSITY - WTR

2

C

2

1
50_B25_DRX_MATCH

2

50_B25_DRX_DSM

21

9

x

1

1

50_B40_DRX_WTR_IN

2

L4802_RF

50_B20_B29_DRX_WTR_IN

1

2

21

01005

1

L4816_RF

1

C4832_RF
0.8PF

+/-0.05PF
2 16V
C0G-CERM
01005

2.4NH+/-0.1NH-200MA

in

01005

50_B20_B29_DRX_DSM

2

OMIT_TABLE

a

2.3NH+/-0.1NH-0.370A

1

9

21

01005

01005

5%
16V
NP0-C0G
01005

50_B40_DRX_FILTER

fi

11

L4823_RF
22NH-5%-0.1A

0.4NH+/-0.1NH-0.990A

1.6NH+/-0.1NH-0.390A

100PF

50_B25_DRX_WFR_IN

OMIT_TABLE

L4830_RF

L4804_RF

C4804_RF

.c

o

01005

2

h

01005

.c

PLACE AT WTR END OF TRACE

OMIT_TABLE

C4816_RF

R4815_RF

MIDBAND DIVERSITY - WTR

5%

L4807_RF

50_B34_DRX_WTR_IN

1

2

50_B34_DRX_DSM

2

1

50_B41A_DRX_WTR_MCH

0.00

21

2

9

50_B41A_DRX_FILTER

50_B26_B28A_DRX_WTR_IN

1

2

21

5%
16V
NP0-C0G
01005

0%
1/32W
MF
01005

16V
NP0-C0G
01005

L4829_RF
8.2NH-3%-0.19A-1.6OHM
1

2

50_B26_B28A_DRX_DSM
21

01005
50_B26_B28A_DRX_WTR_MCH

1

B

OMIT_TABLE

L4817_RF

w

2.0NH+/-0.1NH-0.380A
9

1

w

B

9

w

100PF

50_B41A_DRX_WTR_IN

C4826_RF
100PF

OMIT_TABLE

L4827_RF

1.3NH+/-0.1NH-0.400A
1

10NH-3%-0.170A
01005

2

01005

01005

2

PLACE AT WTR END OF TRACE

L4808_RF
3.6NH+/-0.1NH-180MA

1

2
01005

NOSTUFF

C4817_RF
100PF

50_PCS_WTR_IN

1

9

C4808_RF
100PF

9

50_B39_DRX_WTR_IN

1

L4809_RF

1

5%
16V
NP0-C0G
01005

2

50_B39_DRX_DSM

1

2
50_PCS_DRX_MATCH

2

21

21

L4820_RF

01005

50_B39_DRX_MATCH

50_PCS_DSM_OUT

01005

5%
16V
NP0-C0G
01005

2.4NH+/-0.1NH-0.370A

2

L4819_RF
2.2NH+/-0.1NH-0.380A

2.7NH+/-0.1NH-0.370A

L4810_RF

1

2.2NH+/-0.1NH-0.380A
1

2
01005

2
01005

C4818_RF

A

50_DCS_WTR_IN
9

100PF
1

L4822_RF

A

2.2NH+/-0.1NH-0.380A

2 50_DCS_DRX_MATCH 1

2

50_DCS_DSM_OUT

PAGE TITLE

21

RX DIVERSITY

01005

5%
16V
NP0-C0G
01005

DRAWING NUMBER

L4821_RF

Apple Inc.

5.6NH-3%-0.23A-1.3OHM
1

R

2

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

01005

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

48 OF 55
53 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C1900
R1900
L1900
U1901

RX DIVERSITY (2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D

L4905_RF

C

1

VCC_DSM

2

C4901_RF

C

12 18 19 27

.c

15PF
5%

PP_BATT_VCC

o

01005
1

m

22-OHM-25%-0.2A-0.9DCR

2 16V
NP0-C0G-CERM

20

OMIT_TABLE

20

FD40B41A_RF

20

SAW-2-1-BAND-40-41A-DRX

B41AOUT

B40IN

LGA

B41AIN

OMIT_TABLE

L4901_RF

2

PCS 29

50_PCS_DSM_OUT

20

DCS 30

50_DCS_DSM_OUT

20

fi

18

THRM
PAD

B

5.1NH-3%-0.250A

01005

01005

2

50_HB_DIVERSITY_ASM

L4904_RF

5.6NH-3%-140MA

01005
2

18

a

GND
GND
GND
GND
GND
GND
GND
GND

OMIT_TABLE

L4903_RF

5.6NH-3%-0.23A-1.3OHM

01005

1

OMIT_TABLE

L4902_RF

15NH-3%-0.140A

w

B

1

50_LB_DIVERSITY_ASM

w

OMIT_TABLE

1

10
8
7
5
3
2

1

ANT_LB 7

RX_BAND_20
RX_BAND_34
RX_BAND_39
RX_BAND_38X
RX_BAND_40
RX_BAND_41A

w

B40OUT

20

4
1

GND
GND
GND
GND
GND
GND

20

B39252B9920P810

3 8 18 19

ANT_HB 9

1
6
8
10
11
18
20
22
24
26
27
28
31

20

6
9

50_B40_DRX_FILTER
50_B41A_DRX_FILTER

RX_BAND_26+28A

RFFE2_CLK

SCLK 5

35
36
37
38
39
40

20

RX_BAND_25

8 18 19

LGA
OMIT_TABLE

GND
GND
GND

20

RX_BAND_8+28B
RX_BAND_12+13

RFFE2_DATA

SDATA 4

in

20
20

8 13 14 16 17 18 19

U_DSM_RF
M472B

GND
GND

20

RX_BAND_1_4
RX_BAND_3
RX_BAND_7

RFFE_VIO

h

20

50_B1_B4_DRX_DSM
50_B3_DRX_DSM
50_B7_DRX_DSM
50_B8_B28B_DRX_DSM
50_B13_B17_DRX_DSM
50_B25_DRX_DSM
50_B26_B28A_DRX_DSM
50_B20_B29_DRX_DSM
50_B34_DRX_DSM
50_B39_DRX_DSM
50_B38X_DRX_DSM
50_B40_DRX_DSM
50_B41A_DRX_DSM

VIO 3

.c

20

32
33
16
19
25
34
21
23
12
13
17
14
15

x

VDD 2

01005

2

A

A
PAGE TITLE

RX DIVERSITY (2)
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

49 OF 55
54 OF 60

SIZE

D

8

7

6

5

4

3

2

1

C1900
R1900
L1900
U1901

GPS

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

m

D

.c
50_GPS_DSM_IN

FL_GPSRF_RF

2

LNA-GNSS-BAL
B8821
LGA

1

UNBAL_PORT

100_GPS_WTR_IN_P

9

100_GPS_WTR_IN_N

9

01005

RADIO_GPS

BAL_PORT 3
BAL_PORT 4

1 C5001_RF

1.0PF
+/-0.1PF

2 16V
NP0-C0G
01005

2
5

fi

1

100_GPS_FIL_OUT_P

GND
GND

x

23

C

L5002_RF

10NH-3%-0.170A

o

C

L5003_RF

a

10NH-3%-0.170A
100_GPS_FIL_OUT_N

1

2

w

w

.c

h

in

01005

B

w

B

A

A
PAGE TITLE

GPS
DRAWING NUMBER

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

50 OF 55
55 OF 60

SIZE

D

8

7

6

5

4

3

2

1

ANTENNA FEEDS

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
ANT & COAX CONNECTOR FOR LOWER & UPPER SECTION OF MLB

L5107_RF

20NH-3%-.14A-2.9OHM

PAC_VDD_3V0_IN

PAC_VDD_3V0

4 14 15 23

01005
1

VBAT

D

FL5146_RF

UPPER_LBMB_ANT_RF

FLTR-GPS-0603

1.6X1.21MM
SM-NSP

1

L5101_RF

50_UPPER_LBMB

1

5%
2 16V
NP0-C0G-CERM
01005

RF1346

2

1

C5107_RF
0.01UF

RADIO_LOW_ANT

10%
6.3V
2 X5R
01005

50_UAT_PAC

MM5829-2700
F-ST-SM1

VIO_FILT

VIO

RF1

23

SDATA

23

RFFE2_PAC_CLK_FILT

23

2

RF2

RFFE2_PAC_DATA_FILT

SCLK

50_UAT_CELL_F

50_ANT2_CONN

18

BYPASS CAPS FOR ALTERNATE ANTENNA WITHOUT U_ASWNT

NC

23

D

LOW_COAX_RF

WLCSP

03015

50_NTCH_FILT_OUT

33PF

U_ANTPAC_RF

2.4NH+/-0.2NH-0.57A-0.07OHM

LFE18832MHC1D449
1 IN
3
OUT

C5106_RF

NC
1

R5137_RF

C5105_RF
0.8PF

OMIT_TABLE

NC
NC
NC

+/-0.05PF
2 16V
C0G-CERM
01005

NC
NC
NC

GND

0.00
1%
1/20W
MF
0201

SHORT-10L-0.1MM-SM

PP_LDO14_RFSW

23 15 14 4

XW5100_RF

C5109_RF
47PF
5%
16V
CERM
01005

L5103_RF

20NH-3%-.14A-2.9OHM
RFFE_VIO_S2R

27

VCC_SWANT

TO THE PAC FOR LBMB

VIO_FILT

23

01005

C5103_RF
0.01UF

R5104_RF
0.00

23

RFFE2_PAC_DATA_FILT

0%
1/32W
MF
01005

1

CXA4011GC

RF

RF1
OMIT_TABLE
XFLGA

VC1

1

50_UAT_CELL
23

RFFE2_PAC_CLK_FILT

0%
1/32W
MF
01005

1

10%
2 10V
CER-X7R
01005

23

2.5NH+/-0.1NH-500MA

2
0201

1

50_UAT_CELL_LPF

2
50_UAT_CELL_F
0201

RF2

1

GND
1

C5110_RF
1.1PF

C

L5111_RF
7.5NH-+/-0.2NH-440MA

+/-0.05PF
2 25V
C0G-CERM
0201

03015
2

x

0.00

C5101_RF
120PF

fi

RFFE2_CLK_BUFFER

C5102_RF
120PF

R5105_RF
8

UAT_SELECT
8
0=UPPER_LBMB_ANT
1=UPPER_HB_ANT

2.5NH+/-0.1NH-500MA

o

RFFE2_DATA_BUFFER

50_ANT2_UPPER_COAX_CONN

L5109_RF

L5108_RF

U_SWUANT_RF

F-ST-SM1

5%
2 16V
NP0-C0G-CERM
01005

.c

8

VDD

MM5829-2700

33PF

10%
2 6.3V
X5R
01005

C

UP_COAX_RF

C5104_RF

1

m

1

a

10%
2 10V
CER-X7R
01005

50_WIFI_2G_NOTCHPLEXER_IN

57

h

in

BI

BI

57

COMMON 2

RF2 4

50_WIFI_2G_NOTCHPLEXER_IN2

SMD1_RF2 6

10

P2 DOE

L5106_RF
4.3NH+/-3%-0.5A

1

3.0NH+/-0.1NH-0.6A

2

50_UPPER_HB_CELL

0201

50_WICE_CELL2_IN
0201

L5102_RF

2

1.2NH-+/-0.05NH-1.1A-0.04OHM
50_UPPER_HB_ANT_FEED2

B

01005

GND

L5120_RF

5
3
1
+/-0.1PF
2 25V
CER
0201

1

RF3 1

1

GND

8.2PF

C5138_RF

50_UPPER_HB_ANT_FEED

1%
1/20W
MF
0201

9 RF1
7 SMD2_RF1/SMD4_GND

50_WIFI_2G_DIPLEXER_IN

2

50_WIFI_5G_IN_OUT

0.002

12NH-3%-0.140A

NOSTUFF

1

1

L5122_RF

NOSTUFF

8
5
3
2

HIGH_BAND 4

50_WIFI_2G_DIPLEXER_IN2

w

LOW_BAND 6

2
3
4

B

R5101_RF

SM

FLCELWIF_RF
DIPLEXER-CELL-WIFI
885072
LGA

R5102_RF

FLWIFDIP_RF
1

0201

w

DPX165950DT-8030D1

F-ST-SM1

w

MM5829-2700

1.7NH-+/-0.1NH-0.8A-0.07OHM

.c

RADIO_LOW_ANT

UPPER_HB_ANT_RF

L5123_RF

1%
MF
1/20W
201

49.9

50_WICE_ANT2_GND

50_UPPER_HB_ANT_FEED1
0201

NOSTUFF
1

1

C5139_RF
0.2PF

L5121_RF

+/-0.05PF
2 25V
COG-CERM
0201

5.6NH-3%-0.23A-1.3OHM
01005

R5136_RF
0.00

PP_LDO13_GPS
VOLTAGE=2.95V

1

1%

1/20W
C5129_RF

22PF
5%
2 16V
CERM
01005

2.2UF
20%
2 6.3V
X5R
0201-2

NOSTUFF

RADIO_LOW_ANT

1 50_GPS_ANT_FEED

1

2

1

50_GPS_ANT_MATCH

+/-0.05PF
25V
C0G-CERM
0201

U_GPSLNA_RF

R5135_RF

1.8PF

1

I248
NOSTUFF

0.00

50_GPS_ANT

2

RFIN

LGA

RFOUT

50_GPS_DSM_IN

22
18

1

L5135_RF

F-ST-SM1

2

50_ANT1_CONN_R

ANTENNA FEEDS

0201

C5128_RF

DRAWING NUMBER

THRM_PAD

Apple Inc.

+/-0.05PF
2 25V
C0G-CERM
0201

R

0201

SPRING-OVERPASS-GND-NORTH-X145

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:
2

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

1
CLIP-SM

PAGE TITLE

1

0.3PF

22NH-100MA

SP3_RF

NOSTUFF 1

50_ANT1_CONN

A

MM5829-2700

1.4NH+/-0.1NH-1.1A

1%
1/20W
MF
0201

GND

LOW_ANT_RF

L5129_RF

SKY65736

4
3
2

C5136_RF

1.6X1.21MM
SM-NSP

C5130_RF

VCC

GPS_SP1_RF

A

1

4 6

NOSTUFF

MODULE INCLUDES INTERNAL DECOUPLING

GPS FEED

MF
0201

2

PP_LDO13

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

51 OF 55
56 OF 60

1

SIZE

D

8

7

6

5

4

3

2

1

WLAN/BT
WIFI_BT
60

58 46 37 33

PP_VCC_MAIN

IN

C5221_RF

C5220_RF

20%
6.3V
X5R-CERM
0201

D

20%
6.3V
CER-X5R
0402

2.2UF

4.7UF

1 WIFI_BT
C5202_RF

1 WIFI_BT
C5203_RF

27PF

4.7UF

20%
2 6.3V
CER-X5R
0402

WIFI_BT

1 WIFI_BT
C5222_RF

27PF

WIFI_BT

C5213_RF

+/-0.1PF
2 16V
NP0-C0G
01005

WIFI_BT
R5208_RF
2

24

PP_WLAN_VDDIO_1V8
VOLTAGE=1.80V
WIFI_BT
1 C5204_RF

0%
1/32W
MF
01005

0.01UF

WIFI_BT

7.5UF

WIFI_BT

20%
4V
CERM
0402

1

2

WLAN_SR_LC

36 33

IN

36 33

IN

BT_UART_CTS*
BT_UART_RTS*
BT_UART_RXD
BT_UART_TXD

36 33
60 33

IN
BI

60 33

IN

60 33

IN

60

36 33

IN

60

36 33

IN

60
60

36 33
36 33

30
12
14
13
16
17
20
21
18
19

HOST_WAKE_WLAN
WLAN_PCIE_WAKE_L
WLAN_PCIE_PERST_L
WLAN_PCIE_CLKREQ_L
90_WLAN_PCIE_REFCLK_N
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_RDN
90_WLAN_PCIE_RDP
90_WLAN_PCIE_TDN
90_WLAN_PCIE_TDP

OUT

60 33

BT_UART_CTS_L
BT_UART_RTS_L
BT_UART_RXD
BT_UART_TXD

49
50
48
47

BT_PCM_CLK
BT_PCM_SYNC
BT_PCM_IN
BT_PCM_OUT

56
4
3
2

WLAN_UART_RTS_L
WLAN_UART_CTS_L
WLAN_UART_RXD
WLAN_UART_TXD

0603

OUT

60 57 33

38
39
41
40

BT_PCM_CLK
BT_PCM_SYNC
BT_PCM_IN
BT_PCM_OUT

LGA

PCIE_DEV_WAKE
HOST_WAKE_BT
WAKE_BT

OUT
OUT

GPIO_0
PCIE_WAKE*
PCIE_PRST*
PCIE_CLKREQ*
PCIE_REFCLK_N
PCIE_REFCLK_P
PCIE_RDN
PCIE_RDP
PCIE_TDN
PCIE_TDP

in

DC BLOCKS LOCATED ON AP SIDE
SWIZZLE DATA LANE ON TOP-LEVEL

60 36 33

60 36 33

IN

IN

OSCAR_CONTEXT_B

NC

h

BI

JTAG_SEL
JTAG_TCK(GPIO_2)
JTAG_TMS(GPIO_3)
JTAG_TDI(GPIO_4)
JTAG_TDO(GPIO_5)
JTAG_TRST(GPIO_6)

.c

IN

36

11
31
34
32
35
33

UART_RTS(GPIO_7)
UART_CTS(GPIO_8)
UART_RX(GPIO_9)
UART_TX(GPIO_10)

OUT

IN

OUT
IN
OUT

BI
BI

2

25V
COG-CERM
0201

NOSTUFF

33 60
33 36 60

IN

33 36

60

C

1 WIFI_BT

R5210_RF

33 36
60
33 36
60
33 36
60
33 36
60

100K

5%
1/32W
MF
2 01005

33 36 60
33 36 60

IN

33 36 60

OUT

WLAN_COEX_TXD
WLAN_COEX_RXD

33 36 60

OUT

33 36

60

IN

33 36

60

IN

33 36

60

OUT

33 36

60

PP_WLAN_VDDIO_1V8

1

0.00 2

BB_COEX_UART_RXD

3 8

BB_COEX_UART_TXD

3 8

0%
1/32W
MF
01005
WIFI_BT
R5205_RF
1

0.00 2

B

0%
1/32W
MF
01005

w
WLAN_PCIE_PERST_L
27 24

WIFI_BT
R5206_RF

NC

59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98

B

SECI_TX(GPIO_13) 6
SECI_RX(GPIO_14) 5
RF_SW_CTRL_8 7

w

THRM_PAD

1
15
25
27
29
37
44
46
51
52
53
57

GND

w

JTAG_SEL
WLAN_JTAG_SWDCLK
WLAN_JTAG_SWDIO
OSCAR_CONTEXT_A
24

36

IN

C5212_RF

0.2PF
+/-0.05PF

2

GPIO_1 8
BT_HOST_WAKE 43
BT_DEV_WAKE 42

4
60

WIFI_BT
1

2.7NH+/-0.1NH-0.50A

fi

2

60
60

9 WL_REG_ON
10 BT_REG_ON

WLAN_REG_ON
BT_REG_ON

NOSTUFF
WIFI_BT

0201

U5201_RF

50_WIFI_5G_IN_OUT

OUT 2

GND
1 3

L5208_RF
50_WLAN_G_ANT
2G_ANT 45
50_WLAN_A_ANT
5G_ANT 58

SM

a

C

2.2UH-20%-0.3A-0.38OHM
3

1

LBEE5U8ZKC-646

L5201_RF

4 IN

0201

WIFI_BT

26 VIN_LDO
28 SR_VLX

WLAN_BUCK_OUT
WLAN_SR_VLX

C5201_RF

1

36 CLK32K

CLK32K_AP

LFH185G53RG1D868

50_WIFI_5G_BPF_RADIO

o

IN

0.2PF

FL5201_RF

1.3NH+/-0.1NH-1.1A

.c

36 33

56

C5211_RF
NOSTUFF

L5216_RF

5%
2 16V
NP0-C0G
01005

x

WIFI_BT
60

BI

WIFI_BT
1

WIFI_BT

27PF

32K INTERFACE TO AP

56

+/-0.1PF
2 16V
NP0-C0G
01005

1 WIFI_BT
C5205_RF

VDDIO_1P8V 22

10%
2 6.3V
X5R
01005

BI

NOSTUFF

m

0.00

VBATT_RF_VCC 54
VBATT_RF_VCC 55

1

VBATT 23
VBATT 24

PP_WL_BT_VDDIO_AP

50_WIFI_2G_NOTCHPLEXER_IN

2

5%
1/20W
MF
201

0.2PF

IN

0

1
1

60 33

D

R5214_RF

5%
2 16V
NP0-C0G
01005

5%
2 16V
NP0-C0G
01005

24

1 WIFI_BT
1

C5215_RF
100PF

5%
2 16V
NP0-C0G
01005

R5201_RF

10K

5%
1/32W
MF
2 01005

NOSTUFF
JTAG_SEL

24

1 WIFI_BT

A

R5202_RF

SYNC_MASTER=N/A

10K

SYNC_DATE=N/A

PAGE TITLE

5%
1/32W
MF
2 01005

WIFI/BT: MODULE AND FRONT END
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

MODULE BOOT-STRAPPED TO PCIE INTERNALLY
MODULE BOOT-STRAPPED TO HSIC BY GPIO6/SDIO2/SDIO1=110

BRANCH

PAGE

52 OF 55

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

57 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

A

8

7

6

5

4

3

2

1

C2101
R2100
L2102
U2100

STOCKHOLM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

U5302_RF
A3 VIN

L5303_RF

D

B1 SW
B2 SW

1.8UH-0.7A

1

C5321_RF

1

15UF

2
0603 STOCKHOLM_BOOST_SW

20%
2 6.3V
X5R
0402-1

B3 EN

VOUT A1
VOUT A2

STOCKHOLM_5V

1

C3 AGND

PP_VCC_MAIN

C1 PGND
C2 PGND

27 25 24 13 4

FAN48614BUC50X

WLCSP

C5322_RF

25

1

15UF

D

C5323_RF
15UF

20%
2 6.3V
X5R
0402-1

20%
2 6.3V
X5R
0402-1

USE LDO11 TO MATCH IMPLEMENTATION OF N71/66

STOCKHOLM_5V

R5313_RF PP_LDO11
PP_VCC_MAIN

STOCKHOLM_TVDD

RADIO_STOCKHOLM

1UF

20%
2 10V
X5R
0201

R5310_RF
2

C5308_RF

STOCKHOLM_SVDD_IN
VOLTAGE=1.80V

PP_STOCKHOLM_1V8_S2R

1UF

20%
2 10V
X5R
0201

RADIO_STOCKHOLM

1 C5303_RF

SVDD B7
ESE_VDD C5

0.1UF

SM

STOCKHOLM

SM

58 36 33
60

OUT
IN

25

A1
E1

PP_STOCKHOLM_ESE
NC
NC
NC
NC
NC

B

E3
E4
F4
B3
B4
E6
C3

XTAL2

E2

STOCKHOLM_RXP
STOCKHOLM_RXN

TX1 G3
TX2 G5

VMID
SE2_PWR_REQ
SE2_SVDD_IN

E5

STOCKHOLM_TX1
STOCKHOLM_TX2
AP_TO_STOCKHOLM_DEV_WAKE

IN

A

33 58 60

F7 STOCKHOLM_VMID
F2

SE2_PWR_REQ
SE2_SVDD_IN

G1

P2MM-NSM
SM PP5304_RF
1
PP

STOCKHOLM

25

NOSTUFF
RADIO_STOCKHOLM

R5316_RF

1 C5317_RF

0.1UF

1

20%
2 6.3V
X5R-CERM
01005

TP5301_RF STOCKHOLM_SIM_PRES
1

560PF

2%
2 25V
NPO-C0G
0201

x
STOCKHOLM_DC_BOOST
SH_DWP_M
SH_DWP_S

F5

C5310_RF

fi

F6

WKUP_REQ

1

a

RXP
RXN

25

in

G7
G6

SMX_RST*
SMX_CLK
ESE_IO1
SPIM_MOSI
SPIM_MISO
SPIM_SCK

VSS

NC

ESE_DWPM_DBG
ESE_DWPS_DBG

BI

STOCKHOLM_SIM_PRES

36

L5302_RF

160NH-10%-0.48A-0.33OHM
1

h

IN

1

0.00

2

STOCKHOLM_ANT_MATCH

STOCKHOLM_BAL1

2

82PF

1

2

2%
50V
NP0-C0G
0201

560PF
1

2

2%
25V
NPO-C0G
0201

1

1

C5315_RF

C5316_RF

C5318_RF

1000PF

1000PF

2%
2 25V
C0G-NP0
0201

330PF

2%
25V
C0G-NP0
0201

2%
25V
NPO-COG
0201

NOSTUFF
1

C5319_RF

TP5303_RF
1

100PF

A

2%
2 50V
C0G
0201

TP-P55

C5314_RF
22PF

1

0402

STOCKHOLM_ANT

C5313_RF

STOCKHOLM_BAL0

C5311_RF

USE FIDUCIAL FOR SH ANTENNA GND

2

5%
50V
C0G
0201

560PF

.c

60

36 33
60
36 33

OUT

C1
B1
D2

STOCKHOLM_UART_RXD
STOCKHOLM_UART_TXD
STOCKHOLM_UART_CTS
STOCKHOLM_UART_RTS
AP_TO_STOCKHOLM_EN

PP

C5312_RF

2
0402

C

NOSTUFF

2%
2 25V
NPO-C0G
0201

NOSTUFF

w

58

IN

1

25

w

60

IN

36 33
60
36 33

STOCKHOLM_TO_SIM_SWP

TVSS
PVSS

38 36
58

NC
A4
A7
A6
NC
D5

G4
C2

OUT

STOCKHOLM_TO_BBPMU_CLK_REQ
45_BBPMU_TO_STOCKHOLM_19P2M_CLK

1

F1

DVSS
DVSS

IN

AP_TO_STOCKHOLM_FW_DWLD_REQ

A5
NC
B2
A2
A3

B6
C4

58 36 33
60
38 36

OUT

IRQ
SVDD_REQ
DWL
CLK_REQ
NFC_CLK_XTAL1
RX
TX
CTS
RTS
VEN

AVSS
AVSS
AVSS

36 33

SPIM_IRQ
SIM_SWIO
GPIO0
SPIM_NSS
TX_PWR_REQ

PN66VEU3-A101D003
UFLGA

D4
D6
F3

60

D1

STOCKHOLM_TO_PMU_HOST_WAKE

PP

5%
1/20W
MF
201

160NH-10%-0.48A-0.33OHM

PP5303_RF
P2MM-NSM
STOCKHOLM

U5301_RF

L5301_RF

PP5302_RF
P2MM-NSM

10%
2 10V
X5R-CERM
0201

C5309_RF
1

PP_STOCKHOLM_1V8_S2R

25

2

STOCKHOLM_RXN_CAP

1

560

2

5%
1/20W
MF
201

2%
25V
C0G-NP0
0201

27

B

R5304_RF

1000PF

w

VDD
VBAT
SIM_PMU_VCC
PVDD

20%
2 10V
X5R
0201

AVDD D7

C6
C7
B5
D3

1UF

VUP G2
TVDD E7

C

PP_STOCKHOLM_ESE
VOLTAGE=1.80V

2

T5301_RF

25

1 C5302_RF

1 C5304_RF

o

RADIO_STOCKHOLM

2%
25V
C0G-NP0
0201

RADIO_STOCKHOLM

560

1

STOCKHOLM_RXP_CAP

.c

STOCKHOLM_DVDD

2

2

1
27 25

R5303_RF

1000PF

1

PP_PN66_SIM_PMU

2

0%
1/32W
MF
01005

1

0.00

0%
1/32W
MF
01005

BAL1 3
UNBAL 4

1

20%
2 10V
X5R
0201

STOCKHOLM_DC_BOOST_EN

2

2 BAL0
1 GND

1UF

0.00

0805

1 C5324_RF

1

2

0%
1/32W
MF
01005

1 C5330_RF

RADIO_STOCKHOLM

0.00

ATB201206E-20011

27 25 24 13 4

1

R5309_RF

25 27

m

25

0%
1/32W
MF
01005

25

TP-P55

PU FOR MAUI IO WAKE GLITCH

27 25

PP_STOCKHOLM_1V8_S2R
27 25

PP_STOCKHOLM_1V8_S2R

1 RADIO_STOCKHOLM

1 RADIO_STOCKHOLM

R5301_RF

R5306_RF

100K

100K

5%
1/32W
MF
2 01005
60

60

58 36 33

58 36 33

IN
IN

5%
1/32W
MF
2 01005

AP_TO_STOCKHOLM_EN
60

58 36 33

IN

STOCKHOLM_UART_CTS

AP_TO_STOCKHOLM_FW_DWLD_REQ
1 RADIO_STOCKHOLM

R5302_RF

100K

27 25

PP_STOCKHOLM_1V8_S2R

5%
1/32W
MF
2 01005

1 RADIO_STOCKHOLM

R5307_RF

100K
5%
1/32W
MF
2 01005

A
60 58 33

IN

AP_TO_STOCKHOLM_DEV_WAKE

60

58 36 33

IN

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

STOCKHOLM_UART_RXD

STOCKHOLM

1 RADIO_STOCKHOLM

R5305_RF

DRAWING NUMBER

100K
5%
1/32W
MF
2 01005

Apple Inc.
R

051-00648
4.0.0

REVISION

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

53 OF 55
58 OF 60

SIZE

D

A

8

7

6

5

4

3

N69 SKU BOM OPTION TABLE
N69H
N69H TDD
QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

1

N69

TABLE_5_HEAD

PART#

2

PART#

N69H

QTY

DESCRIPTION

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

N69

TABLE_5_ITEM

D

353S4180

1

U_HBPAD_RF

RADIO HIGH BAND PAD

TABLE_5_ITEM

131S0417

1

18PF 01005 16V

C4501_RF

CRITICAL

1

1.0PF 01005 16V

C4503_RF

CRITICAL

131S0307

N69H

131S0635

1

68PF 01005 16V

C4507_RF

CRITICAL

N69H

138S0706

1

1UF 0201 10V

C4505_RF

CRITICAL

N69H

152S1907

1

3.3NH 01005 +/-0.1NH

L4512_RF

CRITICAL

N69H

131S0247

1

1.8PF 01005 16V

C4522_RF

CRITICAL

DSM M471A NO B7

U_DSM_RF

TABLE_5_ITEM

1

100PF 01005

C4827_RF

CRITICAL

TABLE_5_ITEM

353S00331

N69H

1

SKY77826

118S0729

1

118S0724

U_VLBPAD_RF

CRITICAL

N69

39K 1% 01005

R3312_RF

CRITICAL

N69

1

0R 0201

R5137_RF

CRITICAL

N69

152S1993

1

5.1NH 0.1NH 01005 250MA

L4223_RF

CRITICAL

N69

131S0599

1

01005 1.5PF

C4231_RF

CRITICAL

N69

118S0652

1

01005 49.9R

C4211_RF

CRITICAL

N69

1

01005 49.9R

C4213_RF

CRITICAL

N69

118S0652

1

01005 49.9R

C4500_RF

CRITICAL

N69

117S0161

N69H

TABLE_5_ITEM

131S0375

1

118S0652

N69H

1

0R 01005

R4509_RF

CRITICAL

N69

TABLE_5_ITEM

152S1720

1

1.8NH 01005

L4814_RF

CRITICAL

N69H

152S1544

1

0.4NH 01005

L4830_RF

CRITICAL

N69H

152S1564

1

2.4NH 01005

L4816_RF

CRITICAL

N69H

131S0307

1

100PF 01005

C4816_RF

CRITICAL

N69H

117S0161

1

0R 01005

R4815_RF

CRITICAL

152S1900

1

1.3NH 01005

L4817_RF

CRITICAL

N69H

TABLE_5_ITEM

N69H

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

353S00374

1

TDK MODULE M472A NO B12/B13/B17

U_DSM_RF

CRITICAL

1

IND 0.8NH 630MA 01005

L4421_RF

CRITICAL

N69H

353S00390

1

SKY77827

U_VLBPAD_RF

CRITICAL

N69H

131S0387

1

2.2PF 0.1PF 01005 COG

C4211_RF

CRITICAL

N69H

152S1567

1

3.3NH 01005

L4813_RF

CRITICAL

N69H

131S0376

1

1.1PF 01005

C4809_RF

CRITICAL

N69H

152S1977

1

10NH 01005 170MA

L4217_RF

CRITICAL

N69H

131S0390

1

2.5PF 0.1PF 01005 COG

C4213_RF

CRITICAL

N69H

152S1853

1

7.5NH 3% 01005 200MA

L4216_RF

CRITICAL

N69H

118S0726

1

162K 1% 01005

R3312_RF

CRITICAL

N69H

353S3876

1

SWTICH SPDT 1.1X1.1

U_SWUANT_RF

CRITICAL

N69H

152S2045

1

3.0NH 0201

L5120_RF

CRITICAL

N69H

152S1851

1

5.6NH 01005

L5121_RF

CRITICAL

N69H

TABLE_5_ITEM

N69H

152S1998

TABLE_5_ITEM

152S1996

1

15NH 01005

L4901_RF

CRITICAL

N69H

152S1571

1

5.6NH 01005

L4902_RF

CRITICAL

N69H

152S1571

1

5.6NH 01005

L4903_RF

CRITICAL

152S1623

1

5.1NH 01005

L4904_RF

CRITICAL

N69H

155S0908

1

SAW DRX B40B41A

FD40B41A_RF

CRITICAL

N69H

117S0161

1

0R 01005

R4509_RF

CRITICAL

N69H

152S1907

1

3.3NH 01005 290MA

L4602_RF

CRITICAL

N69H

155S0981

1

FLTR SAW DUAL FILTER B34B39

FRX34B39_RF

CRITICAL

N69H

152S1988

1

2.4NH 01005 370MA

L4601_RF

CRITICAL

N69H

155S0906

1

SAW FILTER B40A B41A

FTB40A41A_RF

CRITICAL

N69H

152S1983

1

1.5NH 01005 +/-0.1NH

L4517_RF

CRITICAL

N69H

152S2061

1

7.5NH 01005 3%

L4507_RF

CRITICAL

N69H

117S0161

1

0R 01005

R4531_RF

CRITICAL

152S2040

1

4.3NH 01005 3%

L4506_RF

CRITICAL

131S00042

1

0.3PF +-0.05PF 01005 16V

C4528_RF

CRITICAL

N69H

131S0307

1

100PF 01005 16V

C4533_RF

CRITICAL

N69H

131S0244

1

1PF 01005 16V

C4502_RF

CRITICAL

N69H

138S0706

1

1UF 0201 10V

C4506_RF

131S0644

1

68PF 01005 25V

131S00042

1

152S2002

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

m

TABLE_5_ITEM

TABLE_5_ITEM

CRITICAL

N69H

x

TABLE_5_ITEM

C4231_RF

.c

TABLE_5_ITEM

01005 49.9R

C

TABLE_5_ITEM

TABLE_5_ITEM

o

TABLE_5_ITEM

1

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

118S0652

TABLE_5_ITEM

N69H

fi

TABLE_5_ITEM

C

D

TABLE_5_ITEM

353S00373

TABLE_5_ITEM

TABLE_5_ITEM

N69H

TABLE_5_ITEM

N69H

TABLE_5_ITEM

a

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

CRITICAL

N69H

C4532_RF

CRITICAL

N69H

0.3PF 01005 16V

C4520_RF

CRITICAL

N69H

1

2.7NH 0201 +/-0.1NH

L4522_RF

CRITICAL

N69H

152S1982

1

1.3NH 01005 +/-0.1NH

L4520_RF

CRITICAL

N69H

155S0982

1

FILTER B40

FT_B40_RF

CRITICAL

N69H

152S1986

1

2.2NH 01005 +/-0.1NH

L4526_RF

CRITICAL

N69H

152S1853

1

9.1NH 01005 3%

L4523_RF

CRITICAL

N69H

152S2002

1

2.7NH 0201 +/-0.1NH

L4515_RF

CRITICAL

N69H

152S1408

1

7.5NH 01005 5%

L4528_RF

CRITICAL

N69H

in

TABLE_5_ITEM

TABLE_5_ITEM

.c
w

w

B

h

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

B

w

TABLE_5_ITEM

152S00035

1

3.1NH 01005 +/-0.1NH

L4516_RF

CRITICAL

N69H

131S0395

1

3.0PF 01005 +/-0.1PF

C4521_RF

CRITICAL

N69H

152S1853

1

9.1NH 01005 3%

L4527_RF

CRITICAL

N69H

155S0900

1

FILTER SAW BAND 41B 41C

FT_41BC_RF

CRITICAL

N69H

152S1965

1

1.8NH 01005 380MA

L4524_RF

CRITICAL

N69H

152S2024

1

1.4NH 0201 1.1A

L4525_RF

CRITICAL

N69H

353S4167

1

SWITCH IC LGA16

U_HBS_RF

CRITICAL

N69H

155S0903

1

FILTER SAW B40B 38X

FR38X40B_RF

CRITICAL

N69H

155S0881

1

FILTER LOW PASS B39

FL_B39LP_RF

CRITICAL

N69H

131S0214

1

18PF 01005

C4703_RF

CRITICAL

N69H

152S1917

1

2.0NH 01005 380MA

L4705_RF

CRITICAL

N69H

117S0161

1

0OHM 01005

R4700_RF

CRITICAL

N69H

131S0307

1

100PF 01005

C4720_RF

CRITICAL

N69H

155S0902

1

FILTER SAW BAND 40A B41A

FR40A41A_RF

CRITICAL

N69H

152S1619

1

2.2NH 01005 200MA

L4709_RF

CRITICAL

N69H

131S0214

1

18PF 01005

C4701_RF

CRITICAL

N69H

152S00036

1

3.7NH 01005 270MA

L4704_RF

CRITICAL

N69H

152S1989

1

2.7NH 01005 370MA

L4713_RF

CRITICAL

N69H

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

A

A

TABLE_5_ITEM

PAGE TITLE

OMIT_TABLE_RF

TABLE_5_ITEM

152S1989

1

2.7NH 01005 370MA

L4712_RF

CRITICAL

N69H

DRAWING NUMBER

TABLE_5_ITEM

152S00034

1

L4708_RF

2.9NH 01005 360MA

CRITICAL

N69H

Apple Inc.

TABLE_5_ITEM

152S1576

1

12NH 01005 140MA

L4710_RF

CRITICAL

N69H

051-00648
REVISION

4.0.0

R
TABLE_5_ITEM

131S0216

1

47PF 01005

C4710_RF

CRITICAL

N69H

NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

TABLE_5_ITEM

152S1946

1

1.4NH 01005 220MA

L4706_RF

CRITICAL

N69H

BRANCH

PAGE

54 OF 55

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

59 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

8

7

6

5

4

3

2

1

RADIO SYMBOL(HEIARCHY)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D

D

FCT TESTING

WLAN/BT HOUSE KEEPING
PP_BATT_VCC

24 3

IO

24 3
27 24 3

IO

BT_REG_ON

ADC_SMPS1

3

ADC_PP_LDO11

3

ADC_PP_LDO5

3

ADC_SMPS4

OUT
OUT

PP_WL_BT_VDDIO_AP

PP_STOCKHOLM_1V8_S2R

33 36 57 60

OUT

33 57

WLAN PCIE IPC
24

CELLULAR HOUSE KEEPING

24
24
24 3

RADIO_ON_L
BB_RESET_DET_L

5 3

RF_PMIC_RESET_L

5 3

BB_RST_L

8
8 3

IN 33

BB_IPC_GPIO1

24 3
24

IN 33

OUT

33 41

BB_FORCE_PWM

33 36 57

IN 33

IN 33

WLAN/BT UART

36 38

WLAN_UART_TXD

24 3

WLAN_UART_RXD
BT_UART_CTS_L

IN 33

36 57

57

C

h

HSIC IPC

BT_UART_RXD
BT_UART_TXD

24 3

50_BB_HSIC_STROBE
BB_HOST_RDY
BB_DEVICE_RDY
BB_GPS_SYNC

.c

24 3

50_BB_HSIC_DATA

33 36 40

OUT

IN 33

24 3

IN 33 36 41
OUT

WLAN_UART_RTS_L

33 36 41

OUT

WLAN_UART_CTS_L

24 3

36 40

33 36 41

STOCKHOLM INTERFACES

33 36 57

25 3

IN 33 36 57

25 3

OUT

IN 33

25 3

36 57

25 3

BT_UART_RTS_L

24 3

8 3

33 36 57

OUT

24 3

8 3

36 57

OUT

24 3

8 3

36 57

IN 33

33 41

OUT

7 3

57

IN 33

33 36 41

OUT

36 57

33 36 41

OUT

7 3

57

IN 33

PCIE_DEV_WAKE

IN 33

33 57

OUT

41

GSM_TXBURST_IND

8

36 38

AP_TO_BB_MESA_ON

8

IN 33

24 3

36 38

BB_WAKE_HOST_L

8 3

IN 33

AP_WAKE_MODEM

24 3

33 36 41

OUT

OSCAR_CONTEXT_B

x

8 3

IN 33 36 38

24

57

OSCAR_CONTEXT_A

fi

5 3

IN 33

24

m

24

WLAN/OWL UART

HOST_WAKE_WLAN
WLAN_PCIE_WAKE_L
WLAN_PCIE_PERST_L
WLAN_PCIE_CLKREQ_L
90_WLAN_PCIE_REFCLK_N
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_RDN
90_WLAN_PCIE_RDP
90_WLAN_PCIE_TDN
90_WLAN_PCIE_TDP

o

IO

24

5 3

OUT

IO

27 24 3

C

33 36 57

IO

PAC_VDD_3V0

4

33 41

33 36

w

14

OUT

33 36 57

OUT

25 3

IN 33

36 57
25

33 36 57

OUT

25 3

IN 33

OUT

25 3

36 57

STOCKHOLM_UART_RTS
STOCKHOLM_UART_CTS
STOCKHOLM_UART_TXD

OUT

OUT

STOCKHOLM_UART_RXD
AP_TO_STOCKHOLM_FW_DWLD_REQ
AP_TO_STOCKHOLM_DEV_WAKE

33 36 58

IN 33 36 58
IN 33
IN 33

STOCKHOLM_TO_PMU_HOST_WAKE
OUT

AP_TO_STOCKHOLM_EN

33 36 58

IN 33 36 58

36 58
58

33 36 58

IN 33

36 58

33 36 57

w

15

33 41

36 57

OUT

B

B

BT AUDIO PCM

w

23

OUT

IO

RFFE_VIO_S2R

23

8

36 57

IN 33

BB_LAT_GPIO1
BB_LAT_GPIO2

8

a

25

IN 33

HOST_WAKE_BT

in

24

36 57

33 36 57 60

33 36

OUT

IN 33

33 36

OUT

WAKE_BT

24

33 36

36 57

OUT

24 3
3

IN 33

HOST_WAKE_WLAN

24 3

PP_VCC_MAIN

25 24 13 4

WLAN_REG_ON

ANTENNA CONTROL

.c

21 19 18 12

CLK32K_AP

AUDIO I2S

24

BB_I2S_CLK

8
8 3

8 3

IN 33

BT_PCM_OUT

24

33 36 41

OUT

BT_PCM_IN

24

36 41

BB_I2S_TXD
BB_I2S_WS

24

36 41

IN 33

BB_I2S_RXD

8 3

IN 33

BT_PCM_CLK

BT_PCM_SYNC

IN 33

36 57

IN 33

36 57

OUT

33 36 57

IN 33 36 57

36 41

OSCAR UART
8 3

BB_OTHER_RXD

8 3

BB_OTHER_TXD

IN 33

36 41

BB UART

33 36 41

OUT

8 3

8 3
8 3
8 3

BB_UART_TXD

OUT

BB_UART_RXD
BB_UART_CTS_L
BB_UART_RTS_L

33 36 41

IN 33

36 41

IN 33 36 41
OUT

33 36 41

BB DEBUG INTERFACES
8 3
7 3

BB_USB_VBUS

7 3

A

BB_CORE_DUMP
90_BB_USB_N

7 3

90_BB_USB_P

IN 33

36 41

IO
OUT
OUT

7 3

BB_JTAG_TCK

7 3

BB_JTAG_TMS

33 36 40
33 36 40

IN 33

PAGE TITLE

40

IN 33

A

36 40

Radio Subdesign Ports
DRAWING NUMBER

Apple Inc.

051-00648
REVISION

4.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

55 OF 55

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

60 OF 60

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

SIZE

D

TME logo Szukaj w ofercie
Zamknij 
Wyszukaj w ofercie 200 tys. produktów TME
TME Logo