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Preliminary
SSC2005S APPLICATION NOTE
SSC2005S
Application Note
Rev. 0.4
Rev.0.4
The contents in this application note are preliminary, and are
subject to changes without notice.
SANKEN ELECTRIC CO., LTD.
http://www.sanken-ele.co.jp
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.1
Preliminary
SSC2005S APPLICATION NOTE
CONTENTS
General Description ---------------------------------------------------------------------------3
1.Absolute Maximum Ratings --------------------------------------------------------------4
2.Recommended Operating Conditions -------------------------------------------------4
3.Electrical Characteristics ------------------------------------------------------------------5
4.Functional Block Diagram -----------------------------------------------------------------6
5.Pin-out Diagram -----------------------------------------------------------------------------6
6.Typical Application Circuit ----------------------------------------------------------------6
7.Package Diagram ---------------------------------------------------------------------------7
8.Marking Diagram ----------------------------------------------------------------------------7
9.Functional Description ---------------------------------------------------------------------8
9.1 Critical Conduction Mode: CRM -------------------------------------------------8
9.2 Startup Operation -------------------------------------------------------------------9
9.3 Restart Circuit ------------------------------------------------------------------------9
9.4 Maximum On-time setting ---------------------------------------------------------9
9.5 Zero Current Detection ---------------------------------------------------------- 10
9.6
9.7
9.8
9.9
9.10
Bottom-On Timing (Delay Time) Setting ------------------------------------ 10
Minimum Off-time Limit Function---------------------------------------------- 10
FB pin Short/Open ProtectionFunction -------------------------------------- 11
Overvoltage Protection Function (OVP) ------------------------------------- 11
Overcurrent Protection (OCP) ------------------------------------------------- 12
10.Desing Notes ----------------------------------------------------------------------------- 13
11.Example Circuit -------------------------------------------------------------------------- 18
IMPORTANT NOTES----------------------------------------------------------------------- 19
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.2
Rev. 0.4
Preliminary
SSC2005S APPLICATION NOTE
General Description
Rev. 0.4
Package
SSC2005S is a Critical Conduction Mode (CRM)
control IC for power factor correction (PFC).
Since no input voltage sensing and no auxiliary
winding for inductor current detection are required, the
IC allows the realization of low standby power and the
low number of external components. The product
achieves high cost-performance and high efficiency
PFC converter system.
SOIC8
Not to scale
Features and Benefits
Application
Inductor Current Detection
(No auxiliary winding required)
Low Standby Power
(No input voltage sensing required)
Soft-Overvoltage Protection to limit Audible Noise
Minimum Off-time Limitation Function to restrict
the Rise of Operation Frequency
High Accuracy Overcurrent detection: 0.6 V ± 5 %
Protection Functions
▫ Overcurrent Protection (OCP) ----- pulse-by-pulse
▫ High-speed Overvoltage Protection (HOVP)
--------------------------- auto restart (with Hysteresis)
▫ Soft Overvoltage Protection (SOVP) --- auto restart
▫ Thermal Shutdown Protection (TSD) --- auto restart
(with Hysteresis)
PFC Circuit up to 200 W of Output Power such as:
▫ AC/DC Power Supply
▫ Digital appliances for large size LCD/PDP television
and so forth
▫ OA equipment for Computer, Server, Monitor, and
so forth
▫ Communication facilities
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.3
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
1. Absolute Maximum Ratings
For additional details, refer to the datasheet.
The polarity value for current specifies a sink as “+”, and a source as “−”, referencing the IC.
Unless specifically noted Ta = 25 °C
Characteristic
Pins
Symbol
Rating
Unit
VCC Pin Voltage
8–6
VCC
28
V
OUT Pin Source Current
7–6
IOUT(SRC)
−500
mA
OUT Pin Sink Current
7–6
IOUT(SNK)
1000
mA
CS Pin Voltage
5–6
VCS
−5 to +0.3
V
RDLY Pin Current
4–6
IRDLY
−500 to 0
µA
RT Pin Current
3–6
IRT
−500 to 0
µA
COMP Pin Current
2–6
ICOMP
−200 to +200
µA
FB Pin Voltage
1–6
VFB
−0.3 to +5
V
Allowable Power Dissipation
―
PD
0.5
W
Operating Ambient Temperature
―
TOP
−40 to +150
°C
Storage Temperature
―
Tstg
−40 to +150
°C
Junction Temperature
―
Tj
150
°C
2. Recommended Operating Conditions
Recommended operating conditions means the operation conditions maintained normal function shown in
electrical characteristics.
The IC should be used within the recommended conditions.
Rating
Characteristic
Pins
Symbol
Unit
Min.
Max.
VCC Pin Voltage in Operation
8–6
VCC(OP)
14
26
V
RT Pin Resistance
3–6
RRT
15
47
kΩ
RDLY Pin Resistance
4–6
RRDLY
15
47
kΩ
―
Tj(OP)
−20
125
°C
Pin Resistance
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.4
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
3. Electrical Characteristics
For additional details, refer to the datasheet.
The polarity value for current specifies a sink as “+”, and a source as “−”, referencing the IC.
Unless specifically noted, VCC = 14 V, VCS = 0.1 V, Ta = 25 °C
Characteristic
Pins
Symbol
Operation Start Voltage
8–6
Operation Stop Voltage
Rating
Unit
Note
Min.
Typ.
Max.
VCC(ON)
10.5
12
13.5
V
8–6
VCC(OFF)
8.2
9.5
11.0
V
Operation Voltage Hysteresis
8–6
VCC(HYS)
―
2.5
―
V
Circuit Current in Operation
8–6
ICC(ON)
―
2.9
―
mA
Circuit Current in Non-Operation
8–6
ICC(OFF)
―
80
160
µA
VCC = 9.5 V
Maximum On-Time
7–6
tON(MAX)
―
23
―
µs
VFB = 1.5 V
RDLY = 22 kΩ
Minimum Off-Time
7–6
tOFF(MIN)
―
2.4
―
µs
RT Pin Voltage
3–6
VRT
1.3
1.5
1.7
V
Feedback Control Voltage
1–6
VFB
2.46
2.5
2.54
V
Feedback Line Regulation
1–6
VFB(LR)
−5
1.0
15
mV
FB Pin Bias Current
Error Amplifier Transconductance
Gain
COMP Pin Sink Current
1–6
IFB
―
−2
―
µA
1, 2 – 6
gm
―
103
―
µS
2–6
ICOMP(SNK)
―
40
―
µA
Power Supply Operation
Oscillation Operation
COMP Pin Source Current
2–6
ICOMP(SRC)
―
−40
―
µA
Zero Duty COMP Voltage
2–6
VCOMP(ZD)
―
0.65
―
V
―
tRS
―
50
―
µs
RDLY Pin Voltage
4–6
VRDLY
1.3
1.5
1.7
V
Zero Current Detection
Zero Current Detection Threshold
Voltage
Zero Current Detection Delay Time
5–6
VZCD
−20
−10
0
mV
5–6
tDLY(ZCD)
―
1.25
―
µs
Output Voltage (High)
7–6
VOH
―
12
―
V
Output Voltage (low)
7–6
VOL
―
0.75
―
V
Output Rise Time
7–6
tr
―
45
120
ns
COUT = 1000 pF
Output Fall Time
7–6
tf
―
20
70
ns
COUT = 1000 pF
Protection Operation
Overcurrent Protection Threshold
Voltage
Overcurrent Protection Delay Time
5–6
VCS(OCP)
−0.63
−0.6
−0.57
V
5–6
tDLY(OCP)
―
200
―
ns
5–6
ICS
―
−65
―
µA
1–6
VHOVP
―
1.09
―
× VFB
1–6
VHOVPHYS
―
100
―
mV
1–6
VSOVP
―
1.05
―
× VFB
1–6
tSOVP
―
65
―
%
1–6
VUVP
―
300
―
mV
1–6
VUVPHYS
―
100
―
mV
Restart Time
*
Drive Output
CS Pin Source Current
High-speed Overvoltage Protection
Threshold Voltage
High-speed Overvoltage Protection
Hysteresis
Soft-overvoltage Protection
Threshold Voltage
Soft-overvoltage Protection On-time
Deviation
Undervoltage Protection Threshold
Voltage
Undervoltage Protection Hysteresis
*
Thermal Shutdown Threshold
*
―
Tj(TSD)
―
150
―
°C
Thermal Shutdown Hysteresis
*
―
Tj(TSDHYS)
―
10
―
°C
* Design assurance item
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.5
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
4. Functional Block Diagram
REG
UVP
＋
8 VCC
HOVP
UVLO
＋
－
＋
－
0.3V/0.4V
1.09VFB
－
12V
/9.5V
SoftOVP
＋
－
－
7
6
R
＋
Q
OUT
GND
5
1.05VFB
CS
S
Error AMP
1
－
OCP
－
FB
＋
＋
VFB=2.5V
-0.6V
OSC
ZCD
＋
COMP 2
－
-10mV
3
4
RT
RDLY
5. Pin-out Diagram
Number
1
Name
Function
Feedback signal input and overvoltage protection
signal input and undervoltage Protection signal
input
Phase compensation
FB
FB
1
8
VCC
COMP
2
7
OUT
2
COMP
RT
3
6
GND
3
RT
RDLY
4
5
CS
4
RDLY
5
CS
6
GND
Zero current detection and delay time adjustment
Overcurrent protection and zero current detection
signal input
Ground
7
OUT
Gate drive output
8
VCC
Power supply input for control circuit
Maximum on-time adjustment
6. Typical Application Circuit
L1
VAC
DBYP
D1
VOUT
Q1
C1
VCC
Cf
2
CP
External
Power Supply
CS
U1
OUT
COMP
RT RDLY CS
3
4
5
RT
RDLY
C3
C4
Copy Right: SANKEN ELECTRIC CO., LTD.
R1
7
SSC2005S
RS
RVS1
R3
RCS
8
C2
R2
FB
GND
6
1
C6
C5 DZCS
R5
Page.6
D2
RVS2
LINE
GND
Preliminary
SSC2005S APPLICATION NOTE
7. Package Diagram
SOIC8
NOTES:
1) All liner dimensions are in millimeters
2) Pb-free. Device composition compliant with the RoHS directive.
8. Marking Diagram
8
SC2005
Part Number
SKYMD
1
Lot Number
Y is the last digit of the year (0 to 9)
M is the month (1 to 9,O,N or D)
D is a period of days
1 : 1st to 10th
2 : 11th to 20th
3 : 21st to 31st
Sanken Control Number
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.7
Rev. 0.4
Preliminary
SSC2005S APPLICATION NOTE
D1
L1
9. Functional Description
● With regard to current direction, “+” indicates
sink current (toward the IC) and “−” indicates
source current (from the IC).
● All of the parameter values used in these
descriptions are typical value, unless otherwise
specified.
Q1
C1
VAC
Rev. 0.4
IOFF
C2
D
ION
S
RCS
Figure 9-1 PFC Circuit
9.1 Critical Conduction Mode: CRM
Figure 9-1 and Figure 9-2 show the PFC circuit
and CRM operation waveform.
The IC performs the on/off operation of
switching device Q1 in critical mode (the inductor
current is zero) as shown in Figure 9-1.Thus the
low drain current variation di/dt of power
MOSFET is accomplished. Also, adjusting the
turn on timing at the bottom point of VDS free
oscillation waveform (quasi-resonant operation),
low noise, low switching loss and high efficiency
PFC circuit up to 200 W is realized.
IL=ION+IOFF
I L(AVG)
ILPEAK
1
ILPEAK
2
ION
IOFF
VDS free oscillation
Bottom on
The power MOSFET Q1 starts switching
operation by self-oscillation.
As shown in Figure 9-3, the detection voltage
RVS2 is compared with the reference voltage
VFB = 2.5 V by using error amplifier (Error AMP)
connected to FB pin. The output of the Error AMP
is averaged and phase compensated. This signal
VCOMP is compared with the ramp signal VOSC to
achieve on-time control. The off duty D OFF of
boost converter in CRM mode have the relation
of DOFF(t) = VAC(t)/VOUT and is proportional to
input voltage, where V AC(t) is the input voltage
of AC line as a function of time. In order to
boost the sinusoidal AC input voltage, the voltage
control of the system respond to low frequency
below 20 Hz in general.
As a result of aforementioned control shown
in Figure 9-4, the peak current ILPEAK of the
inductance current IL become sinusoidal. Since the
averaged input current become similar to AC
input voltage waveform by Low Pass Filter (LPF)
at input stage, high power factor is achieved.
The off-time and the bottom on timing of VDS
are set by both zero current detection of drain
current and the delay time configured by RDLY
pin resistance. Thus simple PFC circuit with
inductor having no auxiliary winding is realized.
Q1 VDS
OFF
OFF
ON
Turn on delay time
ON
Figure 9-2 CRM operation and bottom on operation
L1
D1
VOUT
RVS1
U1
Q1
7
PWM COMP
VCOMP
OUT
Error AMP
FB 1
RVS2
Q R
S
VSET
VOSC
ZCD COMP
VZCD= -10mV
VFB
= 2.5V
2
RS
COMP
CP
OSC
CS
5
RT
3
RDLY
4
C6
GND
6
CS
RCS
R5
C5 DZCS
RT
C3
RDLY C4
LINE GND
Figure 9-3 CRM Control Operation
√2×VACRMS
VCOMP
VAC(t)
VOSC
ILPEAK
IL(t)
VSET
√2×IACRMS
IAC(t)
OUT pin voltage
VAC(t)
ILPEAK(t)
IL(AVG) (t)
Figure 9-4 CRM Waveforms
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Page.8
tON tOFF
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
9.2 Startup Operation
U1
Figure 9-5 shows the VCC pin peripheral circuit.
VCC pin is a control circuit power supply input. The
voltage is supplied by using external power supply. As
shown in Figure 9-6, when VCC pin voltage rises to
the Operation Start Voltage VCC(ON) = 12 V, the control
circuit starts operation.
When the VCC pin voltage decreases to
VCC(OFF) = 9.5 V, the control circuit stops operation by
Undervoltage Lockout (UVLO) circuit, and reverts to
the state before startup.
When VCC pin and the external power supply are
distant from each other, placing a film capacitor Cf
(approximately 0.1 μF) between the VCC pin and the
GND pin is recommended.
8
External
Power
Supply
Cf
3
RS
VCC
COMP
CP
GND
6
CS
Figure 9-5 VCC pin peripheral circuit
Since the COMP pin voltage rises from zero during
startup period, the VCOMP signal shown in Figure 9-3
gradually rises from low voltage. The on-width
gradually increased to restrict the rise of output power
by the Softstart Function. Thus the stress of the
peripheral component is reduced.
ICC
STOP
Startup
ICC（ON）
= 2.9mA
9.3 Restart Circuit
Since the IC is self-oscillation type, when the
duration of off-state of OUT pin voltage exceeds the
Restart Time tRST = 50 μs, OUT pin outputs on-signal
as a trigger of switching operation and switching
operation starts. At startup and intermittent oscillation
period at light load, the restart circuit is activated and
the switching operation is stabilized.
Since tRST = 50 μs corresponds to the operational
frequency of 20 kHz, set the inductance value high
enough compared to this operational frequency. In
normal operation, off-time is determined by the zero
current detection circuit.
VCC Pin
Voltage
9.5V
12V
VCC（OFF）
VCC（ON）
Figure 9-6 VCC pin voltage and ICC
In order to reduce audible noise of transformer at
transient state, the IC has the Maximun on-time,
tON(MAX). This tON(MAX) is adjusted by the resistance RT
which is connected to RT pin.
Figure 9-7 shows the relation between RT value and
tON(MAX in IC design.
The tON(MAX) is made into a larger value than
tON(SET)MAX that is result of Equation (1) in page13
“Inductor”
tON(MAX) (μs)
9.4 Maximum On-time setting
50
45
40
35
30
25
20
15
10
5
0
22 kΩ
23 µs
Measurement condition of tON(MAX)
(Electrical Characteristics)
0
10
20
30
RT (kΩ)
40
Figure 9-7 RT vs. tON(MAX) (IC design)
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Page.9
50
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
9.5 Zero Current Detection
The off-time and the bottom on timing of VDS are set by both zero current detection of drain current and the delay
time. Thus simple PFC circuit with inductor having no auxiliary winding is realized.
As shown in Figure Figure 9-8, when the voltage of detection resistor RCS become smaller than the absolute value
of Zero Current Detection Voltage VZCD = −10 mV, OUT pin outputs on-signal after the delay time which is
determined by the resistor connected to RDLY pin.
VDS
L1
D1
VOUT
ID
C1
Q1
7
0
U1
OUT
OUT pin voltage
ZCD COMP
VCS(ZC)= －10mV
IL
OSC
CS
5
RT
3
0
GND
RDLY
4
CS pin voltage
6
0
RCS
VZCD
R5
C5 DZCS RT C3 RDLY C4 LINE GND
Turn on delay time
Figure 9-8 Zero current detection
9.6 Bottom-On Timing (Delay Time) Setting
2.5
2.0
tDLY (μs)
Adjusting the output timing of the on signal to the
bottom point of VDS free oscillation waveform
(quasi-resonant operation), low noise, low switching
loss and high efficiency PFC circuit is realized.
Figure 9-9 shows the relation between RDLY value
and the designed delay time, tDLY. As shown in Figure
9-10, adjust the turn on timing to the bottom point of
VDS free oscillation waveform.
3.0
1.5
1.0
0.5
0.0
0
10
20
30
RDLY (kΩ)
40
50
60
Figure 9-9 RDLY vs. tDLY (IC design)
9.7 Minimum Off-time Limit Function
In order to prevent the rise of operation frequency at
light load, the IC have the Minimum Off-Time
tOFF(MIN) = 2.4 μs.
If this Minimum Off-Time is shorter than the
freewheeling time of inductor, the IC operates in
discontinuous condition mode (DCM).
tDLY
Bottom-on
Free oscillation
Proper delay time
Delay time is Long.
Delay time is short.
Make RDLY value larger. Make RDLY value smaller.
Figure 9-10 VDS turn on timing
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Page.10
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
9.8 FB pin Short/Open ProtectionFunction
VOUT
U1
Abnormal rise of VOUT may occur by the lowering
of FB pin voltage due to the malfunctions in
feedback loop such as open of RVS1 or short of RVS2.
In this abnormal operation, Overvoltage Protection
function is disabled.
PWM COMP
Error AMP
IFB
FB 1
VFB
= 2.5V
In order to prevent this, Under Voltage Protection
function is implemented (Figure 9-11).
When FB pin voltage becomes lower than
VUVP = 300 mV by malfunction in feedback loop,
OUT pin output becomes off immediately and
switching operation stops. This prevents the rise of
output voltage. When the cause of malfunction is
removed and the FB pin voltage rises to 400 mV, the
switching operation restarts.
VOSC SOVP
RVS1
RVS2
C6
VSOVP
= 1.05×VFB
HOVP
UVP
When FB pin is open, FB pin voltage increases by
constant current circuit, IFB = –2 µA of inside of FB
pin.
When this voltage becomes higher than
VHOVP = 1.09 × VFB, the OUT pin voltage becomes
Low state and stops switching operation.
When the cause of abnormal is removed and the IC
becomes normal control, the switching operation
starts.
GND
6
VHOVP
= 1.09×VFB
VHOVPHYS
= 100mV
VUVP
= 300mV
VUVPHYS
= 100mV
LINE GND
Figure 9-11 Overvoltage Protection
Detection Circuit
9.9 Overvoltage Protection Function (OVP)
The IC has two OVP activation methods: Soft
Overvoltage Protection (SOVP) and High-speed
Overvoltage Protection (HOVP).
FB pin voltage
VSOVP
● Soft Overvoltage Protection (SOVP)
Figure 9-12 shows the waveforms of Soft
Overvoltage Protection (SOVP) operation.
The rise of output voltage is restricted by reducing
on-time to 65 % when FB pin voltage reaches to
VSOVP (1.05 times the reference voltage VFB = 2.5
V).
SOVP function prevents the rise of output voltage
with continuing the switching operation. Thus the
generation of audible noise is suppressed.
VOSC
Positive terminal voltage of PWM COMP
OUT pin voltage
Figure 9-12 Soft Overvoltage Protection (SOVP) operation
● High-speed Overvoltage Protection (HOVP)
Figure 9-13 shows the waveforms of High-speed
Overvoltage Protection (HOVP) operation.
In case that SOVP function cannot prevent the rise
of the output voltage and the FB pin voltage
reaches to VHOVP (1.09 times the reference
voltage VFB = 2.5 V), OUT pin voltage become
Low immediately and the switching operation
stops. As a result, the rise of output voltage is
prevented.
When the cause of the overvoltage is removed and
FB pin voltage decreases to the VHOVPHYS = 100
mV, the switching operation starts.
FB pin voltage
VHOVP
VHOVPHYS
OUT pin voltage
Figure 9-13 High-speed Overvoltage Protection (HOVP) operation
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Page.11
Preliminary
SSC2005S APPLICATION NOTE
9.10 Overcurrent Protection (OCP)
L1
Figure 9-14 shows the CS pin peripheral circuit.
Overcurrent Protection Function (OCP) detects
inductance current IL by the current detection resistor,
RCS, on pulse-by-pulse basis. When the detection
voltage, VRCS, increases to an absolute value of OCP
Threshold Voltage, VCS(OCP) = −0.6 V, the output of
OUT pin is turned off and the output power.
As shown in Figure 9-14, CR filter (R5 and C5),
and DZCS (zenar diode) are connected to CS pin.
D1
Q1
7
VOUT
C2
U1
OUT
VCS(ZC)
ZCD COMP
= －10mV
VCS(OCP)
= －0.6V
When the power MOSFET turns off, surge current
may flow through the power MOSFET. As a result
of OCP detection of the surge current, it would cause
a malfunction. Thus a CR filter (R5 and C5) is
inserted at the CS pin.
When the rush current charges the output
capacitor C2 at startup, RCS voltage may become
high. In order to limit the CS pin voltage within the
maximum absolute rating of −5 V, DZCS is placed.
Copy Right: SANKEN ELECTRIC CO., LTD.
Rev. 0.4
OCP COMP
CS
5
VRCS
GND
6
RCS
R5
C5 DZCS
LINE GND
Figure 9-14 CS pin peripheral circuit
Page.12
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
10. Desing Notes
10.1 Parameter Design
Inductor
Apply proper design margin to temperature rise by core loss and copper loss.
Inductance LP of PFC in CRM mode are calculated as follows:
1) Operational Frequency, fSW(SET) and Maximum On-time, tON(SET)MAX
At first, determine fSW(SET) that is minimum operational frequency at the peak of the AC line waveform. The
frequency becomes higher with lowering the input voltage. The frequency at the peak of the AC line waveform,
fSW(SET) should be set above frequency of 25 kHz.
The tON(SET)MAX at fSW(SET) is calculated by Equation (1). The tON(MAX) described in “9.4 Maximmum on-time
setting” should be set above tON(SET)MAX.
t ON (SET) MAX
Where,
VOUT
VACRMS(MIN)
VOUT 2 VACRMS( MIN)
(s)
f SW(SET) VOUT
----- (1)
: Out put voltage (V)
: Maximum AC input voltage rms value (V)
2) Output Voltage, VOUT
The output voltage VOUT of boost-converter is higher than input voltage.
Set the voltage of VOUT higher than the peak value of the AC input voltage by approximately 10 V, according to
following equation:
----- (2)
VOUT 2 VACRMS( MAX) 10 )
(V
Where,
VACRMS(MAX) : Maximum AC input voltage rms value (V)
3) Inductance, LP
Substituting both minimum and maximum of AC input voltage to V ACRMS, choose a smaller one as LP value.
LP is calculated as follows:
LP
VACRMS 2 t ON (SET) MAX
(H)
2 POUT
----- (3)
Where,
VACRMS : AC input voltage rms value (V)
POUT
: Output Power (W)
η
: Efficiency of PFC (In general, the range of η is 0.90 to 0.97, depending on on-resistance of power
MOSFET RDS(ON) and forward voltage drop of rectifier diode VF.)
4) Inductor peak current, ILP
ILP is peak current of the peak at the minimum AC input voltage.
ILP calculated as follows:
ILP
2 2 POUT
( A)
η VACRMS( MIN)
-------- (4)
Proper margin against peak current, ILP, is necessary in inductor design in order to avoid magnetic saturation.
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.13
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
FB pin peripheral circuit (Output voltage detection)
Figure 10-1 shows the FB pin peripheral circuit.
The output voltage VOUT is set using RVS1 and
RVS2. It is expressed by the following formula:
V
VOUT FB I FB R VS1 VFB ------ (5)
R
VS 2
Where,
VFB : Feedback reference voltage = 2.5 V
IFB : Bias current = –2 µA
RVS1, RVS2 : Combined resistance to set VOUT
L1
D1
VOUT
U1
Q1
7
OUT
FB 1
Q R
S
VSET
VOSC
ZCD COMP
VZCD= -10mV
RVS2
VFB
= 2.5V
2
RS
COMP
CP
OSC
Since RVS1 have applied high voltage and have
high resistance value, RVS1 should be selected
from resistors designed against electromigration
or use a combination of resistors for that.
The value of capacitor C6 between FB pin and
GND pin is set approximately 100 pF to 3300
pF, in order to reduce the switching noise.
RVS1
IFB
Error AMP
PWM COMP
VCOMP
CS
5
RT
3
RDLY
4
GND
6
C6
CS
RCS
R5
C5 DZCS
RT
C3
RDLY C4
LINE GND
Figure 10-1 IC peripheral circuit
COMP pin peripheral circuit : RS, CS, CP
Figure 10-1 shows the IC peripheral circuit.
The FB pin voltage is induced into internal Error AMP. The output voltage of the Error AMP is averaged by the
COMP pin. The on-time control is achieved by comparing the signal VCOMP and the ramp signal VOSC.
CS and RS adjust the response speed of changing on-time according to output power.
The typical value of CS and RS are 1 μF and 10 kΩ, respectively. When CS value is too large, the response becomes
slow at dynamic variation of output and the output voltage decreases.
Since CS and RS affect on the soft-start period at startup, adjustment is necessary in actual operation.
The ripple of output detection signal is averaged by CP. When the CP value is too small, the IC operation may
become unstable due to the output ripple. The value of capacitor CP is approximately 0.47 μF.
RT pin peripheral circuit : RT ,C3
RT shown in Figure 10-1 is for the adjustment of maximum on-time, tON(MAX).
The tON(MAX) is made into a larger than tON(SET)MAX value which is the result of Equation (1) in page13 “Inductor.”
The value of capacitor C3 in parallel with R5 is approximately 0.01 μF, in order to reduce the switching noise.
RDLY pin peripheral circuit : RDLY, C4
RDLY shown in Figure 10-1 is for the adjustment of the turn on timing of VDS.
As shown in “9.6 Bottom-On Timing (Delay Time) Setting,” adjust the turn on timing to the bottom point of VDS
free oscillation waveform.
The value of capacitor C4 is approximately 0.01 μF, in order to reduce the switching noise.
CS pin peripheral circuit
RCS shown in Figure 10-1 is current sensing resistor.
RCS is calculated using the following Equation (6), where Overcurrent Protection Threshold Voltage VCS(OCP) is −0.6 V
and ILP is calculated using Equation (4).
VCS ( OCP )
-------- (6)
R CS
( )
I LP
Both CR filter (R5 and C5) and DZCS(zenar diode) are connected to CS pin.
R5 value of approximately 47 Ω is recommended, since the CS Pin Source Current affects the accuracy of OCP
detection. C5 value is reccommended to be calculated by using following formula in which cut-off frequency of
CR filter (C5 and R5) is approximately 1 MHz.
1
-------- (7)
C5
2 π 1MHz R 5
In case R5 value is 47 Ω, C5 value is approximately 3300 pF.
DZCS value of approximately 3.9 V is recommended. The value should be higher than VCS(OCP) and be lower than
CS pin absolute maximum rating of −5 V.
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Page.14
Preliminary
SSC2005S APPLICATION NOTE
OUT pin peripheral circuit (Gate drive circuit)
Figure 10-2 shows the OUT pin peripheral circuit.
The OUT pin is the gate drive output which can drive the
external power MOSFET directly.
The maximum output voltage of OUT pin is the VCC pin
voltage. The maximum current is −500 mA for source and 1
A for sink, respectively.
R1 is for source current limiting. Both R2 and D2 are for
sink current limiting. The values of these components are
adjusted to decrease the ringing of GATE pin voltage and
the EMI noise. The reference value is several ohms to
several dozen ohms.
R3 is used to prevent malfunctions due to steep dv/dt at
turn-off of the power MOSFET, and the resistor is
connected near the MOSFET, between the gate and source.
The reference value of R3 is from 10 kΩ to 100 kΩ.
R1, R2, D2 and R3 are affected by the printed circuit board
trace layout and the power MOSFET capacitance. Thus the
optimal values should be adjusted under actual operation of
the application.
Rev. 0.4
L1
U1
OUT
Q1
R1
7
R2
D2
GND
6
R3
RCS
Figure 10-2 OUT pin peripheral circuit
8
External
Power
Supply
VCC pin peripheral circuit
VCC
U1
C7
Figure 10-3 shows the VCC pin peripheral circuit.
VCC pin is power supply input. VCC pin is supplied from
an external power.
The value of capacitor C7 is set approximately 0.47 μF, in
order to reduce the switching noise.
GND
6
Figure 10-3 VCC pin peripheral circuit
Power MOSFET : Q1
Choose a power MOSFET having proper margin of VDSS against output voltage VOUT.
The size of heat sink is chosen taking into account some loss by switching and ON resistance of MOSFET.
The RMS value of drain current, IDRMS is expressed as follows:
I DRMS＝
2 2 POUT
1 4 2 VACRMS(MIN)
(A)
－
VACRMS ( MIN )
6
9 π VOUT
-------------- (8)
The loss PRDS(ON) by on-resistance RDS(ON) of power MOSFET is calculated as follows:
PRDS ( ON ) I DRSM R DS( ON )125
C
2
-------------- (9)
where,
RDS(ON)125°C : ON resistance of MOSFET at Tch = 125 °C
Boost Diode : DFW
Choose a boost diode having proper margin of a peak reverse voltage VRSM against output voltage VOUT.
A fast recovery diode is recommended to reduce the switching noise and loss. Please ask our staff about our lineup.
The size of heat sink is chosen taking into account some loss by VF and recovery current of boost diode.
The loss of VF, PDFW is expressed as follows:
------------ (10)
P DFW VF I OUT (W)
Where,
VF : Forward voltage of boost diode (V)
IOUT : Out put current (A)
Bypass Diode : DBYP
Bypass diode protects the boost diode from a large current such as an inrush current. A high surge current tolerance
diode is recommended. Please ask our staff about our lineup.
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Page.15
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
Output Capacitor : C2
Apply proper design margin to accommodate the ripple current, the ripple voltage and the temperature rise. Use of
high ripple current and low impedance types, designed for switch-mode power supplies, is recommended,
depending on their purposes.
In order to obtain C2 value Co, caalculate both Equation (11) and (12) described in following and select a larger
value.
1) Given the C2 ripple voltage VOUTRIPPLE (VPP) (10 VPP for example), CO is expressed as follows:
CO
I OUT
(F)
2 π f LINE V OUTRIPPLE
----- (11)
where,
fLINE : Line frequency (Hz)
IOUT : Output current (A)
The C2 voltage is expressed as follows:
V
VC 2 VOUT OUTRIPPLE
2
When the output ripple is high, the VC2 voltage may reach to High Speed or Low Speed overvoltage Protection
voltage (VHOVP or VSOVP) in near the maximum value of VC2, or input current waveform may be distorted due to
the stop of the boost operation in near the minmum value of VC2. It is necessary to select large CO value or change
the setting of output voltage (boost voltage)
2) Given the output hold time as tHOLD (s), CO is expressed as follows:
CO
V
2 POUT t HOLD
2
2
OUT VOUT ( MIN )
(F)
----- (12)
where,
tHOLD
: Output hold time (s)
VOUT(MIN) : Minmum output voltage of C2 during output hold (V)
η
: Efficiency
In case tHOLD = 20 ms, PO = 200 W, η = 90 % and the output voltage = 330 V to 390 V, CO value is derived as
205 μF. Thus, CO value of approximately 220 μF is connected.
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.16
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
10.2 PCB Trace Layout
PCB circuit trace design and component layout affect proper
functioning during operation, EMI noise, and power
dissipation. Therefore, wide, short traces, and small circuit
loops are important to reduce line impedance where high
frequency current traces form a loop as shown in Figure 10-5.
In addition, local GND and earth ground traces affect radiated
EMI noise, and the same measures should be taken into
account.
Switching mode power supplies consist of current traces
with high frequency and high voltage, and thus trace design
and component layouts should be done to comply with all
safety guidelines.
Furthermore, because an integrated power MOSFET is
being used as the switching device, take account of the
positive thermal coefficient of RDS(ON) when preparing a
thermal design.
Boost Type
Figure 10-4 High-frequency current loops
(hatched areas)
Figure 10-6 shows a circuit layout design example.
(1) Main Circuit Trace
This trace contains switching current, and thus it should be as wide and short as possible.
(2) GND Trace Layout
In order to reduce the effect of switching current in main circuit trace, the control ground circuit and the main
circuit ground should be connected at point A in Figure 10-6. Control ground should be connected by dedicated
trace.
(3) Current Detection Resistor RCS Trace Layout
In order to reduce the noise in current detection, the connection between R CS and R5 which is connected to CS
pin should be dedicated trace.
(4) Peripheral Component of IC
Place the components for phase compensation connected to COMP pin close to both COM pin and GND pin.
L1
VAC
DBYP
D1
VOUT
C1
R2
8
External
Power Supply
Cf
D2
7
OUT
U1
VCC
C2
Q1
R1
R3
RVS1
RVS2
LINE
GND
RCS
A
SSC2005S
2
RS
CP
COMP
RT
3
CS
RT
FB
RDLY
4
C3
C4
CS
5
C5
GND
6
ZDCS
1
C6
R5
RDLY
Main power circuit trace
GND trace of the IC
Figure 10-5 Example of connection of peripheral components
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Page.17
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
11. Example Circuit
The circuit is an example. Adjustment is necessary in actual operation.
Example of Specification
AC input voltage
Input power
85 V to 265 V
200 W
Operation frequency
(at maximum AC input)
60 kHz (AC 265 V)
Output voltage
398 V
Example of Schematic
Inrush Current
Limit Circuit
VOUT
160µH
650V 13A
0.29Ω Q1
C1
0.68µF
(450V)×2p
8
0.47µF
Cf
10kΩ
RS
CS
1µF
U1
VCC
R3
100kΩ
OUT
7
100Ω
R1
1
R2
D2
10Ω
SSC2005S
2
Fuse
CP
COMP
FB
RT RDLY CS
3
4
5
GND
6
C6
1000pF
RDLY
C5 ZDCS
0.47µF RT
22kΩ 22kΩ 3300pF Vz=3.9V
C3
C4
0.01µF 0.01µF
L
VAC
N
FMNS-1106S
D1
DBYP
RM10A
L1
External
Power
Supply
Copy Right: SANKEN ELECTRIC CO., LTD.
R5
47Ω
Figure 11-1 Example Circuit
Page.18
RCS
180µF
(450V)
C2
CV
470pF
(1kV)
0.15Ω
(2W)×2p
RVS1
470k
+560k×3s
+680k×2s
RVS2
33k//680k
LINE
GND
Preliminary
SSC2005S APPLICATION NOTE
Rev. 0.4
IMPORTANT NOTES
The contents in this document are subject to changes, for improvement and other purposes, without notice.
Make sure that this is the latest revision of the document before use.
Application and operation examples described in this document are quoted for the sole purpose of
reference for the use of the products herein and Sanken can assume no responsibility for any infringement
of industrial property rights, intellectual property rights or any other rights of Sanken or any third party
which may result from its use.
Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure
and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are
requested to take, at their own risk, preventative measures including safety design of the equipment or
systems against any possible injury, death, fires or damages to the society due to device failure or
malfunction.
Sanken products listed in this document are designed and intended for the use as components in general
purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication
equipment, measuring equipment, etc.).
When considering the use of Sanken products in the applications where higher reliability is required
(transportation equipment and its control systems, traffic signal control systems or equipment, fire/crime
alarm systems, various safety devices, etc.), and whenever long life expectancy is required even in general
purpose electronic equipment or apparatus, please contact your nearest Sanken sales representative to
discuss, prior to the use of the products herein.
The use of Sanken products without the written consent of Sanken in the applications where extremely
high reliability is required (aerospace equipment, nuclear power control systems, life support systems,
etc.) is strictly prohibited.
In the case that you use Sanken products or design your products by using Sanken products, the reliability
largely depends on the degree of derating to be made to the rated values. Derating may be interpreted as a
case that an operation range is set by derating the load from each rated value or surge voltage or noise is
considered for derating in order to assure or improve the reliability. In general, derating factors include
electric stresses such as electric voltage, electric current, electric power etc., environmental stresses such
as ambient temperature, humidity etc. and thermal stress caused due to self-heating of semiconductor
products. For these stresses, instantaneous values, maximum values and minimum values must be taken
into consideration.
In addition, it should be noted that since power devices or IC’s including power devices have large
self-heating value, the degree of derating of junction temperature affects the reliability significantly.
When using the products specified herein by either (i) combining other products or materials therewith or
(ii) physically, chemically or otherwise processing or treating the products, please duly consider all
possible risks that may result from all such uses in advance and proceed therewith at your own
responsibility.
Anti radioactive ray design is not considered for the products listed herein.
Sanken assumes no responsibility for any troubles, such as dropping products caused during transportation
out of Sanken’s distribution network.
The contents in this document must not be transcribed or copied without Sanken’s written consent.
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Page.19