Nie ukrywam, że kupiłem zasilacz, ale ten kupiony tylko upalił mi kilka bezpieczników we wtyczce (wtyczka brytyjska - one maja takie) i wywalił parę razy S-ke nawet raz C-10 na korytarzu stąd najprawdopodobniej on sam jest uszkodzony a usterka widocznie leży w innym miejscu. Trzeba sprawdzić zmierzyć czy pojawia się napięcie sygnał załączający dalszą sekcję zasilacza tak aby pojawiły się dalsze napięcia nie tylko standby(czerwoan dioda) Dzięki za wskazówki. Jak popatrzyłem na zasilacz to faktycznie ma pozycję P_ON w główniej wtyczce do płyty głównej czyli zgodnie z tym co napisałeś zastosowałem się do porady i przemierzyłem płytę. Znalazłem manuala do tego TV, są małe różnice. w porównaniu z powyższym pomimo, że główna w specyfikacji to rozdzielczość, ale za to można odczytać symbole układów. Na 45 str jest schemat wtyczki i wyjść. Sprawdziłem wszystkie elementy wokół wtyczki - te na napięcie 12 i 24 V oraz inne są ok tj pomiar daje bardzo zbliżoną wartość do tej w schemacie. Test diody na tranzystorach również podaje napięcia rzędu 0,6 i 2,2-2,5V. (baza emiter i baza kolektor) Na stronie 47 jest schemat układu IC3000. Jeśli poprawnie odczytuję to z wtyczki poprzez powyższe elementy trafia do niego napięcie 3,5V. Napięcie na 36 i 48 nóżce jest 3,5V natomiast na nóżce 4 jest punkt pomiarowy i rezystor - przed i za oraz w punkcie jest napięcie 0,6V. Czy to wskazywałoby, że ten układ sprawia problem czy też napięcie to wynosi tyle w momencie włączenia urządzenia?
Internal Use Only
North/Latin America
http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
OLED TV
SERVICE MANUAL
CHASSIS : ED59E
MODEL : 55EG920*
55EG920*-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL69290302 (1507-REV00)
Printed in Korea
CONTENTS
CONTENTS ............................................................................................... 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS..................................................................... 4
SPECIFICATION........................................................................................ 6
ADJUSTMENT INSTRUCTION............................................................... 15
BLOCK DIAGRAM................................................................................... 28
EXPLODED VIEW ................................................................................... 38
SCHEMATIC CIRCUIT DIAGRAM ............................................ APPENDIX
TROUBLE SHOOTING GUIDE ................................................. APPENDIX
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-3-
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. lways unplug the receiver AC power cord from the AC power
A
source before;
a. emoving or reinstalling any component, circuit board
R
module or any other receiver assembly.
b. isconnecting or reconnecting any receiver electrical plug
D
or other electrical connection.
c. onnecting a test substitute in parallel with an electrolytic
C
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. est high voltage only by measuring it with an appropriate
T
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by " drawing an arc " .
3. o not spray chemicals on or near this receiver or any of its
D
assemblies.
4. nless specified otherwise in this service manual, clean
U
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication
of contacts in not required.
5. o not defeat any plug/socket B+ voltage interlocks with which
D
receivers covered by this service manual might be equipped.
6. o not apply AC power to this instrument and/or any of its
D
electrical assemblies unless all solid-state device heat sinks
are correctly installed.
7. lways connect the test receiver ground lead to the receiver
A
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. se with this receiver only the test fixtures specified in this
U
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. mmediately before handling any semiconductor component or
I
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2. fter removing an electrical assembly equipped with ES
A
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. se only a grounded-tip soldering iron to solder or unsolder
U
ES devices.
4. se only an anti-static type solder removal device. Some solU
der removal devices not classified as “anti-static” can generate
electrical charges sufficient to damage ES devices.
5. o not use freon-propelled chemicals. These can generate
D
electrical charges sufficient to damage ES devices.
6. o not remove a replacement ES device from its protective
D
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. mmediately before removing the protective material from the
I
leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will
be installed.
CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. inimize bodily motions when handling unpackaged replaceM
ment ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. se a grounded-tip, low-wattage soldering iron and appropriU
ate tip size and shape that will maintain tip temperature within
the range or 500 °F to 600 °F.
2. se an appropriate gauge of RMA resin-core solder composed
U
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. horoughly clean the surfaces to be soldered. Use a mall wireT
bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. se the following unsoldering technique
U
a. llow the soldering iron tip to reach normal temperature.
A
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. uickly draw the melted solder with an anti-static, suctionQ
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. se the following soldering technique.
U
a. llow the soldering iron tip to reach a normal temperature
A
(500 °F to 600 °F)
b. irst, hold the soldering iron tip and solder the strand
F
against the component lead until the solder melts.
c. uickly move the soldering iron tip to the junction of the
Q
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. losely inspect the solder area and remove any excess or
C
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. esolder and straighten each IC lead in one operation by
D
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. raw away the melted solder with an anti-static suction-type
D
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. arefully insert the replacement IC in the circuit board.
C
2. arefully bend each IC lead against the circuit foil pad and
C
solder it.
3. lean the soldered areas with a small wire-bristle brush.
C
(It is not necessary to reapply acrylic coating to the areas).
" Small-Signal " Discrete Transistor
Removal/Replacement
1. emove the defective transistor by clipping its leads as close
R
as possible to the component body.
2. end into a " U " shape the end of each of three leads remainB
ing on the circuit board.
3. end into a " U " shape the replacement transistor leads.
B
4. onnect the replacement transistor leads to the corresponding
C
leads extending from the circuit board and crimp the " U " with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. arefully remove the transistor from the heat sink of the circuit
C
board.
4. nsert new transistor in the circuit board.
I
5. older each transistor lead, and clip off excess lead.
S
6. eplace heat sink.
R
Diode Removal/Replacement
1. emove defective diode by clipping its leads as close as posR
sible to diode body.
2. end the two remaining leads perpendicular y to the circuit
B
board.
3. bserving diode polarity, wrap each lead of the new diode
O
around the corresponding lead on the circuit board.
4. ecurely crimp each connection and solder it.
S
5. nspect (on the circuit board copper side) the solder joints of
I
the two " original " leads. If they are not shiny, reheat them and
if necessary, apply additional solder.
3. older the connections.
S
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or " lift-off " the board. The
following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
1. arefully remove the damaged copper pattern with a sharp
C
knife. (Remove only as much copper as absolutely necessary).
2. arefully scratch away the solder resist and acrylic coating (if
c
used) from the end of the remaining copper pattern.
3. end a small " U " in one end of a small gauge jumper wire and
B
carefully crimp it around the IC pin. Solder the IC connection.
4. oute the jumper wire along the path of the out-away copper
R
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. emove the defective copper pattern with a sharp knife.
R
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. race along the copper pattern from both sides of the pattern
T
break and locate the nearest component that is directly connected to the affected copper pattern.
3. onnect insulated 20-gauge jumper wire from the lead of the
C
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Fuse and Conventional Resistor
Removal/Replacement
1. lip each fuse or resistor lead at top of the circuit board hollow
C
stake.
2. ecurely crimp the leads of replacement component around
S
notch at stake top.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This specification is applied to the OLED TV with ED59E
chassis.
3. Test method
2. Requirement for Test
Each part is tested as below without special appointment.
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC specification
- Wireless : Wireless HD Specification (Option)
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) pecification and performance of each parts are followed
S
each drawing and specification by part number in
accordance with BOM.
5) he receiver must be operated for about 20 minutes prior to
T
the adjustment.
4. Model General Specification
No.
Item
Specification
Remarks
DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) : 26 countrie
Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria,
France, Spain, , Belgium, Luxemburg, Greece, Czech, Turkey, Morocco,
Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Albania,
Bosnia, Slovakia, Belarus
DTV (MPEG2/4, DVB-T2) :11 countries
UK(Ireland), Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan,
Russia, Italy, Croatia, Serbia
DTV (MPEG2/4, DVB-C) : 37 countries
Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria,
France, Spain, Italy, Belgium, Russia, Luxemburg, Greece, Czech, Croatia, Turkey, Morocco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal,
Romania, Albania, Bosnia, Serbia, Slovakia, Belarus, UK, Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan
1
Market
EU/CIS(PAL Market-37Countries)
DTV (MPEG2/4,DVB-S) : 37 countries
Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria,
France, Spain,Belgium, Luxemburg, Greece, Czech, Turkey, Morocco,
Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Albania,
Bosnia, Slovakia, Belarus, UK(Ireland), Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan,Russia, Italy, Croatia, Serbia
Supported satellite : 35 satellites
ABS1 75.0E, AMOS 4.0W, ASIASAT3S 105.5E, ASTRA 19.2E, ASTRA
23.5E, ASTRA 28.2E, ASTRA 4.8E, ATLANTIC BIRD2 8.0W, ATLANTIC BIRD3 5.0W, BADR 26.0E, DIRECTV-1R 56.0E, EUROBIRD 9A
9.0E, EUROBIRD3 33.0E, EUTELSAT 36 A/B 36.0E, EUTELSAT W2A
10.0E, EUTELSAT W3A 7.0E, EUTELSAT7WA 7.3WEUTELSAT 16.0E,
EXPRESS AM1 40.0E, EXPRESS AM3 140.0E, EXPRESS AM33 96.5E,
HELLASSAT 39.0E, HISPASAT 1CDE 30.0WHOTBIRD 13.0E, INTELSAT10 & 7 68.5E, INTELSAT15 85.2E, INTELSAT1R 50.0W, INTELSAT903 33.5W, INTELSAT904 60.0E, NILESAT 7.0W, NSS12 57.0E,
THOR 0.8W, TURKSAT 42.0E, YAMAL201 90.0E, OTHER
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-6-
LGE Internal Use Only
No.
2
3
Item
Broadcasting system
Program coverage
Specification
Remarks
1)PAL/SECAM B/G/I/D/K,
SECAM L/L’
2)DVB-T/T2, C, S/S2
1 ) Digital TV
- VHF, UHF
- C-Band,Ku-Band
2) Analogue TV
- VHF : E2 to E12
- UHF : E21 to E69
- CATV : S1 to S20
- HYPER : S21 to S47
4
Receiving system
Analog : Upper Heterodyne
Digital : COFDM, QAM
5
Input Voltage
► DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK
: 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK
: 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
► DVB-T2
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation :
16QAM, 64-QAM, 128-QAM and 256-QAM
► DVB-S/S2
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
AC 100 ~ 240V 50/60Hz
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-7-
LGE Internal Use Only
5. External Input Support Format
5.1. Component (Y, CPB, PR)
No
Resolution
H-freq.(kHz)
V-freq.(Hz)
Pixel clock
Proposed
1.
720*480
15.73
60
13.5135
SDTV ,DVD 480I
2
720*480
15.73
59.94
13.5
SDTV ,DVD 480I
3.
720*480
31.50
60
27.027
SDTV 480P
4
720*480
31.47
59.94
27.0
SDTV 480P
5
1280*720
45.00
60.00
74.25
HDTV 720P
6
1280*720
44.96
59.94
74.176
HDTV 720P
7
1920*1080
33.75
60.00
74.25
HDTV 1080I
8
1920*1080
33.72
59.94
74.176
HDTV 1080I
9
1920*1080
67.500
60
148.50
HDTV 1080P
10
1920*1080
67.432
59.94
148.352
HDTV 1080P
11
1920*1080
27.000
24.000
74.25
HDTV 1080P
12
1920*1080
26.97
23.976
74.176
HDTV 1080P
13
1920*1080
33.75
30.000
74.25
HDTV 1080P
14
1920*1080
33.71
29.97
74.176
HDTV 1080P
5.2. HDMI Input
(1) DTV mode
No
Resolution
H-freq.(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
1
640*480
31.46
59.94
25.13
2
640*480
31.50
60.00
25.13
SDTV 480P
3
720*480
15.73
59.94
13.50
SDTV, DVD 480I(525I)
4
720*480
15.75
60.00
13.51
SDTV, DVD 480I(525I)
5
720*576
15.62
50.00
13.50
SDTV, DVD 576I(625I) 50Hz
6
720*480
31.47
59.94
27.00
SDTV 480P
7
720*480
31.50
60.00
27.03
SDTV 480P
8
720*576
31.25
50.00
27.00
Proposed
SDTV 480P
SDTV 576P
9
1280*720
44.96
59.94
74.18
HDTV 720P
10
1280*720
45.00
60.00
74.25
Spec. out but display
HDTV 720P
11
1280*720
37.50
50.00
74.25
HDTV 720P
12
1920*1080
28.12
50.00
74.25
HDTV 1080I
13
1920*1080
33.72
59.94
74.18
HDTV 1080I
14
1920*1080
33.75
60.00
74.25
HDTV 1080I
15
1920*1080
26.97
23.97
63.30
HDTV 1080P
16
1920*1080
27.00
24.00
63.36
HDTV 1080P
17
1920*1080
33.71
29.97
79.12
HDTV 1080P
18
1920*1080
33.75
30.00
79.20
HDTV 1080P
19
1920*1080
56.25
50.00
148.50
HDTV 1080P
20
1920*1080
67.43
59.94
148.35
HDTV 1080P
21
1920*1080
67.50
60.00
148.50
HDTV 1080P
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
22
3840*2160
53.95
23.98
297.00
UDTV 2160P
UHD only
23
3840*2160
54.00
24.00
297.00
UDTV 2160P
UHD only
24
3840*2160
56.25
25.00
297.00
UDTV 2160P
UHD only
25
3840*2160
61.43
29.97
297.00
UDTV 2160P
UHD only
26
3840*2160
67.50
30.00
297.00
UDTV 2160P
27
3840*2160
112.50
50.00
594.00
UDTV 2160P(DVB)
UHDonly(Port1)
28
3840*2160
135.00
59.94
593.41
UDTV 2160P
UHDonly(Port1)
29
3840*2160
135.00
60.00
594.00
UDTV 2160P
UHDonly(Port1)
30
4096*2160
53.95
23.98
297.00
UDTV 2160P
UHD only
31
4096*2160
54.00
24.00
297.00
UDTV 2160P
UHD only
32
4096*2160
56.25
25.00
297.00
UDTV 2160P
UHD only
33
4096*2160
61.43
29.97
297.00
UDTV 2160P
UHD only
34
4096*2160
67.50
30.00
297.00
UDTV 2160P
UHD only
35
4096*2160
112.50
50.00
594.00
UDTV 2160P(DVB)
UHDonly(Port1)
36
4096*2160
135.00
59.94
593.41
UDTV 2160P
UHDonly(Port1)
37
4096*2160
135.00
60.00
594.00
UDTV 2160P
UHDonly(Port1)
UHD only
(2) HDMI Input (PC)
No
Resolution
H-freq.(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
Proposed
1
640*350
31.46
70.09
25.17
EGA
2
720*400
31.46
70.08
28.32
DOS
3
640*480
31.46
59.94
25.17
VESA(VGA)
4
800*600
37.87
60.31
40.00
VESA(SVGA)
5
1024*768
48.36
60.00
65.00
VESA(XGA)
6
1152*864
54.34
60.05
80.00
VESA
7
1280*1024
63.98
60.02
109.00
VESA(SXGA)
8
1360*768
47.71
60.01
85.00
VESA(WXGA)
9
1920*1080
67.50
60.00
158.40
WUXGA(CEA 861D)
FHD only
10
3840*2160
67.50
30.00
297.00
UDTV 2160P
UHD only
FHD only
11
3840*2160
56.25
25.00
297.00
UDTV 2160P
UHD only
12
3840*2160
54.00
24.00
297.00
UDTV 2160P
UHD only
13
4096*2160
53.95
23.97
296.703
UDTV 2160P
UHD only
14
4096*2160
54.00
24.00
297.00
UDTV 2160P
UHD only
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
5.3. 3D Mode - DTV/HDMI/USB
(1) RF Input
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
3D input proposed mode
1
1280*720
37.50
50
74.25
HDTV 720P
2D to 3D, Side by Side, Top & Bottom
2
1920*1080
28.13
50
74.25
HDTV 1080I
2D to 3D, Side by Side, Top & Bottom
(2) HDMI Input
1) HDMI Input (3D supported mode automatically)
720*480
VIC
3D input proposed
mode
59.94/ 60.00
25.13/25.20
1
Top-and-Bottom
Side-by-side(half)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
31.46 /
31.50
59.94/ 60.00
50.35/50.40
1
Side-by-side(Full)
(SDTV 480P)
59.94/ 60.00
50.35/50.40
1
Frame packing
Line alternative
Secondary(SDTV 480P)
(SDTV 480P)
59.94 / 60.00
27.00/27.03
2,3
Top-and-Bottom
Side-by-side(half)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
31.46 /
31.50
59.94 / 60.00
27.00/27.03
2,3
Side-by-side(Full)
(SDTV 480P)
62.93 /63.00
2
Pixel clock(MHz)
31.46 /
31.50
640*480
V-freq.(Hz)
62.93 /
63.00
1
Resolution
H-freq(kHz)
31.46 /
31.50
No.
59.94 / 60.00
54.00/54.06
2,3
Frame packing
Line alternative
Secondary(SDTV 480P)
(SDTV 480P)
(SDTV 576I)
Secondary(SDTV 576I)
(SDTV 576I)
Secondary(SDTV 576I)
Secondary(SDTV 576I)
Proposed
27.00
21
50.00
27.00
17,18
Top-and-Bottom
Side-by-side(half)
Side-by-side(Full)
Secondary(SDTV 576P)
Secondary(SDTV 576P)
(SDTV 576P)
50.00
54.00
17,18
Frame packing
Line alternative
Secondary(SDTV 576P)
(SDTV 576P)
37.50
50.00
74.25
19
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 720P)
Primary(HDTV 720P)
37.50
50.00
148.50
19
Side-by-side(Full)
(HDTV 720P)
44.96 /
45.00
59.94 / 60.00
74.17/74.25
4
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 720P)
Primary(HDTV 720P)
44.96 /
45.00
59.94 / 60.00
148.35/148.50
4
Side-by-side(Full)
(HDTV 720P)
75.00
50.00
148.50
19
Frame packing
Line alternative
Primary(HDTV 720P)
(HDTV 720P)
89.91/90.00
5
50.00
62.50
4
720*576
15.62
31.25
3
Top-and-Bottom
Side-by-side(half)
Side-by-side(Full)
Frame packing
Field alternative
59.94 / 60.00
148.35/148.50
4
Frame packing
Line alternative
Primary(HDTV 720P)
(HDTV 720P)
720*576
1280*720
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 10 -
LGE Internal Use Only
28.12
50.00
74.25
20
Top-and-Bottom
Side-by-side(half)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
28.12
50.00
148.50
20
Side-by-side(Full)
(HDTV 1080I)
33.72 /
33.75
5
33.72 /
33.75
59.94 / 60.00
148.35/148.50
5
Side-by-side(Full)
(HDTV 1080I)
50.00
148.50
20
Frame packing
Field alternative
Primary(HDTV 1080I)
(HDTV 1080I)
67.43/67.50
59.94 / 60.00
148.35/148.50
5
Frame packing
Field alternative
Primary(HDTV 1080I)
(HDTV 1080I)
26.97 /
27.00
23.97 / 24.00
74.17 / 74.25
32
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 1080P)
Primary(HDTV 1080P)
26.97 /
27.00
23.97 / 24.00
148.35 / 148.50
32
Side-by-side(Full)
(HDTV 1080P)
28.12
25.00
74.25
33
Top-and-Bottom
Side-by-side(half)
Secondary(HDTV 1080P)
Secondary(HDTV 1080P)
28.12
1920*1080
74.17/74.25
56.25
6
59.94 / 60.00
Top-and-Bottom
Side-by-side(half)
25.00
148.50
33
Side-by-side(Full)
(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
33.71 /
33.75
34
33.71 /
33.75
29.97 / 30.00
148.35/148.50
34
Side-by-side(Full)
(HDTV 1080P)
43.94/54.00
23.97 / 24.00
148.35/148.50
32
Frame packing
Line alternative
Primary(HDTV 1080P)
(HDTV 1080P)
25.00
148.50
33
Frame packing
Line alternative
Secondary(HDTV 1080P)
(HDTV 1080P)
67.43 / 67.5
29.97 / 30.00
148.35/148.50
34
Frame packing
Line alternative
Primary(HDTV 1080P)
(HDTV 1080P)
56.25
50.00
148.50
31
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
67.43 /
67.50
1920*1080
74.18/74.25
56.25
7
29.97 / 30.00
Top-and-Bottom
Side-by-side(half)
59.94 / 60.00
148.35/148.50
16
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
(3) DTV( 3D) (3D supported mode automatically)
No.
1
Signal
Frame compatible
H-freq(kHz)
-
V-freq.(Hz)
-
Pixel clock(MHz)
-
Proposed
3D input proposed mode
Side by Side(half)
Top & Bottom
-
(4) DTV/ATV(CVBS/SCART) Input( 3D) (3D supported mode manually)
No.
Signal
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
3D input proposed mode
1
HD/SD
-
-
-
-
2D to 3D
2
SD
-
-
-
-
Side by Side(half)
Top & Bottom
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 11 -
LGE Internal Use Only
(5) Component Input ( 3D) (3D supported mode manually)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
3D input proposed mode
1
1280*720
37.50
50.00
74.25
HDTV 720P
2D to 3D,
Side by Side(half), Top & Bottom
2
1280*720
45.00
60.00
74.25
HDTV 720P
2D to 3D,
Side by Side(half), Top & Bottom
3
1280*720
44.96
59.94
74.18
HDTV 720P
2D to 3D,
Side by Side(half), Top & Bottom
4
1920*1080
33.75
60.00
74.25
HDTV 1080I
2D to 3D,
Side by Side(half), Top & Bottom
5
1920*1080
33.72
59.94
74.18
HDTV 1080I
2D to 3D,
Side by Side(half), Top & Bottom
6
1920*1080
28.12
50.00
74.25
HDTV 1080I
2D to 3D,
Side by Side(half), Top & Bottom
7
1920*1080
67.50
60.00
148.50
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom
8
1920*1080
67.43
59.94
148.35
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom
9
1920*1080
27.00
24.00
74.25
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom
10
1920*1080
28.12
25.00
74.25
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom
11
1920*1080
56.25
50.00
74.25
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom
12
1920*1080
26.97
23.97
74.18
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom
13
1920*1080
33.75
30.00
74.25
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom
14
1920*1080
33.71
29.97
74.18
HDTV 1080P
2D to 3D,
Side by Side(half), Top & Bottom
(6) HDMI-PC Input (3D) (3D supported mode manually)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
1
1024*768
48.36
60.00
2
1360*768
47.71
Pixel clock(MHz)
65.00
60.00
Proposed
HDTV 768P
HDTV 768P
3
1920*1080
67.50
60.00
148.50
54.00
24.00
56.25
25.00
297.00
67.50
30.00
296.70
54
24.00
297.00
HDTV 2160P
-
640*350
720*400
640*480
800*600
1152*864
2D to 3D,
Side by Side(half),
Top & Bottom
2D to 3D,
Side by Side(half), Top & Bottom,
Checker Board, Frame Sequential,
Row Interleaving, Column Interleaving
296.70
4
3840*2160
(Ultea HD
model only)
5
6
4096*2160
(Ultea HD
model only)
Others
-
-
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
HDTV 1080P
3D input proposed mode
HDTV 2160P
- 12 -
2D to 3D,
Top & Bottom(half)
Side by Side(half)
2D to 3D,
Side by Side(half),
Top & Bottom
LGE Internal Use Only
(7) HDMI-DTV (3D supported mode manually)
No.
Resolution
H-freq(kHz)
1
720*480
31.50
60.00
27.03
SDTV 480P
2
720*576
31.25
50.00
27.00
SDTV 576P
37.50
50.00
74.25
HDTV 720P
33.75
60.00
74.25
HDTV 1080I
28.12
50.00
74.25
HDTV 1080I
27.00
24.00
74.25
HDTV 1080P
28.12
25.00
74.25
HDTV 1080P
33.75
30.00
74.25
HDTV 1080P
67.50
60.00
148.50
HDTV 1080P
56.25
50.00
148.50
HDTV 1080P
53.95
23.97
297.00
54.00
24.00
296.70
56.25
25.00
297.00
61.43
29.97
297.00
67.50
30.00
296.70
112.50
50.00(HDMI1,
HDMI2 Only)
594.00
3
4
5
1920*1080
1920*1080
V-freq.(Hz)
Pixel clock(MHz)
Proposed
3D input proposed mode
2D to 3D, Side by Side(Half), Top & Bottom, Checker Board, Frame Sequential,
Row Interleaving, Column Interleaving
2D to 3D, Side by Side(Half), Top &
Bottom
2D to 3D, Side by Side(Half), Top & Bottom, Checker Board, Row Interleaving,
Column Interleaving
2D to 3D, Side by Side(Half), Top &
Bottom, Checker Board, Single Frame
Sequential,
Row Interleaving, Column Interleaving
60.00(HDMI1,
HDMI2 Only)
135.00
2D to 3D,
Top & Bottom(half), Side by Side(half)
HDTV 2160P
6
3840*2160
4096*2160
(Ultra HD
model only)
HDTV 2160P
2D to 3D,
Side by Side(half)
Top & Bottom
594.00
(8) USB – Movie (3D) (3D supported mode manually)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
3D input proposed mode
1
Under 704x480
-
-
-
2D to 3D
2
Over 704x480
Under 1080P
interlaced
-
-
-
2D to 3D, Side by Side(Half), Top & Bottom
3
Over 704x480
Under 1080P
progressive
-
50 / 60
-
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column Interleaving, Column Interleaving ,Frame Sequential
-
others
-
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column Interleaving
-
24/25/30/50/60
-
2D to 3D, Side by Side(Half), Top & Bottom
4
5
Over 2160P
(Ultra HD model
only)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 13 -
LGE Internal Use Only
(9) USB, DLNA -Photo (3D) (3D supported mode manually)
No.
1
Resolution
USB(photo)
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
-
-
-
3D input proposed mode
2D to 3D, Side by Side(Half), Top & Bottom
(10) Miracast Intel WIDI (3D supported mode manually)
No.
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
1024X768p
Resolution
-
30 / 60
-
2
1280x720p
-
30.00 / 60.00
-
3
1920X1080p
4
Others
3D input proposed mode
2D to 3D, Side by Side(Half), Top & Bottom
30.00 / 60.00
-
2D to 3D
(11) USB, DLNA (3D) (3D supported mode automatically)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
3D input proposed mode
Side by Side(Half), Top & Bottom, Checker Board,
MPO(Photo), JPS(Photo)
1
1080p
33.75
30.00
74.25
2
2160p
67.50
30.00
297.00
Single Frame
Sequential
Frame Packing
■ Remark: 3D Input mode
Side by Side
Top & Bottom
Checkerboard
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 14 -
Row Interleaving
Column Interleaving
2D to 3D
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to ED59E Chassis applied
OLED TV all models manufactured in TV factory.
2. Designation
4. Automatic Adjustment
4.1. MAC address D/L , CI+ key D/L ,
Widevine key D/L, ESN D/L,
HDCP14/20 D/L
- Connect: USB port
(1) ecause this is not a hot chassis, it is not necessary to
B
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) he adjustment must be performed in the circumstance of
T
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) he input voltage of the receiver must keep AC 100-240
T
V~, 50/60 Hz.
(5) he receiver must be operated for about 5 minutes prior to
T
the adjustment when module is in the circumstance of over
15 °C.
4.2. Communication Prot connection
- Com 1,2,3,4 and 115200(Baudrate)
Mode check: Online Only
- check the test process
DETECT - & gt; MAC - & gt; ESN - & gt; Widevine - & gt; CI - & gt; HDCP14 - & gt;
HDCP20
-.Play : Press Enter key
-.Result: Ready, Test, OK or NG
-.Printer Out (MAC Address Label)
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours.
In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
4.3. LAN Inspection
4.3.1. Equipment & Condition
- Each other connection to LAN Port of IP Hub and Jig
3. Adjustment items
3.1. Main PCB check process
- MAC Address Download
- ADC adjustment : 480i Comp1, 1920*1080 Comp1
- EDID/DDC download
Above adjustment items can be also performed in Final
Assembly if needed. Both Board-level and Final assembly
adjustment items can be check using In-Star Menu 1.
ADJUST CHECK.
4.3.2. LAN inspection solution
3.2. inal assembly adjustment
F
- White Balance adjustment
- RS-232C functionality check
- PING Test
- Factory Option setting per destination
- Ship-out mode setting (In-Stop)
- LAN Port connection with PCB
- Network setting at MENU Mode of TV
- setting automatic IP
- Setting state confirmation
I
f automatic setting is finished, you confirm IP and MAC
Address.
3.3. Etc
- Ship-out mode
- Service Option Default
- USB Download(S/W Update, Option, Service only)
- ISP Download(Option)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 15 -
LGE Internal Use Only
4.3.3. WIDEVINE Key Inspection
- Confirm Key input Data at the “IN START” MENU Mode
4.5. Model name &
Serial number Download
4.5.1 Model name & Serial number D/L
- ress “P-ONLY” key of service remocon.
P
(Baud rate : 115200 bps)
- Connect RS-232C Signal to USB Cable to USB.
- Write Serial number by use USB port.
- Must check the serial number at Instart menu.
4.5.2 Method & notice
(1) Serial number D/L is using of scan equipment.
(2) etting of scan equipment operated by Manufacturing
S
Technology Group.
(3) erial number D/L must be conformed when it is produced
S
in production line, because serial number D/L is mandatory
by D-book 4.0
Manual Download (Model Name and Serial Number)
If the TV set is downloaded By OTA or Service man,
Sometimes model name or serial number is initialized.
(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
4.4. LAN PORT INSPECTION(PING TEST)
4.4.1. Equipment setting
(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
SET
PC
(1) Press the ‘instart’ key of ADJ remote controller.
(2) Go to the menu ‘7.Model Number D/L’ like below photo.
4.4.2. LAN PORT inspection (PING TEST)
(1) Play the LAN Port Test Program.
(2) connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) remove LAN CABLE
(3) nput the Factory model name or Serial number like photo.
I
(4) heck the model name Instart menu
C
→Factory name displayed
(5) Check the Diagnostics (DTV country only)
→Buyer model displayed
4.6. I+ Key checking method(check the
C
Section 4.2) (Only EU Model)
C
heck whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).
Check the Download to CI+ Key value in LGset.
4.6.1. check the method of CI+ Key value
a. check the method on Instart menu
b. check the method of RS232C Command
1) into the main ass’y mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
Data 0
0
0
2) heck the key download for transmitted command
c
(RS232 : ci 00 10)
CMD 1
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 16 -
CMD 2
C
I
Data 0
1
0
LGE Internal Use Only
5.2.2. Equipment
3) result value
- normally status for download : OKx
- abnormally status for download : NGx
▪ ince embedded EDID data is used, EDID download JIG,
S
HDMI cable and D-sub cable are not need.
▪ Adjust remocon.
4.6.2. check the method of CI+ Key value (RS232)
5.2.3. Download method
(1) into the main ass’y mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
A
(1) ress Adj. key on the Adj. R/C, then select “12.EDID D/L”.
P
By pressing Enter key, enter EDID D/L menu.
Data 0
0
0
For HDMI EDID
(2) heck the mothed of CI+ key by command
c
(RS232 : ci 00 20)
CMD 1
CMD 2
C
I
DVI-D to HDMI or HDMI to HDMI
Data 0
2
0
(3) result value
i 01 OK 1d1852d21c1ed5dcx
CI+ Key Value
4.7. WIFI MAC ADRESS CHECK
4.7.1. Using RS232 Command
Command
Transmission
Set ACK
[A][l][][Set ID][][20][Cr]
(2) elect [Start] button by pressing Enter key, HDMI1 /
S
HDMI2 / HDMI3 / HDMI4 are Writing and display OK or
NG.
[O][K][x] or [N][G]
5.2.4. Download method
▪Reference
- HDMI1 ~ HDMI3
- In the data of EDID, bellows may be different by Input mode.
4.7.2. check the menu on in-start
5. Manual Adjustment
5.1. DC adjustment is not needed
A
because of OTP(Auto ADC adjustment)
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
5.2. DID (The Extended Display
E
Identification Data) /
DDC (Display Data Channel) download
0
00
1
2
3
4
5
FF FF FF FF FF
ⓒ
01 03 80 A0
0F 50 54 A1 8 00
01 01 01 01 01 01
45 00 40 84 63 00
40 70 36 00 40 84
3E 1E 53 10 00 0A
02
22
03
15
3A F1 4E 10
01 29 3D 06
2D
71
00
00
ⓕ
40
1C
72
00
10 28 10
58 2C 45 00
16 20 58 2C
51 D0 1E 20
00 00 00 00
6
7
8
FF 00 1E
5A 78 0A
31 40 45
02 3A 80
00 1E 66
63 00 00
20 20 20
ⓓ
9F 04 13
C0 15 07
ⓕ
E3 05 03
40 84 63
25 00 40
6E 28 55
00 00 00
9
6D
EE
40
18
21
1E
20
A
05
50
B C D E
F
ⓐ
ⓑ
91 A3 54 4C 99 26
61 40 71 40 81 80
71 38 2D 40 58 2C
50 B0 51 00 1B 30
00 00 00 FD 00 3A
ⓓ
20 20
01 ⓔ1
14 03 02 12 20 21
ⓕ
01
00
84
00
00
02
00
63
40
00
3A
1E
00
84
00
80 18 71 38
01 1D 80 18
00 9E 01 1D
63 00 00 1E
00 00 00 ⓔ2
ⓐ Product ID
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ → ‘01’, Year : ‘2015’ → ‘19’
ⓓ Model Name(Hex): LGTV
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
5.2.1. Overview
It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity
of user input. It is a realization of “Plug and Play”.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 17 -
LGE Internal Use Only
(1) DTS
# HDMI 1(C/S : A0 C8) – HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 8A 00
50 58 2C
60 3E 1E
70 00 4C
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
E
01
99
81
B0
2D
00
00
01
EDID Block 1, Bytes 128-255 [80H-FFH]
F
01
26
80
58
40
3A
FC
A0
# HDMI 2(C/S : E6 0E) – HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
EDID Block 1, Bytes 128-255 [80H-FFH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 45 00
50 40 70
60 3E 1E
70 00 4C
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
7
00
78
40
3A
1E
00
20
20
8
1E
0A
45
80
66
00
20
20
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
E
01
99
81
58
1B
00
00
01
# HDMI 2(C/S : A0 B8) – HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
E
01
99
81
58
1B
00
00
01
F
01
26
80
2C
30
3A
FC
E6
E
01
99
81
B0
2D
00
00
01
F
01
26
80
58
40
3A
FC
A0
# HDMI 3(C/S : A0 A8) – HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 8A 00
50 58 2C
60 3E 1E
70 00 4C
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
8
1E
0A
45
80
66
00
20
20
F
01
26
80
2C
30
3A
FC
E6
EDID Block 1, Bytes 128-255 [80H-FFH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 8A 00
50 58 2C
60 3E 1E
70 00 4C
7
00
78
40
3A
1E
00
20
20
EDID Block 1, Bytes 128-255 [80H-FFH]
# HDMI 1(C/S : E6 1E) – HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 45 00
50 40 70
60 3E 1E
70 00 4C
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
E
01
99
81
B0
2D
00
00
01
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
EDID Block 1, Bytes 128-255 [80H-FFH]
F
01
26
80
58
40
3A
FC
A0
- 18 -
LGE Internal Use Only
# HDMI 3(C/S : E6 FE) – HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 45 00
50 40 70
60 3E 1E
70 00 4C
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
7
00
78
40
3A
1E
00
20
20
8
1E
0A
45
80
66
00
20
20
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
# HDMI 1(C/S : E6 27) – HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
E
01
99
81
58
1B
00
00
01
F
01
26
80
2C
30
3A
FC
E6
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 45 00
50 40 70
60 3E 1E
70 00 4C
EDID Block 1, Bytes 128-255 [80H-FFH]
HDMI Deep Color
On
FFh (Checksum)
A0
C8
E6
HDMI2
A0
B8
E6
A0
A8
E6
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 8A 00
50 58 2C
60 3E 1E
70 00 4C
0E
HDMI3
FE
1E
(2) AC3
# HDMI 1(C/S : A0 D1) – HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
00
10
20
30
40
50
60
70
1
FF
19
50
01
00
2C
1E
4C
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
E
01
99
81
B0
2D
00
00
01
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
E
01
99
81
58
1B
00
00
01
F
01
26
80
2C
30
3A
FC
E6
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
E
01
99
81
B0
2D
00
00
01
F
01
26
80
58
40
3A
FC
A0
E
01
99
81
58
1B
00
00
01
F
01
26
80
2C
30
3A
FC
E6
EDID Block 1, Bytes 128-255 [80H-FFH]
F
01
26
80
58
40
3A
FC
A0
EDID Block 1, Bytes 128-255 [80H-FFH]
# HDMI 2(C/S : E6 17) – HDMI UHD Deep off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 45 00
50 40 70
60 3E 1E
70 00 4C
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
8
1E
0A
45
80
66
00
20
20
# HDMI 2(C/S : A0 C1) – HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
HDMI Deep Color Off
FFh (Checksum)
HDMI1
0
00
01
0F
01
8A
58
3E
00
7
00
78
40
3A
1E
00
20
20
EDID Block 1, Bytes 128-255 [80H-FFH]
Checksum(HDMI 1/2/3)
Input
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
- 19 -
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
7
00
78
40
3A
1E
00
20
20
8
1E
0A
45
80
66
00
20
20
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
LGE Internal Use Only
EDID Block 1, Bytes 128-255 [80H-FFH]
Checksum(HDMI 1/2/3)
Input
HDMI Deep Color
On
FFh (Checksum)
HDMI Deep Color Off
FFh (Checksum)
HDMI1
00
10
20
30
40
50
60
70
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
E
01
99
81
B0
2D
00
00
01
00
10
20
30
40
50
60
70
7
00
78
40
3A
1E
00
20
20
8
1E
0A
45
80
66
00
20
20
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
E6
17
A0
B1
E6
07
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
E
01
99
81
B0
2D
00
00
01
F
01
26
80
58
40
3A
FC
A0
E
01
99
81
58
1B
00
00
01
F
01
26
80
2C
30
3A
FC
E6
# HDMI 1(C/S : E6 99) – HDMI UHD Deep off case
EDID Block 0, Bytes 0-127 [00H-7FH]
E
01
99
81
58
1B
00
00
01
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 45 00
50 40 70
60 3E 1E
70 00 4C
F
01
26
80
2C
30
3A
FC
E6
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
7
00
78
40
3A
1E
00
20
20
8
1E
0A
45
80
66
00
20
20
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
EDID Block 1, Bytes 128-255 [80H-FFH]
EDID Block 1, Bytes 128-255 [80H-FFH]
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C1
EDID Block 1, Bytes 128-255 [80H-FFH]
# HDMI 3(C/S : E6 07) – HDMI UHD Deep off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
A0
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 8A 00
50 58 2C
60 3E 1E
70 00 4C
F
01
26
80
58
40
3A
FC
A0
EDID Block 1, Bytes 128-255 [80H-FFH]
0
1
00 FF
01 19
0F 50
01 01
45 00
40 70
3E 1E
00 4C
27
(3) PCM
# HDMI 1(C/S : A0 43– HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
# HDMI 3(C/S : A0 B1) – HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
E6
HDMI3
1
FF
19
50
01
00
2C
1E
4C
D1
HDMI2
0
00
01
0F
01
8A
58
3E
00
A0
- 20 -
LGE Internal Use Only
# HDMI 2(C/S : A0 33– HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 8A 00
50 58 2C
60 3E 1E
70 00 4C
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
EDID Block 1, Bytes 128-255 [80H-FFH]
E
01
99
81
B0
2D
00
00
01
F
01
26
80
58
40
3A
FC
A0
EDID Block 1, Bytes 128-255 [80H-FFH]
# HDMI 3(C/S : E6 79) – HDMI UHD Deep off case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 45 00
50 40 70
60 3E 1E
70 00 4C
# HDMI 2(C/S : E6 89) – HDMI UHD Deep off case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 45 00
50 40 70
60 3E 1E
70 00 4C
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
7
00
78
40
3A
1E
00
20
20
8
1E
0A
45
80
66
00
20
20
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
2
3
4
5
6
FF FF FF FF FF
01 03 80 A0 5A
54 A1 08 00 31
01 01 01 01 02
40 84 63 00 00
36 00 40 84 63
53 10 00 0A 20
47 20 54 56 0A
7
00
78
40
3A
1E
00
20
20
8
1E
0A
45
80
66
00
20
20
9
6D
EE
40
18
21
1E
20
20
A
01
91
61
71
50
00
20
20
B C D
00 01 01
A3 54 4C
40 71 40
38 2D 40
B0 51 00
00 00 FD
20 00 00
20 20 20
E
01
99
81
58
1B
00
00
01
F
01
26
80
2C
30
3A
FC
E6
EDID Block 1, Bytes 128-255 [80H-FFH]
E
01
99
81
58
1B
00
00
01
F
01
26
80
2C
30
3A
FC
E6
Checksum(HDMI 1/2/3)
EDID Block 1, Bytes 128-255 [80H-FFH]
Input
HDMI Deep Color
On
FFh (Checksum)
HDMI Deep Color Off
FFh (Checksum)
HDMI1
A0
43
E6
99
HDMI2
A0
33
E6
89
HDMI3
A0
23
E6
79
# HDMI 3(C/S : A0 23– HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0
1
00 00 FF
10 01 19
20 0F 50
30 01 01
40 8A 00
50 58 2C
60 3E 1E
70 00 4C
2
3
FF FF
01 03
54 A1
01 01
40 84
45 00
88 3C
47 20
4
5
6
7
8
9
A
B C D
FF FF FF 00 1E 6D 01 00 01 01
80 A0 5A 78 0A EE 91 A3 54 4C
08 00 31 40 45 40 61 40 71 40
01 01 08 E8 00 30 F2 70 5A 80
63 00 00 1E 02 3A 80 18 71 38
40 84 63 00 00 1E 00 00 00 FD
00 0A 20 20 20 20 20 20 00 00
54 56 0A 20 20 20 20 20 20 20
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
E
01
99
81
B0
2D
00
00
01
F
01
26
80
58
40
3A
FC
A0
- 21 -
LGE Internal Use Only
6. Green Eye Inspection Guide
7.1.3. Adj. Command (Protocol)
(1) Command Format
(1) Turn on the TV set.
(2) ress “EYE” button on the Adjustment remote controller.
P
CMD ID DATA CR RF
- CMD: Command
- ID : Command
- Data : Command
Ex) [Send: va 00 00\r\n]
▪RS-232C Command used during auto-adj.
RS-232C COMMAND
Explanation
CMD
(3) lock the Intelligent Sensor module on the front C/A about
B
6 seconds. When the “Sensor Data” is lower than 20, you
can see the “OK” message.
→ If it doesn’t show “OK” message, the Sensor Module is
defected one. You have to replace that with a good one.
ID
DATA
`va
00
00
V-com pattern
`vb
00
00 ~ FE
V-com adj.
(internal Flicker pattern)
`wb
00
FF
V-com adj. completed
7.1.4. Adj. method
7.1.4.1. Auto Adj. method
1) Set TV in POWER-ONLY mode using POWER ONLY key
2) ero calibrate probe then place it on the center of the
Z
Display
3) Connect Cable (RS-232C to USB)
4) elect Model in “V-com adj. Program” and begin “V-com
S
adj.”
5) When V-com adj. is complete (OK)
6) emove probe and RS-232C to USB cable to complete adj.
R
(4) fter check the “OK” message come out, take out your
A
hand from the Sensor module.
→ heck “Sensor Data” value change from “0” to “100” or
C
not. If it doesn’t change the value, the sensor is also
defected one. You have to replace it.
▪ -com Adj. must begin as start command “va 00 00” , and
V
finish as end command “wb 00 ff”
▪ V-com adjust data
V-com Data
hex
(1) olor Analyzer: CA-310 (LED Module : CH 14) or
C
CM-H505
(2) dj. Computer (During auto adj., RS-232C protocol is
A
needed)
(3) Adjustment Remote control
(4) ignal : internal flicker Pattern in SET
S
* Color Analyzer Matrix should be calibrated using CS-100.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
133
68
104
Min
49
73
Max
7.1.1. Equipment
7.1.2. Equipment connection MAP
dec
85
Default
7. Equipment
8. White Balance Adjustment
8.1. White Balance Adjustment
8.1.1. Overview
(1) W/B adj. Objective & How-it-works
1) Objective: To reduce each Panel's W/B deviation
2) ow-it-works : When R/G/B gain in the OSD is at 192, it
H
means the panel is at its Full Dynamic Range. In order
to prevent saturation of Full Dynamic range and data,
one of R/G/B is fixed at 192, and the other two is
lowered to find the desired value.
3) Adjustment condition : normal temperature
① Surrounding Temperature : 25 °C ± 5 °C
② Warm-up time: About 5 Min
③ Surrounding Humidity : 20 % ~ 80 %
- 22 -
LGE Internal Use Only
8.1.2. Equipment
(1)Analyzer: CA-210 (LED Module : CH 14)
(2) dj. Computer(During auto adj., RS-232C protocol is
A
needed)
(3) Adjustment Remote control
(4) ideo Signal Generator MSPG-925F 720p/216-Gray
V
(Model:204, Pattern:49)
→ Only when internal pattern is not available
* Color Analyzer Matrix should be calibrated using CS-100.
8.1.3. Equipment connection MAP
Co lo r Analyzer
RS -232C
Probe
Co m p ut er
RS -232C
RS -232C
Pat t ern Generat o r
Signal Source
(5) hen adj. is complete (OK Sing), check adj. status pre
W
mode (Warm, Medium, Cool)
(6) emove probe and RS-232C to USB cable to complete
R
adj.
▪ /B Adj. must begin as start command “wb 00 00” , and
W
finish as end command “wb 00 ff”, and Adj. offset if need
8.1.5.2 Manual adj. method
(1) Set TV in Adj. mode using POWER ON
(2) ero Calibrate the probe of Color Analyzer, then place it on
Z
the center of LCD module within 10cm of the surface..
(3) ress ADJ key à EZ adjust using adj. R/C à 7. WhiteP
Balance then press the cursor to the right (KEY ).
(When KEY( ) is pressed 216 Gray internal pattern will be
displayed. )
(4) ne of R Gain / G Gain / B Gain should be fixed at 192,
O
and the rest will be lowered to meet the desired value.
(5) dj. is performed in COOL, MEDIUM, WARM 3 modes of
A
color temperature.
* If TV internal pattern is used, not needed
** G-fix adjustment
- djust modes (Cool), Fix the G gain to 172 (default data)
A
and change the others (G/B Gain ).
- djust two modes(Medium / Warm), Fix the one of R/G/B
A
gain to 192 (default data) and decrease the others.
▪ f internal pattern is not available, use RF input. In EZ Adj.
I
menu 7.White Balance, you can select one of 2 Testpattern: ON, OFF. Default is inner(ON). By selecting OFF,
you can adjust using RF signal in 216 Gray pattern.
8.1.4. Adj. Command (Protocol)
(1) Command Format
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A STOP
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
▪ Adj. condition and cautionary items
1) ighting condition in surrounding area
L
S
urrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
- DP: Color Analyzer (CA-100, CA-100+, CA210)
P
probe should be firmly attached to the Module
- LCD: Color Analyzer (CA-210) probe should be within
10cm and perpendicular of the module surface (80°~
100°)
3) Aging time
- fter Aging Start, Keep the Power ON status during 5
A
Minutes.
- n case of LCD, Back-light on should be checked using
I
no signal or Full-white pattern.
▪RS-232C Command used during auto-adj.
RS-232C COMMAND Explanation
CMD
ID
DATA
wb
00
00
Begin White Balance adj.
wb
00
10
Gain adj.(internal white pattern)
wb
00
1f
Gain adj. completed
wb
00
20
Offset adj.(internal white pattern)
wb
00
2f
Offset adj. completed
wb
00
ff
End White Balance adj.
(internal pattern disappears )
8.1.6. eference (White Balance Adj. coordinate
R
and color temperature)
Ex) wb 00 00 - & gt; Begin white balance auto-adj.
wb 00 10 - & gt; Gain adj.
ja 00 ff - & gt; Adj. data
jb 00 c0
▪ Luminance: 206 Gray
▪ tandard color coordinate and temperature using CS-1000
S
(over 26 inch)
wb 00 1f - & gt; Gain adj. complete
*(wb 00 20(start), wb 00 2f(endc)) - & gt; Off-set adj.
wb 00 ff - & gt; End white balance auto adj.
Mode
Temp
∆uv
0.270
13000K
0.0000
0.286
0.289
9300K
0.0000
0.313
0.329
6500K
0.0000
- 23 -
0.271
Medium
8.1.5.1. Auto adj. method
(1) Set TV in adj. mode using POWER ON key
(2) ero calibrate probe then place it on the center of the
Z
Display
(3) Connect Cable (RS-232C to USB)
(4) Select mode in adj. Program and begin adj.
y
Cool
8.1.5. Adjustment method
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Coordinate
x
Warm
LGE Internal Use Only
▪ tandard color coordinate and temperature using
S
CA-210(CH 14)
Coordinate
Mode
x
Temp
y
8.3. Magic Motion Remote control test
- quipment : RF Remote control for test, IR-KEY-Code
E
Remote control for test
- ou must confirm the battery power of RF-Remote control
Y
before test(recommend that change the battery per every lot)
- Sequence (test)
1) f you select the ‘start key(OK)’ on the Adjustment remote
I
control, you can pairing with the TV SET.
2) ou can check the cursor on the TV Screen, when select
Y
the " OK " key on the Adjustment remote control.
3) ou must remove the pairing with the TV Set by select
Y
‘Mute + OK Key’ on the Adjustment remote control.
∆uv
Cool
0.271±0.002
0.270±0.002
13000K
0.0000
Medium
0.286±0.002
0.289±0.002
9300K
0.0000
Warm
0.313±0.002
0.329±0.002
6500K
0.0000
8.1.7. EDGE & IOL LED White balance table
▪ dge & ALEF LED module change color coordinate because
E
of aging time
▪ pply under the color coordinate table, for compensated
a
aging time.
8.4. 3D function test
(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
(1) lease input 3D test pattern like below.
P
▪ (Normal line) Edge & ALEF LED White balance table.
Model : (normal line)LGD
Aging
time
(Min)
1
2
3
4
5
6
7
8
9
0-2
3-5
6-9
10-19
20-35
36-49
50-79
80-119
Over 120
Cool
x
y
271
270
282
289
281
287
279
284
277
280
275
277
274
274
273
272
272
271
271
270
Medium
x
y
286
289
297
308
296
306
294
303
292
299
290
296
289
293
288
291
287
290
286
289
Warm
x
y
313
329
324
348
323
346
321
343
319
339
317
336
316
333
315
331
314
330
313
329
(2) When 3D OSD appear automatically, then select green key.
(*) UO, INX, Sharp, CSOT, BOE model (Cool : 13000K
A
Spec.) : DV
webOS
Target
Cool
x
y
271
270
278
280
Medium
x
y
286
289
293
299
Warm
x
313
320
y
329
339
(3) Don't wear a 3D Glasses, Check the picture like below.
8.2. Local Dimming Function Check
(1) Turn on TV.
(2) t the Local Dimming mode, module Edge Backlight
A
moving right to left Back light of IOP module moving.
(3) Confirm the Local Dimming mode.
(4) Press “exit” Key.
[40/43/49/55/60/65UF77 : 6Block]
[70UF77 : 12Block]
8.5. Option selection per country
8.5.1. Overview
- ption selection is only done for models in AJ/JA/IL
O
8.5.2.Method
(1) ress ADJ key on the Adj. R/C, then select Country Group
P
Menu
(2) epending on destination, select Country Group Code or
D
Country Group then on the lower Country option, select
US, CA, MX. Selection is done using +, - or
KEY
[55/65UG87 : 16Block]
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 24 -
LGE Internal Use Only
10. Audio
8.6. HDMI ARC Function Inspection
8.6.1. Test equipment
No
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
1
8.6.2. Test method
(1) nsert the HDMI Cable to the HDMI ARC port from the
I
master equipment (HDMI 2)
2
Item
Audio practical max
Output, L/R
(Distortion=10% max
Output)
Min
Typ
Max
Unit
Remark
10
12
W
EQ Off
AVL Off
Clear Voice Off
8.10 10.8 Vrms
Speaker
(8 Ω Impedance)
10
12
W
EQ On
AVL On
Clear Voice On
Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms
11. Preset CH information
Area
MA
(WR)
E5
C 05
175.25
V/UHF
E51
C 51
711.25
I
V/UHF
I41
C 41
631.25
D
V/UHF
R5
C 05
93.25
B
V/UHF
E4
C 04
62.25
PAL
G
V/UHF
E31
C 31
551.25
I
V/UHF
I21
C 21
471.25
PAL
I
V/UHF
I69
C 69
855.25
PAL
G
V/UHF
E48
C 48
687.25
SECAM
L
V/UHF
L4
C 08
200.00
SECAM
L
V/UHF
L45
C 45
663.25
PAL
G
V/UHF
E25
C 25
503.25
SECAM
D
V/UHF
R7
C 07
183.25
SECAM
PAL
PAL
Frequency
D
V/UHF
R7
C 07
189.25
11.1. Etc
Power Status
Main B/D Shipping Condition
AC Swithch
condtion
▪ TEST voltage
- GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
▪ TEST time: 1 second
▪ TEST POINT
- ND TEST = POWER CORD GND & SIGNAL CABLE
G
METAL GND
- nternal Pressure TEST = POWER CORD GND & LIVE &
I
NEUTRAL
▪ LEAKAGE CURRENT: At 0.5 mArms
- 25 -
Chassis Module Assembly
ON
N/A
Front Module Assembly
N/A
OFF
Factory incoming
9.2. Checkpoint
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
V/UHF
G
PAL
(1) GND & Internal Pressure auto-check preparation
- heck that Power Cord is fully inserted to the SET.
C
(If loose, re-insert)
(2) Perform GND & Internal Pressure auto-check
- nit fully inserted Power cord, Antenna cable and A/V
U
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- f OK, Good lamp will lit up and the stopper will allow the
I
pallet to move on to next process.
B
PAL
9.1. Method
CH
SECAM
9. GND and Internal Pressure check
Band
PAL
(2) Check the sound from the TV Set
(3) heck the Sound from the Speaker or using AV & Optic
C
TEST program (It’s connected to MSHG-600)
System
ON
OFF
Final Assembly
ON
ON
Ship-Out
OFF
ON
LGE Internal Use Only
11.2. ET Factoring Condition
S
Quick
Network
TV Name
LG Smart TV
Wired Connection(Ethernet)
Programmes
Picture Mode
Wi-F- Connection
Sound Mode
Standard
Wi-Fi Direct
Aspect Ratio
16:9
LG Connect
Sleep Timer
Off
Account Management
Sign In
Audio Language
Smart Picture Mode
Off
Voice Recognition Language
Picture Mode
Picture
ECO
ECO
Picture
Adjust
General
Language
Menu Language
Keyboard Languages
Location
Broadcast Country Setting
Backlight
100
Contrast
100
Zip Code Setting
Brightness
50
Service Country Setting Auto
Sharpness
25
Colour
60
Tint
R5
Time
Colour Temperature
C20
Date
Advanced
Control
Dynamic Control
Low
Dynamic Colour
Medium
Preferred Colour
Gamma
Low
Black Level
Auto
Real Cinema
Off
Motion Eye Care
High
LED Local Dimming
High
TruMotion
Clear
Off
Auto
MPEG Noise
Reduction
Off
Medium
Noise Reduction
Off
Timer Power Off
Medium
Sleep Timer
Timer Power On
Wide
Super Resolution
Set Automatically
Time zone
Timer
Skin-2/Grass3/
Sky0
Colour Gamut
Picture
Option
LG Services Country
Time & Date
Voice & Gesture Commands
Voice
Tutorial
Gesture
Motion Recognition
On
Animation
Guide
On
Tutorial
Launch Account Management
Home/Store Mode
HOME MODE
Eco Mode
Auto Power Off
4 Hours
HDD Eco Mode
On
Collection of Watching Info
On
Live Plus
Off
Customized Ads
Off
Cookies
Off
SIMPLINK
Data Based Services
Reset
Sound
Smart Sound Mode
Sound Mode
Reset to Initial Settings
Off
Standard
Sound Effects
ABOUT THIS TV
Safety
Off
Clear Voice II
Off
Virtual Surround Plus
Off
TV Rating Locks
3D Sound Zooming
Off
Programme Locks
Equalizer
Off
Application Locks
Balance
L0/R0
Input Locks
Reset PIN Code
Reset
Volume
Mode
None
Auto Volume
Off
Volume Increase Rate
Accessibility
Pointer Options
Medium
Tracking Speed
Size
Sound Out
TV Speaker
Subtitle
DTV Audio Setting
Auto
Teletext
AV Sync. Adjust
Sound Optimizer
Normal
Off
Audio Description
Off
Off
Audio Description Volume
10
Normal
Hard of Hearing
Off
Sound Test
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 26 -
LGE Internal Use Only
12. USB S/W Download(Service only)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick.
- f your downloaded program version in USB Stick is
I
Lower, it didn’t work.
B
ut your downloaded version is Higher, USB data is
automatically detecting
(Download Version High & Power only mode, Set is
automatically Download)
(3) Show the message “Copying files from memory”.
(4) Updating is starting.
(5) Updating completed, the TV will restart automatically
(6) f your TV is turned on, check your updated version and
I
Tool option. (explain the Tool option, next stage)
* f downloading version is more new than your TV have,
I
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust Tool Option again.
(1) Push " IN-START " key in service remote control.
(2) Select " Tool Option 1 " and push " OK " key.
(3) Punch in the number. (Each model has their number)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 27 -
LGE Internal Use Only
BLOCK DIAGRAM
1. LM14A + URSA11 Circuit Block Diagram
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 28 -
LGE Internal Use Only
BLOCK DIAGRAM
2. LM14A + URSA11 I2C Block Diagram
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 29 -
LGE Internal Use Only
BLOCK DIAGRAM
3. URSA11 Block Diagram
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 30 -
LGE Internal Use Only
BLOCK DIAGRAM
4. LM14A + URSA11 Power Block Diagram
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 31 -
LGE Internal Use Only
BLOCK DIAGRAM
5. Tuner/CI Block Diagram
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 32 -
LGE Internal Use Only
BLOCK DIAGRAM
6. Video/Audio In Block Diagram
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 33 -
LGE Internal Use Only
BLOCK DIAGRAM
7. Audio Out Block Diagram
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 34 -
LGE Internal Use Only
BLOCK DIAGRAM
8. HDMI
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 35 -
LGE Internal Use Only
BLOCK DIAGRAM
9. USB / WIFI / M-REMOTE / UART
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 36 -
LGE Internal Use Only
BLOCK DIAGRAM
10. LM14A + URSA11 Internal Block
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 37 -
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
900
502
810
120
522
500
121
570
571
501
521
530
531
A22
A10
200
AG1
820
LV1 LV2
540
840
400
410
710
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 38 -
LGE Internal Use Only
SPI_CK_SOC
LM14A+URSA9
4.7K
OPT
4.7K
R115
IC101-*1
BR24G256FJ-3
IC101
AT24C256C-SSHL-T
EAN61133501
A0
C100
0.1uF
A1
A2
1
8
2
7
3
6
TXOSD_3N
WP
TXOSD_2P
SCL
TXOSD_1P
5
SDA
1
8
2
7
Write Protection
LED1
A1
WP
OPT
4.7K
4.7K
R116
4.7K
A2
A0’h
3
6
SCL
GND
4
5
SDA
F10
PWM_DIM2
F8
FAN_ON
E9
AMP_RESET_N
PWM0/GPIO152
LVSYNC/[VX1_0-]
PWM1/GPIO153
LHSYNC/[VX1_0+]
PWM2/GPIO154
LDE/[VX1_1-]
/USB_OCD2
CHIP_CONFIG[3:0]
{LED1, SPI_DI,LED0, PWM_PM}
Value
4’b1000
4’b1001
4’b1010
4’b1011
4’b1100
4’b0000
4’b0001
4’b0011
G5
USB_CTL2
FRC_FLASH_WP
Mode
Description
SB51_ExtSPI
51 boot from SPI
HEMCU_ExtSPI
ARM boot from SPI
HEMCU_ROM_EMMC
ARM boot from ROM; outer storage is eMMC
HEMCU_ROM_NAND
ARM boot from ROM; outer storage is NAND
DBUS
for test only
SB51_ExtSPI + Authentication 51 boot from SPI with ARM authentication
SB51_ExtSPI + Authentication HEMCU_ExtSPI + Authentication
HEMCU_ROM_NAND + Authentication ARM boot from ROM with authentication;
AF31
E5
E4
DDTS_TX
G4
SAR1/GPIO47
SAR3/GPIO49
R_ODD[2]/LVB2P/[VX1_4+]
V4
SPI_DI_SOC
/SPI_CS
V5
Y6
R167 0
Y4
OPT
LM14 HW Option
Y5
PM_SPI_CK/GPIO1
PM_SPI_DO/GPIO3
PM_SPI_CZ/GPIO0
GPIO_PM[10]/[SPI-CZ2N]/GPIO20
G_ODD[2]/LVA0P/[OSD_0+]
M_RFModule_RESET
DDCA_CK
B_ODD[5]/LVACLKN/[OSD_3-]
BIT11_1
R148
10K
BIT10_1
R146
10K
BIT9_1
R142
10K
BIT8_1
R140
10K
BIT7_1
R138
10K
BIT6_1
R135
10K
BIT5_1
R132
10K
BIT4_1
R128
10K
BIT3_1
R125
10K
BIT2_1
R119
10K
BIT1_1
R112
10K
AH29
AA4
FRC_FLASH_SEL_SOC
W6
/TU_RESET2
F14
I2C_SCL6
I2C_SDA6
BIT0
F12
GPIO3/TX1/GPIO58
GPIO23/[TX3]/GPIO78
PCM_D[3]/GPIO119
TS1_D2/GPIO180
PCM_D[4]/GPIO120
TS1_D3/GPIO179
PCM_D[5]/GPIO121
TS1_D4/GPIO178
PCM_D[6]/GPIO122
TS1_D5/GPIO177
TS1_D6/GPIO176
TS1_D7/GPIO175
AJ19
AG18
PCM_A[0]/GPIO146
TS1_CLK/GPIO172
PCM_A[1]/GPIO145
TS1_VLD/GPIO174
PCM_A[2]/GPIO143
FE_DEMOD1_TS_DATA[1]
AG10
FE_DEMOD1_TS_DATA[2]
AJ11
FE_DEMOD1_TS_DATA[3]
AH10
FE_DEMOD1_TS_DATA[4]
AJ13
FE_DEMOD1_TS_DATA[5]
AG9
FE_DEMOD1_TS_DATA[6]
AH9
SM_Vsel
CAM_IREQ_N
SM_CLK
AM22
EB_OE_N
SM_RST
EB_BE_N1
LOCKAn_Video
SM_IO
HTPDAn_Video
AL24
SM_VCC
R173
10K
AL22
AK19
EB_WE_N
AG21
CAM_CD1_N
HTPDAn_OSD
AK23
AG20
/PCM_CE1
LOCKAn_OSD
PCM_RESET
AH16
AJ14
CAM_REG_N
HTPDAn_OSD_Pull_down
SM_CD
AG19
EB_BE_N0
AG16
CAM_WAIT_N
DIM3/RX4/GPIO113
FE_DEMOD1_TS_DATA[7]
AH11
FE_DEMOD1_TS_CLK
AJ10
FE_DEMOD1_TS_VAL
AH12
FE_DEMOD1_TS_SYNC
TPI_DATA[0-7]
PCM_A[3]/GPIO142
AK17
PCM_A[4]/GPIO141
TS0_D0/GPIO161
PCM_A[5]/GPIO139
TS0_D1/GPIO162
PCM_A[6]/GPIO138
TS0_D2/GPIO163
PCM_A[7]/GPIO137
TS0_D3
PCM_A[8]/GPIO131
TS0_D4/GPIO165
PCM_A[9]/GPIO129
TS0_D5/GPIO166
PCM_A[10]/GPIO125
TS0_D6/GPIO167
PCM_A[11]/GPIO127
TS0_D7/GPIO168
PCM_A[12]/GPIO136
TS0_CLK/GPIO171
TPI_DATA[0]
AL18
TPI_DATA[1]
AK18
TPI_DATA[2]
AL15
TPI_DATA[3]
AL16
TPI_DATA[4]
AK15
TPI_DATA[5]
TPI_DATA[6]
AM16
TPI_DATA[7]
AK16
AL19
TPI_CLK
AM17
PCM_A[13]/GPIO132
TS0_VLD/GPIO169
TPI_VAL
TS0_SYNC/GPIO170
AL17
TPI_SOP
AH23
PCM_IRQA_N/GPIO135
TS3_D0/GPIO206
PCM_OE_N/GPIO126
TS3_D1/GPIO207
PCM_IORD_N/GPIO128
TS3_D2/GPIO208
PCM_CE_N/GPIO124
TS3_D3/GPIO209
PCM_WE_N/GPIO134
TS3_D4/GPIO210
PCM_CD_N/GPIO151
TS3_D5/GPIO211
PCM_RESET/GPIO150
TS3_D6/GPIO212
PCM_REG_N/GPIO144
TS3_D7/GPIO213
PCM_IOWR_N/GPIO130
TS3_CLK/GPIO216
PCM_WAIT_N/GPIO140
TS3_VLD/GPIO214
EPI
POL
AH27
GST_A
AJ23
GST
GCLK
GCLK_A
AG27
MCLK
MCLK_A
AH24
OPT_P
HDMI_SW_SDA
SOE
AH26
HDMI_SW_SCL
AJ25
MN864778_RESET
FB
AG26
EO_A
AH25
E/O
HCONV
DPM
AJ26
AG24
LOCKOUT12 LOCK
TS3_SYNC/GPIO215
BIT1
FE_DEMOD1_TS_DATA[0-7]
FE_DEMOD1_TS_DATA[0]
AG11
TS1_SYNC/GPIO173
PCM_A[14]/GPIO133
TXOSD_3N
R172
10K
HTPDAn_Video_Pull_down
DIM2/TX4/GPIO112
TS1_D1/GPIO181
AH18
TXOSD_3P
B_ODD[0]/LVA4P/[OSD_HTPDN]
GPIO24/[RX3]/GPIO79
AG17
EB_ADDR[14]
TXOSD_2P
AK24
B_ODD[1]/LVA4N/[OSD_LOCKN]
TS1_D0/GPIO182
PCM_D[2]/GPIO149
TXOSD_2N
AL25
B_ODD[2]/LVA3P/[HTPDN]
GPIO4/RX1
AK20
EB_ADDR[13]
AK25
B_ODD[3]/LVA3N/[LOCKN]
AH28
SOC_TX
SOC_RX
AJ20
EB_ADDR[12]
AM26
B_ODD[4]/LVACLKP/[OSD_3+]
AH19
EB_ADDR[10]
TXOSD_1N
AL26
B_ODD[6]/LVA2P/[OSD_2+]
DDCA_DA/GPIO9
AK8
DDCA_DA
DDCA_CK/GPIO8
AM20
EB_ADDR[9]
TXOSD_1P
AK26
B_ODD[7]/LVA2N/[OSD_2-]
AH17
EB_ADDR[8]
TXOSD_0N
AK27
G_ODD[1]/LVA1N/[OSD_1-]
AL8
EB_ADDR[7]
TXOSD_0P
AL28
G_ODD[0]/LVA1P/[OSD_1+]
+3.3V_NORMAL
AJ16
EB_ADDR[11]
AM28
G_ODD[3]/LVA0N/[OSD_0-]
AJ17
EB_ADDR[6]
TXVBY1_7P
AK28
GPIO_PM[6]/[SPI-CZ1N]/GPIO16
AM19
EB_ADDR[5]
TXVBY1_7N
G_ODD[4]/LVB4P/[VX1_7+]
AH15
EB_ADDR[4]
TXVBY1_6N
AL29
AG15
EB_ADDR[3]
TXVBY1_6P
AK29
AL20
EB_ADDR[2]
TXVBY1_5P
AL30
G_ODD[5]/LVB4N/[VX1_7-]
AH13
PCM_D[1]/GPIO148
AG14
EB_ADDR[1]
TXVBY1_5N
AK30
G_ODD[6]/LVB3P/[VX1_6+]
PM_SPI_DI/GPIO2
AH20
EB_ADDR[0]
TXVBY1_4P
AL31
G_ODD[7]/LVB3N/[VX1_6-]
W5
SPI_CK_SOC
AM23
EB_ADDR[0-14]
TXVBY1_4N
AL32
R_ODD[0]/LVBCLKP/[VX1_5+]
AL21
EB_DATA[6]
TXVBY1_3P
AK31
R_ODD[1]/LVBCLKN/[VX1_5-]
AK21
EB_DATA[5]
TXVBY1_3N
AK32
R_ODD[3]/LVB2N/[VX1_4-]
PCM_D[0]/GPIO147
PCM_D[7]/GPIO123
AK22
EB_DATA[4]
TXVBY1_2P
AJ32
R_ODD[4]/LVB1P/[VX1_3+]
SAR2/GPIO48
TXVBY1_2N
AJ31
R_ODD[5]/LVB1N/[VX1_3-]
AG12
EB_DATA[7]
AH30
R_ODD[6]/LVB0P/[VX1_2+]
AG13
EB_DATA[3]
TXVBY1_1P
AH31
SAR0/GPIO46
/USB_OCD3
AH14
EB_DATA[1]
TXVBY1_1N
AG31
R_ODD[7]/LVB0N/[VX1_2-]
SAR5
SPI_DO_SOC
/TU_RESET1
BIT0_1
R105
10K
EB_DATA[0]
TXVBY1_0P
AG32
N5
F4
LOCKOUT12
IC100
LGE5332(LM14A)
HTPDAn_Video
TXVBY1_0N
LCK/[VX1_1+]
PWM_PM/GPIO7
5V_DET_HDMI_1
USB_CTL3
EB_DATA[2]
AF32
PWM3/GPIO155
PWM_PM
WOL_WAKE_UP_SOC
PMIC_RESET
EB_DATA[0-7]
D9
PWM_DIM
TXVBY1_1P
DATA_FORMAT_0_SOC
V-BY-ONE
I2C_SDA1
33
AR101
EO_A
LM14A_ONLY
DATA_FORMAT_1_SOC
L/D_CLK_SOC
L/D_DI_SOC
I2C_SCL1
R123
OPT
4.7K
R109
R111
LED0
PWM_PM
LM14A UF74
GCLK_A
MCLK_A
/TU_RESET2
TXVBY1_1N
HTPDAn_OSD
TXOSD_0N
IC100
LGE5332(LM14A)
- Low : Normal Operation
- High : Write Protection
GST_A
L/D_VSYNC_SOC
TXOSD_2N
VCC
SPI_DI_SOC
Data_Format_0
URSA_RESET_SoC
TXOSD_0P
4
Rohm_NVRAM
A0
LOCKAn_OSD
URSA9_CONNECT
Data_Format_1
TXOSD_3P
VCC
LM14A UF68/64
TXVBY1_0P
FRC_FLASH_WP
TXOSD_1N
GND
TXVBY1_0N
FAN_ON
FRC_FLASH_SEL_SOC
SPI_DO_SOC
/SPI_CS
+3.3V_NORMAL
Atmel_NVRAM
R122
4.7K
R108
OPT
4.7K
NVRAM
R110
CHIP CONFIG
OLED
COMPENSATION_DONE
SPI_DI_SOC
+3.3V_NORMAL
AJ27
CPU_VID1
GPIO2/GPIO57
BIT2
C7
BIT0
BIT3
C6
BIT1
AE2
COMP1_DET
GPIO_PM[0]/GPIO10
BIT5
U6
GPIO_PM[3]/GPIO13
BIT6
P4
GPIO_PM[4]/GPIO14
I2C_SCL1
I2C_SDA1
BIT9
AH8
E10
E11
AJ6
I2C_SCL2
I2C_SDA2
BIT10
AG8
AH7
I2C_SCL5
GPIO28/SCK0/GPIO83
GPIO29/SDA0/GPIO84
PMIC_RESET
AJ5
GPIO_PM[9]/GPIO19
COMPENSATION_DONE
GPIO_PM[13]/GPIO23
AG6
URSA9_CONNECT
C8
EMMC_CMD
BIT2
B8
A9
EMMC_CLK
BIT3
TCON_I2C_EN
EMMC_RST
BIT4
B7
B9
A8
C9
EMMC_STRB
B6
BIT5
EMMC_DATA[0-7]
EMMC_IO15/[GPIO]/GPIO189
EMMC_IO17/[GPIO]/GPIO188
EMMC_IO9/[EMMC_CMD]/GPIO183
AJ28
GPIO8/[TS4_D[0]]/GPIO63
EMMC_IO14/[GPIO]/GPIO185
GPIO5/[TS4_CLK]/GPIO60
EMMC_IO10/[EMMC_CLK]/GPIO186
GPIO7/[TS4_VLD]/GPIO62
EMMC_IO16/[GPIO]/GPIO187
EMMC_DATA[6]
DDCR_DA/SDA3/GPIO53
EMMC_DATA[7]
B11
EMMC_DATA[2]
A11
EMMC_DATA[1]
C11
/USB_OCD1
EMMC_DATA[0]
A12
USB_CTL1
DATA_FORMAT_0_SOC
EMMC_DATA[3]
B12
EMMC_DATA[4]
DATA_FORMAT_1_SOC
C12
EMMC_DATA[5]
GPIO30/SCK4/GPIO85
GPIO31/SDA4/GPIO86
P5
GPIO32/SCK5/GPIO87
GPIO_PM[1]/PM_UART1/GPIO11
GPIO_PM[5]/PM_UART1/GPIO15
P6
AJ4
AH4
GPIO_PM[12]/PM_UART0/GPIO22
FE_DEMOD3_TS_SYNC
EMMC_IO11/[EMMC_RSTN]/GPIO190
EMMC_IO12/[GPIO]/GPIO184
EMMC_IO8/[NAND-DQS]/GPIO191
B13
EMMC_IO6/[EMMC_D6]/GPIO221
EMMC_IO7/[EMMC_D7]/GPIO220
EMMC_IO2/[EMMC_D2]/GPIO219
EMMC_IO1/[EMMC_D1]/GPIO218
AL2
EMMC_IO0/[EMMC_D0]/GPIO194
VIFP
EMMC_IO3/[EMMC_D3]/GPIO193
VIFM
EMMC_IO4/[EMMC_D4]/GPIO192
AM2
L6
CPU_VID0
AK2
M6
CORE_VID0
AD5
LED0
AD4
LED1
AB5
WOL_WAKE_UP_SOC
R183
TESTPIN
100
C103
0.1uF
R184
G7
VID0/GPIO50
100
C104
0.1uF
AK3
IFAGC
VID1/GPIO51
LED1/GPIO30
AJ1
TGPIO0/GPIO157
WOL_INT_OUT/[GPIO]/GPIO52
E13
RF_SWITCH_CTL
TGPIO2/SCK1/GPIO159
L/D_DI_SOC
L/D_CLK_SOC
F11
SPI2_DI/GPIO109
E12
VSYNC_LIKE/GPIO105
L/D_VSYNC_SOC
D14
DIM0/GPIO110
USB_CTL3
R4
NC_1
NC_2
NC_3
C101
AM8
0.1uF
R185 47
C102
AL7
0.1uF
R186 47
NC_5
ATSC
JP
US
NC_6
Low
KR
BR
BIT(2/3)
FHD
+3.3V_TU
Resolution
UHD
+3.3V_LNA_TU
CN/HK
KR
T2/C PIP
Default
ATSC NIM+T2
01
T2/C/S2
T2/C/S2
T2/C
Default
BR
JP
ISDB PIP
BIT8
T-con I2C
Protocol
16Kbit
32Kbit
R187
0
10
URSA11
T/C
11
T
T/C
EPI
BIT11
ATSC
T2
NON_Division
Interface
OS(DDR)
WebOS Lite
WebOS
Mstar Debug
GPIO PULL UP
MSTAR_DEBUG_OLD
P101
R190
1.8K
MSTAR_DEBUG_NEW
12505WS-04A00
RS232C_Debug
UART_4PIN_WAFER
+3.3V_NORMAL
DDTS_Debug
DDTS_Debug
10K
12507WS-04L
1
2
I2C_SCL1
I2C_SDA3
I2C_SDA4
I2C_SCL4
I2C for Micom
3
DDCA_DA
RF_SWITCH_CTL
4
3
3
AMP_RESET_N
TCON_I2C_EN
I2C for Main Amp / Woofer AMP
4
/USB_OCD3
USB_CTL3
I2C for tuner
/USB_OCD2
USB_CTL2
I2C for tuner & LNB
5
4
5
5
1
SOC_RX
2
3
4
SOC_TX
DDTS_RX
DDTS_TX
5
PCM_5V_CTL
I2C_SDA5
I2C_SCL5
DDCA_CK
/TU_RESET1
I2C_SCL3
2
2
I2C_SCL6
I2C for NAVRAM
1
1
I2C for LCD Module
I2C_SDA1
+3.3V_NORMAL
P103
12507WS-04L
R170
10K
10K
R166
R168
10K
10K
10K
10K
10K
OPT
10K
R165
R164
I2C_SDA6
I2C for URSA9 (URSA9 Only)
R161
I2C_SDA7
I2C_SCL7
R157
HDMI_SW_SCL
P102
12507WS-04L
R156
HDMI_SW_SDA
R152
OPT
10K
P100
R154
R189
1.8K
R137
1.8K
R134
1.8K
R130
1.8K
R131
1.8K
R127
1.8K
R121
1.8K
R124
1.8K
R114
1.8K
R104
1.8K
R107
1.8K
R103
1.8K
R102
1.8K
R101
1.8K
C108
0.047uF
25V
Vx1
ISDB INT
ATSC PIP
+3.3V_NORMAL
R100
1.8K
IF_AGC
4_Division
ISDB EXT
URSA11-P
11
Division
BIT10
ATSC+T2
C106
0.1uF
R182
10K
Default
URSA9
I2C PULL UP
+3.3V_NORMAL
North.AM
BIT9
LM15U only
10
BIT5
TW/COL
T2/C PIP
OPT
10K
00
OLED
AJJA
T2/C/S2 PIP
B/E(FRC)
01
High
Low
LCD
Display
EU/CIS
00
BIT(6/7)
R181
CI
OPT
10K
AJJA
R178
EU
11
High
JP
OPT
R179
10K
10
L100
PZ1608U121-2R0TF
OPT
10K
CN/HK
CORE_VID1
M7
R180
TW/COL
+3.3V_NORMAL
AM5
GPIO34/GPIO89
BIT4
R188
300
OPT
AL5
DVB
01
TU_SIF
C105
1000pF
OPT
ANALOG SIF
Close to MSTAR
AK7
NC_4
20141113 version
IF_N
OPT
C110
33pF
I2C_SCL7
I2C_SDA7
R5
AM7
SC_DET
AV1_CVBS_DET
E14
DIM1/GPIO111
OPT
C109
33pF
/USB_OCD3
AJ2
TGPIO3/SDA1/GPIO160
D11
SPI2_CK/GPIO108
TGPIO1/GPIO158
HP_DET
D12
SPI1_CK/GPIO106
00
IF_P
OPT
C107
100pF
LED0/GPIO29
SPI1_DI/GPIO107
BIT(0/1)
DTV_IF
Close to MSTAR
AK1
SIFP
SIFM
BIT11_0
R149
10K
BIT10_0
R147
10K
BIT9_0
R143
10K
BIT8_0
R141
10K
BIT7_0
R139
10K
BIT6_0
R136
10K
BIT5_0
R133
10K
BIT4_0
R129
10K
BIT3_0
R126
10K
BIT2_0
R120
10K
FE_DEMOD3_TS_VAL
AG29
GPIO6/[TS4_SYNC]/GPIO61
EMMC_IO5/[EMMC_D5]/GPIO222
BIT1_0
R113
10K
FE_DEMOD3_TS_CLK
AJ29
C10
GPIO_PM[11]/PM_UART0/GPIO21
BIT0_0
R106
10K
FE_DEMOD3_TS_DATA
AG28
EMMC_IO13/[GPIO]/GPIO217
DDCR_CK/SCK3/GPIO54
GPIO33/SDA5/GPIO88
AJ8
I2C_SDA5
BIT11
AE5
GPIO_PM[8]/GPIO18
AJ7
I2C_SCL3
I2C_SDA3
BIT8
PCM_5V_CTL R175
22
U5
GPIO_PM[7]/GPIO17
BIT7
DDTS_RX
1K
R176
BIT4
M_RFModule_RESET
I2C_SDA2
I2C_SCL2
AR100
33
I2C_SDA_MICOM
I2C_SDA3
I2C_SCL_MICOM
I2C_SCL3
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LM15U
MAIN1_SYSTEM
2014-11-22
1
LGE Internal Use Only
IC100
LGE5332(LM14A)
WOL POWER ENABLE CONTROL
J9
VDDC_39
VDDC_17
VDDC_19
VDD_SRAM_2
VDDC_20
1st layer
AVDDL_PREDRV_3
AVDD_NODIE
AVDDL_MOD_2
L7
AVDDL_MHL3_2
AVDD15_MOD_2
AVDD3P3_MHL3_1
AVDDL_USB3_1
U24
U25
V23
V24
V25
W23
W24
W25
Y23
Y24
Y25
AA22
AA23
AA24
AA25
AVDD3P3_MHL3_2
N12
AB25
Close to chip side
T7
Close to chip side
AVDD33_ADC
Y7
VDDC_CPU_1
AVDD3P3_ETH
VDDC_CPU_2
AVDD3P3_DADC_1
VDDC_CPU_3
AVDD3P3_DADC_2
VDDC_CPU_4
AVDD3P3_ADC_1
VDDC_CPU_5
AVDD3P3_ADC_2
VDDC_CPU_6
AVDD3P3_USB_1
VDDC_CPU_7
AVDD3P3_USB_2
VDDC_CPU_8
AVDD3P3_USB3_1
VDDC_CPU_9
AVDD3P3_USB3_2
VDDC_CPU_10
AVDD_AU33
VDDC_CPU_11
AVDD_EAR33
VDDC_CPU_12
AVDD3P3_DMPLL
VDDC_CPU_13
VDDP_1
VDDC_CPU_14
Close to chip side
AB7
AB8
AA7
+3.5V_WOL
AVDD_DMPLL
AA8
IC200
G9
AP2121N-3.3TRE1
VIN
AB15
AF13
3
2
AVDD_AU33
AVDDP3P3
AD7
+1.5V_DDR
VOUT
L227
PZ1608U121-2R0TF
GND
AE7
C246
1uF
10V
C243
0.1uF
16V
AF8
AE15
AF15
VDDC_CPU_18
AVDD_MOD_2
VDDC_CPU_19
AVDD_LPLL_1
4A
AVDD_DMPLL
V18
AVDD_LPLL_2
W19
WOL_WAKE_UP
R205
10K
0 R169
Y19
WOL_WAKE_UP
C207
10uF
10V
C201
10uF
10V
C247
0.47uF
6.3V
AVDD15_MOD
2A
C316
10uF
10V
C223
10uF
10V
L224
C248
0.47uF
6.3V
C249
0.47uF
6.3V
PZ1608U121-2R0TF
WOL_WAKE_UP_SOC
WOL_WAKE_UP
MCP_VDDC_1
MCP_VDDC_2
AVDD_DDR
PZ1608U121-2R0TF
V17
AVDD_MOD_1
4th layer
1st layer
L200
VDDC_CPU_15
VDDC_CPU_17
AVDD_DDR
1
AE16
AF16
+1.5V_Bypass Cap
AVDD_DMPLL
G10
VDDP_2
VDDC_CPU_16
C320
0.47uF
6.3V
R7
AVDD_DMPLL
VDDC_CPU_20
AB24
Close to chip side
C238
0.47uF
6.3V
C307
U23
AVDDP3P3_MHL
2A
0.1uF
AVDD15_MOD_1
BOTTOM_CAP_FOR_RIPPLE
C261
0.1uF
16V
0.1uF
AVDDL_MHL3_1
L202
PZ1608U121-2R0TF
C308
AVDDL_MOD_3
C244
DVDD_DDR11
AVDDL_MOD_1
U21
U22
0.1uF
V7
AVDDL_USB3_2
+1.1V_VDDC_CPU
AVDD_DMPLL
EMMC_CTRL
AVDDL_PREDRV_1
AVDDL_PREDRV_2
C205
10uF
10V
0.47uF
AF11
4th layer
4th layer
BOTTOM_CAP_FOR_RIPPLE
C250
CTRL_SRAMLDO
C314
AA13
DVDD_DDR11
10uF
AVDDL_MOD11
AD23
0.1uF
V19
4th layer
1st layer
C287
U19
C227
0.1uF
Y20
BOTTOM_CAP_FOR_RIPPLE
C322
Close to chip side
+1.1V_VDDC
AC24
A6
W20
0.1uF
AE22
AVDD_DMPLL
W21
AD30
0.1uF
Close to chip side
AE30
VDDC_22
C257
0.47uF
6.3V
AE21
VDD_SRAM_3
VDDC_21
AVDDL_MOD11
AD29
C324
0.47uF
6.3V
10uF
VDD_SRAM_1
L226
PZ1608U121-2R0TF
FLG
3
4
4th layer
C323
0.1uF
16V
AE20
VDDC_23
Y21
Close to chip side
EN
AE19
AE31
VDDC_18
C299
VDDC_16
0.1uF
VDDC_38
R203
1K
OPT
C278
VDDC_37
VDDC_15
0 R202
DVDD_DDR11
BOTTOM_CAP_FOR_RIPPLE
2A
0.1uF
U13
VDDC_14
WOL_CTL
AD22
+1.1V_VDDC
C204
U12
VDDC_36
AD21
R204
10K
OPT
GND
2
0.1uF
U11
VDDC_13
AD20
OUT
1
0.1uF
T13
VDDC_35
5
0.1uF
C203
T12
VDDC_34
VDDC_12
IN
+3.3V_NORMAL
C242
AD19
0.1uF
T11
VDDC_33
VDDC_11
AD18
C226
R13
VDDC_10
AD17
0.1uF
R12
VDDC_32
C208
10uF
10V
C225
R11
VDDC_31
VDDC_9
PZ1608U121-2R0TF
L203
AC22
C224
L12
VDDC_30
VDDC_8
AC21
0.1uF
L11
VDDC_29
VDDC_7
C263
10uF
10V
C209
L9
L10
VDDC_6
+3.5V_WOL
IC201
AP2151WG-7
AC20
0.1uF
K13
VDDC_28
+3.5V_ST
AC19
0.1uF
K12
VDDC_5
AC18
C235
K11
VDDC_27
0.1uF
K10
VDDC_26
VDDC_4
C234
K9
VDDC_25
VDDC_3
C276
J13
VDDC_2
C230
J12
VDDC_24
0.1uF
J11
+1.1V_Bypass Cap(CLOSE TO CHIP SIDE)
4th layer
1st layer
AC17
VDDC_1
C245
J10
AVDD15_MOD
+1.1V_VDDC_CPU
+1.1V_VDDC
+1.1V_VDDC
N15
AVDD_PLL_A
N16
Close to chip side
AVDD_PLL_B
DVDD_NODIE
VDDP_NAND_A
Close to chip side
VDDP_NAND_C
L13
DVDD_NODIE
DVDD_DDR11
N21
H16
VDDP_3318_A/[3.3V/1.8V]
K21
C200
1uF
25V
DVDD_DDR_1
K16
VDDP_3318_C/[3.3V/1.8V]
AVDD_DDR
DVDD_DDR_2
M21
J21
AVDD_DDR_B_5
AVDD_DDR_B_6
GND JIG POINT
K22
K23
M22
N22
N23
P23
AVDD_DDR_B_7
4th layer
AVDD33_ADC
L22
AVDD_DDR_LDO_B
C294
1uF
25V
2A
AVDD5V_MHL
C268
10uF
10V
H7
AVDD_HDMI_5V_PA
G8
1st layer
R201
0
4th layer
L215
PZ1608U121-2R0TF
L221
PZ1608U121-2R0TF
L18
AVDD_DDR_LDO_A
AVDDP3P3
+3.3V_NORMAL
+3.3V_NORMAL
C295
1uF
25V
C251
0.47uF
6.3V
C252
0.47uF
6.3V
2A
C256
10uF
10V
C222
10uF
10V
AVDD_DDR
C14
C210
Close to chip side
+3.3V_NORMAL
J18
0.47uF
AVDD_DDR_VBN_A_3
C15
0.47uF
C212
0.47uF
C213
J19
J20
AC30
AVDD_DDR_VBP_B_3
AC31
0.47uF
L24
AD32
M24
AVDD_DDR_VBN_B_4
C292
0.47uF
6.3V
0.1uF
0.47uF
C216
L23
0.47uF C220
C221
AVDD_DDR_VBN_B_3
4th layer
HDMI_LEAK
R206
10K
BOTTOM_CAP_FOR_RIPPLE
C215
AD31
AVDD_DDR_VBN_B_2
+5V_NORMAL
L219
PZ1608U121-2R0TF
2A
K24
AVDD_DDR_VBP_B_4
AVDD_DDR_VBN_B_1
C266
0.1uF
C214
0.47uF
C260
10uF
10V
AVDDP3P3_MHL
L201
PZ1608U121-2R0TF
S
AVDD_DDR_VBP_B_2
D
G
VDDP_NAND_A
VISHAY_HDMI_LEAK
Q200-*1
SI1012CR-T1-GE3
BOTTOM_CAP_FOR_RIPPLE
C241
0.47uF
6.3V
Close to chip side
+1.8V
S
2A
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BOTTOM_CAP_FOR_RIPPLE
C240
0.1uF
RUE003N02
Q200
ROHM_HDMI_LEAK
L209
PZ1608U121-2R0TF
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Close to chip side
AVDD_AU33
2A
AVDD_DDR_VBN_A_4
AVDD_DDR_VBP_B_1
Close to chip side
4th layer
L208
PZ1608U121-2R0TF
C219
AVDD_DDR_VBN_A_2
0
R207
non_HDMI_LEAK
C211
B15
AVDD_DDR_VBN_A_1
VDDP_NAND_C
J17
AVDD_DDR_VBP_A_4
R200
10
0.47uF
G
AVDD_DDR_VBP_A_3
B14
C217
10uF
10V
D
AVDD_DDR_VBP_A_2
0.1uF
AVDD_DDR_VBP_A_1
AVDD5V_MHL
5V_HDMI_1
0.1uF
C229
GND_EFUSE
0.1uF
AVDD_DDR_B_4
+3.3V_Bypass Cap
J23
BOTTOM_CAP_FOR_RIPPLE
AVDD_DDR_B_3
L20
BOTTOM_CAP_FOR_RIPPLE
C253
AVDD_DDR_B_2
L19
0.47uF
AVDD_DDR_B_1
L17
BOTTOM_CAP_FOR_RIPPLE
C311
AVDD_DDR_A_7
K19
0.1uF
AVDD_DDR_A_6
K18
C274
AVDD_DDR_A_5
K17
JP205
AVDD_DDR_A_4
JP204
AVDD_DDR_A_3
JP203
AVDD_DDR_A_2
JP202
AVDD_DDR_A_1
DVDD_DDR_4
L21
DVDD_DDR_3
Close to chip side
C236
10uF
10V
C239
0.1uF
LM14A
BSD-15Y-LM14A-002_00-HD
2014-12-21
MAIN2_POWER
2
LGE Internal Use Only
DDR_VTT
DDR_VTT
M0_1_DDR_VREFDQ
C424
C426
M0_DDR_CS2
F19
G22
F21
E21
F20
C19
F15
A20
B20
E15
IO[4]/A-A13[AB-A13]/A-PARITY
IO[85]/B-A12[CD-A12]/B-BG0
IO[74]/B-A13[CD-A13]/B-PARITY
IO[7]/A-A14[AB-A14]/A-A13
IO[81]/B-A14[CD-A14]/B-A13
IO[19]/A-A15[AB-A15]/A-A3
IO[96]/B-A15[CD-A15]/B-A3
IO[24]/A-BA0[AB-BA0]/A-A10
IO[20]/A-BA1[AB-BA1]/A-CASZ
IO[21]/A-BA2[AB-BA2]/A-BA0
IO[88]/B-BA0[CD-BA0]/B-A10
IO[92]/B-BA1[CD-BA1]/B-CASZ
IO[82]/B-BA2[CD-BA2]/B-BA0
IO[15]/A-RASZ[AB-RASZ]/A-ODT
IO[97]/B-RASZ[CD-RASZ]/B-ODT
IO[17]/A-CASZ[AB-CASZ]/A-WEZ
IO[94]/B-CASZ[CD-CASZ]/B-WEZ
IO[16]/A-WEZ[AB-WEZ]/A-A12
IO[25]/A-ODT[AB-ODT]/A-ACTZ
IO[18]/A-CKE[AB-CKE]/A-CKE
IO[1]/A-RST[AB-RST]/A-RST
IO[28]/A-MCLK[AB-MCLK]/A-MCLKZ
IO[27]/A-MCLKZ[AB-MCLKZ]/A-MCLK
IO[89]/B-WEZ[CD-WEZ]/B-A12
IO[95]/B-ODT[CD-ODT]/B-ACTZ
IO[91]/B-CKE[CD-CKE]/B-CKE
IO[76]/B-RST[CD-RST]/B-RST
IO[101]/B-MCLK[CD-MCLK]/B-MCLKZ
IO[100]/B-MCLKZ[CD-MCLKZ]/B-MCLK
IO[23]/A-CSB1[AB-CSB1]/A-CSB1
IO[99]/B-CSB1[CD-CSB1]/B-CSB1
IO[22]/A-CSB2[AB-CSB2]/A-CSB2
D15
L30
J30
L29
G31
J31
M28
L28
L31
K28
N28
N27
L27
M27
M31
G32
N32
M30
G29
IO[98]/B-CSB2[CD-CSB2]/B-CSB2
F32
M1_DDR_A6
M0_DDR_DQ3
M1_DDR_A11
M0_DDR_DQ4
M1_DDR_A12
M0_DDR_DQ5
M1_DDR_ODT
M1_DDR_CKE
K7
K9
L3
VDDQ_2
CK
VDDQ_3
CK
VDDQ_4
VDDQ_5
VDDQ_6
CS
ODT
VDDQ_7
RAS
VDDQ_8
CAS
NC_2
NC_3
NC_4
G3
T1
T9
VSS_2
DQSU
H3
VSSQ_3
DQU2
VSSQ_7
DQU6
B8
VSSQ_6
DQU5
A3
VSSQ_5
DQU4
A2
VSSQ_4
DQU3
A7
VSSQ_8
G2
H7
VSS_3
DML
VSS_4
VSS_5
VSS_6
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
DQL4
VSS_11
DQL5
D1
C3
C8
A7
A2
D8
B7
DML
J8
M1
VSSQ_5
DQU3
VSSQ_6
DQU4
DQU5
VSSQ_7
DQU6
VSSQ_8
VSS_5
E8
VSSQ_5
DQU3
VSSQ_9
VSSQ_9
M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7
M0_DDR_DM0
M0_DDR_DQS0
M0_DDR_DQS_N0
C21
VSSQ_9
B25
C20
C24
B21
C22
A23
B23
IO[120]/B-DQ[0][C-DQL0]/B-DQ[0]
IO[31]/A-DQ[1][A-DQL1]/A-DQ[1]
IO[104]/B-DQ[1][C-DQL1]/B-DQ[1]
IO[48]/A-DQ[2][A-DQL2]/A-DQ[2]
IO[121]/B-DQ[2][C-DQL2]/B-DQ[2]
IO[29]/A-DQ[3][A-DQL3]/A-DQ[3]
IO[102]/B-DQ[3][C-DQL3]/B-DQ[3]
IO[50]/A-DQ[4][A-DQL4]/A-DQ[6]
IO[123]/B-DQ[4][C-DQL4]/B-DQ[6]
IO[30]/A-DQ[5][A-DQL5]/A-DQ[7]
IO[105]/B-DQ[5][C-DQL5]/B-DQ[7]
IO[49]/A-DQ[6][A-DQL6]/A-DQ[4]
IO[122]/B-DQ[6][C-DQL6]/B-DQ[4]
IO[32]/A-DQ[7][A-DQL7]/A-DQ[5]
IO[103]/B-DQ[7][C-DQL7]/B-DQ[5]
IO[33]/A-DQM[0][A-DML]/A-DQM[0]
IO[42]/A-DQS[0][A-DQSL]/A-DQS[0]
IO[41]/A-DQSB[0][A-DQSLB]/A-DQSB[0]
IO[106]/B-DQM[0][C-DML]/B-DQM[0]
IO[115]/B-DQS[0][C-DQSL]/B-DQS[0]
P30
T30
P31
G1
SS_DDR3_2Gb
IC400-*3
K4B2G1646Q-BCMA
U30
P8
P2
R8
R2
T8
M1_DDR_CS1
R3
L7
R7
M1_DDR_CS2
N7
T3
N31
U31
N30
R31
T32
R30
IO[114]/B-DQSB[0][C-DQSLB]/B-DQSB[0]
K7
K9
L3
T8
B2
VDD_1
VDD_2
A11
VDD_3
A12/BC
VDD_4
VDD_5
VDD_6
VDD_7
BA0
VDD_8
VDDQ_6
VDDQ_7
VDDQ_8
CAS
NC_2
DQSL
NC_4
F8
H3
H8
M1_DDR_DM0
G2
H7
VSS_4
VSS_5
VSS_6
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL4
VSS_11
DQL5
C2
C3
C8
A7
A2
M0_DDR_DQ13
M0_DDR_DQ15
M0_DDR_DM1
M0_DDR_DQS1
M0_DDR_DQS_N1
M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23
M0_DDR_DM2
M0_DDR_DQS2
M0_DDR_DQS_N2
E26
D22
E25
E24
D24
E23
IO[36]/A-DQ[12][A-DQU4]/A-DQ[9]
IO[116]/B-DQ[9][C-DQU1]/B-DQ[10]
IO[119]/B-DQ[11][C-DQU3]/B-DQM[1]
IO[111]/B-DQ[12][C-DQU4]/B-DQ[9]
IO[43]/A-DQ[13][A-DQU5]/A-DQ[12]
IO[117]/B-DQ[13][C-DQU5]/B-DQ[12]
IO[34]/A-DQ[14][A-DQU6]/A-DQ[11]
IO[108]/B-DQ[14][C-DQU6]/B-DQ[11]
IO[44]/A-DQ[15][A-DQU7]/A-DQ[8]
IO[37]/A-DQM[1][A-DMU]/A-DQ[14]
IO[40]/A-DQS[1][A-DQSU]/A-DQS[1]
IO[39]/A-DQSB[1][A-DQSUB]/A-DQSB[1]
IO[118]/B-DQ[15][C-DQU7]/B-DQ[8]
IO[110]/B-DQM[1][C-DMU]/B-DQ[14]
IO[113]/B-DQS[1][C-DQSU]/B-DQS[1]
B29
A26
C29
C25
A29
B26
B27
B28
C27
P28
U27
R28
V28
P29
U28
T28
T27
R27
IO[112]/B-DQSB[1][C-DQSUB]/B-DQSB[1]
C28
C26
U29
AA31
IO[69]/A-DQ[16][B-DQL0]/A-DQ[16]
IO[145]/B-DQ[16][D-DQL0]/B-DQ[16]
IO[53]/A-DQ[17][B-DQL1]/A-DQ[17]
IO[126]/B-DQ[17][D-DQL1]/B-DQ[17]
IO[70]/A-DQ[18][B-DQL2]/A-DQ[18]
IO[143]/B-DQ[18][D-DQL2]/B-DQ[18]
IO[54]/A-DQ[19][B-DQL3]/A-DQ[19]
IO[127]/B-DQ[19][D-DQL3]/B-DQ[19]
IO[72]/A-DQ[20][B-DQL4]/A-DQ[22]
IO[142]/B-DQ[20][D-DQL4]/B-DQ[22]
IO[52]/A-DQ[21][B-DQL5]/A-DQ[23]
IO[124]/B-DQ[21][D-DQL5]/B-DQ[23]
IO[71]/A-DQ[22][B-DQL6]/A-DQ[20]
IO[144]/B-DQ[22][D-DQL6]/B-DQ[20]
IO[51]/A-DQ[23][B-DQL7]/A-DQ[21]
IO[125]/B-DQ[23][D-DQL7]/B-DQ[21]
IO[55]/A-DQM[2][B-DML]/A-DQM[2]
IO[64]/A-DQS[2][B-DQSL]/A-DQS[2]
IO[63]/A-DQSB[2]/[B-DQSLB]/A-DQSB[2]
IO[128]/B-DQM[2][D-DML]/B-DQM[2]
IO[137]/B-DQS[2][D-DQSL]/B-DQS[2]
W31
AA30
W32
AB31
V31
AB32
V30
W30
Y30
Y31
IO[136]/B-DQSB[2][D-DQSLB]/B-DQSB[2]
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31
M0_DDR_DM3
M0_DDR_DQS3
M0_DDR_DQS_N3
C31
E27
D31
D29
D30
E28
C30
B31
A31
B30
IO[58]/A-DQ[24][B-DQU0]/A-DQ[31]
IO[131]/B-DQ[24][D-DQU0]/B-DQ[31]
IO[67]/A-DQ[25][B-DQU1]/A-DQ[26]
IO[141]/B-DQ[25][D-DQU1]/B-DQ[26]
IO[56]/A-DQ[26][B-DQU2]/A-DQ[29]
IO[130]_/B-DQ[26][D-DQU2]/B-DQ[29]
IO[66]/A-DQ[27][B-DQU3]/A-DQM[3]
IO[140]/B-DQ[27][D-DQU3]/B-DQM[3]
IO[59]/A-DQ[28][B-DQU4]/A-DQ[25]
IO[65]/A-DQ[29][B-DQU5]/A-DQ[28]
IO[57]/A-DQ[30][B-DQU6]/A-DQ[27]
IO[60]/A-DQ[31][B-DQU7]/A-DQ[24]
IO[68]/A-DQM[3][B-DMU]/A-DQ[30]
IO[62]/A-DQS[3][B-DQSU]/A-DQS[3]
IO[61]/A-DQSB[3][B-DQSUB]/A-DQSB[3]
IO[129]/B-DQ[28][D-DQU4]/B-DQ[25]
IO[139]/B-DQ[29][D-DQU5]/B-DQ[28]
IO[132]/B-DQ[30][D-DQU6]/B-DQ[27]
IO[138]/B-DQ[31][D-DQU7]/B-DQ[24]
IO[133]/B-DQM[3][D-DMU]/B-DQ[30]
IO[135]/B-DQS[3][D-DQSU]/B-DQS[3]
IO[134]/B-DQSB[3][D-DQSUB]/B-DQSB[3]
AB27
V27
AB29
W28
AB28
W27
AA27
Y27
AA28
Y29
DQU6
VSSQ_8
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
CS
ODT
VDDQ_7
RAS
VDDQ_8
CAS
NC_2
NC_3
G3
T9
VSS_1
VSS_2
VSS_3
E7
D3
VSS_4
DML
VSS_5
DMU
VSS_6
E3
G2
H7
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
DQL4
VSS_11
DQL5
K7
K9
L3
K3
C3
C8
C2
A7
D1
A2
B8
VSSQ_6
DQU4
VSSQ_7
DQU5
VSS_6
E3
F7
F2
F8
T1
H3
T9
H8
G2
VSSQ_3
VSSQ_4
VSSQ_5
VSS_3
VSS_4
VSS_5
M1
M9
P1
P9
H7
B1
VSSQ_1
VSSQ_2
DQU1
DQU2
DQU3
VSS_2
DQSU
DML
DMU
VSS_12
DQU0
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
C3
C8
C2
VSS_11
A7
F9
A2
G1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_8
VSSQ_9
B8
G9
A3
VSSQ_5
DQU3
VSSQ_6
DQU4
DQU5
VSSQ_7
DQU6
VSSQ_8
A8
B7
E1
D3
J8
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
VSS_5
DMU
M1
M9
VSS_6
E3
F7
F2
P9
T1
F8
T9
H3
H7
H8
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
DQL3
VSS_10
DQL4
VSS_11
DQL5
C3
C8
C2
E8
A7
F9
VSSQ_9
G1
A2
G9
B8
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
A8
C1
C9
D2
E9
F1
AVDD_DDR
H2
H9
B3
B7
J9
L1
L9
DQSL
J2
VSSQ_5
DQU3
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
A9
VSS_1
DQSU
DQSU
VSS_2
DML
VSS_4
VSS_3
E7
D3
VSS_5
DMU
J8
M1
F7
VSS_6
E3
M9
P1
F2
P9
F8
T1
H3
T9
H8
G2
H7
VSSQ_3
VSSQ_4
B9
E2
VSS_8
DQL1
VSS_9
DQL2
DQL3
VSS_10
DQL4
VSS_11
DQL5
C2
A7
F9
A2
G1
B8
G9
A3
VSSQ_9
B3
AVDD_DDR
AVDD_DDR
E1
G8
J2
M0_1_DDR_VREFDQ
J8
M1
M9
M0_DDR_RESET_N
M0_DDR_VREFDQ
P1
P9
VSS_12
T1
T9
DQL6
DQL7
C3
C8
E8
VSS_7
DQL0
B1
VSSQ_1
D7
D1
D8
M0_DDR_CKE
J1
NC_1
NC_2
NC_3
E1
VDD_6
VDD_7
BA0
VSSQ_2
DQU0
DQU1
VSSQ_3
DQU2
VSSQ_4
VSSQ_5
DQU3
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
B9
D1
D8
E2
E8
1%
10K
R445
F9
G1
VSSQ_9
G9
VSSQ_9
E2
E8
F9
G1
G9
C472
0.1uF
C474
1000pF
50V
C479
0.1uF
VDD_8
R413
56
1%
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
CS
ODT
VDDQ_7
RAS
VDDQ_8
CAS
G7
K2
K8
N1
A8
C1
NC_2
E9
F1
+1.5V_Bypass Cap
Close to DDR Power Pin
H2
H9
J9
L1
L9
NC_4
DQSL
VSSQ_4
VSSQ_5
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
VSS_2
DQSU
VSS_3
J8
M1
F7
F2
F8
T1
H3
T9
H8
G2
B9
D1
VSS_8
VSS_9
DQL2
VSS_10
DQL3
DQL4
VSS_11
DQL5
A7
A2
VSSQ_9
B8
A3
E1
G8
J2
AVDD_DDR
P9
T1
T9
B1
VSSQ_1
VSSQ_2
DQU0
VSSQ_3
DQU1
DQU2
VSSQ_4
DQU3
VSSQ_5
VSSQ_6
DQU4
DQU5
VSSQ_7
DQU6
VSSQ_8
M1_DDR_RESET_N
J8
M1
M9
P1
DQL6
DQU7
G1
G9
B3
VSS_12
DQL7
C3
C8
C2
E8
VSS_6
VSS_7
DQL0
DQL1
D7
D8
E2
F9
VSS_4
VSS_5
E3
M9
P9
DML
DMU
P1
M1_1_DDR_VREFDQ
M1_DDR_VREFDQ
A9
VSS_1
DQSU
E7
D3
AVDD_DDR
AVDD_DDR
C9
D2
J1
NC_1
C7
B7
E1
G8
J2
M1_DDR_CKE
AVDD_DDR
N9
R1
R9
VDDQ_9
NC_3
G3
M0_D_CLKN
D9
A1
VDDQ_1
CK
CK
F3
B3
C477
0.01uF
50V
BA1
RESET
L1
M0_D_CLK
R412
56
1%
C483
1000pF
50V
VDD_9
L9
T7
0.1uF
NC_4
F3
G8
M1_D_CLK
R9
VDDQ_9
RESET
B1
VSSQ_1
VSSQ_2
DQU0
DQU1
DQU2
DQU7
A3
VDDQ_1
VDDQ_2
CK
CK
C7
VSS_12
D7
D1
D8
E2
M0_D_CLK
N1
N9
R1
A1
WE
G3
D9
G7
K2
K8
VDD_9
BA0
T2
T7
DQL6
DQL7
B9
VDD_5
VDD_6
VDD_7
VDD_8
M1_D_CLKN
BA1
DQSL
E7
P1
VDD_2
VDD_3
VDD_4
A13
A14
L9
A9
DQSU
G8
J2
A10/AP
A11
A12/BC
CKE
K3
L3
J9
L1
M0_D_CLKN
B2
L2
K1
J3
H9
0.1uF
C466
M1_DDR_CKE
L8
ZQ
VDD_1
J7
K7
K9
D2
F1
H2
0.1uF
VREFDQ
A6
A7
A8
A9
BA2
C1
NC_6
DQSL
C437
M0_DDR_CKE
H1
A3
A4
A5
NC_5
C9
E9
M8
VREFCA
A0
A1
A2
M2
N8
DQSL
G2
VSSQ_1
M7
J1
NC_1
NC_2
NC_4
C7
B3
VSS_12
DQU0
DQU1
DQU2
DQU7
D8
DQU6
DQU7
A3
VDDQ_8
NC_3
DQL6
DQL7
D7
D1
D8
E2
T7
VDDQ_9
RESET
B1
DQL4
DQL5
B9
E8
VDDQ_5
VDDQ_6
VDDQ_7
RAS
CAS
F3
E7
D3
VDDQ_3
VDDQ_4
CS
ODT
WE
G3
VSS_1
DQSU
G8
J2
J8
VDDQ_1
VDDQ_2
CK
CK
T2
L1
L9
N7
T3
R9
M3
L2
K1
J3
J9
L7
R7
N1
N9
R1
A1
CKE
E9
F1
H2
H9
D9
G7
K2
K8
VDD_9
J7
C1
C9
D2
A9
C7
B7
DQL6
DQL7
D7
B9
B3
E1
VDD_5
VDD_6
VDD_7
VDD_8
NC_4
DQSL
DQSL
DQSU
DQSU
VDD_2
VDD_3
VDD_4
BA0
BA1
BA2
J1
NC_1
RESET
A10/AP
A11
A12/BC
A13
NC_5
VDDQ_9
WE
F3
R2
T8
B9
D1
D8
E2
E8
F9
C516
0.1uF
C517
1000pF
50V
C518
0.1uF
C519
1000pF
50V
M1_D_CLK
R427
56
1%
C497
0.01uF
50V
VSSQ_9
G1
G9
R428
56
1%
M1_D_CLKN
M1_DDR_DQ15
M1_DDR_DM1
M1_DDR_DQS1
M1_DDR_DQS_N1
Hynix_DDR3_4Gb_29n
IC403
H5TQ4G63AFR-RDC
M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ19
M1_DDR_A1
M1_DDR_DQ22
N3
M1_DDR_A0
M1_DDR_DQ21
M1_DDR_A2
M1_DDR_DQ23
P7
P3
N2
M1_DDR_A3
M1_DDR_DM2
M1_DDR_A4
M1_DDR_DQS2
M1_DDR_A5
M1_DDR_DQS_N2
M1_DDR_DQ24
M1_DDR_VREFDQ
Hynix_DDR3_4Gb_29n
IC404
H5TQ4G63AFR-RDC
EAN63053201
M1_DDR_DQ18
M1_DDR_DQ20
P8
P2
R8
M1_DDR_A6
R2
T8
R3
M1_DDR_A9
M1_DDR_DQ25
M1_DDR_A11
M1_DDR_A12
M1_DDR_DQ28
M1_DDR_A13
M1_DDR_DQ29
M1_DDR_A14
M1_DDR_DQ30
L7
M1_DDR_A10
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_A15
R7
T3
T7
M7
M1_DDR_DQ31
M1_DDR_DM3
M1_DDR_BA1
M1_DDR_DQS_N3
A1
A2
A3
ZQ
M1_DDR_BA2
N8
M3
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
VDD_7
VDD_8
BA0
K1
M1_DDR_ODT
J3
M1_DDR_RASN
K3
M1_DDR_CASN
L3
M1_DDR_WEN
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
NC_1
RESET
NC_2
NC_3
G3
A8
C1
C9
D2
E9
F1
H2
H9
C468
C469
0.1uF
0.1uF
J9
L1
L9
NC_4
F3
M1_DDR_DQS0
R9
J1
T2
M1_DDR_DQS_N0
R1
VDDQ_9
WE
M1_DDR_RESET_N
N9
A1
VDDQ_1
L2
M1_DDR_CS1
N1
BA1
CKE
K9
K8
VDD_9
J7
K7
K2
SS_DDR3_4Gb_25n
IC403-*1
K4B4G1646D-BCMA
DQSL
DQSL
P3
M1_DDR_DQS1
B7
M1_DDR_DQS_N1
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
E7
M1_DDR_DM0
DML
VSS_4
DMU
D3
M1_DDR_DM1
VSS_5
VSS_6
E3
M1_DDR_DQ0
F7
M1_DDR_DQ1
F2
M1_DDR_DQ2
F8
M1_DDR_DQ3
H3
M1_DDR_DQ4
H8
M1_DDR_DQ5
G2
M1_DDR_DQ6
H7
M1_DDR_DQ7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
C8
C2
A7
M1_DDR_DQ12
A2
M1_DDR_DQ13
B8
M1_DDR_DQ14
A3
M1_DDR_DQ15
E1
R3
L7
R7
N7
G8
T3
K9
K1
J3
L3
VSSQ_3
VSSQ_4
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
VDDQ_7
RAS
VDDQ_8
CAS
M7
C9
K9
NC_4
F1
H2
H9
K1
J3
K3
L3
J9
G2
H7
DQL0
DQL1
DQL2
DQL3
VSS_7
VSS_8
VSS_9
VSS_10
DQL4
VSS_11
DQL5
B9
D1
A7
C8
DQU1
DQU2
VSSQ_9
C2
A2
B8
A3
VSSQ_3
VSSQ_4
DQU3
VSSQ_5
VSSQ_6
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
E8
F9
G1
G9
+1.5V_Bypass Cap
Close to DDR Power Pin
K2
K8
VDDQ_3
VDDQ_7
RAS
VDDQ_8
CAS
C9
F1
G8
D3
M1
M9
F2
F8
T1
T9
H3
H8
G2
DQL0
DQL1
DQL2
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
K1
H2
J3
K3
DQL3
CS
ODT
VSS_4
VSS_5
VSS_7
VSS_8
VSS_9
VSS_10
DQL4
VSS_11
C9
CAS
NC_3
NC_4
F1
K1
J3
K3
L3
J9
G8
D3
M1
M9
F2
F8
T1
T9
H3
H8
H7
VSSQ_3
VSSQ_4
DQU3
VSSQ_5
VSSQ_6
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
DQL0
DQL1
DQL2
DQL3
C8
E2
C2
E8
A7
F9
VSS_7
VSS_8
VSS_9
VSS_10
DQL4
VSS_11
DQL5
A2
G1
B8
G9
A3
DQU1
NC_2
G8
VSSQ_3
DQU2
VSSQ_4
VSSQ_5
DQU4
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
ODT
VDDQ_6
VDDQ_7
RAS
VDDQ_8
CAS
M1
M9
F2
F8
T1
T9
H3
H8
G2
VSSQ_6
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
0.1uF
C491
0.1uF
L1
L9
R1
N2
P8
VSS_4
VSS_5
VSS_6
DQL0
DQL1
DQL2
DQL3
DQSU
VSS_7
VSS_8
VSS_9
VSS_10
DQL4
VSS_11
DQL5
VSS_3
VSSQ_2
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSS_5
VSS_6
E3
F1
M1_DDR_DQ16
J9
L1
M1_DDR_DQ17
B3
M1_DDR_DQ22
M1_DDR_DQ23
VSSQ_6
VSSQ_7
DQU6
VSSQ_8
DQU7
D8
E2
E8
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
A3
M1_DDR_DQ31
VSSQ_4
VSSQ_8
DQU7
M1_DDR_DQ30
VSSQ_3
DQU3
A2
VSSQ_2
DQU2
B8
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
BA0
M1
K3
L3
P1
RAS
VDDQ_8
CAS
RESET
NC_2
NC_3
NC_4
DQSL
DQSU
T9
F2
F8
VSS_4
VSS_3
VSS_5
DQL0
VSS_7
VSS_6
H8
DQL1
DQL2
C8
C2
A7
A2
B8
VSS_8
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VDD_5
VDD_6
VDD_7
VDD_8
BA0
L7
R7
N7
T3
R9
RAS
VDDQ_8
CAS
A8
NC_1
RESET
K3
J2
NC_2
NC_3
B7
J9
P1
F2
P9
F8
H3
T9
H8
G2
H7
VSSQ_5
VSSQ_6
VSSQ_7
DQU6
VSSQ_8
VSSQ_9
VSS_3
VSS_5
VSS_7
VSS_6
B9
VSS_10
VSS_11
C2
A7
F9
A2
G1
B8
DQL5
G9
A3
J2
VDDQ_8
NC_1
NC_2
NC_4
J9
P1
F2
P9
F8
T1
H3
VSSQ_5
VSSQ_6
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VSS_3
VSS_5
VSS_7
VSS_6
T9
H8
G2
B9
VSS_10
VSS_11
C2
A7
F9
A2
G1
B8
DQL5
G9
A3
N1
N9
R1
R9
VDD_9
VIN
A1
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
A8
C421
10uF
10V
D2
E9
F1
H2
H9
NC_2
NC_3
B7
J9
L1
R443
10K
P1
VSSQ_5
VSSQ_6
VSSQ_7
F2
P9
F8
T1
H3
T9
H8
G2
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_4
VSS_3
VSS_5
DQL0
VSS_7
VSS_6
VSS_8
VSS_9
VSS_10
VSS_11
C2
A7
F9
A2
G1
B8
DQL5
G9
A3
B3
E1
G8
J2
J8
M1
M9
P1
P9
VSS_12
T1
T9
DQL6
DQL7
C3
C8
E2
DQL1
DQL2
DQL3
DQL4
B1
VSSQ_1
D7
D1
D8
E8
VSS_1
VSS_2
DML
DMU
H7
VSSQ_3
VSSQ_4
DQU4
DQU5
A9
DQSU
DQSU
D3
E3
F7
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
2
DDR_VTT
L9
NC_4
DQSL
E7
GND
J1
NC_1
RESET
F3
1
8
NC_3
C1
C9
VDDQ_9
T2
G3
J2
J8
M1
M9
B1
VSSQ_1
VSSQ_2
DQU1
DQU2
DQU3
VDD_5
VDD_6
VDD_7
VDD_8
BA0
D9
G7
K2
K8
BA1
C7
B3
E1
G8
VSS_12
DQU0
A13
A14
WE
T7
IC402
AP2303MPTR-G1 [EP]
B2
VDD_2
VDD_3
CKE
L1
+3.3V_NORMAL
L8
ZQ
VDD_1
BA2
K3
AVDD_DDR
H1
VREFDQ
VDD_4
L9
DQL6
DQL7
C3
C8
E2
VSS_8
VSS_9
DQL3
DQL4
D7
D1
D8
E8
DQL1
A10/AP
A11
A12/BC
DQSL
VSS_4
DQL0
DQL2
A6
A7
A8
A9
NC_5
L3
NC_6
VSS_1
VSS_2
DML
DMU
H7
VSSQ_3
VSSQ_4
DQU4
DQU5
DQSU
A3
A4
A5
L2
K1
J3
A9
DQSL
DQSU
D3
E3
F7
VREFCA
A1
A2
J7
K7
K9
H9
M8
A0
M2
N8
D2
E9
F1
H2
J1
NC_3
B7
E7
B1
VSSQ_1
VSSQ_2
DQU1
DQU2
DQU3
M7
A8
C1
C9
VDDQ_9
C7
J8
M1
M9
VSS_12
DQU0
RAS
CAS
F3
B3
E1
G8
DQL6
DQL7
C3
C8
E2
VSS_8
VSS_9
DQL3
DQL4
D7
D1
D8
E8
DQL1
T7
R9
M3
VDDQ_5
VDDQ_6
VDDQ_7
DQSL
VSS_4
DQL0
DQL2
N1
N9
R1
A1
VDDQ_2
VDDQ_3
VDDQ_4
CS
ODT
RESET
L7
R7
N7
T3
VDD_9
VDDQ_1
CK
CK
T2
G3
VSS_1
VSS_2
DML
DMU
T1
VDD_5
VDD_6
VDD_7
VDD_8
BA0
D9
G7
K2
K8
BA1
WE
L1
A9
DQSU
DQSU
D3
E3
F7
VDD_2
VDD_3
L9
NC_4
DQSL
E7
J8
M1
M9
R2
T8
CKE
L3
R3
P8
P2
BA2
J1
N2
R8
B2
ZQ
VDD_1
VDD_4
L2
K1
J3
H9
A10/AP
N3
P7
P3
H1
L8
VREFDQ
A11
NC_5
K7
K9
D2
F1
H2
VDDQ_9
EAN63648701
VREFCA
A12/BC
J7
C1
C9
E9
A6
A7
A8
A9
M2
N8
M3
VDDQ_5
VDDQ_6
VDDQ_7
A3
A4
A5
M7
A1
VDDQ_2
VDDQ_3
VDDQ_4
CS
ODT
A0
A1
A2
A13
N1
N9
R1
VDD_9
VDDQ_1
CK
CK
F3
G3
D9
G7
K2
K8
BA1
C7
B3
E1
G8
B1
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
DQU4
DQU5
DQU7
A3
A13
A14
T2
T7
VSS_12
DQU1
DQU2
DQU3
VDD_3
VDD_4
L9
DQL6
DQU0
VDD_2
A11
DQSL
VSS_2
DML
DMU
H3
B9
J9
R2
T8
WE
L1
R3
P8
P2
CKE
K3
N2
R8
B2
ZQ
VDD_1
M8
N3
P7
P3
H1
L8
VREFDQ
BA2
L3
NC_6
VSS_1
DQSU
D3
E3
F7
A10/AP
Hynix_DDR3_2Gb
IC404-*4
H5TQ2G63FFR-RDC
EAN63667401
VREFCA
A12/BC
NC_5
DQSL
B7
A6
A7
A8
A9
L2
K1
J3
A9
F3
A3
A4
A5
J7
K7
K9
H9
A0
A1
A2
M2
N8
D2
E9
F1
H2
J1
NC_1
T2
G3
M7
A8
C1
C9
VDDQ_9
E7
T1
T7
R9
M3
VDDQ_5
VDDQ_6
VDDQ_7
C7
P9
N1
N9
R1
A1
VDDQ_2
VDDQ_3
VDDQ_4
CS
ODT
WE
M9
L7
R7
N7
T3
VDD_9
VDDQ_1
CK
CK
CKE
L2
K1
J3
D9
G7
K2
K8
BA1
J7
K7
R2
T8
A11
NC_5
N8
M3
R3
P8
P2
A12/BC
M7
K9
J8
N2
R8
B2
ZQ
VDD_1
M8
N3
P7
P3
H1
L8
VREFDQ
DQL7
DQU1
A7
M1_DDR_DQ28
M1_DDR_DQ29
A10/AP
SS_DDR3_2Gb
IC404-*3
K4B2G1646Q-BCMA
EAN63053202
VREFCA
BA2
J2
C3
DQU0
C2
M1_DDR_DQ27
A6
A7
A8
A9
D7
C8
M1_DDR_DQ26
A3
A4
A5
M2
G8
G2
C3
M1_DDR_DQ25
A0
A1
A2
A13
E1
B1
VSSQ_1
D7
M1_DDR_DQ24
F9
G1
G9
N7
H7
DQL7
VSSQ_9
R7
T3
VSS_12
B9
D1
T8
R3
L7
B3
DQL6
H7
T1
T9
VSS_11
DQL5
G2
M1
M9
P1
P9
VSS_10
DQL4
H8
VSS_9
DQL3
H3
M1_DDR_DQ21
VSS_7
VSS_8
DQL2
F8
M1_DDR_DQ20
G8
J2
J8
DQL1
F2
M1_DDR_DQ18
L9
E1
DQL0
F7
H2
H9
B1
VSSQ_1
DQU5
VSS_4
DMU
C9
D2
E9
VSS_12
DQU1
VSS_2
DML
D3
A8
C1
DQL6
DQU0
VSS_1
E7
M1_DDR_DM2
M1_DDR_DM3
Hynix_DDR3_4Gb_25n
IC404-*2
H5TQ4G63CFR_RDC
M8
N3
P7
DQSU
M1_DDR_DQS_N3
R9
M1_DDR_DQ19
VSS_3
DML
SS_DDR3_4Gb_25n
IC404-*1
K4B4G1646D-BCMA
EAN63391401
K2
K8
N1
N9
* DDR_VTT
J9
P3
B7
A9
D7
C3
M1_DDR_DQS3
NC_4
DQL7
B9
D1
C490
H9
P2
J1
NC_1
NC_2
VSS_1
VSS_2
E3
F7
P1
H2
A9
D9
VDDQ_9
DQSU
DMU
P9
E9
F1
DQSL
C7
G7
DQSL
E7
D3
D2
DQSL
G3
A1
NC_3
H7
VSSQ_2
DQU3
DQU5
VDD_7
VDD_9
VDDQ_2
DQSU
B1
VSSQ_1
DQU0
VDD_4
VDD_5
VDD_6
VDDQ_1
CK
WE
J2
VSS_12
D7
C3
B2
VDD_1
VDD_2
VDD_3
VDD_8
BA0
RESET
J8
DQL6
DQL7
B9
D1
D8
VSS_4
VSS_5
VSS_6
E3
F7
P1
P9
L8
C7
B7
C9
NC_4
F3
ZQ
BA1
F3
G3
B3
E1
C1
R8
DQSL
VSS_3
DML
DMU
A13
A14
L9
T7
A9
E7
J2
J8
A12/BC
T2
L1
A8
R2
A8
A9
A10/AP
A11
CKE
H2
R9
J1
NC_1
RESET
H1
A5
A6
L2
H9
NC_6
VSS_1
VSS_2
R1
VDDQ_9
T2
VREFDQ
BA2
K9
N9
VREFCA
A7
NC_5
D2
E9
N1
A1
A2
A3
A4
J7
K7
J1
NC_1
NC_2
DQSU
DQSU
G2
VSSQ_2
DQU4
DQU5
VDDQ_6
VDDQ_7
VDDQ_8
DQSL
A0
M2
N8
A8
C1
VDDQ_9
WE
B7
B1
VSSQ_1
DQU1
VDDQ_3
VDDQ_4
C7
B3
E1
VSS_12
DQU2
M7
M3
RAS
RESET
N7
T3
T7
R1
R9
DQSL
DQL5
DQU0
L7
R7
K2
K8
N1
N9
A1
CAS
L9
R3
D9
G7
VDD_9
VDDQ_2
VDDQ_5
T2
L1
DQL6
D7
C3
CK
F3
DQL7
B9
D1
VDD_7
VDD_8
CKE
G3
VSS_6
E3
F7
P1
P9
K9
L3
VSS_3
DML
VDD_4
VDD_5
VDD_6
VDDQ_1
CK
L2
A9
VSS_1
VSS_2
DMU
B2
VDD_1
VDD_2
VDD_3
BA1
NC_4
DQSU
E7
J2
A12/BC
BA0
R8
R2
T8
BA2
H9
J9
L8
ZQ
A8
A9
A10/AP
A11
NC_5
J1
NC_1
NC_2
P2
A5
A6
A13
D2
E9
P3
N2
P8
K8
M8
N3
P7
H1
VREFDQ
A7
J7
K7
DQSL
DQSU
J8
VDDQ_8
WE
M1_DDR_DQS_N2
EAN63648701
VREFCA
A1
A2
A3
A4
M2
A8
C1
VDDQ_9
NC_3
A0
M7
R1
R9
M3
VDDQ_4
ODT
R3
L7
R7
N7
T3
N1
N9
N8
WE
H7
VSSQ_2
DQU4
DQU5
D9
G7
A1
VDDQ_5
RESET
B1
VSSQ_1
E2
VDD_7
VDD_9
C7
B7
VSS_12
DQL7
DQU0
VDD_4
VDD_5
VDD_6
VDDQ_6
F3
G3
B3
E1
DQL6
D7
C3
D8
VSS_4
VSS_5
VSS_6
E3
B2
VDD_1
VDD_2
VDD_3
VDDQ_2
DQSL
VSS_3
DML
DMU
CK
R8
R2
T8
CS
L9
A9
VSS_1
VSS_2
E7
D3
P2
L8
ZQ
VDD_8
T2
L1
T7
P3
N2
P8
VDDQ_1
L2
VDDQ_7
RAS
L3
M1_DDR_DQS2
Hynix_DDR3_2Gb
IC403-*4
H5TQ2G63FFR-RDC
M8
N3
P7
H1
VREFDQ
CKE
D2
E9
NC_6
DQSU
DQSU
T9
SS_DDR3_2Gb
IC403-*3
K4B2G1646Q-BCMA
EAN63667401
VREFCA
BA1
CK
ODT
K3
VDDQ_6
NC_3
BA2
J1
NC_1
NC_2
NC_3
DQSL
A12/BC
NC_5
BA0
CS
J3
M1_DDR_RESET_N
A8
A9
A10/AP
A11
A13
VDDQ_4
L2
M1_DDR_WEN
A5
A14
VDDQ_3
VDDQ_5
K1
M1_DDR_CASN
A7
J7
K7
VDDQ_2
CK
CKE
M1_DDR_RASN
A4
A6
CK
K9
M1_DDR_ODT
K2
A1
VDDQ_1
K7
M1_DDR_CS2
G7
BA1
J7
M1_D_CLK
M1_D_CLKN
D9
VDD_9
BA2
M1_DDR_CKE
A2
A3
BA0
M3
M1_DDR_BA2
M8
A0
VDD_8
N8
M1_DDR_BA1
A1
M2
N8
A8
C1
VDDQ_9
WE
C7
B7
H3
VSSQ_2
VDDQ_3
VDDQ_4
VDDQ_5
ODT
R3
L7
R7
N7
T3
T7
R1
R9
M3
VDDQ_6
F3
H8
DQU3
K2
K8
N1
N9
DQSL
T1
F7
DQU2
CK
T2
G3
D9
G7
A1
CS
RESET
P9
VDD_7
VDD_8
VDD_9
VDDQ_2
CKE
K3
P1
VDD_4
VDD_5
VDD_6
VDDQ_1
CK
L2
M9
B2
VDD_1
VDD_2
VDD_3
BA2
F2
DQU1
A12/BC
BA0
R8
R2
T8
A8
A9
A10/AP
A11
NC_5
M1
L8
ZQ
BA1
J7
K7
F8
DQU0
A5
A6
A13
M3
P3
N2
P8
P2
VDD_7
M2
M1_DDR_BA0
N3
P7
H1
VREFDQ
A7
M2
N8
J8
VREFCA
A2
A3
A4
VDD_6
NC_5
M7
M1_DDR_A15
VDD_5
A14
T7
M1_DDR_A14
VDD_3
VDD_4
A13
T3
M1_DDR_A13
EAN63053202
M8
A0
A1
M7
J2
B1
VSSQ_1
DQU7
C3
M1_DDR_DQ9
R8
R2
T8
DQL6
D7
M1_DDR_DQ8
M1_DDR_DQ10
B3
VSS_12
DQL7
M1_DDR_DQ11
N2
P8
P2
VDD_2
A11
A12/BC
N7
M1_DDR_A12
Hynix_DDR3_4Gb_25n
IC403-*2
H5TQ4G63CFR_RDC
EAN63391401
N3
P7
C7
VDD_1
A10/AP
R7
M1_DDR_A11
B2
A9
L7
M1_DDR_A10
G7
240
AVDD_DDR
A8
R3
R419
ZQ
A7
T8
M1_DDR_A9
D9
L8
A6
R2
M1_DDR_A7
H1
VREFDQ
A5
R8
M1_DDR_A8
B2
M8
VREFCA
A4
P2
M1_DDR_A6
AVDD_DDR
A7
BA2
M1_D_CLK
240
A3
P8
M1_DDR_A5
R404
A2
N2
M1_DDR_A4
L8
A1
P3
M1_DDR_A3
VREFDQ
A0
P7
M1_DDR_A2
H1
DDR3
4Gbit
(x16)
N3
M1_DDR_A0
M1_DDR_A1
A5
A6
M1_1_DDR_VREFDQ
EAN63053201
M8
VREFCA
A4
M2
M1_DDR_BA0
M1_DDR_DQS3
DDR3
4Gbit
(x16)
A0
NC_5
N7
M1_D_CLKN
VREFEN
1/16W
1%
VOUT
7
3
6
4
5
C544
10uF
10V
NC_2
VCNTL
NC_1
B9
D1
D8
E2
E8
F9
G1
VSSQ_9
G9
VSSQ_9
D1
D8
E2
E8
C414
10uF
10V
C417
10uF
10V
C535
10uF
10V
C543
0.1uF
16V
F9
G1
G9
+1.5V_Bypass Cap
Close to DDR Power Pin
AVDD_DDR
0.1uF
0.1uF
0.1uF
C444
C445
C446
AVDD_DDR
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
VSSQ_7
L3
T2
P8
P2
M1_DDR_DQ14
M1_DDR_CKE
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
VSSQ_6
VDDQ_2
CK
CK
CKE
L2
K1
J3
K3
L9
T7
R3
P7
P3
ZQ
VDD_1
M2
M3
A8
R8
B2
VREFDQ
A6
A7
A8
A9
M7
N8
J9
L1
R7
N7
T3
N9
R1
R9
N3
N2
L8
A3
A4
A5
M1_DDR_DQ13
M1_DDR_A8
Y28
VSSQ_5
DQU5
K7
K9
F1
H2
H9
M8
VREFCA
A0
A1
A2
M1_DDR_DQ12
M1_DDR_A7
E29
VSSQ_4
DQU4
C1
C9
D2
L7
G7
K2
K8
N1
A1
VDDQ_1
A9
C7
B7
H8
DQU3
0.1uF
IO[46]/A-DQ[11][A-DQU3]/A-DQM[1]
IO[109]/B-DQ[8][C-DQU0]/B-DQ[15]
IO[107]/B-DQ[10][C-DQU2]/B-DQ[13]
T1
H3
C403
IO[38]/A-DQ[10][A-DQU2]/A-DQ[13]
VDD_5
A14
0.1uF
IO[45]/A-DQ[9][A-DQU1]/A-DQ[10]
0.1uF
F23
P27
IO[35]/A-DQ[8][A-DQU0]/A-DQ[15]
VDD_3
VDD_4
A13
C402
D27
0.1uF
E22
C401
D26
NC_3
R3
BA1
E9
NC_6
NC_4
VDD_6
VDD_7
VDD_8
T8
D9
VDD_9
BA0
BA2
J1
NC_1
NC_2
VDD_3
VDD_4
VDD_5
A14
J7
DQSL
F7
DQU2
VDDQ_6
VDDQ_7
VDDQ_8
DQSL
A11
A12/BC
A13
NC_5
M3
A8
VDDQ_9
WE
F2
VSSQ_3
VDDQ_4
VDDQ_5
CS
ODT
RAS
CAS
RESET
F8
DQU1
VDDQ_3
CK
F3
G3
R2
M2
N8
T2
P8
P2
R8
B2
VDD_1
VDD_2
B2
VDD_1
VDD_2
A11
A12/BC
WE
H7
VSSQ_2
VSSQ_3
DQU2
DQU3
DQU4
L3
M7
N2
L8
ZQ
A7
A8
A9
A10/AP
H1
N3
P7
P3
H1
VREFDQ
A4
A5
A6
R9
A1
CKE
K1
J3
K3
P9
N7
T3
T7
R1
VREFCA
A0
A1
A2
A3
A7
A8
A9
A10/AP
T2
B1
VSSQ_1
DQU0
DQU1
K9
P1
R7
K2
K8
N1
N9
VDD_9
VDDQ_1
VDDQ_2
CK
L2
M9
B1
VSSQ_2
VDD_7
VDD_8
R3
L7
0.1uF
L8
CKE
L3
DQL6
D7
M1_DDR_DQS_N0
K7
M1
T8
D9
G7
BA1
BA2
DQL6
VSSQ_1
VDD_4
VDD_5
VDD_6
NC_5
BA0
J7
VSS_12
DQU0
A12/BC
A13
M3
R8
R2
B2
VDD_1
VDD_2
VDD_3
M2
N8
J8
P2
L8
ZQ
A8
A9
A10/AP
A11
M7
J2
N2
P8
A5
A6
A7
C436
EAN63648701
H1
L2
K1
J3
K3
J9
VSS_12
DQL7
M1_DDR_DQS0
T3
P7
P3
H1
VREFDQ
A4
EAN63667401
M8
M8
DQSL
VSS_2
VSS_3
DML
DQL3
N7
G8
A1
A2
A3
AR413
56
1/16W
AR406
56
1/16W
Hynix_DDR3_2Gb
IC401-*4
H5TQ2G63FFR-RDC
EAN63053202
ZQ
BA2
K7
K9
E9
F1
H2
H9
A9
VSS_1
DQSU
E3
F7
F2
SS_DDR3_2Gb
IC401-*3
K4B2G1646Q-BCMA
M1_DDR_RASN
VREFDQ
J7
C1
C9
D2
NC_6
DQSU
AVDD_DDR
R3
L7
R7
M1_DDR_ODT
0.1uF
A4
A5
A6
NC_5
J1
NC_1
DMU
M1_DDR_DQ6
DQL5
P2
R8
R2
T8
E1
C435
VREFCA
A0
DDR3 1.5V bypass Cap - Place these caps near Memory
M0_DDR_DQ12
M0_DDR_DQ14
D23
M7
DQSL
M1_DDR_DQ7
A3
M0_DDR_ODT
A1
A2
A3
M2
N8
A8
VDDQ_9
E7
D3
C400
M0_DDR_DQ9
N7
T3
T7
M3
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
CS
ODT
RAS
DQU7
M0_DDR_DQ8
R7
N9
R1
R9
A1
VDDQ_1
CK
CK
C7
B8
M0_DDR_DQ10
L7
G7
K2
K8
N1
BA1
NC_3
A3
M0_DDR_DQ11
R3
D9
VDD_9
RESET
G3
R8
R2
A7
A8
A9
A10/AP
F3
B7
P8
P2
WE
M1_DDR_DQ5
P7
P3
T2
M1_DDR_DQ4
N2
L8
ZQ
CKE
K1
J3
K3
N3
H1
VREFDQ
A4
A5
A6
L2
+1.5V_Bypass Cap
Close to DDR Power Pin
VSS_11
N2
P8
B3
M1_DDR_CASN
M0_DDR_RASN
N3
0.1uF
C465
AR412
56
1/16W
M1_DDR_WEN
M0_DDR_CASN
Hynix_DDR3_4Gb_25n
IC401-*2
H5TQ4G63CFR_RDC
VREFCA
0.1uF
C464
M1_DDR_A10
AR405
56
1/16W
M8
A0
0.1uF
0.1uF
C463
M1_DDR_A15
EAN63648701
M8
VREFCA
A0
A1
A2
A3
J7
M1_DDR_DQ0
M1_DDR_DQ3
B8
M0_DDR_DQ31
Hynix_DDR3_2Gb
IC400-*4
H5TQ2G63FFR-RDC
EAN63667401
P7
P3
M1_DDR_DQ1
A2
M0_DDR_DQ30
G9
N3
M1_DDR_DQ2
A7
M0_DDR_DQ28
N2
DQL4
DQU7
C2
M0_DDR_DQ27
A13
T31
IO[47]/A-DQ[0][A-DQL0]/A-DQ[0]
C8
M0_DDR_DQ26
M0_DDR_DQ29
BA2
B24
G1
G9
F9
N8
B22
M0_DDR_DQ25
F9
VSSQ_7
VSSQ_8
DQU7
C3
E8
VSSQ_6
DQU5
DQU6
E8
M1_D_CLKN
VSS_9
VSS_10
DQL7
M0_DDR_DQ24
D8
E2
E2
M1_DDR_RESET_N
VSS_8
DQL2
DQL3
D7
D1
VSSQ_3
VSSQ_4
DQU4
A2
B8
A3
M1_D_CLK
VSS_7
DQL1
B1
B9
VSSQ_2
DQU1
DQU2
A7
F9
G1
H7
M0_DDR_DQ23
T1
T9
VSSQ_1
DQU0
C3
C8
C2
G9
G2
M0_DDR_DQ22
P9
VSS_10
VSS_11
VSS_12
D7
D1
D8
E2
VSS_6
DQL0
DQL6
DQL7
B9
M3
C23
J8
P1
VSS_9
DQL2
DQL3
DQL4
DQL5
G2
M9
VSS_8
DQL1
F8
H3
H8
M1
VSS_7
DQL0
F7
F2
P9
T1
T9
M0_DDR_DQ21
J2
VSS_6
E3
M9
P1
H7
VSSQ_2
VSSQ_3
VSSQ_4
G8
VSS_4
DMU
H8
E1
VSS_3
E7
D3
B1
VSSQ_1
B3
VSS_2
DQSU
E1
G8
J2
NC_5
M0_DDR_DQ2
H3
M0_DDR_DQ20
A9
M7
M0_DDR_DQ1
F8
M0_DDR_DQ19
VSS_1
DQSU
M2
M0_DDR_DQ0
F2
M0_DDR_DQ18
L1
L9
C7
B3
VSS_12
DQU0
DQU1
DQU2
DQU7
B8
A3
J1
J9
NC_2
NC_4
G3
F7
M0_DDR_DQ17
H2
H9
NC_1
NC_3
DQL6
DQL7
D7
C2
VDDQ_9
RESET
DQSL
DQSL
DMU
B9
M0_DDR_DQ16
E9
F1
VDDQ_7
VDDQ_8
CAS
WE
F3
E3
C1
C9
D2
VDDQ_6
CS
ODT
RAS
L3
T2
L1
L9
T7
A9
VSS_1
DQSU
E7
D3
VDDQ_2
VDDQ_4
VDDQ_5
L2
K1
J3
K3
J9
VSS_5
A8
VDDQ_3
CK
CKE
E9
F1
H2
VSS_4
A1
CK
K7
K9
D2
H9
M0_DDR_DM3
DML
DMU
D3
R1
R9
VDDQ_1
DQSL
C7
B7
H8
DQU1
C1
C9
M0_DDR_DM2
N9
VDD_7
VDD_8
VDD_9
BA1
BA2
NC_6
VSS_3
E7
K8
N1
VDD_6
NC_5
BA0
J7
J1
NC_1
RESET
DQSL
F3
VSS_2
G7
K2
VDD_4
VDD_5
A14
N8
VSS_1
D9
VDD_3
A12/BC
A13
M7
M2
A8
VDDQ_9
WE
T2
P9
VDD_1
VDD_2
A11
N7
T3
T7
N9
R1
R9
M3
CKE
K1
J3
K3
P1
R7
G7
K2
K8
N1
A9
DQSU
DQSU
B7
M0_DDR_DQS_N3
B2
A9
A10/AP
A1
L2
M9
F7
VSSQ_2
DQU7
M0_DDR_DQ15
M1
F8
C2
M0_DDR_DQ14
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
E3
C8
M0_DDR_DQ11
M0_DDR_DQ13
VDD_3
VDD_4
VDD_5
BA1
BA2
B1
VSSQ_1
DQU0
C3
M0_DDR_DQ12
A11
A12/BC
NC_5
P3
M0_DDR_DQS3
L8
ZQ
A7
A8
L7
C7
H1
VREFDQ
A6
R3
D9
M0_DDR_A10
M0_DDR_WEN
EAN63391401
P7
A4
A5
R8
R2
T8
BA0
SS_DDR3_4Gb_25n
IC401-*1
K4B4G1646D-BCMA
DQSL
A1
A2
A3
P8
P2
A13
N8
NC_4
DQSL
VREFCA
A0
P7
B2
VDD_1
VDD_2
J7
L9
M8
P3
L8
ZQ
A7
A8
A9
A10/AP
M7
M3
N2
VREFDQ
A4
A5
M2
J8
F2
DQL7
M0_DDR_DQ10
M1_DDR_BA2
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
N7
T3
J2
VSS_12
D7
M0_DDR_DQ9
R7
G8
DQL6
H7
M0_DDR_DQ8
M1_DDR_BA1
VSS_11
DQL5
G2
M0_DDR_DQ7
VSS_10
DQL4
H8
VSS_9
DQL3
H3
M1_DDR_A15
M1_DDR_BA0
VSS_8
DQL2
F8
M0_DDR_DQ6
M1_DDR_A13
M1_DDR_A14
VSS_7
DQL1
F2
M0_DDR_DQ2
M1_DDR_A10
DQL0
F7
M0_DDR_DQ1
M1_DDR_A8
VSS_6
E3
M0_DDR_DQ0
M1_DDR_A7
M1_DDR_A9
VSS_5
L1
0.1uF
C461
C462
M1_DDR_BA2
M0_DDR_A15
1K
R418
G30
VSS_4
DMU
J9
C434
M0_DDR_BA2
OPT
IO[84]/B-A11[CD-A11]/B-A7
J32
DML
D3
H1
A1
A2
A6
0.1uF
N3
N3
VREFCA
A0
NC_2
F3
G3
0.1uF
C441
EAN63053202
M8
A3
RESET
M0_DDR_DQS2
C440
0.1uF
0.1uF
0.1uF
AR411
56
1/16W
M1_DDR_BA0
1K
R405
IO[93]/B-A10[CD-A10]/B-RASZ
H31
M0_DDR_DM1
T8
R3
L7
NC_1
T2
M0_DDR_DQS_N2
H2
H9
J1
NC_3
Hynix_DDR3_4Gb_25n
IC400-*2
H5TQ4G63CFR_RDC
F1
C433
AR404
56
1/16W
M0_DDR_BA0
R416
IO[26]/A-A12[AB-A12]/A-BG0
IO[77]/B-A8[CD-A8]/B-A9
VSS_3
E7
M0_DDR_DM0
M1_DDR_A5
P8
P2
R8
R2
E1
VDDQ_9
WE
M0_DDR_RESET_N
E9
0.1uF
M1_DDR_A5
M1_DDR_A3
1K
R433
M0_DDR_CS1
C18
IO[6]/A-A11[AB-A11]/A-A7
IO[78]/B-A7[CD-A7]/B-A2
M1_DDR_A3
M1_DDR_A4
P3
N2
B3
VDDQ_8
CAS
D2
C432
C459
C460
M1_DDR_A2
M1_DDR_A0
CIS21J121
L401
M0_D_CLK
M0_D_CLKN
E19
IO[9]/A-A10[AB-A10]/A-RASZ
IO[90]/B-A6[CD-A6]/B-A1
IO[73]/B-A9[CD-A9]/B-A11
K32
VSS_2
VDDQ_7
RAS
C9
0.1uF
OPT
M0_DDR_CKE
M0_DDR_RESET_N
E20
IO[5]/A-A9[AB-A9]/A-A11
J28
VSS_1
DQSU
ODT
C1
0.1uF
C431
1K
R422
M0_DDR_ODT
B16
IO[0]/A-A8[AB-A8]/A-A9
K30
A9
DQSU
B7
L3
M0_DDR_WEN
VDDQ_6
A8
C430
M0_DDR_A2
M0_DDR_A5
M0_DDR_A3
M0_DDR_A0
1%
M0_DDR_WEN
F16
IO[13]/A-A7[AB-A7]/A-A2
IO[86]/B-A5[CD-A5]/B-A0
C7
M0_DDR_DQS1
M0_DDR_DQS_N1
VDDQ_5
CS
0.1uF
AR410
56
1/16W
AR403
56
1/16W
R446
10K
M0_DDR_CASN
D20
IO[10]/A-A6[AB-A6]/A-A1
IO[79]/B-A3[CD-A3]/B-A4
IO[87]/B-A4[CD-A4]/B-BA1
P7
M1_DDR_A0
M1_DDR_A1
J3
K3
M0_DDR_CASN
EAN63391401
N3
M1_DDR_A2
VDDQ_4
M1_DDR_A9
M1_DDR_A7
M0_DDR_A7
9
M0_DDR_BA2
M0_DDR_RASN
B17
IO[14]/A-A5[AB-A5]/A-A0
K27
VDDQ_3
C458
M1_DDR_A13
M0_DDR_A9
THERMAL
M0_DDR_BA1
B19
IO[11]/A-A4[AB-A4]/A-BA1
J29
VDDQ_2
0.1uF
M0_DDR_A13
10K
R444
M0_DDR_A15
E16
IO[12]/A-A3[AB-A3]/A-A4
K31
K1
M0_DDR_ODT
M0_DDR_RASN
R9
A1
VDDQ_1
CK
L2
M0_DDR_CS2
SS_DDR3_4Gb_25n
IC400-*1
K4B4G1646D-BCMA
DQSL
K9
CK
CKE
K7
R1
VDD_9
J7
M0_D_CLK
M0_D_CLKN
N9
BA1
BA2
M0_DDR_CKE
N1
1%
1/16W
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_BA0
C16
IO[83]/B-A2[CD-A2]/B-A8
DQSL
G3
BA0
K8
CIS21J121
L400
M0_DDR_A11
D17
IO[80]/B-A1[CD-A1]/B-A5
IO[8]/A-A2[AB-A2]/A-A8
NC_4
F3
M3
M0_DDR_BA2
K2
DDR3 1.5V bypass Cap - Place these caps near Memory
M0_DDR_A10
A17
IO[75]/B-A0[CD-A0]/B-A6
IO[2]/A-A1[AB-A1]/A-A5
L9
N8
M0_DDR_BA1
G7
0.1uF
M0_DDR_A9
E18
IO[3]/A-A0[AB-A0]/A-A6
L1
VDD_8
M2
M0_DDR_BA0
C429
D9
C480
M0_DDR_A8
B18
NC_2
J9
VDD_7
0.1uF
M0_DDR_A6
M0_DDR_A7
F18
0.1uF
VDD_5
VDD_6
0.1uF
M0_DDR_A4
E17
0.1uF
C411
M7
M0_DDR_A15
A13
A14
NC_5
T7
M0_DDR_A14
C475
M0_DDR_A3
M0_DDR_A5
C17
C410
H9
VDD_4
C476
M0_DDR_A1
M0_DDR_A2
F1
H2
VDD_3
A12/BC
1%
RESET
M0_DDR_DQS0
M0_DDR_A0
NC_1
T2
M0_DDR_DQS_N0
H28
E9
J1
NC_3
F17
D2
VDDQ_9
WE
M0_DDR_RESET_N
C9
VDD_2
A11
R417
L3
VDDQ_8
CAS
K3
VDDQ_7
RAS
J3
M0_DDR_WEN
VDDQ_6
ODT
K1
M0_DDR_ODT
IC100
LGE5332(LM14A)
CS
C1
VDD_1
A10/AP
0.1uF
AR409
56
1/16W
R414
VDDQ_5
L2
A8
A9
0.1uF
C457
0.1uF
1K 1%
VDDQ_4
T3
B2
1%
VDDQ_3
CKE
M0_DDR_RASN
R9
N7
M0_DDR_A13
0.1uF
C456
M1_DDR_BA1
AR402
56
1/16W
AVDD_DDR
A8
M1_DDR_A12
0.1uF
R415
VDDQ_2
CK
K9
M0_DDR_CASN
R1
R7
M0_DDR_A11
M0_DDR_A12
M0_DDR_BA1
240
R410
CK
K7
M0_DDR_CS1
N9
A1
VDDQ_1
J7
M0_D_CLK
N1
VDD_9
BA2
M0_D_CLKN
K8
BA1
M3
M0_DDR_CKE
K2
ZQ
A7
C427
C428
R403
1K 1%
BA0
N8
M0_DDR_BA2
L7
M0_DDR_A10
G7
M0_DDR_A12
L8
A6
C455
AR408
56
1/16W
M1_DDR_A4
1%
VDD_8
M2
M0_DDR_BA0
M0_DDR_BA1
M0_DDR_A9
D9
A4
A5
M1_DDR_A6
M1_DDR_A1
M0_DDR_A4
R411
VDD_7
R3
VREFDQ
1K
VDD_6
NC_5
M7
M0_DDR_A15
VDD_5
A14
T7
M0_DDR_A14
VDD_4
A13
T8
A3
0.1uF
AR401
56
1/16W
M0_DDR_A1
H1
R408
VDD_3
A12/BC
T3
R2
M0_DDR_A8
M8
VREFCA
1K 1%
VDD_2
A11
N7
VDD_1
A10/AP
R7
M0_DDR_A6
M0_DDR_A7
B2
A9
L7
M0_DDR_A11
R8
A2
R409
M0_DDR_A9
M0_DDR_A10
M0_DDR_A13
240
AVDD_DDR
A8
R3
M0_DDR_A12
ZQ
A7
T8
R400
A1
1%
A6
R2
P2
M0_DDR_A5
L8
A0
1K
M0_DDR_A6
M0_DDR_A7
P8
M0_DDR_A4
A5
R8
M0_DDR_A8
M0_DDR_A3
VREFDQ
A4
P2
M0_DDR_A5
N2
0.1uF
0.1uF
M1_DDR_A8
M1_DDR_A11
0.1uF
M0_DDR_A4
P3
M0_DDR_A2
DDR3 1.5V bypass Cap - Place these caps near Memory
A3
P8
P7
M0_DDR_A1
H1
DDR3
4Gbit
(x16)
N3
M0_DDR_A0
VREFCA
DDR3 1.5V bypass Cap - Place these caps near Memory
M0_DDR_A3
M8
DDR3
4Gbit
(x16)
0.1uF
A2
N2
C453
C454
M1_DDR_A14
C405
A1
P3
C404
A0
P7
M0_DDR_A1
0.1uF
M0_DDR_A8
M0_DDR_A6
N3
M0_DDR_A0
M0_DDR_A2
0.1uF
C425
M0_DDR_A14
M0_DDR_A11
EAN63053201
1K 1%
EAN63053201
AR407
56
1/16W
AR400
56
1/16W
1K
Hynix_DDR3_4Gb_29n
IC400
H5TQ4G63AFR-RDC
Hynix_DDR3_4Gb_29n
IC401
H5TQ4G63AFR-RDC
1K
M0_DDR_VREFDQ
BSD-15Y-LM14A-004_00-HD
LM14A
LM14A DDR
2014-12-30
04
LGE Internal Use Only
lm14a_crystal_5pF
JTAG
1
2
5
JTAG
3
4
R604
0
OPT
TDI0
3
TDO0
4
TMS0
5
X-TAL_1
1M
R635
GND_1
1
2
C614-*1
2pF
C615-*1
2pF
lm14a_crystal_2pF lm14a_crystal_2pF
TCK0
SOC_RESET
TDO0_1
R605
0
OPT
5pF
XIN_MAIN
1K
R609
7
8
9
C615
XOUT_MAIN
System Clock for Analog block(24Mhz)
JTAG
R603
0
OPT
TRST_N0
2
6
TDI0_1
R602
0
OPT
TDO0
6
3
P600
12505WS-10A00
1
TDI0
5pF
C614
lm14a_crystal_5pF
SW600
JS2235S
1K
R616 JTAG
OLED
1K
R612 JTAG
C600
0.1uF
JTAG
1K
R614 JTAG
HP_ROUT
MAIN Clock(24Mhz)
24MHz
X600
Jtag I/F
For Main
HP_LOUT
Clock for MSD808KWD
4
+3.3V_NORMAL
GND_2
OLED_FW_EMERGENCY
DPC_CTRL
ON_RF_DONE
X-TAL_2
COMPENSATION_DONE_1
10
11
IC100
LGE5332(LM14A)
T2
T3
HDMI_0_RX0+
U1
HDMI_0_RX1-
V2
HDMI_0_RX1+
V3
HDMI_0_RX2-
W2
HDMI_0_RX2+
R1
HDMI_0_CLK-
R2
HDMI_0_CLK+
R6
TX0SCL
T5
TX0SDA
HDMI_HPD_1
Y2
V6
AF6
A_RX0N
LINEIN_L0
A_RX0P
LINEIN_R0
A_RX1N
LINEIN_L1
A_RX1P
LINEIN_R1
A_RX2N
LINEIN_L2
A_RX2P
U4
M3
N2
P2
P1
K2
HDMI2 DELETE
K3
R636
R637
HDMI2_DDC DELETE
0
0
L4
L5
M4
HDMI_HPD_2
M5
5V_DET_HDMI_2
E3
F2
F1
C3
D1
BIT6
BIT7
BIT8
BIT9
H6
H5
K6
MICCM0
HOTPLUGA
MICIN0
CEC0/GPIO5
LINEOUT_L2
H2
H3
J2
HDMI3 DELETE
J1
F3
G1
J4
DDC_SCL_HDMI3_MN864788
DDC_SDA_HDMI3_MN864788
HDMI_HPD_3
5V_DET_HDMI_3
R600 JTAG
0
TMS0
SPDIF_OUT
K5
H4
J5
0.047uF
C622
0.047uF
33
C624
EARPHONE_OUTL
B_RX0P
R628
SC_B
TP
RN
33
RP
HSYNC0
VSYNC0
AH2
0.047uF
0.047uF
C627
C628
R632
33
0.047uF
C629
AC2
R634
33
0.047uF
C631
D4
GPIO19/[LED0]/GPIO74
SCART_Rout
COMP1_Y
C632
AB3
COMP1_Pb
HP_ROUT
RIN1P
GIN1M
GIN1P
HP_LOUT
AF5
AC1
BIN1P
SOGIN1
1uF
HDMI_ARC
AD3
AD2
AG3
B_RXCP
I2C_SCL4
I2C_SDA4
T6
AB2
1000pF
COMP1_Pr
SCART_Lout
AH3
ARC0/GPIO6
VAG
EPHY_RDP
AA3
R631
33
68
B_RX2N
B_RXCN
EPHY_RDN
B2
BIN0P
AA5
R630
P3
B_RX2P
EPHY_TDP
A2
GPIO20/[LED1]/GPIO75
C605
B_RX1N
EPHY_TDN
C1
AA6
AG1
EARPHONE_OUTR
AVSS_VRM_ADC
AD1
C606
10uF
10V
AG2
DDCDB_CK/GPIO40
L600
PZ1608U121-2R0TF
1uF
C609
D5
RIN2P
SOC_RESET
RESET
GIN2M
GIN2P
AM4
XTAL_IN
XIN_MAIN
AK4
XOUT_MAIN
XTAL_OUT
AC3
BIN2P
DDCDB_DA/GPIO41
F5
BIT11
IRIN/GPIO4
HOTPLUGB/GPIO31
D8
I2S_IN_BCK/GPIO94
I2S_IN_SD/GPIO95
C_RX0N
TN
GIN0M
Y1
AF4
B_RX0N
B_RX1P
B1
RIN0P
GIN0P
AA1
Y3
SC_G
AG4
LINEOUT_R2
D6 JTAG 0
TRST_N0
R606
+3.3V_NORMAL
TCK0
C5
JTAG 1K R608
I2S_IN_WS/GPIO93
C_RX0P
I2S_OUT_BCK/GPIO100
C_RX1P
I2S_OUT_MCK/GPIO99
C_RX2N
I2S_OUT_WS/GPIO98
C_RX2P
I2S_OUT_SD/GPIO101
C_RXCN
I2S_OUT_SD1/GPIO102
C_RXCP
I2S_OUT_SD2/GPIO103
DDCDC_CK/GPIO42
E6
I2S_OUT_SD3/GPIO104
DDCDC_DA/GPIO43
GPIO_PM[14]/GPIO24
GPIO_PM[15]/GPIO25
GPIO_PM[16]/GPIO26
AH6
AH5
R638
0
33
C616
C617
0.047uF AC5
DP_P1
DM_P2
0.047uF AC6
33
33
C618
0.047uF AB6
DP_P2
CVBS1
SSUSB_TXP
CVBS2
R622
CVBS0
SSUSB_TXN
DM_PSS
C608
22pF
HDMI_EN
AD6
R621
SC_CVBS_IN
C607
22pF
ON_RF_DONE
0.047uF
R620
TU_CVBS
AUD_LRCH
AV1_CVBS_IN
DPC_CTRL
F7
AG7
HOTPLUGC/GPIO32
AUD_LRCK
BIT10
E7
C613
DM_P1
VCOM
R618
22
E8
F9
R619 68
AUD_SCK
R611
22
F6
A4
DM_P0
DP_P0
R610
22
G6
C_RX1N
G2
G3
R626
SC_R_IN
C604
2.2uF
C621
SC_FB
HOTPLUGC_HDMI20_5V/GPIO36
J6
AG5
C620
0.047uF
SC_L_IN
C603
2.2uF
0.047uF
AF3
DDCDA_DA/GPIO39
HOTPLUGB_HDMI20_5V/GPIO35
E2
AF1
33
68
AA2
COMP1/AV1/DVI_R_IN
SC_ID
DDCDA_CK/GPIO38
D2
D3
C602
A_RXCP
L1
M2
C601
2.2uF
A_RXCN
HOTPLUGA_HDMI20_5V/GPIO34
URSA_RESET_SoC
5V_DET_HDMI_1
2.2uF
AF2
R624
R625
SC_R
COMP1/AV1/DVI_L_IN
LINEIN_R2
AE6
JTAG
R615
47K
HDMI_0_RX0-
HDMI 1.4b & 2.0
MHL OPT
IC100
LGE5332(LM14A)
C611
22pF
C612
1000pF
OPT
COMPENSATION_DONE_1
DP_PSS
SSUSB_RXP
50V
SSUSB_RXN
SSUSB_TXP1
OLED_FW_EMERGENCY
SSUSB_TXN1
D_RX0N
D_RX0P
DTV/MNT_V_OUT
JTAG
D_RX1N
D_RX1P
CVBS_OUT1
DP_PSS1
SSUSB_RXP1
R613
0
D_RX2N
DM_PSS1
AC4
WIFI_DM
B4
WIFI_DP
C4
B3
AL6
USB_DM3
AK6
AM14
C633
0.1uF
AL14
C634
0.1uF
AM13
USB_DP3
SSUSB_TXP
AC-coupling CAP
Place near by MST
SSUSB_TXN
USB_DM1
AK13
USB_DP1
SSUSB_RXP
AK12
AL13
SSUSB_RXN
AK9
AL10
AM10
USB_DM2
AK10
USB_DP2
AM11
AL11
SSUSB_RXN1
TDO0_1
D_RX2P
D_RXCN
D_RXCP
DDCDD_CK/GPIO44
DDCDD_DA/GPIO45
HDMI 5V DET : Select TR or DIODE
HOTPLUGD/GPIO33
HOTPLUGD_HDMI20_5V/GPIO37
B5
A5
SPDIF_IN/GPIO96
+5V_NORMAL
SPDIF_OUT/GPIO97
OPT
JTAG
R601
0
TDI0_1
R640
5V_DET_HDMI_1
3.3K
R642
C
R641
33
HDMI_EN
OPT
0
OPT
B
Q601
MMBT3904(NXP)
E
OPT
R643
0
HDMI_EN_DIODE
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LM14A
MAIN4_EXT_IN/OUTPUT
2014-11-20
04
LGE Internal Use Only
IC100
LGE5332(LM14A)
A15
A18
A21
A24
A27
A30
B10
B32
C2
C13
C32
D18
D21
D25
D28
D32
E30
E31
E32
F22
F24
F25
F26
F27
F28
F29
F30
F31
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G23
G24
G25
G26
G27
G28
H8
H9
H10
H11
H12
H13
H14
H15
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H30
J3
J7
J8
J14
J15
J16
J22
J24
J25
J26
J27
K7
K8
K14
K15
K25
K26
L2
L3
L8
L14
L15
L16
L25
L26
M1
M8
M9
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
M25
M26
M29
M32
N3
N7
N8
N9
N10
N11
N13
N14
N17
N18
N19
N20
N24
N25
N26
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P24
P25
P26
R3
R8
R9
R10
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R29
R32
T8
T9
T10
T14
T15
T16
T17
T18
T19
T20
T21
T22
T23
GND_1
GND_171
GND_2
GND_172
GND_3
GND_173
GND_4
GND_174
GND_5
GND_175
GND_6
GND_176
GND_7
GND_177
GND_8
GND_178
GND_9
GND_179
GND_10
GND_180
GND_11
GND_181
GND_12
GND_182
GND_13
GND_183
GND_14
GND_184
GND_15
GND_185
GND_16
GND_186
GND_17
GND_187
GND_18
GND_188
GND_19
GND_189
GND_20
GND_190
GND_21
GND_191
GND_22
GND_192
GND_23
GND_193
GND_24
GND_194
GND_25
GND_195
GND_26
GND_196
GND_27
GND_197
GND_28
GND_198
GND_29
GND_199
GND_30
GND_200
GND_31
GND_201
GND_32
GND_202
GND_33
GND_203
GND_34
GND_204
GND_35
GND_205
GND_36
GND_206
GND_37
GND_207
GND_38
GND_208
GND_39
GND_209
GND_40
GND_210
GND_41
GND_211
GND_42
GND_212
GND_43
GND_213
GND_44
GND_214
GND_45
GND_215
GND_46
GND_216
GND_47
GND_217
GND_48
GND_218
GND_49
GND_219
GND_50
GND_220
GND_51
GND_221
GND_52
GND_222
GND_53
GND_223
GND_54
GND_224
GND_55
GND_225
GND_56
GND_226
GND_57
GND_227
GND_58
GND_228
GND_59
GND_229
GND_60
GND_230
GND_61
GND_231
GND_62
GND_232
GND_63
GND_233
GND_64
GND_234
GND_65
GND_235
GND_66
GND_236
GND_67
GND_237
GND_68
GND_238
GND_69
GND_239
GND_70
GND_240
GND_71
GND_241
GND_72
GND_242
GND_73
GND_243
GND_74
GND_244
GND_75
GND_245
GND_76
GND_246
GND_77
GND_247
GND_78
GND_248
GND_79
GND_249
GND_80
GND_250
GND_81
GND_251
GND_82
GND_252
GND_83
GND_253
GND_84
GND_254
GND_85
GND_255
GND_86
GND_256
GND_87
GND_257
GND_88
GND_258
GND_89
GND_259
GND_90
GND_260
GND_91
GND_261
GND_92
GND_262
GND_93
GND_263
GND_94
GND_264
GND_95
GND_265
GND_96
GND_266
GND_97
GND_267
GND_98
GND_268
GND_99
GND_269
GND_100
GND_270
GND_101
GND_271
GND_102
GND_272
GND_103
GND_273
GND_104
GND_274
GND_105
GND_275
GND_106
GND_276
GND_107
GND_277
GND_108
GND_278
GND_109
GND_279
GND_110
GND_280
GND_111
GND_281
GND_112
GND_282
GND_113
GND_283
GND_114
GND_284
GND_115
GND_285
GND_116
GND_286
GND_117
GND_287
GND_118
GND_288
GND_119
GND_289
GND_120
GND_290
GND_121
GND_291
GND_122
GND_292
GND_123
GND_293
GND_124
GND_294
GND_125
GND_295
GND_126
GND_296
GND_127
GND_297
GND_128
GND_298
GND_129
GND_299
GND_130
GND_300
GND_131
GND_301
GND_132
GND_302
GND_133
GND_303
GND_134
GND_304
GND_135
GND_305
GND_136
GND_306
GND_137
GND_307
GND_138
GND_308
GND_139
GND_309
GND_140
GND_310
GND_141
GND_311
GND_142
GND_312
GND_143
GND_313
GND_144
GND_314
GND_145
GND_315
GND_146
GND_316
GND_147
GND_317
GND_148
GND_318
GND_149
GND_319
GND_150
GND_320
GND_151
GND_321
GND_152
GND_322
GND_153
GND_323
GND_154
GND_324
GND_155
GND_325
GND_156
GND_326
GND_157
GND_327
GND_158
GND_328
GND_159
GND_329
GND_160
GND_330
GND_161
GND_331
GND_162
GND_332
GND_163
GND_333
GND_164
GND_334
GND_165
GND_335
GND_166
GND_336
GND_167
GND_337
GND_168
GND_338
GND_169
T24
T25
T26
U2
U3
U8
U9
U10
U14
U15
U16
U17
U18
U20
U26
V1
V8
V9
V10
V11
V12
V13
V14
V15
V16
V20
V21
V22
V26
V29
V32
W3
W8
W9
W10
W11
W12
W13
W14
W15
W16
W17
W18
W22
W26
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y22
Y26
AA9
AA10
AA11
AA12
AA14
AA15
AA16
AA17
AA18
AA21
AA26
AA29
AA32
AB9
AB10
AB11
AB12
AB13
AB14
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB26
AB30
AC7
AC8
AC9
AC10
AC11
AC12
AC13
AC16
AC23
AC25
AC26
AC27
AC28
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD24
AD25
AD26
AD27
AD28
AE3
AE8
AE9
AE10
AE11
AE12
AE13
AE14
AE17
AE18
AE23
AE24
AE25
AE26
AE27
AE28
AE29
AF9
AF10
AF17
AF18
AF19
AF20
AF21
AF22
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF30
AG22
AG23
AG30
AH21
AH22
AJ3
AJ22
AJ30
AK5
GND_339
AK11
AK14
AL1
AL3
AL4
AL9
AL12
AL23
AL27
AM25
AM29
AM31
GND_170
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-15Y-LM14A-007_00-HD
LM14A
LM14A_GND
2014-11-13
07
LGE Internal Use Only
CI Region
* Option name of this page : CI_SLOT
(because of Hong Kong)
CI SLOT
CI_SLOT
AR903
33
CI_SLOT
C902
10uF
10V
CI_SLOT
JK900
10125901-015LF
/CI_CD1
CI_SLOT
R912
100
1
36
2
37
3
TPI_DATA[4]
38
4
TPI_DATA[5]
39
5
TPI_DATA[6]
TPI_DATA[7]
40
6
41
R908
10K
43
46
49
19
CI_MDI[5]
54
20
55
21
56
22
57
23
58
24
59
25
60
26
61
27
62
28
63
29
64
30
CI_MDI[6]
CI_MDI[7]
R909 10K
CI_SLOT
R901
CAM_WAIT_N
47 CI_SLOT
R902
PCM_RESET
47 CI_SLOT
REG
33 CI_SLOT
33 CI_SLOT
33 CI_SLOT
R903
TPI_CLK
TPI_VAL
R904
R905
TPI_SOP
CI_SLOT
AR900
33
65
66
68
R917
10K
R915
CI_SLOT
CI_WE
100
CAM_IREQ_N
CI_SLOT
C903
0.1uF
CI_SLOT
C904
0.1uF
CI_SLOT
GND
CI HOST I/F
CI_ADDR[12]
CI_ADDR[7]
CLOSE TO MSTAR
GND
CI_ADDR[6]
CI_SLOT
AR906
33
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[0]
EB_ADDR[0]
CI_ADDR[2]
CI_ADDR[1]
EB_ADDR[1]
CI_ADDR[1]
CI_ADDR[2]
EB_ADDR[2]
CI_ADDR[0]
CI_ADDR[3]
EB_ADDR[3]
CI_DATA[0]
CI_DATA[1]
34
CI_DATA[2]
CI_ADDR[0-14]
CI_SLOT
AR907
33
69
CI_ADDR[4]
G1
/CI_CD2
EB_ADDR[4]
CI_ADDR[5]
EB_ADDR[5]
CI_ADDR[6]
G2
R910
100
EB_ADDR[6]
CI_ADDR[7]
CI_SLOT
+5V_NORMAL
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_CLK
33
TPI_DATA[2]
TPI_DATA[3]
100 CI_SLOT
CI_MCLKI
CI_ADDR[14]
32
67
33 CI_SLOT
33 CI_SLOT
R920
+5V_NORMAL
CI_ADDR[13]
31
TPI_DATA[0]
TPI_DATA[1]
CI_OE
CI_ADDR[9]
18
53
C901
0.1uF
CI_MISTRT
CI_ADDR[8]
17
52
CI_ADDR[11]
R919
R918
/PCM_CE1
CI_MIVAL_ERR
16
51
FE_DEMOD1_TS_DATA[0-7]
CI_ADDR[10]
15
50
CI_MDI[4]
CLOSE TO MSTAR
R914
14
CI_SLOT
CI_MDI[0]
CI_DATA[7]
13
48
GND
CI_SLOT
CI_DATA[6]
R916
10K
47 CI_SLOT
12
47
CI_MDI[1]
R900
10K
FE_DEMOD1_TS_DATA[0]
11
CI_MDI[0]
+5V_NORMAL
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[1]
CI_MDI[1]
CI_DATA[5]
10
45
FE_DEMOD1_TS_DATA[3]
CI_DATA[4]
CI_MDI[2]
9
44
CI_IOWR
CI_MDI[2]
FE_DEMOD1_TS_DATA[4]
CI_MDI[3]
8
CI_IORD
CI_MDI[3]
FE_DEMOD1_TS_DATA[5]
CI_MDI[5]
CI_MDI[4]
CI_DATA[3]
7
42
CI_SLOT
FE_DEMOD1_TS_DATA[6]
CI_SLOT
AR902
33
35
CI_SLOT
AR901
33
FE_DEMOD1_TS_DATA[7]
CI_MDI[7]
CI_MDI[6]
@netLa
+5V_NORMAL
CI_SLOT
R906
10K
CI TS INPUT
CI_DATA[0-7]
FE_DEMOD1_TS_DATA[0-7]
+5V_CI_ON
EB_ADDR[7]
GND
CI_SLOT
GND
CI_SLOT
C900
2pF
50V
AR908
CLOSE TO MSTAR
33
CI_ADDR[8]
GND
EB_ADDR[8]
CI_ADDR[9]
R907
10K
EB_ADDR[9]
EB_ADDR[10]
CI_ADDR[10]
CI_SLOT
CI_ADDR[11]
EB_ADDR[11]
CI_SLOT
AR909
33
CI_MISTRT
CI_MIVAL_ERR
CI_ADDR[12]
EB_ADDR[12]
EB_ADDR[13]
CI_ADDR[13]
CI_ADDR[14]
CI_MCLKI
EB_ADDR[14]
CAM_REG_N
REG
CI_SLOT
AR913 33
CI_OE
EB_OE_N
CI_WE
EB_WE_N
CI_IORD
CI DETECT
EB_BE_N1
CI_IOWR
EB_BE_N0
+3.3V_NORMAL
CI_SLOT
IC900
74LVC1G32GW
B
1
A
GND
3
+3.3V_NORMAL
2
5
VCC
4
Y
/CI_CD2
CI_SLOT
CI_DATA[0]
R911
10K
AR904 33
EB_DATA[0]
OR_GATE_CI_TI
5
EB_DATA[3]
IC900-*2
TOSHIBA ELECTRONICS KOREA CORPORATION
VCC
IN_B
IN_A
2
1
5
@netLa
B
1
EB_DATA[2]
CI_DATA[3]
OR_GATE_CI_TOSHIBA
IC900-*1
SN74LVC1G32DCKR
EB_DATA[1]
CI_DATA[2]
A
CI_DATA[1]
VCC
R913
47
2
CAM_CD1_N
CI_DATA[4]
CI_SLOT
AR905 33
3
4
Y
GND
3
4
EB_DATA[4]
CI_DATA[5]
EB_DATA[5]
CI_DATA[6]
EB_DATA[6]
CI_DATA[7]
GND
EB_DATA[7]
OUT_Y
EB_DATA[0-7]
/CI_CD1
CI_DATA[0-7]
CI POWER ENABLE CONTROL
IC901
AP2151WG-7
+5V_NORMAL
IN
5
C905
0.1uF
50V
+5V_CI_ON
1
OUT
CI_SLOT
2
CI_SLOT
R922
100
PCM_5V_CTL
EB_DATA[0-7]
EN
4
3
GND
FLG
C906
1uF
25V
CI_SLOT
R923
10K
CI_SLOT
R921
10K
CI_SLOT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
UF71/7500
PCMCI
2014-07-24
9
PCMCI
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
[EG92 ONLY] PWR
+12V
RESET_IC_DIODES(MAIN)
1
MMBT3906(NXP)
+3.5V_ST
2
3
RESET
IC2308-*1
+3.5V_ST
R2349
100K
PD_+3.5V
R2343
0
5%
PD_+12V
R2335
2.7K
1%
+3.3V_NORMAL
APX803D29
R2354
10K
OPT
RESET_IC_ROHM(SUB)
IC2307
BD48K28G
RESET
2
3
VCC
1
GND
4
PDIM#2
3
5
6
8
3.5V
9
10
GND
12V
11
12
13
14
12V
15
GND
16
24V
23
24
GND
D2399
L2397
PTVS13VS1UR
23.2V
VOUT
GND
PD_20_24V
R2348
100K
PANEL_CTL
24V
22
2
1
+24V
R2300
12V_ON
20
21
100
GND
18
19
GND
L2396
UBW2012-121F
C2394
0.1uF
50V
17
24V
24V
+12V
OLED_AC_DET
PD_OLED_AC
R2395
PD_OLED_AC
R2392
22K
1%
3
C2350
0.1uF
16V
PD_+12V
R2336
1.2K
1%
12V
12V
VDD
OLED_AC_DET
OLED_AC_DET
INV_CTL
0
GND
7
GND
ZD2305
5V
DPC
3.5V
UBW2012-121F
R2394
1K
R2393
22
INV CTL
L2398
UBW2012-121F
+24V
25
BD48K28G
VDD
PD_24V
R2341
1.5K
1%
PD_20V
R2341-*1
1.3K
1%
PD_UHD_24V
R2341-*2
1.6K
1%
not to RESET
at 8kV ESD
C2365
0.1uF PWR_DET_SEPARATE
16V
PD_20_24V_ROHM
IC2308
PD_24V
R2340
8.2K
1%
PD_20V
R2340-*1
5.6K
1%
PD_UHD_24V
R2340-*2
9.1K
1%
C2399
0.1uF
50V
L2399
UBW2012-121F
C2364
0.1uF
16V
R2355
0
2
1
POWER_DET
PWR_DET_MERGE
P2399
SMAW200-H24S5
3.5V
3.5V_Diode
ZD2306
5V
3.5V_Diode
ZD2307
5V
3.5V_Diode
ZD2308
5V
APX803E29
VCC
3
2
Q2398
+12V
12V
3.5V_Diode
ZD2309
5V
Power_DET
12V_ON,PAENL_CTL IS FOR OLED QSM
GND EAN61829902
L2395
UBW2012-121F
C2395
0.1uF
16V
C2398
10uF
16V
1
PWR ON
+3.5V_ST
C2397
10uF
16V
PD_20_24V_DIODES
3
2
DPC_CTRL
R2389
10K
RL_ON
Q2303
R2390
10K
1
10K
R2347
+3.5V_ST
10K
R2391
MMBT3906(NXP)
IC2307-*1
+3.5V_ST
C2396
10uF
16V
3
C2351
0.1uF
16V
PD_20_24V
2
R2356
0
VOUT
POWER_DET_1
PWR_DET_SEPARATE
1
GND
24V-- & gt; 3.48V
20V-- & gt; 3.51V
12V-- & gt; 3.58V
ST_3.5V-- & gt; 3.5V
L/D_DI
PANEL_CTL
L/D_CLK
L/D_VSYNC
PWM_DIM
PWM_DIM2
+5.0V normal & USB
R2
C2352
0.047uF
25V
22
23
24
25
26
27
16
SW_IN1
V7V
7
15
NFAULT1
14
13
SW_EN1
NFAULT2
/USB_OCD3
USB_CTL3
USB_CTL2
12
11
SW_EN2
+5V_USB_2
+1.8V
C2346
0.0068uF
50V
SW_OUT1
C2332
2200pF
50V
1.0V_DCDC_ROHM
Vout=0.765*(1+R1/R2)=1.554V
6A
+5V_USB_3
ZD2302
2.5V
10
C2339
22uF
10V
9
C2338
22uF
10V
5%
100K
6
1/16W
SW_IN2
/USB_OCD2
17
DCDC_DIODE
GND
1%
1/16W
C2355
0.047uF
25V
5
C2362
22uF
10V
C2363
10uF
10V
51K
R2352
FB
COMP
AGND
[EP]
SS
L2313
4.7uH
PGND_3
+3.3V_NORMAL
C2360
1uF
10V
+5V_NORMAL
DCDC_DIODE_0DR050008AA(SEMTECH)
0DR050008AA
ZD2304-*1
Vout=0.6*(1+R1/R2)
5.1V:R1-51K, R2-6.8K
+2.5V
IC2301
AZ1117EH-ADJTRG1
TU_JP
10K
1
TU_JP
R2316
22K
1%
8
NC_1
2
EN2
7
ADJ/SENSE
2A
5
NC_2
EAN62206201
+3.3V_NORMAL
LM15 Power SEQUENCE
VOUT
4
A
+12V
R1
6
VIN3
NC4
MAX
R2
TU_JP
R2317
47K
1%
GND
3
TU_JP
C2320
0.1uF
16V
[EP]GND
TU_JP
C2321
0.1uF
+3.3V_NORMAL
+2.5V_Normal
IC2300
TJ4220GDP-ADJ
R2312
POWER_ON/OFF2_3
9
75
R2307
33
R2308
1%
1/16W
1%
1/16W
C2311
10uF
10V
C2310
10uF
10V
TU_JP
ZD2303
2.5V
R2309
1
ADJ/GND
THERMAL
OUT
DCDC_DIODE
IN
LX_1
IC2305
BST
18
4
SN1302001(TPS65286RHDR)
SW_OUT2
5
LX_2
19
THERMAL
29
LX_3
20
3
PGND_2
L2312
2.2uH
SW
82pF
50V
21
2
VIN_3
C2344
0.1uF
50V PGND_1
POWER_ON/OFF1
C2328
1uF
10V
R2
3A
C2341
10uF
35V
C2359
22uF
10V
R1
C2357
R2353
1/16W
16V
0.1uF
C2336
PS064T-2R2MS
4
9
C2340
10uF
35V
OPT
1
VIN_2
GND
8
6
BOOT
VIN_1
SW
EN
3
SS
R2322
22K
1%
Switching freq: 700K
7
5
VIN
MODE/SYNC
C2332-*1
3300pF
50V
2
VREG
C2325
100pF
50V
1.0V_DCDC_TI
+1.8V - LM15U, eMMC
& Vx1 pull-up
FB
4.7K
1%
6
4
L2314
120-ohm
VBST
R2338
10K
18K
1%
8
7
3
VIN
25V
1uF
C2343
R2320 R2321
R1
1
2
8
5%
100K
R2350
VREG5
[EP]
SS
EN
1
THERMAL
LD2300
IC2303
BD9D321EFJ
R2326
10K
9
C2312
22uF
10V
EN
VFB
THERMAL
C2307
0.1uF
16V
C2309
22uF
10V
ROHM_BD9D321_1.5V_DDR_DCDC
R2315
3.3K
C2308
0.1uF
16V
+3.3V_LED
L2305
PZ1608U121-2R0TF
L2304
PZ1608U121-2R0TF
IC2303-*1
TPS54327DDAR [EP]GND
C2324
0.1uF
C2322
10uF
16V
28
+3.3V_NORMAL
DVDD18_EMMC
+3.3V_LED
+1.8V
3.3V_EMMC
RSET2
TI_TPS54327_1.5V_DDR_DCDC
+3.3V_NORMAL
0DTKE00018A
DCDC_DIODE_0DTKE00018A(KEC)
ZD2304
1%
OPT
C2349
100pF
50V
1%
1/16W
PZ1608U121-2R0TF
C2347
2200pF
50V
R2344
10K
6.8K
R2351
POWER_ON/OFF2_3
R2342150K 1%
+1.5V_DDR
+12V
L2309
R2339 16K
R2337 16K 1%
+3.3V - eMMC
RLIM
DDR +1.5V
RSET1
+12V
TU_JP
C2323
10uF
10V
TU_JP
ZD2301
0DR050008AA
5V
0DTKE00018A
TU_JP_DCDC_DIODE(KEC)
ZD2301-*1
POWER_ON/OFF1(5V)
POWER_ON/OFF2_1(3.3V)
Vout=0.6*(1+R1/R2)
+3.3V_NORMAL
POWER_ON/OFF2_3(1.5V, 2.5V)
0DTKE00018A
DCDC_DIODE_0DTKE00018A(KEC)
ZD2300
L2300
BLM18PG121SN1D
Placed on SMD-TOP
C2303
0.1uF
16V
OPT
IC2302
TPS54427DDA
R2303
10K
EN
POWER_ON/OFF2_1
1%
R1
VFB
2
R2302
VREG5
51K
C2305
100pF
50V
SS
R2305
15K
1%
Switching freq: 700K
1
C2306
1uF
10V
8
9
C2301
10uF
16V
THERMAL
C2300
10uF
16V
3
4
7
6
4A
5
[EP]GND
VIN
VBST
SW
GND
16V
0.1uF
C2314
PS064T-2R2MS
L2306
2.2uH
C2326
22uF
10V
C2329
22uF
10V
C2333
100uF
+24V AUDIO AMP
+24V
POWER_ON/OFF2_4(1.1V)
+24V_AMP
L2310
UBW2012-121F
C2334
10uF
10V
C2313
0.015uF
50V
DCDC_DIODE_0DR050008AA(SEMTECH)
0DR050008AA
ZD2300-*1
R2
Vout=0.765*(1+R1/R2)
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
LM14A CPU
+1.1V_VDDC_CPU
MAX 3A
LM14A CORE
+12V
L2502
PZ1608U121-2R0TF
+1.1V_VDDC
+12V
R2514
0
5%
D
Q2502-*1
2N7002K
G
R2518
CPU_VID1
S
DIODEDS_CPU_CORE_VID_FET(SUB)
0
5%
D
G
C2500
10uF
25V
C2501
10uF
25V
VIN
OPT
C2502
0.1uF
25V
AGND
1
2
8
3
7
6
SW_2
SS
4
5
GND
SW_1
OPT
EN
R2500
6.8K
4A
C2518
22uF
10V
C2519
22uF
10V
FB
4
6A
5
COMP
C2504
0.0068uF
50V
C2505
10uF
10V
OPT
C2506
10uF
10V
C2507
100uF
Q2503-*1
2N7002K
G
OPT
C2508
10uF
10V
POWER_ON/OFF2_4
C2515
1uF
10V
C2503
0.1uF
16V
DCDC_DIODE_0DR050008AA(SEMTECH)
0DR050008AA
ZD2501-*1
C2516
2200pF
50V
C2509
10uF
10V
R2-1.13V
R2501
10K
LM14A_A0_ONLY
R2504
15K
1%
+3.3V_NORMAL
LM14A_A0_ONLY
R2505
56K
1%
LM14A_A0_ONLY
R2502
10K
CORE_VID0
G
R2-1
R2-2
LM14_A1
V_out
LM14_A0
V_out
Boot
High
High
1.06
High
Low
1.01
Low
0.96
0.969
0.98
1.15
0.98
0.98
Delete this part when LM14A0 used all.
1.013
Kernel
LM14_A0
V_out
DCDC_DIODE_0DR050008AA(SEMTECH)
0DR050008AA
ZD2500-*1
1.163
Kernel
LM14_A1
V_out
R2
S
0
5%
LM14A_A0_ONLY
S
DIODEDS_CPU_CORE_VID_FET(SUB)
R1
D
R2503
S
R2510
15K
1%
C2511
47pF
50V
0DTKE00018A
ZD2500
DCDC_DIODE_0DTKE00018A(KEC)
PS064T-2R2MS
PGND
Placed on SMD-TOP
1/16W
1%
L2503
2.2uH
SW
1%
6
VBST
L2501
2uH
[EP]
R2511
56K
3
7
EAN62653301
R2512
6.2K
1%
8
2
IC2501
BD86106EFJ
L2500
PZ1608U121-2R0TF
1/16W
1%
CPU_VID_LM14_A1
R2520
R2519
1.6K
75K
1
16V
0.1uF
C2517
D
R2517
10K
S
1/16W
1%
Q2503
1%
2N7002KA
KEC_CPU_CORE_VID_FET(MAIN)
D
CPU_VID0
G
1%
Q2502
2N7002KA
KEC_CPU_CORE_VID_FET(MAIN)
R2515
22K
R2513
10K
+3.3V_NORMAL
1%
R2516
75K
+3.3V_NORMAL
R2522
11K
R2519-*1
27K
R2523
10K
R2
CPU_VID_LM14_A0
1/16W
1%
VFB
VREG5
[EP]GND
VIN
1/16W
1/16W
Q2500
2N7002KA
KEC_CPU_CORE_VID_FET
POWER_ON/OFF2_4
EN
9
IC2502
TPS54427DDA
10K
R2524
9
C2514
100pF
50V
THERMAL
R1
THERMAL
UF77/83/84 UF77/83/84
C2510 C2512 C2513
0.1uF
10uF
10uF
16V
16V
16V
OPT
1%
UF64/68
C2512-*1
10uF
25V
R2521
5.6K
UF64/68
C2510-*1
10uF
25V
0DTKE00018A
DCDC_DIODE_0DTKE00018A(KEC)
ZD2501
Placed on SMD-TOP
Boot
D
Kernel
Low
G
Q2500-*1
2N7002K
S
DIODEDS_CPU_CORE_VID_FET
Vout=0.765*(1+R1/R2)
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LM14A1 CORE_VID1 NOT USE.
Vout=0.8*(1+R1/R2)
CORE_VID1
BSD-15Y-LM14A-025_00-HD
LM14A
LM15U_PWR_2_ALL
2015-01-21
25
LGE Internal Use Only
Renesas MICOM
For Debug
EPSON_MICOM_CRYSTAL(MAIN)
C3002-*1
18pF
50V
EPSON_MICOM_CRYSTAL(MAIN)
EAW30067102
X3000-*1
32.768KHz
C3003-*1
15pF
50V
MICOM_DEBUG
3
HDMI_WAUP:HDMI_INIT
MHL_DET_LM15
0 R3037
32.768KHz
R3028
4.7M
OPT
LOGO_LIGHT
+3.5V_ST
I2C_SCL_MICOM
P61/SDAA0
P62
I2C_SDA_MICOM
3D & L_DIM_EN
POWER_ON/OFF2_1(3.3V)
P63
PANEL_CTL
R3030
270K
OPT
1
4
3
P120/ANI19
41
37
P124/XT2/EXCLKS
42
P41/TI07/TO07
P123/XT1
43
P60/SCLA0
POWER_ON/OFF1(5V)
38
P137/INTP0
44
C3001
R3021
10K 5%
1/16W
39
P122/X2/EXCLK
45
LCD
R3021-*1
1K
OLED
LM14A Power SEQUENCE
MICOM_RESET_22OHM
R3029
33
P121/X1
46
C3000
0.1uF
+3.5V_ST
MICOM_RESET_SW
SW3000
JTP-1127WEM
2
C3004
0.1uF
16V
P40/TOOL0
REGC
47
+3.5V_ST
RESET
VSS
0.47uF
VDD
48
GND
40
POWER_DET_1
10K
R3032
10K
MHL_DET_LM15
1%
R3031
1/16W
MICOM_RESET
MICOM_RESET_33OHM
R3029-*1 33
36
P140/PCLBUZ0/INTP6
2
35
P00/TI00/TXD1
3
34
P01/TO00/RXD1
33
P130
IC3000
32
P20/ANI0/AVREFP
R5F100GEAFB#30
31
P21/ANI1/AVREFM
1
4
SCART_MUTE
POWER_ON/OFF2_1
9
28
P24/ANI4
10
27
P25/ANI5
P70/KR0/SCK21/SCL21
11
26
P26/ANI6
P30/INTP3/RTC1HZ/SCK11/SCL11
12
25
P27/ANI7
MODEL_OPT_0
NON LOGO
LOGO
MODEL_OPT_1
LCD
OLED
MODEL_OPT_3
LM15U/LM14A
KEY1
MODEL1_OPT_3
MODEL1_OPT_0
SIDE_HP_MUTE
MHL_EN
MHL_EN
24
MODEL1_OPT_1
P147/ANI18
P146
KEY2
URSA_RESET_MICOM
URSA_RESET_MICOM
EDID_WP
AMP_MUTE
SOC_TX
INV_CTL
WOL_CTL
LED_R
POWER_DET
POWER_ON/OFF1
H15
WOL_WAKE_UP
MICOM_NON_LOGO
R3012
10K
MICOM_LCD
R3009
10K
MICOM_LM15U/LM14A
R3004
10K
MODEL1_OPT_3
P10/SCK00/SCL00
P13/TXD2/SO20
MODEL1_OPT_1
SOC_RX
MODEL1_OPT_0
P11/SI00/RXD0/TOOLRXD/SDA00
1
P12/SO00/TXD0/TOOLTXD
0
P14/RXD2/SI20/SDA20
MICOM MODEL OPTION
MICOM_LOGO
R3013
10K
MICOM_OLED
R3008
10K
MICOM_H15
R3006
10K
+3.5V_ST
P15/PCLBUZ1/SCK20/SCL20
MICOM MODEL OPTION
P16/TI01/TO01/INTP5
+3.5V_ST
EYE_Q
AR3000
3.3K
EYE_SCL
P17/TI02/TO02
EYE_SDA
P51/INTP2/SO11
P71/KR1/SI21/SDA21
SOC_RESET
P50/INTP1/SI11/SDA11
POWER_ON/OFF2_3
23
P23/ANI3
22
29
21
8
P72/KR2/SO21
20
P73/KR3/SO01
POWER_ON/OFF2_4(1.1V)
19
P22/ANI2
18
30
17
7
16
P74/KR4/INTP8/SI01/SDA01
HDMI_CEC_MICOM
15
6
14
P75/KR5/INTP9/SCK01/SCL01
IR
13
5
WOL/WIFI_POWER_ON
R3000
100
POWER_ON/OFF2_4
POWER_ON/OFF2_4
P31/TI03/TO03/INTP4
POWER_ON/OFF2_3(1.5V)
SCART_MUTE
RL_ON
For CEC
30V
BAT54_TSC
D3000-*1
SOC_RESET
LED_R
R3015
10K
MICOM_LM14A
CEC_DIODE(SUB)
EAH62792701
4
5
EAW58239602
X3000
MICOM_DEBUG
2
50V
12pF
C3003
50V
12pF
C3002
LOGO_LIGHT
1
MICOM_RESET
Don’t remove R3016,
not making float P40
DAISHINKU_MICOM_CRYSTAL(SUB)
DAISHINKU_MICOM_CRYSTAL(SUB)
DAISHINKU_MICOM_CRYSTAL(SUB)
R3016 1K
P3000
12507WS-04L
R3014 10K
MICOM_DEBUG
MICOM_DEBUG
EPSON_MICOM_CRYSTAL(MAIN)
WIFI_EN
+3.5V_ST
R3034
120K
R3033
27K
G
LM14A : Active high reset
+3.5V_ST
HDMI_CEC_MICOM
S
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
D
G
Q3001
RUE003N02
ROHM_CEC_FET(MAIN)
EBK61731401
S
BAT54_SUZHO
CEC_DIODE(MAIN)
EAH61433701
D
D3000
CEC_REMOTE
Q3001-*1
SI1012CR-T1-GE3
VISHAY_CEC_FET(SUB)
EBK61731301
BSD-15Y-LM14A-030_00-HD
LM14A
MICOM
2015-01-21
30
LGE Internal Use Only
EDID external EEPROM
+5V_NORMAL
1
HOT_PLUG_DETECT
19
RESERVED
SCL
15
16
SDA
17
DDC/CEC_GND
VDD[+5V]
18
HOT_PLUG_DETECT
19
11
AR3401
1/16W
47K
DDC_SCL_HDMI3
12
13
A2
6
3
14
SCL
17
18
19
GND
A2
MMBD6100
D3303
A1
SDA
5
4
OPT
+5V_NORMAL
5V_HDMI_3
R3321
22
20
BODY_SHIELD
DDC_SCL_HDMI3_MN864788
33 OPT
16
20
0
HDMI_EXT_EDID
Q3305
2N7002KA
R3314
15
+5V_NORMAL
BODY_SHIELD
DDC_SCL_HDMI3
DDC_SDA_HDMI3
G
HDMI_EXT_EDID
R3325
TMDS_DATA1+
D2+_HDMI1_MN864788
DDC_SDA_HDMI3
5V_HDMI_1
+5V_NORMAL
DDC_SDA_HDMI3_MN864788
R3313
IC3301-*1
AT24C02C-SSHM-T
+5V_NORMAL
MMBD6100
D3300
TMDS_DATA2_SHIELD
0
HDMI_EXT_EDID
Q3306
2N7002KA
ATMEL_HDMI_EXT_EDID
D2-_HDMI1_MN864788
TMDS_DATA2-
5V_HDMI_2
D1-_HDMI1_MN864788
D1+_HDMI1_MN864788
D
S
DDC pull-up
33 OPT
MMBD6100
D3301
A0
1
8
2
7
3
6
4
5
VCC
TMDS_DATA2+
A1
DAADR019A
JK3302
HDMI1
FOOSUNG_HDMI_JACK
1/16W
47K
AR3400
AR3309
47K
1/16W
D2+_HDMI3_MN864788
HDMI3
C
HDMI_EXT_EDID
R3326
R3323
4.7K
WP
HDMI_EXT_EDID
TMDS_DATA1_SHIELD
D2-_HDMI3_MN864788
JK3301
FOOSUNG_HDMI_JACK
R3386
47K
HDMI_EXT_EDID
G
7
AR3307
5.1
1/16W
TMDS_DATA1-
1
DAADR019A
R3388
0
OPT
OPT
R3384
OPT 10K
3.3K
R3379
10K
R3378
10K
OPT
A1
10
A2
MMBD6100
D3304
VDD[+5V]
18
CEC
14
8
2
9
A1
DDC/CEC_GND
13
1
8
C
SDA
17
TMDS_CLK-
C
VCC
OPT
16
12
B
BR24G02FJ-3GTE2
A0
R3387
47K
SCL
15
TMDS_CLK_SHIELD
5
D
RESERVED
TMDS_CLK+
11
4
S
14
TMDS_DATA0-
10
3
7
HDMI_EXT_EDID
13
CEC
TMDS_DATA0_SHIELD
9
HDMI_EXT_EDID
C
TMDS_CLK-
8
2
6
D0-_HDMI1_MN864788
D0+_HDMI1_MN864788
TMDS_DATA0+
3
TMDS_DATA2+
12
TMDS_DATA0+
CK+_HDMI1_MN864788
2
D1-_HDMI3_MN864788
D1+_HDMI3_MN864788
TMDS_CLK_SHIELD
TMDS_DATA1-
7
A2
AR3300
5.1
1/16W
TMDS_CLK+
11
TMDS_DATA1_SHIELD
6
TMDS_DATA0_SHIELD
4
TMDS_DATA2-
TMDS_DATA0-
10
TMDS_DATA1+
5
HDMI_EXT_EDID
R3322
22
TMDS_DATA0-
6
TMDS_DATA2_SHIELD
TMDS_DATA0_SHIELD
9
TMDS_DATA2-
4
CK-_HDMI1_MN864788
TMDS_CLK+
5
TMDS_DATA1+
3
8
TMDS_DATA2_SHIELD
2
3
A1
4
2
TMDS_DATA0+
AR3306
5.1
1/16W
TMDS_CLK_SHIELD
7
TMDS_DATA1_SHIELD
5
TMDS_DATA1-
7
BODY_SHIELD
TMDS_CLK-
8
TMDS_DATA1-
TMDS_DATA1_SHIELD
6
20
VA3309
ESD_HDMI
CEC
9
TMDS_DATA0+
6
VDD[+5V]
TMDS_DATA1+
5
EDID_WP
C
7
DDC_SCL_HDMI1_MN864788
HOT_PLUG_DETECT
10
TMDS_DATA0_SHIELD
SDA
TMDS_DATA2-
4
E
KEC_HDMI_EXT_EDID_TR
2N3904S
Q3302
C
8
SCL
VA3311
ESD_HDMI
CEC_REMOTE
CK+_HDMI3_MN864788
D0-_HDMI3_MN864788
D0+_HDMI3_MN864788
RESERVED
2
3
ROHM_HDMI_EXT_EDID
IC3301
1
A2
CK-_HDMI3_MN864788
TMDS_DATA0-
CEC
SCL
11
TMDS_CLK+
9
TMDS_CLK-
SDA
12
TMDS_CLK_SHIELD
10
TMDS_CLK+
TMDS_CLK_SHIELD
AR3308
33
RESERVED
13
AR3301
5.1
1/16W
TMDS_CLK-
11
TMDS_DATA0-
HDMI_HPD_1_788
DDC/CEC_GND
15
CEC_REMOTE
CEC
12
0
DDC_SDA_HDMI1_MN864788
14
+5V_NORMAL
+5V_NORMAL
JK3302-*1
5501-56219
TMDS_DATA2+
1
A1
VA3306
ESD_HDMI
VA3304
ESD_HDMI
R3377
E
DDC/CEC_GND
16
RESERVED
13
VDD[+5V]
17
SCL
14
R3335
VA3308
ESD_HDMI
18
DDC_SCL_HDMI3
SDA
15
3.3K
DDC_SDA_HDMI3
HOT_PLUG_DETECT
TMDS_DATA2+
TMDS_DATA2_SHIELD
R3385
0
16
TMDS_DATA0_SHIELD
19
DDC/CEC_GND
TMDS_DATA0+
HDMI_HPD_1
20
HDMI_HPD_3_788
AR3304
33
TMDS_DATA1-
R3376 OPT 0
CNPLUS_HDMI_JACK
5501-56219
1
R3381
0
VDD[+5V]
0
TMDS_DATA2-
TMDS_DATA1_SHIELD
R3318
B 1K
Q3303
R3315
100K 2N3904S
VA3312
ESD_HDMI
VA3302
ESD_HDMI
HOT_PLUG_DETECT
17
R3339
R3371
4.7K
HDMI_EXT_EDID
5501-56219
TMDS_DATA2+
TMDS_DATA2_SHIELD
TMDS_DATA1+
BODY_SHIELD
HDMI_HPD_3
CNPLUS_HDMI_JACK
JK3301-*1
CNPLUS_HDMI_JACK
JK3300-*1
1.8K
OPT
R3319
4.7K
OPT
R3336
33
R3316
1K
C
R3370 OPT 0
E
20
18
R3305
4.7K
NON_HDMI_EXT_EDID
OPT
B 1K
R3303
R3300
100K
R3312
VA3300
ESD_HDMI
C
Q3300
2N3904S
BODY_SHIELD
19
1.8K
OPT
R3380
0
R3324
5V_DET_HDMI_3
R3309
+5V_NORMAL
5V_HDMI_3
MMBD6100
D3302
5V_HDMI_3
R3302
R3337
1K
33
A2
A1
C
NXP_HDMI_EXT_EDID_TR
5V_DET_HDMI_1
R3317
10K
5V_HDMI_1
FAN_ON
5V_HDMI_3
B
R3320
10K
E
MMBT3904(NXP)
Q3302-*1
A2
GND
DDC_SDA_HDMI2_MN864788
WP
SCL
SDA
DDC_SDA_HDMI1_MN864788
DDC_SCL_HDMI2_MN864788
DDC_SCL_HDMI1_MN864788
5V_HDMI_2
5V_DET_HDMI_2
R3301
100K
HDMI_HPD_2_788
C3357
JK3300
FOOSUNG_HDMI_JACK
I2C_SDA2
R3383
0
OPT
0
10K
OPT
0
0
R3361
R3363
0
10K
R3359
R3362
R3382
I2C_SCL2
MN864778_RESET
HDMI_SW_SCL
P_XIN
HDMI_HPD_2_788
10K
R3358
C3363
CEC
TX1ARCIN
TX0ARCIN
VDD11_6
NTEST
HSCL0
NRESET
HSDA0
VDD33_3
SYSCLK/XI
NC/XO
VSS_9
VDD11_7
VSS_10
VDD11_8
SCLK/LPSA1
MOSI/LPSA0
VSS_11
MISO
NCS
CH0AMCLK
VDD33IO
CH0ABCLK
CH0ALRCLK
CH0ASD3
CH0ASD2
CH0ASD1
NC
VSS_12
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
139
141
4.7uF
142
1000pF
OPT
C3338
10uF10V
RX0SDA
106
RX1SCL
4
105
RX1SDA
CH1ABCLK
2
CH1ASD0
3
CH1ALRCLK
THERMAL
145
DDC_SCL_HDMI1_MN864788
DDC_SDA_HDMI1_MN864788
DDC_SCL_HDMI2_MN864788
DDC_SDA_HDMI2_MN864788
0.1uF
VSS_8
103
P0RX2P
7
102
P0RX2M
8
101
AVDD11RX0_3
AVDD11TX_1
9
100
P0RX1P
99
P0RX1M
98
AVDD11RX0_2
97
P0RX0P
4.7uF
0.33uF
0.33uF
0.33uF
0.33uF
4.7uF
0.1uF
0.1uF
11
AVDD11TX_2
12
IC3300
96
14
95
AVDD11RX0_1
C3340
C3339
C3337
C3333
C3330
C3321
C3318
C3313
P_AVDDH33
MMBD6100
D3306
P_PVDD33
94
16
93
92
AVDD33RX0
AVDD11TX_3
18
91
90
HDMI TX port 0
0.1uF
4.7uF
C3324
C3336
0.1uF
C3322
C3328 0.33uF
0.33uF
0.1uF
C3314
C3319
C3332 0.33uF
C
1.8K
R3389
0.1uF
89
88
AVDD11RX1_3
22
87
AVDD11TX_4
23
86
85
AVDD11RX1_2
P0TX1P
25
84
83
82
AVDD11RX1_1
D0+_HDMI2_MN864788
D0-_HDMI2_MN864788
P0TX0P
28
81
P1RXCP
AVDD33TX_2
29
80
P1RXCM
P0TX0M
30
79
AVDD33RX1
P0TXCP
31
78
VDD11_5
AVDD11TX_6
32
77
RX2SCL
33
76
RX2SDA
VSS_3
34
75
RX3SCL
HDMI_0_RX0HDMI_0_CLK+
0.1uF
HDMI_0_CLK-
CK+_HDMI2_MN864788
CK-_HDMI2_MN864788
DDC_SCL_HDMI3
DDC_SDA_HDMI3
AR3402
47K
1/16W
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
RX0P5V
42
73
41
36
40
NIRQA1
39
74
37
35
P_VDD33
RX3SDA
38
VDD11_3
+1.10V_VDDC_MN864778
0.1uF
P1RX0M
27
HDMI_0_RX0+
C3350
C3372
P1RX0P
26
P0TX1M
0.1uF
0.1uF
D1+_HDMI2_MN864788
D1-_HDMI2_MN864788
AVDD11TX_5
HDMI_0_RX1-
C3349
C3371
P1RX1M
24
P0TXCM
HDMI_EN_DIODE
0.1uF
D2+_HDMI2_MN864788
D2-_HDMI2_MN864788
P1RX1P
HDMI_0_RX1+
0.1uF
C3370
P1RX2M
21
HDMI_0_RX2-
C3348
0.1uF
P1RX2P
20
P0TX2M
C3347
C3369
VSS_7
19
CK+_HDMI1_MN864788
CK-_HDMI1_MN864788
P0TX2P
L3308
BLM18PG121SN1D
0.1uF
P0RXCM
17
HDMI_0_RX2+
L3304
BLM18PG121SN1D
C3326 0.33uF
A1
A2
C
HDMI_3.3V
15
HDMI2
HDMI_3.3V
C3368
D0-_HDMI1_MN864788
VDD11_2
0.1uF
0.1uF
P0RXCP
P1TXCP
C3346
C3367
D0+_HDMI1_MN864788
13
AVDD33TX_1
P1TX0M
MMBD6100
D3305
0.1uF
P0RX0M
P1TX0P
0.1uF
C3366
D1-_HDMI1_MN864788
P1TX1M
C3345
0.1uF
D1+_HDMI1_MN864788
VSS_2
5V_HDMI_3
A2
A1
C3344
10
P1TX1P
P1TXCM
5V_HDMI_2
C3309
5V_HDMI_1
0.33uF
HDMI 5V_DET(DIODE SW)
L3307
BLM18PG121SN1D
0.1uF
L3303
BLM18PG121SN1D
P_AVDD33
HDMI TX port 1
P1TX2M
HDMI_3.3V
D2+_HDMI1_MN864788
D2-_HDMI1_MN864788
C3365
HDMI1
C3343
104
6
P1TX2P
10uF10V
5
VSS_1
VDD11_1
C3342
P_VDD33
10uF10V
10uF10V
RX0SCL
107
1
TX0HPD
HDMI2 with ARC
HDMI_3.3V
P_AVDDH11
C3364
108
TX0SDA
C3341
143
1000pF
OPT
C3335
1000pF
P_AVDDH33
P_AVDD11
OPT
C3331
OPT
C3323
DAADR019A
C3320
HDMI2
OPT
TMDS_DATA2+
C3329
1000pF
C3325
4.7uF
10V
TX1SCL
P_VDD11
P_AVDD33
TX1SDA
P_AVDD11
L3306
BLM18PG121SN1D
0.1uF
1000pF
OPT
C3315
1
+1.10V_VDDC_MN864778
L3302
BLM18PG121SN1D
D2+_HDMI2_MN864788
TMDS_DATA2_SHIELD
1000pF
D2-_HDMI2_MN864788
TMDS_DATA2-
1000pF
TMDS_DATA1+
3
OPT
C3312
4
2
P_VDD11
TX1HPD
+1.10V_VDDC_MN864778
D1-_HDMI2_MN864788
D1+_HDMI2_MN864788
TMDS_DATA1_SHIELD
C3308
5
TX0SCL
AR3303
5.1
1/16W
TMDS_DATA1-
[EP]
10K
R3311
TMDS_DATA0+
6
CH0ASD0
TMDS_DATA0_SHIELD
7
TX1SCL
HDMI_HPD_3_788
144
8
TX1SDA
R3360
D0-_HDMI2_MN864788
D0+_HDMI2_MN864788
TMDS_DATA0-
VDD11_9
TMDS_CLK+
9
TX0SDA
TX0SCL
R3356 OPT 0
CK+_HDMI2_MN864788
10
0
0
R3355 OPT 0
20pF
HDMI_ARC_788
R3353
R3354
C3334
4.7uF
10V
CK-_HDMI2_MN864788
TMDS_CLK_SHIELD
HDMI_HPD_1_788
AR3302
5.1
1/16W
TMDS_CLK-
11
VDD33_4
CEC
12
L3305
BLM18PG121SN1D
C3317
0.33uF
C3311
22uF
10V
HDMI_ARC_788
TX1SDA
140
13
R3375 OPT 0
X-TAL_2
C3358
TX1SCL
137
CEC_REMOTE
HDMI_ARC
138
RESERVED
0
R3352
1.8K
R3349
1.8K
R3350
1.8K
P_AVDDH11
R3374
3
P_XIN
+1.10V_VDDC_MN864778
SCL
P_VDD33
4
2
TX0SCL
SDA
15
14
1
GND_1
HDMI_SW_SDA
+5V_NORMAL
VA3307
ESD_HDMI
VA3305
ESD_HDMI
20pF
GND_2
P_XOUT
P_VDD33
+1.10V_VDDC_MN864778
TX0SDA
X3300
27MHz
X-TAL_1
R3357
2.2M
DDC_SDA_HDMI2_MN864788
DDC_SCL_HDMI2_MN864788
DDC/CEC_GND
16
P_XOUT
AR3305
33
R3351
1.8K
VDD[+5V]
17
HDMI_HPD_2
0
VA3303
ESD_HDMI
HOT_PLUG_DETECT
18
R3372 OPT 0
R3373
E
20
19
R3306
B 1K
3.3K
C
Q3301
2N3904S
BODY_SHIELD
R3310
VA3301
ESD_HDMI
R3308
1.8K
OPT
R3307
4.7K
R3304 OPT
R3338
1K
33
RX1P5V
RX2P5V
RX3P5V
VDD33_2
NIRQ1
VSS_6
VDD11_4
P2RX2P
P2RX2M
AVDD11RX2_3
P2RX1P
P2RX1M
AVDD11RX2_2
P2RX0P
P2RX0M
P2RXCP
AVDD11RX2_1
VSS_5
P2RXCM
AVDD33RX2
P3RX2P
P3RX2M
AVDD11RX3_3
P3RX1P
P3RX1M
P3RX0P
P3RX0M
P3RXCP
10uF10V
D2+_HDMI3_MN864788
D2-_HDMI3_MN864788
D1+_HDMI3_MN864788
D1-_HDMI3_MN864788
10uF10V
C3362
0.1uF
C3360
C3361
0.1uF
D0+_HDMI3_MN864788
NTR4501NT1G
Q3304-*1
HDMI3.3_FET_ONSEMI(MULTI)
D0-_HDMI3_MN864788
Vout=0.765*(1+R1/R2)
ZD3300
2.5V
CK+_HDMI3_MN864788
5
C3304
3300pF
50V
D
3A
C3307
22uF
10V
S
4
C3306
22uF
10V
CK-_HDMI3_MN864788
R3343
1%
14K
C3302
1uF
10V
GND
C3359
C3327
10uF
10V
LPH6050T-3R6N-R
SS
0.1uF
D
AO3438
Q3304
C3356
C3316
22uF
10V
0.1uF
C3310
100uF
6.3V
L3301
3.6uH
C3355
0.1uF
16V
0.1uF
C3305
C3354
SW
0.1uF
VBST
C3353
6
0.1uF
7
C3352
3
0.1uF
C3301
100pF
Switching freq: 700K
5V_HDMI_1
R3369
10
R3368
47K
VIN
C3351
VREG5
R2
R3365
10
R3367
47K
G
2
1%
8
G
VFB
1
S
EN
9
R3341
2.7K
C3303
0.1uF
16V
THERMAL
R3345
330K
OPT
R1
50V
5V_HDMI_2
HDMI3.3_FET_AOS(MULTI)
R3342
10K
1%
R3346
10K
10K
R3344
POWER_ON/OFF1 OPT
R3340
3.9K
IC3302
TPS54327DDAR [EP]GND
AVDD11RX3_2
P_VDD33
+12V
C3300
10uF
16V
P3RXCM
P_PVDD33
HDMI_3.3V
AVDD11RX3_1
+5V_NORMAL
AVDD33RX3
+3.3V_NORMAL
VSS_4
3.3V Power Separation
PVDD33
+1.10V_VDDC_MN864778
VDD33_1
TYPICAL 1100mA
L3300
BLM18PG121SN1D
NIRQA0
+12V
5V_HDMI_3
R3366
10
Place between
PIN 57,60,63
R3364
47K
Place between
PIN 44,47,50
HDMI3
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LM15U
HDMI
2014-11-04
10
LGE Internal Use Only
CVBS 1 PHONE JACK
COMPONENT 1 PHONE JACK
VA3808
5.6V
C3822
R3814
0.01uF
25V
470K
1608 sizs For EMI
C3808
100pF
50V
OPT
C3805
27pF
50V
OPT
COMP1/AV1/DVI_L_IN
R3809
0
1/4W
1%
C3802
150pF
OPT
0
COMP1_Y
R3808
75
VA3803
5.5V
R3822
10K
R3819
1608 sizs For EMI
R3805
0
C3811
47pF
50V
C3819
100pF
50V
OPT
C3816
560pF
50V
OPT
+3.3V_NORMAL
R3825
12K
+3.3V_NORMAL
JK3801
PEJ038-4G6
5
M5_GND
4
M4
3
M3_DETECT
1
M1
6
M6
R3815
47K
JK3803
PEJ038-4Y6
R3801
10K
5
M5_GND
4
M4
E
R3802
1K
COMP1_DET
Q3801
B
VA3804
5.6V
3
M3_DETECT
1
M1
6
M6
C
AV1_CVBS_DET
VA3807
5.6V
R3816
10K
C3824
0.1uF
50V
1608 sizs For EMI
COMP1_Pb
EAG61030011
C3806
27pF
50V
OPT
C3804
27pF
50V
OPT
VA3801
5.5V
R3806
75
1%
COMP1/AV1/DVI_R_IN
0
VA3809
5.6V
C3823
0.01uF
25V
R3817
470K
C3817
560pF
50V
OPT
VA3802
5.5V
1608 sizs For EMI
0
R3803
C3803
27pF
50V
OPT
R3824
10K
R3820
C3810
10pF
50V
C3820
100pF
50V
OPT
R3826
12K
COMP1_Pr
C3807
27pF
50V
OPT
R3807
75
1%
1uH
L3803
CM2012F1R0KT
C3809
10pF
50V
R3823
0
AV1_CVBS_IN
VA3806
5.5V
C3814
150pF
OPT
C3815
150pF
50V
C3818
150pF
50V
1/4W
1%
COMP1_Pb_1
1608 sizs For EMI
0
R3804
R3821
75
EAG61030012
C3821
47pF
50V
FOR S2A
Solteam
JK3802-*1
JSTIB15
A
VCC
B
GND
C
Fiber Optic
VIN
SHIELD
4
foxconn
JK3802
2F11TC1-EM52-4F
B
GND
R3800
33
A
VCC
C
SPDIF_OUT
C3800
18pF
50V
C3801
0.1uF
16V
VA3800
5.5V
OPT
Fiber Optic
VIN
4
SHIELD
+3.3V_NORMAL
SPDIF OUT
ADUC 5S 02 0R5L
HP OUT Delete
HP_DET
SIDE_HP_MUTE
RS232C
RS232C_JACK
R
JP3813
JP3814
RIN1
DOUT1
1
3
L
4
RIN1
GND
5
JP3815
DETECT
DOUT1
PEJ038-3B6
JK3804
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
LM14A
JACK_COMMON_V
2014-09-06
38
01
JACK_COMMON_V
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
[EG92 ONLY] IR/COMBO
WIFI POWER ENABLE CONTROL
P4101
12507WR-08L
+3.5V_WIFI
+3.5V_ST
IC4100
AP2191WG-7
1
R4101
100
2
0.1uF
C4101
IN
M_RFModule_RESET
5
1
OUT
C4112
3
0.1uF
WIFI_EN
4
100
R4100
5
R4115
WOL/WIFI_POWER_ON
C4100
0.1uF
D4100
RCLAMP0502BA
7
8
EN
4
3
FLG
R4114
10K
OPT
R4103
10
JP4111
6
2
33
GND
WIFI_DM
R4104
10
WIFI_DP
Place Near Wafer
C4105
C4104
5pF
5pF
50V
50V
WIFI_DMDP_ESD
9
+3.5V_WIFI
50V
3300pF
10V
22uF
0.1uF
C4103
C4102
L4100
BLM18PG121SN1D
C4107
P4100
12507WR-10L
+3.5V_ST
R4110
10K
R4111
10K
1%
1
1%
2
KEY1
R4113
100
3
KEY2
+3.5V_ST
C4110
0.1uF
4
5
R4112
100
C4111
0.1uF
OPT
OPT
C4106
1000pF
50V
OPT
JP4112
JP4113
+3.5V_ST
OPT
R4106
10K
6
7
C
8
Q4100
E MMBT3904(NXP)
LOGO Light Delete
B
LOGO_LIGHT
10K
R4107
1K
R4102
C4109
0.1uF
16V
9
10
11
R4120
100
JP4114
IR
R4105
C4108
100pF
50V
5%
10K
+3.5V_ST
WITH_EYE
R4118
100
EYE_SCL
100
EYE_SDA
JP4115
R4119
WITH_EYE
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
[OLED]MULTI JACK
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+5V_USB FOR USB1
1
R4300
2.2
USB_DM3
IC4300
BD2242G
4
OC
10uF
10V
4
C4323
22uF
10V
C4322
5
5
3
USB_ESD(KEC)
0DTKE00018A
D4301-*1
ILIM
D4302
RCLAMP0502BA
2
0DR050008AA
6
USB_ESD(SD05)
D4301
5V
EN
/USB_OCD1
1
1%
GND
14K
R4306
C4300
0.1uF
16V
VOUT
3
R4301
2.2
USB_DP3
VIN
2
+5V_NORMAL
R4305
4.7K
USB DOWN STREAM
+5V_USB_1
+3.3V_NORMAL
JK4302
3AU04S-305-ZC-(LG)
USB3
MAX 1.0A
+5V_USB_3
OCP USB1
EAH61515101
SEMTECH_USB_DMDP_ESD(MAIN)
USB_CTL1
D4302-*1
DF3D6.8MS
R4304
10K
EAH62735601
TOSHIBA_USB_DMDP_ESD(SUB)
1
USB DOWN STREAM
2
R4302
2.2
USB_DM2
USB_ESD(KEC)
0DTKE00018A
D4303-*1
4
C4311
22uF
10V
10uF
10V
5
SEMTECH_USB_DMDP_ESD(MAIN)
D4300
RCLAMP0502BA
0DR050008AA
USB_ESD(SD05)
D4303
5V
C4310
EAH61515101
3
R4303
2.2
USB_DP2
JK4300
3AU04S-305-ZC-(LG)
USB2
MAX 1.0A
+5V_USB_2
D4300-*1
DF3D6.8MS
EAH62735601
TOSHIBA_USB_DMDP_ESD(SUB)
+5V_USB_1
USB1 (3.0)
MAX 1.2A
USB_DM1
USB_DP1
USB3.0_TVS
D4304
RCLAMP0544T.TCT
6.5VTO11.0V
1
8
C4313
10uF
10V
ZD4302
5V
0DR050008AA
USB_ESD(SD05)
C4312
22uF
10V
USB_ESD(KEC)
0DTKE00018A
ZD4302-*1
CNPLUS CO., LTD
JK4301
5205-56209
EAG63374203
VBUS
D-
D+
2
7
GND
3
6
STDA_SSRX-
4
STDA_SSRX+
SSUSB_RXN
9
GND_DRAIN
USB3.0_TVS
D4305
RCLAMP0544T.TCT
6.5VTO11.0V
1
8
2
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
7
3
SSUSB_TXN
2
3
5
SSUSB_RXP
SSUSB_TXP
1
STDA_SSTX+
5
6
7
8
9
10
6
4
STDA_SSTX-
4
5
SHIELD
9
BSD-15Y-LM14A-043_00-HD
LM14A
USB
2014-11-12
43
LGE Internal Use Only
Full Scart(18 Pin Gender)
+3.3V_NORMAL
EU
R4601 CLOSE TO JUNCTION
10K
EU
R4602
100
SC_DET
EU
C4604
0.1uF
VA4601
5.6V
EU
FOR S2A
EU
L4602
1uH
SC_CVBS_IN
R4606
75
VA4607
5.5V
EU
SHIELD
C4605
150pF
50V
EU
EU
C4606
150pF
50V
EU
EU
19
R4614
0
AV_DET
18
17
16
15
14
13
12
11
COM_GND
VA4608
5.5V
EU
SYNC_IN
R4600
75
EU
68pF
C4612
EU
68pF
C4613
DTV/MNT_V_OUT
OPT
SYNC_OUT
SYNC_GND
EU
R4608
22
RGB_IO
SC_FB
R_OUT
VA4602
5.6V
EU
R_GND
EU
R4603
75
G_OUT
10
G_GND
SC_R
9
ID
8
VA4603
5.5V
EU
B_OUT
7
AUDIO_L_IN
EU
R4604
75
6
B_GND
JP4613
5
SC_G
AUDIO_GND
4
VA4604
5.5V
EU
AUDIO_L_OUT
3
AUDIO_R_IN
EU
R4605
75
2
AUDIO_R_OUT
1
SC_B
VA4605
5.5V
EU
DA1R018H91E
EU
R4607
75
JK4600
VA4600
20V
EU
R4616
3.9K
SC_ID
EU
R4619
10K
VA4609
5.6V
EU
EU
R4615
15K
EU
EU
EU
R4620
470K
SC_L_IN
EU
R4618
12K
EU
R4622
10K
SC_R_IN
VA4606
5.6V
EU
EU
R4623
470K
EU
R4621
12K
BLM18PG121SN1D
L4600
VA4610
5.6V
EU
EU
EU
C4600
1000pF
50V
DTV/MNT_L_OUT
EU
C4602
4700pF
BLM18PG121SN1D
L4601
VA4611
5.6V
EU
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
EU
EU
C4601
1000pF
50V
EU
C4603
4700pF
DTV/MNT_R_OUT
LM15U
SCART_JACK_V
2014-09-18
46
01
SCART_JACK_V
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Ethernet Block
LAN_JACK_POWER
FREEPORT_LAN
C5000
0.1uF
16V
UDE_LAN
JK5000-*1
26LM3L-3C100-02HF
C5001
0.01uF
50V
C5002
0.1uF
16V
C5003
0.01uF
50V
JK5000
BS-RSD0303
R1
R2
R3
P11
YL_C
R5000
0
YL_A
L3
P3
L4
EMI
P10[GND]
L2
P2
L3
9
L1
P1
L2
VA5003
P8
R11
R11
L1
VA5002
5.5V
5.5V
5.5V
5.5V
LAN_ESD(MAIN)
LAN_ESD(MAIN)
LAN_ESD(MAIN)
LAN_ESD(MAIN)
P7
R10
R10
R11
VA5001
R9
R9
R10
VA5000
R8
R8
R9
EPHY_RDN
P6[CT]
R7
R7
R8
EPHY_RDP
P5[RD-]
R6
R6
R7
P4[RD+]
R5
R5
R6
EPHY_TDN
R4
R4
R5
EPHY_TDP
P3[TD-]
LAN_ESD(SUB)
VA5003-*1
ICVS0518150FR_
R4
P2[TD+]
R3
LAN_ESD(SUB)
VA5002-*1
ICVS0518150FR_
R3
P1[CT]
R2
LAN_ESD(SUB)
VA5001-*1
ICVS0518150FR_
R2
LAN_ESD(SUB)
VA5000-*1
ICVS0518150FR_
R1
R1
GN_C
L4
P4
GN_A
16
16
SHIELD
SHIELD
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
LM15U
LAN_V
2014-09-10
50
01
LAN_V
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
AUDIO AMP(NTP7515)
SM-6045-100
GET_AMP_COIL
L5802-*1
10.0uH
+3.3V_NORMAL
R5805
AMP_RESET_N 100
TAIYO_AMP_COIL
NRS6045T100MMGK
1/16W
L5802
10.0uH
C5806
1000pF
50V
50V
SPK_L+
1
30
2
29
PGND1B
3
28
BST1B
GND
4
27
5
IC5800
26
6
NTP7515
25
7
24
L5805
10.0uH
VDR2
23
SPEAKER_L
4.7K
AGND
SDATA
BST2A
THERMAL
41
0x54
WCK
8
NC_4
AR5800
100
R5812
4.7K
NC_5
DVDD
TAIYO_AMP_COIL
NRS6045T100MMGK
VDR1
NC_3
AUD_LRCK
C5822
0.1uF
50V
C5814
390pF
50V
OUT1B
NC_2
AUD_LRCH
R5811
C5819
0.47uF
50V
VDD_PLL
C5801
1uF
10V
1/10W
5%
R5807
3.3
PVDD1B
C5809
10uF
35V
NC_1
C5800
1uF
10V
C5821
0.1uF
50V
C5813
390pF
50V
31
PVDD1A
32
OUT1A
33
34
PGND1A
C5807
BST1A
35
RESET
36
AD
37
GND_IO
CLK_I
38
40
16V
39
0.1uF
VDD_IO
[EP]GND
C5805
+24V_AMP
22000pF
AUD_SCK
1/10W
5%
4.7K
R5808
3.3
R5806
L5801
PZ1608U121-2R0TF
9
22
PGND2A
10
21
OUT2A
SDA
SPK_LC5811
22000pF
50V
SM-6045-100
GET_AMP_COIL
L5805-*1
10.0uH
C5817
1uF
10V
C5818
1uF
10V
SM-6045-100
GET_AMP_COIL
L5803-*1
10.0uH
C5812
22000pF
50V
C5803
1000pF
50V
20
19
1/10W
5%
R5809
3.3
PVDD2A
PVDD2B
OUT2B
PGND2B
MONITOR_2
BST2B
50V
C5816
390pF
50V
C5820
0.47uF
50V
R5813
0.1uF
50V
4.7K
SPEAKER_R
TAIYO_AMP_COIL
NRS6045T100MMGK
C5824
L5804
10.0uH
R5814
0.1uF
50V
4.7K
SPK_R-
SM-6045-100
GET_AMP_COIL
L5804-*1
10.0uH
C
B
18
17
16
15
14
13
C5808
22000pF
C5815
390pF
50V
1/10W
5%
Q5800
2N3904S
E KEC_AMP_MUTE_TR
C5823
R5810
3.3
B
I2S_AMP
10K
+24V_AMP
C5810
100
WOOFER_MUTE
R5800
SPK_R+
10uF
35V
R5804
AMP_MUTE
MONITOR_1
R5801
10K
C
TAIYO_AMP_COIL
NRS6045T100MMGK
L5803
10.0uH
MONITOR_0
+3.3V_NORMAL
12
C5804
33pF
50V
FAULT
C5802
33pF
50V
SCL
I2C_SCL4
11
I2C_SDA4
4P Box type
WAFER-ANGLE
Q5800-*1
MMBT3904(NXP)
NXP_AMP_MUTE_TR
E
TP5801
WOOFER_MUTE
TP5802
I2S_AMP
SPK_L+
4
SPK_L-
SPK_R+
SPK_R-
3
2
1
P5800
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-15Y-LM14A-058_00-HD
LM14A
NTP_AMP
2015-01-08
58
LGE Internal Use Only
+12V
EU
L6000
IC6000
AUD_OUT & gt; & gt; EU/CHINA_HOTEL_OPT
EU
AZ4580MTR-E1
C6004
0.1uF
OUT1
2.2K
OPT
C6002
6800pF
OPT
R6002
470K
8
7
OUT2
3
6
IN2-
4
5
50V
VCC
1
[SCART AUDIO MUTE]
EU
R6011
2.2K
EU
R6004
C6003
IN1-
33K
2
33pF
IN1+
EU
EU
SIGN600007
EU
R6008
OPT
R6010
470K
C6005
VEE
33K
IN2+
33pF
OPT
EU
C6008
DTV/MNT_R_OUT
DTV/MNT_L_OUT
10uF
C6007
EU
6800pF
C
Q6000
EU
B
MMBT3904(NXP)
EU_SCART_MUTE_ISAHAYA
SCART_AMP_L_FB
C
1/16W
5%
Q6002
RT1P141C-T112
EU
SCART_MUTE
B
EU
1/16W
5%
R6015
100K
R6021
0
1/16W
5%
EU
R6016
5.6K
DTV/MNT_R_OUT
PDTA114ET
Q6002-*1
SCART_Rout
EU
R6017
220K
EU
C6012
330pF
EU
C
Q6001
B
MMBT3904(NXP)
E
CLOSE TO MSTAR
R6014
1K
B
1/16W
5%
R6012
100K
OPT
SCART_AMP_R_FB
OPT
R6007
100K
1/16W
5%
1/16W
5%
220K
R6005
EU
OPT
330pF
C6009
EU
R6020
0
R6009
100K
EU
R6006
5.6K
SCART_Lout
OPT
E
EU
R6013
1K
E
10uF
C
EU
R6000
DTV/MNT_L_OUT
E
EU
C6000
EU
EU_SCART_MUTE_NXP
CLOSE TO MSTAR
Near Place Scart AMP
EU
R6019
0
EU
SCART_AMP_R_FB
1/16W 10K
5% R6003
EU
R6018
EU
0
SCART_AMP_L_FB
1/16W
5%
10K
R6001
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-15Y-LM14A-060_00-HD
SCART AMP
LGE Internal Use Only
B-CAS (SMART CARD) INTERFACE
+3.3V_NORMAL
INT
CMDVCC :
STATUS
--------------------------------HIGH
HIGH
CARD PRESENT
LOW
HIGH
CARD not PRESENT
+3.3V_NORMAL
IC6300
TDA8024TT
OPT
2.7K
JAPAN
R6306
OPT
R6304
JAPAN
R6302
CAM_IREQ_N
PGND
+5V_NORMAL
2
27
3
26
4
25
5
24
AUX2UC
AUX1UC
I/OUC
XTAL2
BLM18PG121SN1D
VDDP
JAPAN
C6301
10uF
10V
JAPAN
C6303
0.1uF
16V
S1
23
6
22
7
OFF
JAPAN
C6302
0.1uF
16V
PRES
PRES
I/O
AUX2
AUX1
CGND
8
21
9
20
10
19
11
18
12
17
13
16
14
15
JAPAN
33
JAPAN
33
JAPAN
33
JAPAN
/PCM_CE1
RSTIN
CMDVCC
SMARTCARD_VCC
B-CAS SLOT
P6300
10057542-1311FLF(B CAS Slot)
PORADJ
VCC
VCC
JAPAN
C6307
0.33uF
16V
RST
Place CLK C3 far from C2,C7,C4 and C8
CLK
SMARTCARD_RST
EB_WE_N
JAPAN
C6306
0.1uF
16V
SMARTCARD_DET
EB_BE_N1
JAPAN
C6305
0.1uF
16V
SMARTCARD_CLK
EB_BE_N0
L6301 JAPAN
BLM18PG121SN1D
VDD
SMARTCARD_DATA
EB_OE_N
JAPAN
R6311
33
GND
JAPAN
VUP
33
R6308
R6310
XTAL1
L6300
R6307
R6309
S2
JAPAN
JAPAN
R6316
1.2K
28
+3.3V_NORMAL
5V/3V
R6300 33
SMARTCARD_PWR_SEL
1
OPT
R6319
1.2K
CLKDIV2
JAPAN
R6315
1.2K
CLKDIV1
OPT
R6318
1.2K
CLKDIV1 CLKDIV2 : F_CRD_CLK
----------------------------1
0
CLKIN
JAPAN
R6317
1.2K
2.7K
JAPAN
OPT
R6305
R6301
2.7K
JAPAN
R6303
SIGN630003
RST
CLK
JAPAN
C6304
0.1uF
16V
RESERVED_1
GND
VPP
JAPAN
R6313
75
I/O
C1
C2
C3
C4
C5
JAPAN
C6
C7
75 ohm in I/O is for short circuit Protection
RESERVED
JAPAN
+3.3V_NORMAL
10K
R6312
JAPAN
SW1
R6314
1K
JAPAN_DIODE(SD05)
0DR050008AA
ZD6300
5V
SW2
C8
S1
S2
JAPAN_DIODE(SD05)
0DR050008AA
ZD6301
5V
JAPAN_DIODE(KEC)
0DTKE00018A
ZD6300-*1
JAPAN_DIODE(KEC)
0DTKE00018A
ZD6301-*1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-15Y-LM14A-063_00-HD
JAPAN B-CAS
63
LGE Internal Use Only
FE_DEMOD1_TS_ERROR
FE_DEMOD2_TS_ERROR
close to Tuner
+3.3V_TUNER
L6500
PZ1608U121-2R0TF
+3.3V_LNA_TU
2
close to TUNER
RF_SWITCH_CTL_TU
C6501
0.1uF
TU_K/M/W_TW/BR/CO
TU_K/M/W_TW/BR/CO
C6504
0.1uF
RF_SWITCH_CTL
TU_ALL_IntDemod
3
R6506
1K
TU_ALL_IntDemod
IF_AGC_TU
C6502
0.1uF
16V
R6507 1K
TU_K/M/W_TW/BR/CO
R6503
10K
close to Tuner
IF_AGC
TU_W_BR/TW
TU_ALL
AR6500
33
4
I2C_SCL5_TU
5
I2C_SDA5_TU
C6503
47pF
50V
OPT
AR6500-*1
200
1/16W
I2C_SCL5
I2C_SDA5
C6505
47pF
50V
OPT
+3.3V_TUNER
TU_ALL_2178B
R6513
R6504
10
IF_P_TU
6
7
IF_N_TU
TU_CVBS_TU
TU_ALL_IntDemod
TU_ALL_2178B
R6517
200
TU_ALL_2178B
R6516
200
IF_N
+3.3V_TUNER
C6517
22uF
10V
TU_CVBS
E
TU_SIF_TU
9
TU_SIF
0
1608 perallel
because of derating
IF_P
C6519
33pF
L6502
OPT
TU_H/M_EU/BR/TW/CO/KR
C6520
33pF
TU_H/M_EU/BR/TW/CO/KR
TU_ALL_IntDemod
R6505
10
should be guarded by ground,Match GND VIA
8
+3.3V_NORMAL
L6504
PZ1608U121-2R0TF
1
FE_DEMOD3_TS_CLK
FE_DEMOD3_TS_SYNC
FE_DEMOD3_TS_VAL
FE_DEMOD3_TS_ERROR
FE_DEMOD3_TS_DATA
1. should be guarded by ground
2. No via on both of them
3. Signal Width & gt; = 12mils
Signal to Signal Width = 12mils
Ground Width & gt; = 24mils
C6508
0.1uF
16V
0TR390609DC
KEC_TU_ALL_2178B_TR(SUB)
Q6502
2N3906S-RTK
B
C
E
+3.3V_TUNER
B
NXP_TU_ALL_2178B_TR(MAIN)
Q6502-*1
MMBT3906(NXP)
C EBK61012701
C6510
0.1uF
T2 : Max 1.7A
else : Max 0.7A
TU_M_KR/EU/CN // W_ALL
close to Tuner
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_CLK
TU_M/W_BCD_LDO(MAIN)
IC6500
AP2132MP-2.5TRG1
FE_DEMOD1_TS_CLK
BCD
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
18
FE_DEMOD1_TS_DATA[1]
19
FE_DEMOD1_TS_DATA[2]
20
C6516
0.1uF
24
FE_DEMOD1_TS_DATA[7]
25
/TU_RESET1_TU
26
R6500
FE_DEMOD1_TS_DATA[6]
VIN
VCTRL
+5V_NORMAL
FE_DEMOD1_TS_DATA[5]
23
EN
TU_M/W
ESD_TU_M/W
5V ZD6501
C6500
FE_DEMOD1_TS_DATA[4]
22
FE_DEMOD1_TS_DATA[0-7]
FE_DEMOD1_TS_DATA[3]
21
PG
TU_M/W
+3.3V_NORMAL
1
8
2
9
17
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
THERMAL
16
10K
TU_M/W
15
[EP]
3
4
7
6
2A
5
GND
ADJ
VOUT
Demod_Core
R6519-*1 R6521-*1
18K
16K
FE_DEMOD1_TS_ERROR
R2
R1
TU_M/W_1.1V TU_M/W_1.1V
12
10K
R6521
TU_M/W_1.2V
+3.3V_TU
10.5K
R6519
TU_M/W_1.2V
11
14
14’ Tuner Type for Global
TDJ’H’-G101D : Half NIM for EU,AJJA
TDJ’H’-H101F : Half NIM for US, KR
TDJ’K’-T101F : Half NIM for TW
TDJ’M’-C301D,F : FULL NIM for China
TDJ’M’-B101F : Brazil NIM with Isolater Type
TDJ’M’-K101F : colombia NIM
TDJ’M’-G101D,G105D,G151D : EU Combo & Full NIM
TDJ’M’-H101F,H151F : Korea PIP tuner
TDJ’W’-A151D : AJJA T2 PIP
L6501
PZ1608U121-2R0TF
Example of Option name
TU_ALL_IntDemod = All Tuner type for Internal demod
TU_M/W = apply TDSM & TDSW Type Tuner
TU_M_KR/EU/CN // W_ALL
10
Global F/E Option Name
1. TU
2. Tuner Name = TDJ’H’,TDj’M’...
3. Country Name = KR,US,BR,EU ...
NC
TU_M/W
C6518
10uF
10V
EAN61387601
+3.3V_DEMOD_TU
0.1uF
16V
TU_M/W
C6515
1uF
25V
TU_M/W_HTC_LDO(SUB)
TAEJIN TECHNOLOGY CO., LTD.
[EP]GND
+3.3V_TUNER
POK
EN
C6511 TU_M/W
0.1uF
I2C_SCL2_TU
28
D_Demod_Core
29
LNB_TX
30
LNB_OUT
FE_DEMOD1_TS_CLK_1
AR6501
33 TU_M/W
OPT
C6513
18pF
50V
Demod_Core
TU_M/W
C6506
0.1uF
FE_DEMOD1_TS_SYNC_1
I2C_SCL2
I2C_SDA2
LNB_TX
FE_DEMOD2_TS_ERROR
36
FE_DEMOD2_TS_SYNC
37
FE_DEMOD2_TS_CLK
38
FE_DEMOD2_TS_VAL
40
FE_DEMOD2_TS_DATA
45
/TU_RESET2_TU
LNB_OUT
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_VAL
IN
FE_DEMOD1_TS_SYNC
3
6
OUT
FE_DEMOD1_TS_VAL
BIAS
FE_DEMOD1_TS_DATA[0]
4
5
SS
TU_JP 0 R6515
TU_JP 0 R6518
TU_JP 0 R6520
FE_DEMOD2_TS_ERROR
TU_JP 0 R6522
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_CLK
L6506 +2.5V_Normal
BLM18PG121SN1D
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
0 R6514
FB
EAN63492001
FE_DEMOD2_TS_DATA
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
0 R6512
TU_K/M/W_NON_JP
7
GND
+2.5V_DEMOD
39
0 R6511
TU_K/M/W_NON_JP
FE_DEMOD1_TS_CLK
C6512
18pF
50V
FE_DEMOD2_TS_CLK
34
TU_K/M/W_NON_JP
FE_DEMOD1_TS_VAL_1
FE_DEMOD1_TS_DATA0_1
2
0 R6502
8
OPT
I2C_SDA2_TU
31
TU_K/M/W_NON_JP
TU_M/W
L6505
PZ1608U121-2R0TF
1
9
/TU_RESET1
TU_M/W
L6503
PZ1608U121-2R0TF
C6507
16V
0.1uF
THERMAL
TU_M/W
R6501
100
TU_M/W
27
IC6500-*1
TJ2132GDP
Vout=0.6*(1+R1/R2)
FE_DEMOD2_TS_VAL
C6509
0.1uF
TU_JP
Close to Tuner
TU_JP
FE_DEMOD2_TS_DATA
R6527
100
C6514
16V
0.1uF
TU_JP
/TU_RESET2
TU_JP
BSD-15Y-LM14A-065_00-HD
LM14A
TU_CIRCUIT
LGE Internal Use Only
B[3.3V]
1
2
3
4
5
6
7
8
9
IF_AGC
3
SCL
4
SDA
5
IF[P]
6
IF[N]
7
SIF
8
CVBS
9
+3.3V
1
NC
2
DIF_AGC
3
SCL_RF
4
SDA_RF
5
DIF[P]
6
DIF[N]
7
SIF
8
CVBS
9
10
B1
A1
B1
TU_GND_B
SHIELD
B1
47
SHIELD
B1
11
12
13
14
15
16
17
18
19
20
21
22
23
EMS Improvement
24
TU_GND_A
C6705
3300pF
630V
25
TU_GND_B
26
27
28
C6700
630V
TU_GND_A3_1nF
R6700
0
C6706-*1
1000pF
630V
TU_GND_A1_1nF
R6700-*1
0.022uF
630V
TU_GND_A2_22nF
A1
C6707
1000pF
630V
TU_GND_B3_1nF
R6708
0
TU_GND_B5_0ohm
R6704
22
TU_GND_B2_22ohm
R6703
22
TU_GND_A4_22ohm
TU_GND_A2_0ohm
TU_GND_A1_22nF
C6700-*1
0.022uF
1st
630V
TU_GND_A3_22nF
DIFAGC
3
SCL_RF
4
SDA_RF
5
DIF[P]
6
DIF[N]
7
SIF
8
CVBS
9
NC_2
10
+3.3V_RF
11
ERROR
12
GND
13
MCLK
14
SYNC
15
VALID
16
DATA
17
NC_3
18
NC_4
19
NC_5
20
NC_6
21
NC_7
22
NC_8
23
NC_9
24
RESET_DEMOD
25
+3.3V_DEMOD
26
SCL_DEMOD.
27
+1.2V_DEMOD
28
NC_10
29
SDA_DEMOD
30
31
C6703
1000pF
630V
TU_GND_B1_1nF
1000pF
C6706
0.022uF
630V
30
C6708
1000pF
630V
TU_GND_B4_1nF
A1
B1
B1
32
layer
SHIELD
A1
R6704-*1
0
C6707-*1
C6708-*1
0.022uF
0.022uF
630V
630V
TU_GND_B4_22nF
TU_GND_B3_22nF
R6708-*1
R6704-*2
22
10
TU_GND_B2_0ohm TU_GND_B2_10ohm
1
NC_1
2
AIF_AGC
3
SCL_RF
4
SDA_RF
5
AIF[P]
6
AIF[N]
7
SIF
8
CVBS
9
NC_2
10
B2[+3.3V]
11
A1
B1
12
GROUND
13
KR
North.AM
BR
GND A_1
X
22 nF
X
TU6704-*3
TDJM-K351F
B1[+3.3V]
B1[+3.3V]
B1[+3.3V]
1
NC_1
2
AIF_AGC
3
SCL_RF
4
SDA_RF
5
AIF[P]
6
AIF[N]
7
SIF
8
CVBS
9
22 nF 1 nF
1
1
1
2
GND A_2
0 ohm
0 ohm
X
X
22 nF
0 ohm
22 nF 0 ohm
3
4
5
GND A_3
1 nF
X
6
22 nF 1 nF
7
8
9
GND A_4
22 ohm
22 ohm
X
X
10
22 ohm 22 ohm
11
12
13
14
15
TU_GND_B
EU/CIS
AJJA
TW/COL
CN/HK
KR
North.AM
BR
JP
16
17
18
GND B_1
1 nF
X
X
1 nF
22 nF
19
X
20
21
22
GND B_2
10 ohm
X
22 ohm
X
22 ohm
23
X
24
25
GND B_3
1 nF
1 nF
22 nF
26
1 nF
22 nF 1 nF
27
28
29
GND B_4
1 nF
1 nF
22 nF
30
1 nF
A1
B1
47
SCL_RF
4
SDA_RF
5
NC_2
6
NC_3
7
SIF
8
CVBS
9
NC_4
10
NC_5
11
ERROR
12
GND
13
MCLK
14
SYNC
15
VALID
16
DATA0
17
DATA1
18
DATA2
19
DATA3
20
DATA4
21
DATA5
22
DATA6
23
DATA7
24
RESET_DEMOD
25
B2[+3.3V]
26
SCL_DEMOD
27
B3[+1.2V]
28
NC_6
29
SDA_DEMOD
30
B1
A1
A1
B1
NC_1
3
SCL_RF
4
SDA_RF
5
NC_2
6
NC_3
7
SIF
8
CVBS
9
NC_4
10
NC_5
11
ERROR
12
GND
13
MCLK
14
SYNC
15
VALID
16
DATA0
17
DATA1
18
DATA2
19
DATA3
20
DATA4
21
DATA5
22
DATA6
23
DATA7
24
RESET_DEMOD
25
B2[+3.3V]
26
SCL_DEMOD
27
B3[+1.2V]
28
NC_6
29
SDA_DEMOD
30
B1
A1
A1
B1
47
47
SHIELD
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3
22 nF 1 nF
A1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
NC_1
SHIELD
SHIELD
NC_2
10
B2[+3.3V]
11
ERROR
12
GND
13
MCLK
14
SYNC
15
VALID
16
DATA0
17
DATA1
18
DATA2
19
DATA3
20
DATA4
21
DATA5
22
DATA6
23
DATA7
24
RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.2V]
28
NC_3
29
SDA_DEMOD
30
B1
A1
A1
B1
7
TU_SIF_TU
8
TU_CVBS_TU
9
NC_5
NC_6
NC_7
10
+3.3V_RF
+3.3V_TU
11
FE_DEMOD1_TS_ERROR
12
14
NC_8
GND_1
13
16
17
FE_DEMOD1_TS_DATA[1]
18
19
FE_DEMOD1_TS_DATA[3]
20
DATA3
DATA4
FE_DEMOD1_TS_DATA[4]
21
FE_DEMOD1_TS_DATA[5]
22
FE_DEMOD1_TS_DATA[6]
23
FE_DEMOD1_TS_DATA[7]
24
/TU_RESET1_TU
25
+3.3V_DEMOD_TU
26
I2C_SCL2_TU
27
DATA5
DATA6
DATA7
RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.2V]
28
F22_OUTPUT
29
SDA_DEMOD
30
LNB
31
GND
32
B1
34
35
36
37
43
TU_M_CN
TU6704-*1
TDJM-C451D
TU6704-*4
TDJM-K352F
X
6
IF_N_TU
NC_4
FE_DEMOD1_TS_DATA[2]
JP
TU_M_AJ/JA
TU6704-*2
TDJM-G355D
5
IF_P_TU
DATA2
38
TU_M_TW/PA
I2C_SDA5_TU
NC_3
DATA1
TU_GND_B5_22ohm
TU_M_CO
4
SDA_RF
FE_DEMOD1_TS_VAL_1
GND_B
CN/HK
3
I2C_SCL5_TU
FE_DEMOD1_TS_DATA0_1
44
B1[+3.3V]
NC_1
NC_2
45
SCL_RF
SDA_RF
NC_3
46
NC_4
RESET_M_DEMOD
+3.3V_DEMOD
SCL_DEMOD
+1.2V_DEMOD
D_Demod_Core
NC_9
LNB_TX
SDA_DEMOD
I2C_SDA2_TU
30
LNB_OUT
31
LNB
GND_2
32
NC_10
33
M_ERROR
34
FE_DEMOD2_TS_ERROR
GND_3
35
M_SYNC
36
FE_DEMOD2_TS_SYNC
M_MCLK
FE_DEMOD2_TS_CLK
+2.5V_DEMOD
+2.5V_DEMOD
M_VALID
FE_DEMOD2_TS_VAL
M_DATA
FE_DEMOD2_TS_DATA
40
FE_DEMOD3_TS_ERROR
41
FE_DEMOD3_TS_SYNC
42
FE_DEMOD3_TS_CLK
43
FE_DEMOD3_TS_VAL
44
S_ERROR
S_SYNC
S_MCLK
S_VALID
S_RESET_DEMOD
45
/TU_RESET2_TU
S_DATA
46
FE_DEMOD3_TS_DATA
SIF
CVBS
47
NC_5
NC_6
A1
ERROR
GROUND
MCLK
A1
B1
B1
48
47
SYNC
49
VALID
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
TU_GND_A
TW/COL
IF_AGC_TU
SCL_RF
DATA0
42
AJJA
2
VALID
41
EU/CIS
RF_SWITCH_CTL_TU
NC_2
FE_DEMOD1_TS_SYNC_1
40
TU_GND_A
1
SYNC
39
GND_A
+3.3V_LNA_TU
NC_1
MCKL
47
SHIELD
+3.3V_LNA
FE_DEMOD1_TS_CLK_1
ERROR
33
C6703-*1
0.022uF
630V
TU_GND_B1_22nF
4th Layer
B1[+3.3V]
47
TU_GND_A
TU_M_EU
0 R6707
TU_M_EU
0 R6706
TU_M_EU
0 R6705
DVB ESD
Improvement
29
TU_GND_B
TU_GND_A
TUNER EMS GND SEPERATION
2
TU_GND_A
C6704
3300pF
630V
1
NC_1
TU_GND_B
TU_GND_A
47
A1
TU_GND_B
A1
TU_GND_A
A1
+3.3V
TU6703
TDJW-J351F
SHIELD
TU_GND_B
1
TU6705
TDJH-H351F
TU_W_JP
TU_M_EU
TU6702
TDJM-G351D
TU_M_T2_KR
TU6704
TDJM-H451F
TU_H_US
TU_GND_B
TU_K_BR
TU6706
TDJK-T351F
RESET_DEMOD
B2[+3.3V]
SCL_DEMOD
B3[+1.2V]
NC_7
SDA_DEMOD
B1
47
SHIELD
2014-08-11
TU_SYMBOL_V_DVB
67_01
LGE Internal Use Only
DVB-S2 LNB Part Allegro
(Option:LNB)
Input trace widths should be sized to conduct at least 3A
3A
Ouput trace widths should be sized to conduct at least 2A
+12V
2A
D6904-*1
Max 1.3A
D6904
15uH
40V
LNB_SMAB34
LX
1/16W
1%
+3.3V_NORMAL
TCAP
0.22uF
NC_2
GNDLX
17
16
10
C6912
LNB
0.1uF
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
0
JAPAN
R6908
0
LNB_TX
I2C_SDA2
I2C_SCL2
EU/CIS
R6905
AR6900
33
LNB
C6911
10
TONECTRL
9
ADD
7
8
SDA
SCL
IRQ
6
LNB_DMBT
R6903
39K
ISET
11
18
VREG
12
TCAP
OPT
5
ISET
R6907
3.3K
4
TDO
GND
13
LNB
VREG
12
LNB
TDI
IC6900-*1
DT1803
VIN
14
THERMAL
21
2
3
A_GND
13
LNB
5
IRQ
LX
PGND
NC_3
NC_4
15
1
LNB
NC_2
GND
11
3
6
NC_1
16
A_GND
LNB
VIN
14
IC6900
A8303SESTR-T
4
R6904
0
R6906
0
A_GND
TDO
D6903-*1
LNB_SX34
40V
2
9
C6902
0.22uF
25V
TDI
BOOST
LNB
NC_1
D6903
LNB_SMAB34
40V
17
Close to Tuner
Surge protectioin
LNB
C6904
0.1uF
50V
18
D6900
LNB
R6900
2.2K
1W
LNB
19
C6901
33pF
LNB
[EP]
C6900
0.1uF
LNB
20
30V
LNB_ONSEMI
TONECTRL
LNB
LNB_OUT
THERMAL
21
Caution!! need isolated GND
C6910
0.1uF
50V
15
1
8
VCP
D6901
MBR230LSFT1G
20
LNB_TSC
ADD
A_GND
close to VIN pin(#15)
NC_3
SS23L
D6901-*1
A_GND
A_GND
SDA
30V
BOOST
close to Boost pin(#1)
C6909
10uF
25V
LNB
19
C6907
10uF
25V
LNB
7
C6906
10uF
25V
LNB
SCL
C6905
10uF
25V
LNB
[EP]GND
C6903
0.01uF
50V
LNB
LNB
30V
LNB
30V
D6902
LNB_ONSEMI
C6908 0.1uF
LNB_TSC
D6902-*1
SS23L
LNB
LPH6050T-150M-R
L6900
3.5A
40V
LNB_SX34
BSD-15Y-LM14A-069_00-HD
LM14A
LNB
69
LGE Internal Use Only
[51P Vx1
output wafer]
51pin_Wafer
P7100
FI-RE51S-HF-J-R1500
+3.3V_NORMAL
1
2
TXDAP7_L
3
TXDAN7_L
LOCKAn_HTPDAn_3.3VPullup
LOCKAn_HTPDAn_3.3VPullup
R7115
+1.8V
4
5
TXDAP6_L
6
TXDAN6_L
7
8
TXDAP5_L
9
TXDAN5_L
10
11
TXDAP4_L
12
R7121
10K
10K
LOCKAn
LOCKAn_HTPDAn_3.3VPullup
R7118
C
10K
LOCKAn_HTPDAn_3.3VPullup
B
Q7105
MMBT3904(NXP)
R7109
LOCKAn_HTPDAn_3.3VPullup
10K
E
LOCKAn_HTPDAn_3.3VPullup
C
R7111
100
B
Q7101
MMBT3904(NXP)
LOCKAn_IN
E LOCKAn_HTPDAn_3.3VPullup
TXDAN4_L
13
14
TXDAP3_L
15
TXDAN3_L
+3.3V_NORMAL
16
17
TXDAP2_L
18
TXDAN2_L
LOCKAn_HTPDAn_3.3VPullup
+1.8V
19
20
TXDAN1_L
22
23
TXDAP0_L
24
TXDAN0_L
+3.3V_NORMAL
25
LOCKAn_IN
27
HTPDAn_IN
R7125
10K
26
R7120
10K
10K
HTPDAn
LOCKAn_HTPDAn_3.3VPullup
R7117
C
10K
LOCKAn_HTPDAn_3.3VPullup
B
Q7104
R7108
MMBT3904(NXP)
LOCKAn_HTPDAn_3.3VPullup
10K
E
LOCKAn_HTPDAn_3.3VPullup
C
R7110
100
Q7100
B
MMBT3904(NXP)
HTPDAn_IN
E LOCKAn_HTPDAn_3.3VPullup
TXDAP1_L
21
LOCKAn_HTPDAn_3.3VPullup
R7114
28
D
29
R7103
100
Q7102-*1
2N7002K
G
+3.3V_NORMAL
POWER_DET_1
30
32
EL_VDD_DETECT_22V
G
KEC_FET
R7112
R7122
0
S
33
0
I2C_SCL6
D
R7106
4.7K
OPT
JP7101
31
S
DIODE_FET
TCON_I2C_EN
EL_VDD_DETECT_22V
Q7102
2N7002KA
R7116
34
35
D
33 OPT
+3.3V_NORMAL
36
Q7103-*1
2N7002K
G
TCON_I2C_EN
38
R7113
R7123
JP7102
40
DIODE_FET
0
I2C_SDA6
Q7103
2N7002KA
T_CON_SYS_POWER_OFF
0 R7104
41
S
0
S
39
KEC_FET
D
R7107
4.7K
OPT
G
37
INV_CTL
R7119
100 R7105
42
COMPENSATION_DONE
33 OPT
R7124
0
43
COMPENSATION_DONE_1
44
OPT
CONPENSATION_DONE - & gt; TEMP USE(HDMI ARC PROBLEM)
45
CONPENSATION_DONE1 - & gt; FINAL USE
46
47
R7101
100
48
LED_R
T_CON_SYS_POWER_OFF
50
R7100
10K
49
C7100
0.1uF
16V
51
52
Data_Format_0
Data_Format_1
3D & L_DIM_EN
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
UF71/7500
Vx1 51P
2014-05-19
21
LGE Internal Use Only
[41P Vx1
output wafer]
41pin_Wafer
P7200
FI-RE41S-HF-J-R1500
1
2
OPT
R7200 100
OLED_FW_EMERGENCY
R7201 100
ON_RF_DONE
OPT
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
TXDBP7_L
19
TXDBN7_L
20
21
TXDBP6_L
22
TXDBN6_L
23
24
TXDBP5_L
25
TXDBN5_L
26
27
TXDBP4_L
28
TXDBN4_L
29
30
TXDBP3_L
31
TXDBN3_L
32
33
TXDBP2_L
34
TXDBN2_L
35
36
TXDBP1_L
37
TXDBN1_L
38
39
TXDBP0_L
40
TXDBN0_L
41
42
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
UF71/7500
Vx1 41P
14/07/19
22
LGE Internal Use Only
eMMC I/F
SAMSUNG ELECTRONIC CO.,LTD
IC8100
THGBMBG5D1KBAIL
EMMC_DATA[0-7]
IC8100-*1
THGBMBG6D1KBAIL
EAN63829501
IC8100-*2
H26M41103HPR
IC8100-*3
KLM4G1FEPD-B031
AR8100
0
1/16W
A3
A4
EMMC_DATA[3]
A5
EMMC_DATA[4]
B2
EMMC_DATA[5]
B3
EMMC_DATA[6]
B4
B5
EMMC_DATA[7]
B6
NC_23
DAT1
NC_24
DAT2
NC_25
DAT3
NC_26
DAT4
NC_27
DAT5
NC_28
DAT6
NC_29
NC_30
NC_31
0
R8104
0
R8105
M6
0
R8106
M5
0
R8107
NC_32
CLK
NC_33
CMD
NC_34
eMMC V5.0 GND
NC_35
NC_36
A6
C5
AR8102
E5
0
E8
1/16W
E9
EMMC_CLK
E10
DAT7
EMMC_CMD
EMMC_RST
F10
G3
G10
H5
OPT
J5
C8107
10pF
50V
K6
K7
EMMC_STRB
R8103
10K
K10
P7
P10
VSS_1
NC_37
RFU_2
NC_38
NC_21
NC_39
RFU_4
NC_40
RFU_5
NC_41
VSF_1
NC_42
VSF_2
NC_43
VSF_3
NC_44
RFU_9
NC_45
RFU_10
NC_46
DS
NC_47
VSS_5
NC_48
RFU_13
NC_49
RFU_14
NC_50
RFU_15
NC_51
RFU_16
NC_52
RFU_17
A7
NC_53
NC_54
NC_55
K5
RSTN
C6
M4
3.3V_EMMC
N4
P3
P5
EMMC_RESET_BALL
EMMC_CMD_BALL
EMMC_CLK_BALL
DAT6
DAT5
DAT4
DAT3
Bottom
OPT
C8108
0.1uF
16V
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
OPT
C8109
2.2uF
10V
C8105
0.1uF
16V
C8106
2.2uF
10V
E6
F5
J10
K9
VCC_1
VCC_2
VCC_3
VCC_4
EMMC_VDDI
Bottom
OPT
C8101
1uF
10V
pattern 0.2mm
C2
VDDI
C8104
2.2uF
10V
E7
G5
H10
K8
C8102
0.1uF
16V
C8103
2.2uF
10V
C8111
4.7uF
10V
OPT
C4
N2
N5
P4
VSS_2
VSS_3
VSS_4
VSS_6
VSSQ_1
VSSQ_2
VSSQ_3
NC_56
EMMC5.0_4G_TOSHIBA
OPT
DVDD18_EMMC
C8100
0.1uF
16V
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
VSSQ_4
NC_82
VSSQ_5
P6
NC_83
NC_84
NC_85
NC_86
A1
DAT3
A2
DAT4
A3
C8
DAT0
DAT7
EMMC_DATA[2]
NC_1
NC_87
NC_2
NC_88
NC_3
NC_89
C9
DAT6
A5
C11
B2
C12
B3
C13
B4
B5
C14
D1
D2
DAT5
C8
B6
DAT0
NC_23
DAT1
NC_24
DAT2
NC_25
DAT3
NC_26
DAT4
NC_27
DAT5
NC_28
DAT6
NC_29
DAT7
A4
C10
NC_30
NC_31
D3
D4
D12
M5
NC_32
M6
NC_33
CMD
D13
CLK
NC_34
NC_35
D14
A7
E3
C5
E12
E5
E13
E8
E14
E9
F1
E10
F2
F10
F3
G3
F12
G10
F13
H5
F14
J5
G1
K6
G2
K7
G12
K10
G13
P7
G14
P10
H1
VSS_1
NC_37
RFU_2
NC_38
NC_21
NC_39
RFU_4
NC_40
RFU_5
NC_41
VSF_1
NC_42
VSF_2
NC_43
VSF_3
NC_44
RFU_9
NC_45
RFU_10
NC_46
DS
NC_47
VSS_5
NC_48
RFU_13
NC_49
RFU_14
NC_50
RFU_15
NC_51
RFU_16
NC_52
RFU_17
E2
H2
NC_36
A6
E1
NC_53
NC_54
EMMC_STRB
NC_55
K5
H3
RSTN
H12
H13
H14
C6
J1
M4
J2
N4
J3
P3
J12
P5
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
VCCQ_1
EMMC_RESET_BALL
E6
K1
K2
F5
K3
J10
K9
K12
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
C2
L1
VDDI
L2
L3
E7
L12
L13
G5
L14
H10
M1
K8
M2
C4
M3
N2
EMMC_CLK_BALL
M7
N5
M8
P4
M9
P6
VSS_2
VSS_3
VSS_4
VSS_6
VSSQ_1
VSSQ_2
VSSQ_3
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
VSSQ_5
M10
VSSQ_4
NC_83
NC_84
M11
NC_85
M12
M13
M14
A2
NC_86
A1
NC_1
NC_87
NC_2
NC_88
NC_3
NC_89
NC_4
NC_90
NC_5
NC_91
NC_6
NC_92
NC_7
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
NC_102
NC_17
NC_103
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_22
NC_107
A3
C9
A4
C10
A5
C11
B2
B3
C13
B4
D1
B5
B6
D2
NC_22
DAT1
NC_23
DAT2
NC_24
DAT3
NC_25
DAT4
NC_26
DAT5
NC_27
DAT6
NC_28
DAT7
C12
C14
C7
DAT0
NC_29
NC_30
D3
D4
D12
M5
NC_31
M6
NC_32
CMD
D13
CLK
NC_33
NC_34
D14
E1
E5
E3
G3
E12
K6
E13
K7
E14
E8
F1
E9
F2
E10
F3
F10
F12
G10
F13
K10
G1
P10
H5
G2
RFU_1
NC_36
RFU_2
NC_37
RFU_3
NC_38
RFU_4
NC_39
RFU_5
NC_40
VSF_1
NC_41
VSF_2
NC_42
VSF_3
NC_43
VSF_4
NC_44
VSF_5
NC_45
VSF_6
NC_46
VSF_7
NC_47
DS
E2
F14
NC_35
A7
NC_48
NC_49
G12
NC_50
G13
NC_51
G14
NC_52
H1
NC_53
H2
H3
NC_54
K5
RSTN
H12
NC_55
NC_56
H13
H14
C6
J1
M4
J2
N4
NC_57
J3
P3
J12
P5
VCCQ_1
NC_58
VCCQ_2
NC_59
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
K1
E6
K2
F5
K3
J10
K12
K9
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
L1
C2
VDDI
L2
L3
L12
C4
L13
N2
L14
N5
M1
P4
M2
P6
M3
A6
M7
E7
M8
G5
M9
H10
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSS_1
VSS_2
VSS_3
EMMC5.0_8G_HYNIX
EMMC_DATA[1]
EMMC5.0_8G_TOSHIBA
EMMC_DATA[0]
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
J5
M11
K8
M12
VSS_4
NC_82
VSS_5
NC_83
VSS_6
M10
NC_84
NC_85
M13
M14
NC_60
NC_86
A1
A9
A11
A12
A13
A14
B1
B7
B8
B9
DAT6
B10
B11
Don’t Connect Power At VDDI
B12
EMMC_VDDI
DVDD18_EMMC
B13
B14
(Just Interal LDO Capacitor)
C1
DAT5
C3
C7
NC_4
NC_90
NC_5
NC_91
NC_6
NC_92
NC_7
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
NC_102
NC_17
NC_103
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_22
A10
NC_107
A8
N1
N3
N6
EMMC_CMD_BALL
A9
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
B9
P1
B10
P2
B11
P8
B12
P9
B13
P11
B14
P12
C1
P13
C3
P14
C7
N1
A2
N3
A8
N6
A9
N7
A10
N8
A11
N9
A12
N10
A13
N11
A14
N12
B1
N13
B7
N14
B8
P1
B9
P2
B10
P8
B11
P9
B12
P11
B13
P12
B14
P13
C1
P14
C3
C5
NC_87
NC_2
NC_88
NC_3
NC_89
NC_4
NC_90
NC_5
NC_91
NC_6
NC_92
NC_7
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
NC_102
NC_17
NC_103
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_21
A8
DAT7
NC_1
NC_107
NC_108
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
C8
C9
C10
C11
C12
C13
C14
D1
A3
A5
C7
B2
B3
B4
B5
B6
DAT0
NC_22
DAT1
NC_23
DAT2
NC_24
DAT3
NC_25
DAT4
NC_26
DAT5
NC_27
DAT6
NC_28
DAT7
A4
NC_29
D2
NC_30
D3
NC_31
D4
D12
M6
NC_32
CMD
M5
CLK
NC_33
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
NC_34
NC_35
A7
G3
K6
K7
E8
E9
E10
F10
G10
K10
P10
H5
RFU_1
NC_36
RFU_2
NC_37
RFU_3
NC_38
RFU_4
NC_39
RFU_5
NC_40
RFU_6
NC_41
RFU_7
NC_42
RFU_8
NC_43
RFU_9
NC_44
RFU_10
NC_45
RFU_11
NC_46
RFU_13
NC_47
DS
E5
NC_48
G2
NC_49
G12
NC_50
G13
NC_51
G14
NC_52
H1
NC_53
H2
H3
NC_54
K5
RSTN
NC_55
H12
H13
H14
J1
J2
J3
J12
NC_56
NC_57
C6
N4
P3
P5
NC_58
VDD_2
NC_59
VDD_3
NC_60
VDD_4
NC_61
VDD_5
M4
VDD_1
NC_62
J13
J14
K1
K2
K3
K12
E6
F5
J10
K9
VDDF_1
VDDF_2
VDDF_3
VDDF_4
K13
K14
L1
C2
VDDI
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
EMMC5.0_4G_SAMSUNG
R8117
10K
1/16W
10K
AR8103
1/16W
10K
AR8104
R8116
10K
3.3v power delete, 131120
DVDD18_EMMC
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
C4
N5
P4
P6
A6
E7
G5
H10
J5
K8
VSS_1
NC_74
VSS_2
NC_75
VSS_3
NC_76
VSS_4
NC_77
VSS_5
NC_78
VSS_6
NC_79
VSS_7
NC_80
VSS_8
NC_81
VSS_9
NC_82
VSS_10
NC_83
VSS_11
N2
NC_84
M12
NC_85
M13
NC_86
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P7
P8
P9
P11
P12
P13
P14
A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C5
NC_1
NC_87
NC_2
NC_88
NC_3
NC_89
NC_4
NC_90
NC_5
NC_91
NC_6
NC_92
NC_7
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
RFU_12
NC_17
NC_102
NC_18
NC_103
NC_19
NC_104
NC_20
NC_105
NC_21
NC_106
C8
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P7
P8
P9
P11
P12
P13
P14
NC_107
BSD-15Y-LM14A-081_00-HD
LM14A
eMMC
LGE Internal Use Only
RS-232C Control INTERFACE
RS232C
R6820
100
DOUT1
+3.5V_ST
RS232C
R6821
100
RIN1
OPT
ZD6802
ADUC 20S 02 010L
20V
RS232C
C6813
0.1uF
RS232C
IC6801
OPT
ZD6803
ADUC 20S 02 010L
20V
MAX3232CDR
C1+
RS232C
C6808
0.1uF
RS232C
C6809
0.1uF
V+
C1-
C2+
RS232C
C6810
0.1uF
C2-
V-
RS232C
C6811
0.1uF
DOUT2
RIN2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
GND
DOUT1
RIN1
ROUT1
SOC_RX
DIN1
SOC_TX
DIN2
ROUT2
EAN41348201
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
UF71/7500
RS232C
2014-05-19
22
LGE Internal Use Only
LM14A+URSA
CLIP Top Side for Covershield
GAP SUPPORTER
M13536
MJH62619502
EAG64250901
EAG64250901
M13501
CLIP
M13502
EAG64250901
EAG64250901
CLIP
M13503
CLIP
M13504
CLIP
Heatsink guide cap
C13500
22uF
10V
C13502
22uF
10V
C13504
22uF
10V
CLIP 1 - PUSH TYPE
C13501
22uF
10V
SMD Top Side for Covershield
EMI_SMD_1
GASKET_8.0X6.0X10.5H
M13510
EMI_SMD_2
GASKET_8.0X6.0X7.5H
M13511
EMI_SMD_3
GASKET_8.0X6.0X7.5H
M13512
MDS62110225
MDS62110215
7.5T
MDS62110215
GASKET_6.0X8.0X5.5H
M13516 EMI_SMD_4
MDS62110235
GASKET_6.0X8.0X5.5H
M13517 EMI_SMD_5
MDS62110235
GASKET_6.0X8.0X5.5H
M13518 EMI_SMD_6
MDS62110235
GASKET_6.0X8.0X5.5H
M13519 EMI_SMD_7
MDS62110235
EMI_SMD_10
GASKET_6.0X8.0X5.5H
M13520 EMI_SMD_8
MDS62110235
GASKET_6.0X8.0X5.5H
M13521 EMI_SMD_23
MDS62110235
M13522 EMI_SMD_9
M13531
MDS62110221
MDS62110221
13.5T
13.5T
M13523 EMI_SMD_12
MDS62110221
M13524 EMI_SMD_13
13.5T
M13533 EMI_SMD_20
MDS62110221
13.5T
M13525 EMI_SMD_14
MDS62110221
MDS62110221
13.5T
M13534 EMI_SMD_21
MDS62110221
13.5T
13.5T
13.5T
M13527 EMI_SMD_16
MDS62110221
M13528 EMI_SMD_17
MDS62110221
M13529 EMI_SMD_18
MDS62110221
13.5T
M13530 EMI_SMD_19
MDS62110221
13.5T
13.5T
13.5T
13.5T
M13535 EMI_SMD_22
MDS62110221
13.5T
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
M13526 EMI_SMD_15
MDS62110221
M13532 EMI_SMD_11
MDS62110221
14.06.10
CLIP TYPE
LGE Internal Use Only
IC12800
LGE5352(URSA11)
IC12800
LGE5352(URSA11)
N3
AH5
AG5
AF5
AG6
AF6
AG7
AH7
AF7
PAD_RA0N
P1
PAD_RA1N
N1
PAD_RA1P
R2
PAD_RA2N
R3
PAD_RA2P
T1
PAD_RACKN
T2
L1
AG8
AF8
AG9
PAD_RACKP
PAD_A0P/VBY0-
PAD_RA3N
PAD_A0M/VBY0+
PAD_RA3P
PAD_A1P/VBY1-
PAD_RA4N
PAD_A1M/VBY1+
PAD_RA4P
AH8
PAD_A2P/VBY2PAD_A2M/VBY2+
PAD_ACKP/VBY3-
AF9
AG10
AH10
AF10
AH11
AG11
AF11
AG12
AF12
AG13
AH13
AF13
PAD_RXCP_P0
M2
PAD_RA0P
PAD_RB0N
PAD_ACKM/VBY3+
PAD_RB0P
PAD_A3P/VBY4-
PAD_RB1N
PAD_A3M/VBY4+
PAD_RB1P
PAD_A4P/VBY5-
PAD_RB2N
PAD_A4M/VBY5+
PAD_RB2P
PAD_B0P/VBY6-
PAD_RBCKN
PAD_B0M/VBY6+
PAD_RBCKP
PAD_B1P/VBY7-
PAD_RB3N
PAD_RXCN_P0
PAD_RX0P_P0
PAD_RX0N_P0
PAD_RX1P_P0
PAD_RX1N_P0
PAD_RX2P_P0
PAD_RX2N_P0
L3
K2
K3
J3
U2
H2
PAD_RXCP_P1
U1
H3
PAD_RXCN_P1
W3
G1
PAD_RX0P_P1
V2
G3
0.1uF
R12804
TXDAN0_L
F2
0.1uF
R12805
TXDAP0_L
0.1uF
R12806
TXDAN1_L
E1
0.1uF
R12807
TXDAP1_L
D1
0.1uF
R12808
TXDAN2_L
D2
0.1uF
R12809
TXDAP2_L
C2
0.1uF
R12810
TXDAN3_L
0.1uF
R12811
TXDAP3_L
E2
PAD_B1M/VBY7+
C3
PAD_RX0N_P1
Y1
PAD_RX1P_P1
W1
PAD_RX1N_P1
AA2
PAD_RX2P_P1
AA3
PAD_RX2N_P1
AA6
NC_9
PAD_RB3P
PAD_RB4N
K5
PAD_RB4P
PAD_MOD_GPIO0
PAD_MOD_GPIO1
PAD_B2P
PAD_B2M
PAD_BCKP
PAD_BCKM
PAD_B3P
PAD_B3M
PAD_B4P
PAD_B4M
PAD_C0P
K4
AF4
L5
PAD_HDMI_SCL_P0/[TX]
AE4
L6
PAD_HDMI_SDA_P0/[TX]
AC1
J6
PAD_TXCP_P0
AB1
H6
PAD_TXCN_P0
AD2
J5
PAD_TX0P_P0
AD3
J4
PAD_TX0N_P0
AE1
G5
PAD_TX1P_P0
AE2
G4
PAD_TX1N_P0
AF2
H5
PAD_TX2P_P0
AF1
G6
PAD_TX2N_P0
PAD_C0M
B3
PAD_E0P/VBY8PAD_E0M/VBY8+
PAD_E1P/VBY9PAD_E1M/VBY9+
TXVBY1_0N
0.1uF
C12822
TXVBY1_0P
0.1uF
C12823
AG14
C12820
AF14
TXVBY1_1P
0.1uF
C12821
AG15
TXVBY1_2N
0.1uF
C12818
AG16
TXVBY1_2P
0.1uF
C12819
AH16
TXVBY1_3N
0.1uF
C12816
AF16
TXVBY1_3P
0.1uF
C12817
AH17
PAD_E2M/VBY10+
PADA_VBY1_RXP[0]
PAD_ECKP/VBY11-
PADA_VBY1_RXM[1]
PAD_ECKM/VBY11+
PADA_VBY1_RXP[1]
PAD_E3P/VBY12-
PADA_VBY1_RXM[2]
PAD_E3M/VBY12+
PADA_VBY1_RXP[2]
PAD_E4P/VBY13-
PADA_VBY1_RXP[3]
TXVBY1_4N
0.1uF
C12814
TXVBY1_4P
0.1uF
C12815
AG18
0.1uF
C12812
AF18
C12813
AG19
PAD_E4M/VBY13+
PAD_F0P/VBY14PAD_F0M/VBY14+
AF17
TXVBY1_5N
PADA_VBY1_RXM[3]
TXVBY1_6N
0.1uF
C12810
AF19
TXVBY1_6P
0.1uF
C12811
AH20
TXVBY1_7N
0.1uF
C12808
AG20
TXVBY1_7P
0.1uF
C12809
AF20
PAD_F1M/VBY15+
PADA_VBY1_RXM[5]
PAD_MOD_GPIO8/VBY16-
PADA_VBY1_RXP[5]
PAD_MOD_GPIO9/VBY16+
PADA_VBY1_RXM[6]
PAD_F2P/VBY17-
0.1uF
C12806
0.1uF
C12807
AG22
TXOSD_1N
0.1uF
C12804
AH22
PADA_VBY1_RXM[7]
PAD_FCKP/VBY18PAD_FCKM/VBY18+
PAD_F3P/VBY19-
AF21
TXOSD_0P
PAD_F2M/VBY17+
PADA_VBY1_RXP[7]
TXOSD_0N
PADA_VBY1_RXP[6]
TXOSD_1P
0.1uF
C12805
AF22
TXOSD_2N
0.1uF
C12802
AG23
TXOSD_2P
0.1uF
C12803
AF23
TXOSD_3N
0.1uF
C12800
AG24
TXOSD_3P
0.1uF
C12801
AF24
PADA_VBY1_RXM[8]
TXDAP4_L
C12826
TXDAN5_L
B4
0.1uF
C12827
TXDAP5_L
B5
0.1uF
C12828
C5
0.1uF
C12829
TXDAP6_L
A6
0.1uF
C12830
TXDAN7_L
C6
0.1uF
C12831
TXDAP7_L
TXDAN6_L
B7
TXDBN0_L_URSA11
C7
TXDBN0_L_URSA11
TXDBP0_L_URSA11
C8
TXDBP0_L_URSA11
TXDBN1_L_URSA11
B9
TXDBN1_L_URSA11
TXDBP1_L_URSA11
C9
TXDBP1_L_URSA11
TXDBN2_L_URSA11
A10
TXDBN2_L_URSA11
TXDBP2_L_URSA11
C10
TXDBP2_L_URSA11
TXDBN3_L_URSA11
B11
TXDBN3_L_URSA11
TXDBP3_L_URSA11
B12
TXDBP3_L_URSA11
TXDBN4_L_URSA11
A12
TXDBN4_L_URSA11
TXDBP4_L_URSA11
A13
TXDBP4_L_URSA11
TXDBN5_L_URSA11
B13
TXDBN5_L_URSA11
TXDBP5_L_URSA11
B14
TXDBP5_L_URSA11
TXDBN6_L_URSA11
C14
TXDBN6_L_URSA11
TXDBP6_L_URSA11
A15
TXDBP6_L_URSA11
TXDBN7_L_URSA11
C15
TXDBN7_L_URSA11
TXDBP7_L_URSA11
TXDBP7_L_URSA11
PAD_F3M/VBY19+
FOR 120Hz ONLY
CAP MOVE
TO SHT 143
PADA_VBY1_RXP[8]
PADA_VBY1_RXM[9]
E9
PADA_VBY1_RXP[9]
PAD_F4P
PADA_VBY1_RXM[10]
PAD_F4M
PADA_VBY1_RXP[10]
PAD_G0P
PADA_VBY1_RXM[11]
PAD_G0M
D9
F8
F9
PADA_VBY1_RXP[11]
AG26
AF26
AF27
AF28
AE27
AE28
PADA_VBY1_RXM[12]
PADA_VBY1_RXP[12]
PADA_VBY1_RXM[13]
PADA_VBY1_RXP[13]
PADA_VBY1_RXM[14]
PADA_VBY1_RXP[14]
PADA_VBY1_RXM[15]
PADA_VBY1_RXP[15]
RESERVED FOR U11P TEST
AF25
F10
PAD_E0P/[TEST]
PAD_E0M/[TEST]
PAD_E1P
PAD_E1M
PAD_E2P/[TEST]
PAD_E2M
PAD_ECKP/[TEST]
E11
URSA9 VIDEO/OSD LOCKn
E10
D10
(DELETE_MP)NXP_VBY1_LOCK_LED_TR
Q14000-*1
C
MMBT3906(NXP)
E12
D12
B
F11
F12
E
PAD_ECKM
+3.3V_NORMAL
LOCKAn_Video
+3.3V_NORMAL
R14000
R12800
LOCKAn_Video
E
(DELETE_MP)VBY1_LOCK_LED
AH25
10K
0.1uF
PAD_F1P/VBY15-
PADA_VBY1_RXP[4]
TXDAN4_L
C12825
0.1uF
LD14000
19-21/R6C-FR1S1L/3T
(DELETE_MP)VBY1_LOCK_LED
TXVBY1_5P
PADA_VBY1_RXM[4]
C12824
0.1uF
A4
10K
0.1uF
PADA_VBY1_RXM[0]
U11 ONLY, NC FOR U11P
VIDEO
TXVBY1_1N
OSD
PAD_E2P/VBY10-
AH14
0.1uF
A3
B
Q14000
C 2N3906S-RTK
(DELETE_MP)KEC_VBY1_LOCK_LED_TR
22
10K
R12802
R12803
LD12800
SML-512UW
(DELETE_MP)VBY1_LOCK_LED
R12801 10K
+3.3V_NORMAL
E
B
C
B
Q12800
MMBT3906(NXP)
(DELETE_MP)NXP_BY1_LOCK_LED
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
(DELETE_MP)_VB1_LOCK_LED
(DELETE_MP)VBY1_LOCK_LED
LOCKAn_OSD
LOCKAn_OSD
C
Q12800-*1
2N3906S-RTK
E (DELETE_MP)KEC_VBY1_LOCK_LED
BSD-15Y-LM14A-140_00-HD
URSA11 INPUT
LGE Internal Use Only
IC12800
LGE5352(URSA11)
E24
PAD_IO[78]/B-A0/[CD-A0]
PAD_IO[89]/B-A1/[CD-A1]
PAD_IO[80]/B-A2/[CD-A2]
PAD_IO[75]/B-A3/[CD-A3]
PAD_IO[86]/B-A4/[CD-A4]
PAD_IO[74]/B-A5/[CD-A5]
PAD_IO[96]/B-A6/[CD-A6]
PAD_IO[87]/B-A7/[CD-A7]
PAD_IO[92]/B-A8/[CD-A8]
PAD_IO[73]/B-A9/[CD-A9]
PAD_IO[90]/B-A10/[CD-A10]
PAD_IO[83]/B-A11/[CD-A11]
PAD_IO[84]/B-A12/[CD-A12]
PAD_IO[77]/B-A13/[CD-A13]
PAD_IO[82]/B-A14/[CD-A14]
PAD_IO[88]/B-A15/[CD-A15]
PAD_IO[85]/B-BA0/[CD-BA0]
PAD_IO[93]/B-BA1/[CD-BA1]
A_DDR3_A[0]
G27
A_DDR3_A[1]
F25
A_DDR3_A[2]
G23
A_DDR3_A[3]
G26
A_DDR3_A[4]
F24
A_DDR3_A[5]
G28
A_DDR3_A[6]
E27
A_DDR3_A[7]
F28
A_DDR3_A[8]
D26
A_DDR3_A[9]
H26
A_DDR3_A[10]
F26
A_DDR3_A[11]
H25
A_DDR3_A[12]
D27
A_DDR3_A[13]
F27
A_DDR3_A[14]
J24
A_DDR3_A[15]
H24
A_DDR3_BA[0]
H27
A_DDR3_BA[1]
G24
PAD_IO[81]/B-BA2/[CD-BA2]
A_DDR3_BA[2]
K24
PAD_IO[97]/B-RASZ/[CD-RASZ]
PAD_IO[94]/B-CASZ/[CD-CASZ]
PAD_IO[79]/B-WEZ/[CD-WEZ]
PAD_IO[95]/B-ODT/[CD-ODT]
PAD_IO[91]/B-CKE/[CD-CKE]
A-MVREFDQ_U
B19
DRAM_VREF_A
240
R13000
1%
A19
DRAM_ZQ_A
MIU1 (U11 ONLY)
PAD_IO[76]/B-RST/[CD-RST]
PAD_IO[101]/B-MCLK/[CD-MCLK]
PAD_IO[100]/B-MCLKZ/[CD-MCLKZ]
PAD_IO[99]/B-CSB1/[C-CSB1]
A_DDR3_RASZ
K23
A_DDR3_CASZ
H23
A_DDR3_WEZ
J23
A_DDR3_ODT
J27
A_DDR3_CKE
D28
A_DDR3_RESET
A_DDR3_MCLK
K28
J26
A_DDR3_MCLKZ
D25
A_DDR3_CSB1
C28
PAD_IO[98]/B-CSB2/[D-CSB2]
A_DDR3_CSB2
A_DDR3_DQ[0-15]
N27
PAD_IO[121]/B-DQ[0]/[C-DQL0]
PAD_IO[103]/B-DQ[1]/[C-DQL1]
PAD_IO[120]/B-DQ[2]/[C-DQL2]
PAD_IO[104]/B-DQ[3]/[C-DQL3]
PAD_IO[123]/B-DQ[4]/[C-DQL4]
PAD_IO[102]/B-DQ[5]/[C-DQL5]
PAD_IO[122]/B-DQ[6]/[C-DQL6]
PAD_IO[105]/B-DQ[7]/[C-DQL7]
PAD_IO[110]/B-DQ[8]/[C-DQU0]
PAD_IO[117]/B-DQ[9]/[C-DQU1]
PAD_IO[107]/B-DQ[10]/[C-DQU2]
PAD_IO[119]/B-DQ[11]/[C-DQU3]
PAD_IO[111]/B-DQ[12]/[C-DQU4]
PAD_IO[118]/B-DQ[13]/[C-DQU5]
PAD_IO[109]/B-DQ[14]/[C-DQU6]
PAD_IO[116]/B-DQ[15]/[C-DQU7]
PAD_IO[106]/B-DQM[0]/[C-DML]
A_DDR3_DQ[0]
L26
A_DDR3_DQ[1]
N26
A_DDR3_DQ[2]
L27
A_DDR3_DQ[3]
P26
A_DDR3_DQ[4]
K27
A_DDR3_DQ[5]
P27
A_DDR3_DQ[6]
K26
A_DDR3_DQ[7]
L23
A_DDR3_DQ[8]
P25
A_DDR3_DQ[9]
L24
A_DDR3_DQ[10]
P23
A_DDR3_DQ[11]
M24
A_DDR3_DQ[12]
R24
A_DDR3_DQ[13]
L25
+1.5V_U_DDR
A_DDR3_DQ[14]
P24
A_DDR3_DQ[15]
M27
A_DDR3_DM0
N24
PAD_IO[108]/B-DQM[1]/[C-DMU]
R13008
1K
1%
A_DDR3_DM1
N28
PAD_IO[115]/B-DQS[0]/[C-DQSL]
PAD_IO[114]/B-DQSB[0]/[C-DQSLB]
PAD_IO[113]/B-DQS[1]/[C-DQSU]
PAD_IO[142]/B-DQ[18]/[D-DQL2]
PAD_IO[127]/B-DQ[19]/[D-DQL3]
PAD_IO[144]/B-DQ[20]/[D-DQL4]
PAD_IO[125]/B-DQ[21]/[D-DQL5]
PAD_IO[145]/B-DQ[22]/[D-DQL6]
PAD_IO[124]/B-DQ[23]/[D-DQL7]
PAD_IO[129]/B-DQ[24]/[D-DQU0]
PAD_IO[141]/B-DQ[25]/[D-DQU1]
PAD_IO[139]_/B-DQ[26]/[D-DQU2]
PAD_IO[138]/B-DQ[27]/[D-DQU3]
NPAD_IO[130]/B-DQ[28]/[D-DQU4]
PAD_IO[133]/B-DQ[29]/[D-DQU5]
PAD_IO[132]/B-DQ[30]/[D-DQU6]
PAD_IO[140]/B-DQ[31]/[D-DQU7]
PAD_IO[128]/B-DQM[2]/[D-DML]
C13058
1000pF
A_DDR3_DQS0B
N23
A_DDR3_DQS1
M23
A_DDR3_DQS1B
V27
PAD_IO[126]/B-DQ[17]/[D-DQL1]
C13054
0.1uF
A_DDR3_DQS0
M26
PAD_IO[112]/B-DQSB[1]/[C-DQSUB]
PAD_IO[143]/B-DQ[16]/[D-DQL0]
A-MVREFDQ_U
R13007
1K
1%
A_DDR3_DQ[16]
T27
A_DDR3_DQ[18]
T28
A_DDR3_DQ[19]
W27
A_DDR3_DQ[20]
R27
A_DDR3_DQ[21]
W28
A_DDR3_DQ[22]
R26
A_DDR3_DQ[23]
U24
A_DDR3_DQ[24]
W23
A_DDR3_DQ[25]
R23
A_DDR3_DQ[26]
W25
A_DDR3_DQ[27]
T24
A_DDR3_DQ[16-31]
A_DDR3_DQ[17]
V26
A_DDR3_DQ[28]
W24
+1.5V_U_DDR
B-MVREFDQ_U
URSA11P
R13005
1K
1%
URSA11P
R13006
1K
1%
URSA11P
C13053
0.1uF
URSA11P
C13057
1000pF
A_DDR3_DQ[29]
T23
A_DDR3_DQ[30]
V23
A_DDR3_DQ[31]
T26
A_DDR3_DM2
U23
PAD_IO[131]/B-DQM[3]/[D-DMU]
A_DDR3_DM3
U26
PAD_IO[137]/B-DQS[2]/[D-DQSL]
PAD_IO[136]/B-DQSB[2]/[D-DQSLB]
PAD_IO[135]/B-DQS[3]/[D-DQSU]
A_DDR3_DQS2
U27
A_DDR3_DQS2B
V24
A_DDR3_DQS3
U25
PAD_IO[134]/B-DQSB[3]/[D-DQSUB]
A_DDR3_DQS3B
B-MVREFDQ_U
B25
DRAM_VREF_B
A25
DRAM_ZQ_B
R13003
240
1%
BSD-15Y-LM14A-142_00-HD
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
URSA11_DDR
15/01/21
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
DDR_VTT_URSA_1
URSA11_DDR_SAMSUNG
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
AR13000
AR13001
AR13002
AR13003
AR13004
AR13005
AR13006
56
56
56
56
56
56
56
IC13001
K4B1G1646G-BCMA
URSA11_DDR_SAMSUNG
N3
A_DDR3_A[0]
P7
P3
A_DDR3_A[2]
N2
A_DDR3_A[3]
P8
A_DDR3_A[4]
P2
A_DDR3_A[5]
R8
A_DDR3_A[6]
R2
A_DDR3_A[7]
T8
A_DDR3_A[8]
R3
A_DDR3_A[9]
M8
A0
VREFCA
R7
A_DDR3_A[11]
N7
A_DDR3_A[12]
T3
A_DDR3_A[13]
H1
A3
A5
L8
A6
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
A_DDR3_MCLK
56
N8
A_DDR3_BA[1]
M3
BA0
R13015
(120Hz)DDR_Ext
K9
A_DDR3_CKE
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
L2
A_DDR3_CSB1
K1
A_DDR3_ODT
J3
A_DDR3_RASZ
K3
A_DDR3_CASZ
L3
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
NC_1
NC_2
NC_3
NC_4
F3
G3
R7
A_DDR3_A[11]
K8
A_DDR3_A[12]
N1
N7
T3
A_DDR3_A[13]
N9
A_DDR3_A[14]
R1
DQSL
A_DDR3_A[15]
N8
M3
A_DDR3_MCLK
C9
A_DDR3_MCLKZ
D2
A_DDR3_CKE
K9
A_DDR3_DQS1B
DQSU
VSS_1
VSS_2
VSS_3
A_DDR3_DQ[0-15]
A_DDR3_DQ[0]
DML
VSS_4
DMU
D3
A_DDR3_DM1
H2
A_DDR3_ODT
H9
A_DDR3_RASZ
K1
J3
K3
L3
VSS_5
VSS_6
E3
A_DDR3_DQ[2]
A_DDR3_DQ[3]
A_DDR3_DQ[4]
A_DDR3_DQ[5]
A_DDR3_DQ[6]
A_DDR3_DQ[7]
A_DDR3_DQ[8]
F7
F2
F8
H3
H8
G2
H7
DQL0
VSS_7
C3
A_DDR3_DQ[10]
C8
A_DDR3_DQ[11]
C2
VDD_3
A12/BC
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
BA0
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
N1
T3
NC_2
NC_4
R1
DQSL
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
A_DDR3_DQS3
E1
C1
K7
D2
K9
E9
F1
K1
H9
J3
K3
L3
J9
DQSU
A_DDR3_DQS3B
VSS_2
G8
VSS_3
E7
J2
A_DDR3_DM2
J8
A_DDR3_DM3
M1
A_DDR3_DQ[16-31]
VSS_12
F7
A_DDR3_DQ[18]
F2
A_DDR3_DQ[19]
F8
A_DDR3_DQ[20]
H3
A_DDR3_DQ[21]
H8
DQL6
A_DDR3_DQ[22]
G2
A_DDR3_DQ[23]
H7
VSS_4
VSS_5
VSS_6
E3
A_DDR3_DQ[17]
DML
DMU
D3
M9
P1
P9
T1
T9
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
L9
A_DDR3_DQ[24]
A_DDR3_A[14]
A_DDR3_DQ[25]
C3
A_DDR3_DQ[26]
D1
C8
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
D8
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
A7
A_DDR3_DQ[13]
A2
A_DDR3_DQ[14]
B8
A_DDR3_DQ[15]
A3
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
A_DDR3_DQ[27]
E8
A_DDR3_DQ[28]
F9
A_DDR3_DQ[29]
G1
VSSQ_9
C2
A7
A2
A_DDR3_DQ[30]
B8
A_DDR3_DQ[31]
G9
A3
D9
L7
G7
R7
K2
N7
K8
T3
N9
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
A8
K7
C9
K9
NC_4
DQSL
B3
D2
E9
F1
H2
H9
B7
J2
K1
J3
K3
J8
D3
DQSU
VSS_1
VSS_2
VSS_3
M9
F7
P9
F2
T1
F8
T9
H3
VSS_4
VSS_5
VSS_6
E3
P1
DML
DMU
M1
H8
H7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
J9
VSSQ_9
D1
C3
E2
C8
E8
C2
F9
A7
G1
A2
G9
B8
A3
VDD_2
A11
VDD_3
A12/BC
VDD_4
VDD_5
VDD_6
T7
VDD_7
VDD_8
BA0
G7
K2
K8
N1
N9
R1
R9
BA1
A1
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
A8
C1
C9
D2
E9
VDDQ_9
F1
H2
H9
J1
NC_1
RESET
NC_2
NC_3
NC_4
F3
G3
D9
VDD_9
L9
DQSL
J9
L1
L9
T7
NC_7
C7
B3
B7
G8
J2
D3
VSSQ_1
VSSQ_2
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
VSSQ_9
VSS_2
VSS_3
M1
F7
P1
F2
P9
F8
T1
H3
T9
H8
VSS_4
VSS_5
VSS_6
E3
M9
DML
DMU
J8
G2
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
B9
C3
D8
C8
E2
E8
C2
A7
F9
A2
G1
B8
G9
A3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
B1
VSSQ_1
D7
D1
B3
VSS_12
DQL7
B1
DQU1
VSS_1
E7
H7
DQU0
A9
DQSU
DQSU
E1
DQL6
D7
D8
VDD_1
A10/AP
T2
L1
VSS_12
DQL7
B9
B2
A9
WE
A9
E7
A8
DQSL
DQSU
G8
A7
L2
L3
NC_7
C7
E1
L8
ZQ
A6
CKE
J1
NC_2
A5
J7
C1
VDDQ_9
NC_1
A4
BA2
A1
VDDQ_1
CK
H1
VREFDQ
A3
M2
M3
CK
A2
NC_5
N8
BA1
A1
M7
R1
R9
VREFCA
A0
NC_6
N1
VDD_9
DQU7
A_DDR3_DQ[12]
E2
R3
DQSL
B1
VSSQ_1
A12/BC
F3
G2
D7
VDD_3
NC_3
DQL6
B9
VDD_2
A11
RESET
VSS_12
DQL7
VDD_1
A10/AP
T2
L1
R2
B2
A9
BA0
R8
T8
A8
WE
A9
VSS_1
ZQ
A7
L2
H2
P8
L8
CKE
G3
DQSU
A6
N2
P2
A5
J7
C9
DQSL
B7
VREFDQ
A4
BA2
A8
NC_6
C7
B3
A3
M2
M3
P7
H1
M8
N3
P3
A2
NC_5
R9
T7
VREFCA
A1
M7
J1
NC_1
A0
NC_6
N9
VDDQ_9
F3
G3
N7
A1
VDDQ_1
NC_3
A_DDR3_A[14]
R7
K8
N8
L9
T7
L7
K2
+1.5V_U_DDR
RESET
A_DDR3_RESET
G7
BA1
T2
L1
R3
VDD_9
J9
A_DDR3_DQ[16]
D7
A_DDR3_DQ[9]
VDD_2
A11
WE
A_DDR3_WEZ
DQL7
A_DDR3_DQ[1]
A10/AP
T8
D9
A9
E7
A_DDR3_DM0
VDD_1
L2
A_DDR3_CSB2
R8
+1.5V_U_DDR
B2
A9
E9
F1
P2
240
R2
A8
CKE
K7
1%
A7
J7
C1
R13017
ZQ
A8
A_DDR3_DQS2
DQSU
B7
L8
A6
BA2
A_DDR3_BA[2]
A_DDR3_DQS2B
A_DDR3_DQS1
P8
A5
M2
A_DDR3_BA[1]
N2
A4
NC_5
A_DDR3_BA[0]
P3
VREFDQ
R9
NC_6
C7
P7
A3
EAN63511401
M8
N3
H1
M7
DQSL
A_DDR3_DQS0B
VREFCA
A1
A2
IC13002-*1
NT5CB64M16FP-EK
EAN63511401
M8
A0
A13
L7
A_DDR3_A[10]
K2
J1
RESET
A_DDR3_DQS0
R3
A_DDR3_CASZ
T2
A_DDR3_RESET
G7
VDDQ_9
WE
A_DDR3_WEZ
A_DDR3_A[9]
A1
CKE
K7
A_DDR3_MCLKZ
T8
A_DDR3_A[8]
+1.5V_U_DDR
J7
56
A_DDR3_A[7]
D9
BA1
(120Hz)DDR_Ext C13062
0.01uF
R2
VDD_9
BA2
A_DDR3_BA[2]
R8
A_DDR3_A[6]
B2
A9
P2
A_DDR3_A[5]
1%
+1.5V_U_DDR
A8
P8
A_DDR3_A[4]
(120Hz)DDR_Ext
R13016
240
ZQ
A7
M2
R13014
(120Hz)DDR_Ext
N2
A_DDR3_A[3]
A4
NC_5
A_DDR3_BA[0]
P3
A_DDR3_A[2]
VREFDQ
M7
A_DDR3_A[15]
P7
A_DDR3_A[1]
A2
A13
L7
A_DDR3_A[10]
N3
A_DDR3_A[0]
A1
URSA11_DDR_NANYA
IC13001-*1
NT5CB64M16FP-EK
U_MVREFCA_A1
EAN63370001
A_DDR3_A[1]
URSA11_DDR_NANYA
IC13002
K4B1G1646G-BCMA
U_MVREFCA_A0
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
B9
VSSQ_9
D1
D8
E2
E8
F9
G1
G9
For 120Hz Vb1
(120Hz)DDR_Ext
0.1uF C12832
TXDBN0_L
TXDBP0_L_URSA11
(120Hz)DDR_Ext
0.1uF C12833
TXDBP0_L
TXDBN1_L_URSA11
(120Hz)DDR_Ext
0.1uF C12834
TXDBN1_L
TXDBP1_L_URSA11
(120Hz)DDR_Ext
0.1uF C12835
TXDBP1_L
TXDBN2_L_URSA11
(120Hz)DDR_Ext
0.1uF C12836
TXDBN2_L
TXDBP2_L_URSA11
(120Hz)DDR_Ext
0.1uF C12837
TXDBP2_L
TXDBN3_L_URSA11
(120Hz)DDR_Ext
0.1uF C12838
TXDBN3_L
TXDBP3_L_URSA11
(120Hz)DDR_Ext
0.1uF C12839
TXDBP3_L
TXDBN4_L_URSA11
(120Hz)DDR_Ext
0.1uF C12840
TXDBN4_L
TXDBN0_L_URSA11
DDR PHY VREF
* DDR_VTT
+1.5V_U_DDR
+1.5V_U_DDR
+1.5V_U_DDR
(120Hz)DDR_Ext
L13000
CIS21J121
VREFEN
VOUT
2
3
9
GND
8
1
THERMAL
VIN
DDR_VTT_URSA
+3.3V_NORMAL
(120Hz)DDR_Ext
IC13000
AP2303MPTR-G1 [EP]
(120Hz)DDR_Ext
C13019
10uF
10V
(120Hz)DDR_Ext
1% 100K
R13001
7
6
NC_3
U_MVREFCA_A1
U_MVREFCA_A0
L13001
CIS21J121
(120Hz)DDR_Ext
(120Hz)DDR_Ext
R13009
1K
1%
(120Hz)DDR_Ext
C13039
10uF
10V
(120Hz)DDR_Ext
R13012
1K
1%
NC_2
(120Hz)DDR_Ext (120Hz)DDR_Ext
R13010
C13055
1K
0.1uF
1%
VCNTL
NC_1
(120Hz)DDR_Ext
C13059
1000pF
(120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext
R13013
C13060
C13061
1K
0.1uF
1000pF
1%
5
TXDBP4_L
TXDBN5_L
(120Hz)DDR_Ext
0.1uF C12843
TXDBP5_L
(120Hz)DDR_Ext
0.1uF C12844
TXDBN6_L
(120Hz)DDR_Ext
0.1uF C12845
(120Hz)DDR_Ext
0.1uF C12846
TXDBN7_L
TXDBP7_L_URSA11
4
(120Hz)DDR_Ext
C13020
0.1uF
16V
(120Hz)DDR_Ext
0.1uF C12842
TXDBN7_L_URSA11
R13002
100K
1%
(120Hz)DDR_Ext
0.1uF C12841
TXDBP6_L_URSA11
C13014
10uF
10V
TXDBP4_L_URSA11
TXDBP5_L_URSA11
(120Hz)DDR_Ext
C13009
10uF
10V
TXDBN5_L_URSA11
TXDBN6_L_URSA11
(120Hz)DDR_Ext
C13004
10uF
10V
(120Hz)DDR_Ext
0.1uF C12847
TXDBP7_L
(120Hz)DDR_Ext
(120Hz)DDR_Ext
TXDBP6_L
+1.5V_U_DDR
Decap removed
(120Hz)DDR_Ext
(120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext
C13000
C13022
C13005
C13025
C13010
C13015
C13029
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
A_DDR3_CKE
DDR_VTT_URSA_1
L13002
BLM18PG121SN1D
(120Hz)DDR_Ext
DDR_VTT_URSA
(120Hz)DDR_Ext
C13049
1uF
10V
Close to DDR POWER PIN
(120Hz)DDR_Ext
R13011
1K
(120Hz)DDR_Ext
C13050
0.1uF
16V
(120Hz)DDR_Ext
C13051
0.1uF
16V
(120Hz)DDR_Ext
C13052
0.1uF
16V
(120Hz)DDR_Ext
C13056
0.1uF
16V
+1.5V_U_DDR
OPT
R13004
1K
(120Hz)DDR_Ext
C13001
0.1uF
(120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext
C13023
C13026
C13011
C13006
C13016
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
(120Hz)DDR_Ext (120Hz)DDR_Ext (120Hz)DDR_Ext
C13036
C13030
C13033
0.1uF
0.1uF
0.1uF
1/16W
1%
A_DDR3_RESET
R14200
10K
(120Hz)DDR_Ext
+1.5V_U_DDR
Close to DDR POWER PIN
+1.5V_U_DDR
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
(120Hz)DDR_Ext
C13003
C13007
C13027
C13012
C13021
C13017
C13031
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
16V
(120Hz)DDR_Ext
C13034
0.1uF
16V
(120Hz)DDR_Ext
C13037
0.1uF
16V
(120Hz)DDR_Ext
C13040
0.1uF
16V
(120Hz)DDR_Ext
C13042
0.1uF
16V
(120Hz)DDR_Ext
C13044
0.1uF
16V
(120Hz)DDR_Ext
C13046
0.1uF
16V
(120Hz)DDR_Ext
C13048
0.1uF
16V
Close to DDR POWER PIN
+1.5V_U_DDR
(120Hz)DDR_Ext
C13002
0.1uF
16V
(120Hz)DDR_Ext
C13008
0.1uF
16V
(120Hz)DDR_Ext
C13013
0.1uF
16V
(120Hz)DDR_Ext
C13018
0.1uF
16V
(120Hz)DDR_Ext
(120Hz)DDR_Ext
C13024
0.1uF
16V
C13028
0.1uF
16V
(120Hz)DDR_Ext
C13032
0.1uF
16V
(120Hz)DDR_Ext
C13035
0.1uF
16V
(120Hz)DDR_Ext
C13038
0.1uF
16V
(120Hz)DDR_Ext
C13041
0.1uF
16V
(120Hz)DDR_Ext
C13043
0.1uF
16V
(120Hz)DDR_Ext
C13045
0.1uF
16V
(120Hz)DDR_Ext
C13047
0.1uF
16V
Close to DDR POWER PIN
BSD-15Y-LM14A-143_00-HD
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
UF77 ONLY
URSA11_DDR
15/01/21
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
IC13200-*1
W25Q32FVSSIG
+3.3V_NORMAL
WINBOND ELECTRONICS CORP.
URSA11_SERIAL_FLASH_MEMORY_WINBOND(SUB)
EAN62459301
IC12800
LGE5352(URSA11)
CS
SPI Flash
DO[IO1]
AD26
PAD_RESET
PAD_I2C_HSC_SDA/[VSYNC_LIKE_SPI2]
AH4
PAD_XOUT
PAD_I2C_HSC_SCL/[VSYNC_LIKE_SPI3]
PAD_XIN
AC23
PAD_SPI1_CK/GPIO58
AE9
PAD_SPI1_DI/GPIO59
PAD_I2C_S_SCL
PAD_SPI2_CK/GPIO56
PAD_SPI2_DI/GPIO57
AD10
PAD_I2C_M_SDA
PAD_SPI3_CK/GPIO54
PAD_I2C_M_SCL/[VSYNC_LIKE_SP1]PAD_SPI3_DI/GPIO55
PAD_SPI4_CK/GPIO52
E8
PAD_GPIO00/[UART2_TX]
PAD_GPIO01/[UART2_RX]
PAD_DIM01/GPIO33
PAD_DIM04/GPIO36
PAD_DIM05/GPIO37
PAD_DIM06/GPIO38
AE25
PAD_INTERUPT_R21
AD25
AC21
L/D_CLK
URSA_L/D_ctrl
R13215 33
C13214
5pF
50V
C13215
5pF
50V
DIM0
DIM1
DIM2
AD13
AC13
AD15
R13245
R13227
10K
PAD_TCON1/OE
D7
PAD_IRE/[UART1_RX]
PAD_TCON2/YV1C
PAD_TCON3/CPV
PAD_TCON4/STV1
0
PAD_TCON5/SFT
AC25
PAD_TESTPIN
AC9
R13212
PAD_TCON6/TPV
GND_EFUSE
0
AC19
GPIO[09]
PAD_TCON10/[HDMI_R_DDC_CLK3]
GPIO[07]
PAD_TCON11/[HDMI_R_DDC_DAT3]
PAD_TCON12/[HDMI_R_HP3]
AE19
VID0
GPIO[06]
AD7
33
AE7
R13204
OPT
R13205
OPT
33
AC7
33
AD8
R13206
OPT
33
AC8
GPIO[64]
GPIO[65]
GPIO[66]
GPIO[67]
GPIO[63]
R13207
OPT
R13208
OPT
33
M4
33
M5
R13209
OPT
R13210
OPT
33
N4
33
N5
GPIO[70]
GPIO[72]
GPIO[73]
GPIO[71]
PAD_TCON13/[HDMI_R_CEC3]
U11 ONLY, NC FOR U11P
33
GPIO (RESERVED FOR U11)
R13202
OPT
R13203
OPT
4
PAD_TCON14/[HDMI_T_CEC]
R13244
URSA_BIT2
FRC_FLASH_WP R14400
10K
WP/SIO2
1K
R13248
R14401
10K
U_SPI_WP_f_SoC
D5
7
C13209
0.1uF
16V
HOLD/SIO3
+3.3V_NORMAL
URSA_SYS_DEBUG
P13202
3
4
SCLK
6
5
SPI_CK
E6
E5
F5
SI/SIO0
SPI_DI
33
R13267
URSA_SYS_DEBUG
2
GPIO[74]
GPIO[75]
GPIO[76]
GPIO[69]
PAD_GPIO10
PAD_GPIO11
PAD_GPIO12/[VX1_RX_HTPD_O]
PAD_GPIO13/[VX1_RX_HTPD_V]
PAD_GPIO14
PAD_GPIO15/[VX1_RX_LOCK_O]
PAD_GPIO16/[VX1_RX_LOCK_V]
R13266
4
NC_4
NC_5
NC_6
AD6
NC_2
NC_7
URSA_UART1_TX
5
D4
C13211
0.1uF
16V
URSA_SYS_DEBUG
HTPDAn
AD4
AA4
R13243
10K
AB5
AB4
AA5
AD5
AE5
LOCKAn
AC6
AC5
AB7
Clock for URSA11
Data_Format_1
AD20
Data_Format_0
0.01uF
25V
C13205
0.01uF
25V
C13202
+3.3V_NORMAL
AB6
AE21
22
R13241
(DELETE_MP)VBY1_LOCK_LED
AC20
URSA_RX_Vx1_HTPDn
R13218
10K
URSA_RX_Vx1_HTPDn
R13219
10K
AE12
AD12
AD18
URSA9_CONNECT
AC11
LOCKAn_OSD
AC12
LOCKAn_Video
AE18
FLASH_WP_URSA
AG1
AH2
AH27
B28
C13204
0.01uF
25V
AG28
NC_8
URSA Reset
+3.3V_NORMAL
B1
NC_3
NC_1
33
URSA_SYS_DEBUG
D6
PAD_GPIO17
AE6
URSA_UART1_RX
3
F4
AD21
PAD_GPIO05
R13260
10K
URSA_SYS_DEBUG
1
GND
1K
U_SPI_WP_f_SoC R13250
10K
OPT
PAD_TCON15/[HDMI_T_HPD]
PAD_GPIO04
URSA_UART2_TX
C13212
0.1uF
16V
URSA_PQ_DEBUG
5
U_SPI_WP_f_URSA
C13203
0.01uF
25V
C13213
0.01uF
25V
(DELETE_MP)VBY1_LOCK_LED
VID1
PAD_TCON9/[VX1T_LOCKN]
GPIO[08]
AC18
R13268
33
URSA_PQ_DEBUG
DI[IO0]
PAD_TCON7/POL
PAD_TCON8/[VX1T_HTPDN]
AD19
5
12507WS-04L
+3.3V_NORMAL
AC4
OPT R13200 10K
OPT R13201 10K
4
URSA_UART2_RX
3
10K R13255
URSA_BIT1
AC15
VCC
8
2
SO/SIO1
33
SPI_DO
FLASH_WP_URSA
URSA_OPT_1
URSA_BIT0
AD14
1
SPI_CZ
OPT
R13226
10K
AE15
AC14
CS
L/D_VSYNC
C13216
5pF +3.3V_NORMAL
50V
E4
PAD_TCON0/STV2
6
MACRONIX INTERNATIONAL CO., LTD.
OPT
OPT
3
URSA_OPT_6
PAD_DIM07/GPIO39
URSA_UART1_RX
R13211
33
R13269
URSA_PQ_DEBUG
2
CLK
URSA_OPT_5
PAD_INTERUPT_R20
0.01uF
25V
C13220
HOLD_OR_RESET[IO3]
R13238
10K
LD13200
SML-512UW
(DELETE_MP)VBY1_LOCK_LED
10K
R13242
(DELETE_MP)VBY1_LOCK_LED
E
C13206
0.01uF
25V
Q13200
MMBT3906(NXP)
(DELETE_MP)NXP_LOCKAN_LED_TR
B
1
3
4
+3.3V_NORMAL
SW13200
2
XIN_URSA
R13254
1M
AC26
PAD_DIM03/GPIO35
PAD_SPI_DI
AC28
1
+3.3V_NORMAL
X-TAL_1
33
PAD_DIM02/GPIO34
PAD_SPI_CK
AC27
33
EAN62459501
24MHz
X13200
R14403
33
PAD_SPI_CZ
PAD_SPI_DO
R14402
URSA_PQ_DEBUG
10K
VCC
L/D_DI
AD22
AE13
PAD_DIM00/GPIO32
AD27
SPI_CZ
SPI_CK
SPI_DI
SPI_DO
URSA_L/D_ctrl R13229
AE22
AC24
PAD_GPIO03/[CHIP_VDET]
0.01uF
25V
C13219
0.01uF
25V
C13218
URSA_L/D_ctrl
R13228 33
GND_1
0.01uF
25V
C13217
F6
URSA_OPT_4
AE24
PAD_GPIO02/[UART1_TX]
GND
1
URSA_UART1_TX
OPT
AC22
PAD_VSYNC_LIKE/GPIO40
E7
OPT
7
R13263
12507WS-04L
Div_BIT1
PAD_SPI4_DI/GPIO53
URSA_UART2_RX
OPT
2
C13210
1uF
10V
OPT
R13264
10K
OPT
URSA_RESET
0
R13259
GND_2
F7
Div_BIT0
AD23
2
AE10
IC13200
MX25L3235E
URSA_OPT_0
AD24
3
URSA_UART2_TX
PAD_I2C_S_SDA
AD9
4
AR13200
33
C13200
C13201
56pF
56pF
50V
50V
OPT
OPT
URSA11_SERIAL_FLASH_MEMORY_MXIC(MAIN)
X-TAL_2
AH3
I2CS_SDA
I2CS_SCL
WP[IO2]
AC10
NON_OLED
C13207
8pF
50V
XIN_URSA
XO_URSA
8
P13201
AD11
NON_OLED
C13208
8pF
50V
URSA_RESET
1
URSA_PQ_DEBUG
D13200
1N4148W
100V
OPT
XO_URSA
URSA_RESET_MICOM
R13258
470K
OPT
0
R13265
URSA_RESET_SoC
OLED_55EG9200
C13208-*1
6.8pF
50V
OLED_55EG9200
C13207-*1
6.8pF
50V
C
E
B
C
Q13200-*1
2N3906S-RTK
(DELETE_MP)KEC_LOCKAN_LED_TR
+3.3V_NORMAL
URSA_OPT_6
URSA_OPT_1
OS_Moudule LGD_Module
URSA_OPT_4
PRINT_ON
PRINT_OFF
URSA_OPT_5
Reserverd
Reserverd
Reserverd
URSA_BIT2_1
R13239 10K
URSA_BIT1_1
R13236 10K
URSA_BIT0_1
R13234 10K
LGD_Module
URSA_OPT_1_1
R13233 10K
URSA_RX_LVDS
URSA_OPT_0_1
R13230 10K
Div_BIT1_1
R13224 10K
Chip Config
Debugging for URSA11
Debug/ISP ADDR
Slave (Debug Port:0XB4,ISP:0X98)
CHIP_CONF:{DIM2,DIM1,DIM0}
CHIP_CONF=3’d7:111:boot from SPI Flash
Reserved
URSA_OPT_4
Reserverd
URSA_OPT_6
URSA_OPT_5
Reserved
Div_BIT0_1
R13222 10K
Rx_LVDS
Debug Print OFF
R13220 10K
High
Rx_Vx1
URSA_OPT_5_1
R13216 10K
Low
URSA_OPT_0
URSA_OPT_6_1
R13213 10K
URSA Option
I2C_S Port
URSA_DEBUG_WAFER
P13200
Div_BIT0
Division Type
12507WS-04L
Div_BIT1
WAFER-STRAIGHT
URSA_OPT_0
+3.3V_NORMAL
Rx Interface
DIM0
URSA_OPT_1
SW13201
JS2235S
1
Module Type
BIT [2/1/0]
Tx Lane
URSA_BIT0
OPT
Tx Lane
URSA_BIT1
Reserved
4K@60(4 DDR)
1/0
4 Division
1/1
8 Division
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
URSA_BIT1_0
R13237
10K
2 Division
FHD@60 (4 DDR)
1/1/1
Non Division
R13253
2
OPT
3
R13257 33
SCL2_+3.3V_DB
R13252
R13261
0
URSA_MP
R13262
0
OPT
R13256 33
SDA2_+3.3V_DB
URSA_DEBUG
DIM2
OPT
10K
R13246
I2CS_SCL
10K
4
10K
R13247
1
I2C_SCL7
DIM1
URSA_DEBUG
URSA_BIT2_0
R13240
10K
1/1/0
0/0
0/1
URSA_BIT0_0
R13235 10K
FHD@60 (2 DDR)
OS_Module
URSA_OPT_1_0
R13232
10K
FHD@120 (4 DDR)
1/0/1
Module Division
URSA_RX_Vx1
URSA_OPT_0_0
R13231 10K
1/0/0
BIT [1/0]
Div_BIT1_0
R13225 10K
OLED 4K@120(4 DDR)
Div_BIT0_0
R13223 10K
4K@120 8K(98UF8K 4DDR)
OPT
R13221 10K
0/1/0
0/1/1
4k@60 (2 DDR)
URSA_BIT2
URSA_OPT_5_0
R13217 10K
0/0/1
10K
R13249
4K@120 (4 DDR)
URSA_OPT_6_0
R13214 10K
0/0/0
10K
SCL2_+3.3V_DB
6
2
5
URSA_DEBUG_SW
3
4
I2C_SDA7
R13270
0
URSA_MP
I2CS_SDA
R13271
0
OPT
SDA2_+3.3V_DB
5
10K
R13251
BSD-15Y-LM14A-144_00-HD
URSA11_GPIO
LGE Internal Use Only
MAX 4.7A
+12V
+0.95V URSA11 Core
+1.5V URSA DDR
L13411
+1.5V_U_DDR
POWER_ON/OFF2_1
BLM18PG121SN1D
C13448
22uF
10V
C13449
22uF
10V
R2
VDDC
ZD13400
2.5V
C13450 C13400 C13401
0.1uF 22uF
22uF
C13411
22uF
19
1/16W
1%
20K
R13410
1%
1/16W
1/16W 1/16W
1%
1%
VDD
SW_1
6
18
NC_2
7
17
VIN_3
8
16
VIN_2
SW_4
150uF
6.3V
R13411R13409
5.1K 12K
TRIP
NC_3
GND1
VO
24
25
26
GND2
20
5
9
15
VIN_1
1/16W
5%
C13451
27
28
[EP]
91K
R13406
4
C13405 NC_1
L13403
1.0uH
Vout=0.765*(1+R1/R2)=1.516V
+12V
L13402
VREG
SW_3
C13402 R13400
2K
0.1uF
16V
MODE
VBST
SW_2
ZD13401
2.5V
C13445 C13446
1uF
2200pF
10V
50V
IC13402
TPS53513RVER
VID_CTRL
8A
C13404
470pF
50V
C13408
1uF
25V
C13407 C13409
10uF
10uF
25V
25V
14
1%
3A
GND
C13406
2200pF
50V
PGND_5
22K
5
GND
21
3
16V
0.1uF
FB
22
THERMAL
29
13
R13423
4
EN
23
2
1K
POWER_ON/OFF2_3
R2
1
PGND_4
SS
1%
1/16W
R13401
PS064T-2R2MS
RF
PGOOD
L13412
2.2uH
12
SW
PGND_3
6
BOOT
11
3
7
27K
R13405
2
PGND_2
C13444
100pF
50V
FB
VREG
16V
0.1uF
C13447
10
3.6K
1%
VIN
R1
1/16W
5%
PGND_1
18K
1%
8
1%
1/16W
R13421 R13422
R1
1
R13403
4.7
EN
C13403
1000pF
50V
1/10W
5%
10K
9
UF64/68
C13617-*1
0.1uF
25V
R13407
39K
[EP]
R13402
3.3
IC13403
BD9D321EFJ
R13424
R13408
10K
R13404
10K
UF77
C13617
0.1uF
16V
THERMAL
C13443
10uF
25V
Vout=0.6*(1+R1/R2)=0.98V_FOR 0.95V at URSA11 VIA
D
+3.3V_NORMAL
D
EBK62072501
Q13401-*1
2N7002KA
Q13401
2N7002KA
URSA11_VID_FET_KEC(MAIN)
R13416
G EBK62072501
S
D
G
EBK62072501
Q13400
2N7002KA
URSA11_VID_FET_KEC(MAIN)
OPT
R13420
10K
S URSA11_VID_FET_DIODES(SUB)
OPT
G
R13418
10K
R13414
100K
R13415
20K
1/16W
1%
URSA11_VID URSA11_VID
R13413
20K
1/16W
1%
R13412
100K
VID_CTRL
1/16W
1/16W
1%
1%
URSA11_VID URSA11_VID
VID_CTRL
0
VID0
URSA11_VID
R13417
0
VID1
URSA11_VID
S
D
G
S
EBK62072501
Q13400-*1
2N7002KA
URSA11_VID_FET_DIODES(SUB)
R1:10K/R2:17.1K, V=0.95V(VID0=L,VID1=L)
R13419
10K
R13425
10K
URSA11_VID_PULLDOWN URSA11_VID_PULLDOWN
R1:10K/R2:17.1K//120K, V=1.008V(VID0=H,VID1=L)
R1:10K/R2:17.1K//120K, V=1.008V(VID0=L,VID1=H)
R1:10K/R2:17.1K//120K//120K, V=1.05V(VID0=H,VID1=H)
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BSD-15Y-LM14A-146_00-HD
URSA11_DCDC
15/01/21
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
VDDC
VDDC
IC12800
LGE5352(URSA11)
VDDC
C14832
10uF
10V
C14821
10uF
10V
C14800
10uF
10V
C14852
0.1uF
16V
C14856
0.1uF
16V
C14858
0.1uF
16V
C14868
10uF
10V
C14863
0.1uF
16V
C14872
0.1uF
16V
C14876
1uF
10V
N7
C14878
10uF
10V
N8
P7
P8
P9
R5
R6
4th Layer
AVDDL_DRV_MOD
R7
R8
Close to Chip side
R9
T5
L14804
BLM18PG121SN1D
T6
T7
C14807
10uF
10V
OPT
C14818
0.1uF
16V
C14827
0.1uF
16V
C14835
0.1uF
16V
C14857
0.1uF
16V
C14850
0.1uF
16V
C14843
0.1uF
16V
IC12800
LGE5352(URSA11)
T8
C14904
0.47uF
6.3V
T9
T10
U4
U5
U6
4th Layer
U7
U8
Close to Chip side
AVDDL_DVI_RX
U9
H1
VDDC_1
GND_1
VDDC_2
GND_2
VDDC_3
GND_3
VDDC_4
GND_4
VDDC_5
GND_5
VDDC_6
GND_6
VDDC_7
GND_7
VDDC_8
GND_8
VDDC_9
GND_9
VDDC_10
GND_10
VDDC_11
GND_11
VDDC_12
GND_12
VDDC_13
GND_13
VDDC_14
W7
C14888
0.1uF
16V
AVDDL_HDMITX
W8
Y9
Y10
AVDDL_DRV_MOD
VDDC_17
J9
C14830
10uF
10V
C14848
1uF
10V
OPT
C14839
0.1uF
16V
C14860
1uF
10V
C14854
0.1uF
16V
J10
C14864
0.1uF
16V
K8
K9
K10
L8
L9
L10
VDDC_18
GND_15
VDDC_19
GND_16
VDDC_20
GND_17
VDDC_21
GND_18
VDDC_22
GND_19
GND_20
GND_21
AVDDL_HDMIRX_1
GND_22
AVDDL_HDMIRX_2
GND_23
AVDDL_HDMIRX_3
DVDD_DDR
Close to Chip side
M10
U16
U17
T17
L14807
BLM18PG121SN1D
AVDDL_HDMITX_4
C14844
0.1uF
16V
C14833
0.1uF
16V
OPT
GND_26
AVDDL_HDMITX_2
GND_27
R15
Close to Chip side
R17
P19
P20
R19
L14806
BLM18PG121SN1D
R20
T19
T20
C14846
0.1uF
16V
M12
Y11
C12
E3
G12
F3
H12
T3
N12
U3
P12
V3
R12
U12
AE3
V12
AF3
AB12
AG3
C13
E13
R4
F13
T4
G13
H13
N13
W4
T13
U13
V13
GND_31
W13
AVDDL_MOD_5
AB13
AVDDL_PREDRV_1
AVDDL_PREDRV_2
P5
AVDDL_PREDRV_4
GND_32
GND_33
E14
V5
F14
W5
G14
GND_34
H14
DVDD_DDR_1
J14
DVDD_DDR_3
K14
DVDD_DDR_4
L14
B6
GND_39
AVDD_DDR0_1
M14
K6
N14
AVDD_DDR0_2
U14
N6
V14
P6
W14
V6
AB14
A7
AVDD_DDR0_3
GND_41
AVDD_DDR0_4
GND_42
AVDD_DDR0_5
GND_43
AVDD_DDR0_6
GND_44
AVDD_DDR1_1
GND_45
AVDD_DDR1_2
GND_46
AVDD_DDR1_3
GND_47
AVDD_DDR1_4
GND_48
D15
H7
E15
K7
F15
L7
G15
H15
M7
J15
V7
K15
M15
B8
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
AVDD_MOD_1
AVDD_MOD_3
GND_56
GND_57
VDDP_1
GND_58
VDDP_2
GND_59
GND_60
GND_62
AC3
P3
C14885
0.1uF
16V
W12
AVDD_HDMITX_1
AA12
C14889
0.1uF
16V
VDDP_AVDD_PLL
Y19
AA17
C14862
0.47uF
6.3V
AA8
AB15
AB8
AF15
D16
G9
E16
H9
F16
M9
G16
N9
H16
V9
J16
AA9
K16
L16
AB9
M16
GND_64
W16
AVDD_HDMIRX_3
GND_65
GND_66
GND_67
AVDD_XTAL
GND_68
AVDD_PLL_1
GND_69
GND_70
AB16
G10
AC16
H10
AD16
N10
AE16
P10
B17
R10
C17
V10
D17
AA10
E17
AB10
GND_72
F17
AVDD_LVDSRX/AVDD_VBY1RX_1
G17
AVDD_LVDSRX/AVDD_VBY1RX_2
H17
AVDD_LVDSRX/AVDD_VBY1RX_3
+1.5V_U_DDR
C14859
10uF
10V
W15
B10
AVDD_HDMIRX_2
J17
K17
+1.5V_U_DDR
C14886
0.1uF 16V
C14891
0.47uF 6.3V
A18
B18
4th Layer
C14892
0.22uF 16V OPT
R13
R14
Close to Chip side
0.47uF 6.3V
4th Layer
A16
B16
4th Layer
C14894
0.22uF 16V OPT
P13
P14
AVDD_DDR_VBP_A_2
0.1uF 16V
C14895
0.22uF 16V OPT
C14896
0.47uF 6.3V
Y27
Y28
C14897
0.22uF 16V OPT
V18
V19
4th Layer
C14898
0.47uF 6.3V
AB27
AB28
A20
AVDD_DDR_VBP_A_4
AVDD_DDR_VBN_A_1
AVDD_DDR_VBN_A_2
AVDD_DDR_VBN_A_3
U18
U19
4th Layer
V17
AVDD_DDR_VBP_A_3
AVDD_DDR_VBN_A_4
C14887
N17
AVDD_DDR_VBP_B_1
AVDD_DDR_VBP_B_2
AVDD_DDR_VBP_B_3
AVDD_DDR_VBP_B_4
AVDD_DDR_VBN_B_1
AVDD_DDR_VBN_B_2
AVDD_DDR_VBN_B_3
AVDD_DDR_VBN_B_4
DRAM_VDD_A_1
U11 MIU POWER ONLY
C14893
L17
M17
AVDD_DDR_VBP_A_1
C14899
0.1uF 16V
W17
Y17
B20
DRAM_VDD_A_2
AB17
R14800
U11P MIU
POWER ONLY
C14855
0.47uF
6.3V
C14851
0.1uF
16V
V8
V16
AVDD_HDMIRX_1
Y16
AA16
V15
N16
GND_71
L14800
BLM18PG121SN1D
M8
AVDD_HDMITX_3
AA19
W19
U15
GND_63
AVDD_PLL_2
+3.3V_NORMAL
H8
AVDD_HDMITX_2
AVDD_HDMIRX_4
Y12
T15
A9
GND_61
AA13
GND_79
GND_203
GND_80
GND_204
GND_81
GND_205
GND_82
GND_206
GND_83
GND_207
GND_84
GND_208
GND_85
GND_209
GND_86
GND_210
GND_87
GND_211
DRAM_VDD_B_2
AC17
URSA11P0
A26
DRAM_VDD_B_1
AD17
C14900
0.1uF 16V
AG17
C18
B26
URSA11P
D18
E18
Close to Chip
F18
G18
H18
J18
K18
L18
GND_89
E19
F19
G19
H19
J19
K19
L19
M19
N19
AB19
AH19
C20
GND_90
GND_212
GND_91
GND_213
GND_92
GND_214
GND_93
GND_215
GND_94
GND_216
GND_95
GND_217
GND_96
GND_218
GND_97
GND_219
GND_98
GND_220
GND_99
GND_221
D20
E20
F20
G20
H20
GND_222
J20
K20
L20
M20
N20
GND_101
GND_102
U20
GND_103
GND_223
GND_104
GND_224
GND_105
GND_225
V20
AB20
GND_106
GND_107
GND_108
A21
GND_109
GND_226
GND_110
GND_227
GND_111
GND_228
GND_112
GND_229
GND_113
GND_230
GND_114
GND_231
GND_232
GND_233
GND_116
GND_234
GND_117
GND_235
GND_118
GND_236
GND_119
GND_237
GND_120
GND_238
GND_121
GND_239
GND_122
GND_240
GND_123
GND_241
GND_124
GND_242
GND_125
GND_243
GND_126
GND_244
GND_127
GND_245
GND_128
GND_246
GND_129
GND_247
B21
C21
D21
E21
F21
G21
H21
J21
K21
L21
M21
N21
P21
R21
T21
U21
GND_248
GND_131
V21
W21
Y21
AA21
AB21
AG21
A22
GND_132
GND_249
GND_133
GND_250
GND_134
GND_251
GND_135
GND_252
GND_136
GND_253
GND_137
GND_254
GND_138
GND_255
GND_139
GND_256
GND_140
GND_257
GND_141
GND_258
GND_142
GND_259
GND_143
GND_260
GND_144
GND_261
GND_145
GND_262
GND_146
GND_263
GND_264
GND_265
GND_148
GND_266
GND_149
GND_267
GND_150
GND_268
GND_151
GND_269
GND_152
N18
GND_153
GND_271
GND_272
GND_156
GND_273
GND_157
GND_274
GND_158
GND_275
GND_159
GND_276
GND_160
GND_277
GND_161
GND_278
GND_162
GND_279
GND_163
GND_164
E22
F22
G22
H22
J22
K22
L22
M22
N22
P22
R22
T22
U22
V22
W22
Y22
AA22
AB22
B23
C23
D23
E23
F23
Y23
AA23
AB23
AH23
A24
GND_165
GND_281
GND_166
GND_282
GND_167
GND_283
GND_168
GND_284
GND_169
GND_285
GND_170
GND_286
GND_171
GND_287
GND_172
B24
C24
D24
Y24
AA24
AB24
C25
GND_173
GND_288
GND_174
GND_289
GND_175
GND_290
GND_176
GND_291
GND_177
GND_292
GND_178
GND_293
GND_179
GND_294
GND_180
GND_295
GND_181
GND_296
J25
M25
R25
V25
Y25
AA25
AB25
AG25
GND_182
GND_183
C26
GND_184
GND_297
GND_185
GND_298
GND_186
GND_299
GND_187
GND_300
GND_188
GND_301
GND_189
GND_302
GND_190
E26
W26
GND_303
GND_191
GND_304
GND_193
GND_305
GND_306
GND_309
W18
Y26
AA26
AB26
AE26
A27
GND_192
AVDD_MOD
AA18
D22
GND_280
GND_308
AB18
C22
A23
GND_154
GND_155
GND_307
Y18
B22
GND_270
GND_194
M18
L14801
BLM18PG121SN1D
D19
GND_88
C16
AVDD_HDMITX
Y13
G8
AVDD_MOD_2
VDDP_3
AVDD_DVI_ALLRX
N15
GND_55
W20
AA20
GND_202
GND_147
J7
L15
AVDD_MOD_4
Y20
GND_201
GND_78
B15
G7
AVDD_DDR1_5
Y14
AA15
GND_200
GND_77
GND_130
T14
M6
GND_40
AVDD_MOD
AA14
GND_199
GND_76
D14
AVDDL_PREDRV_3
AVDD_15_MOD_3
C19
GND_75
D13
AG4
AVDDL_MOD_4
AVDD_15_MOD_2
GND_74
GND_115
AVDDL_MOD_3
AVDD_15_MOD_1
GND_73
GND_100
T12
Y3
V4
AVDD_15_MOD_4
VDDP_AVDD_PLL
C14845
0.1uF
16V
W11
GND_30
U11 ONLY
K12
Y15
C14837
0.1uF
16V
AG2
M13
GND_29
J12
L12
C14831
1uF
10V
V11
K13
AVDDL_MOD_2
NC FOR U11P
AVDD_15_MOD
Close to Chip side
C14823
10uF
10V
AC2
AVDD_DDR1_6
4th Layer
C14814
10uF
10V
U11
L13
AVDDL_MOD_1
P15
R16
C14803
10uF
10V
AB2
AVDDL_LVDSRX/AVDDL_VBY1RX_2
GND_38
P16
C14828
0.1uF
16V
OPT
T11
J13
GND_37
4th Layer
C14819
10uF
10V
Y2
GND_28
GND_36
P17
C14810
0.1uF
16V
R11
AVDDL_LVDSRX/AVDDL_VBY1RX_1
+1.5V_U_DDR
C14853
0.47uF
6.3V
AVDDL_HDMITX
W2
P4
AVDDL_HDMITX_1
GND_35
C14822
10uF
10V
P11
C4
DVDD_DDR_2
C14817
0.1uF
16V
P2
GND_25
T16
C14809
0.1uF
16V
N11
GND_24
AVDDL_PREDRV_5
4th Layer
AVDDL_DVI_RX
N2
D3
J8
C14824
10uF
10V
M11
AVDDL_LVDSRX/AVDDL_VBY1RX_3
L14805
BLM18PG121SN1D
C14816
0.1uF
16V
L2
W9
W10
C14808
0.1uF
16V
L11
AB11
AVDDL_HDMITX_3
Y8
C14890
0.1uF
16V
G2
J2
VDDC_16
AB3
DVDD_DDR
J11
K11
AA11
AVDDL_HDMIRX_4
Y7
H11
B2
VDDC_15
M3
W6
G11
A2
GND_14
VDDC_23
U10
C11
K1
GND_195
GND_310
GND_196
GND_311
GND_197
B27
C27
AA27
AG27
J28
M28
GND_312
R28
V28
GND_198
C14802
10uF
10V
C14811
10uF
10V
C14820
10uF
10V
C14829
0.1uF
16V
C14836
0.1uF
16V
C14842
0.1uF
16V
C14849
0.1uF
16V
+1.5V_U_DDR
AVDD_DVI_ALLRX
C14867
10uF
10V
L14802
BLM18PG121SN1D
C14804
10uF
10V
C14812
0.1uF
16V
C14825
0.1uF
16V
C14834
0.1uF
16V
C14840
0.1uF
16V
C14869
10uF
10V
C14871
10uF
10V
C14873
0.1uF
16V
C14875
0.1uF
16V
C14879
0.1uF
16V
C14880
0.1uF
16V
C14905
0.47uF
6.3V
4th Layer
Close to Chip side
+1.5V_U_DDR
AVDD_15_MOD
AVDD_HDMITX
L14803
BLM18PG121SN1D
L14808
BLM18PG121SN1D
C14805
10uF
10V
C14813
0.1uF
16V
C14826
0.1uF
16V
OPT
URSA11
C14841
0.1uF
16V
C14870
10uF
10V
4th Layer
C14874
0.1uF
16V
C14877
0.1uF
16V
C14881
0.1uF
16V
C14882
0.47uF
6.3V
C14883
10uF
10V
C14884
0.1uF
16V
Close to Chip side
4th Layer
Close to Chip side
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
BSD-15Y-LM14A-148_00-HD
URSA11_Power
LGE Internal Use Only
Main PCB for Broadband
EG9200
2
Module
1
IR / Logo
Main processor_URSA11
Micom
4
4
Main processor_Digital(LM14A),
DDR Memory / eMMC
3
Speaker
1
2
5
Local Dim.To PSU
Audio AMP (Max 20W)
5
HDMI Switch_MN864788
3
wifi
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Interconnection - 1
EG9200
[PCBs]
2
2
1
Main PCB
2
2
PSU
3
WIFI / BT Combo Ass’y
4
1
1
IR /Logo PCB
3
4
3
4
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Contents of Standard Repair Process
No.
Error symptom (High category)
Error symptom (Mid category)
Page
1
No video/Normal audio
1
2
No video/No audio
2
Picture broken/ Freezing
3
4
Color error
4
5
Vertical/Horizontal bar, residual image,
light spot, external device color error
5
6
No power
6
7
Off when on, off while viewing, power
auto on/off
7
8
No audio/Normal video
8
9
Wrecked audio/discontinuation/noise
9
10
Remote control & Local switch checking
10
11
MR13 operating checking
11
Wifi operating checking
12
13
Camera operating checking
13
14
External device recognition error
Remarks
14
3
A. Video error
B. Power error
C. Audio error
12
D. Function error
15
E. Noise
Circuit noise, mechanical noise
15
16
F. Exterior error
Exterior defect
16
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
A. Video error
Established
date
No video/ Normal audio
Error
symptom
Revised date
1/16
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)
☞A1
No video
Normal audio
Normal
audio
Y
☞A9
Check Back Light
On with naked eye
N
Move to No
video/No audio
Y
On
Check Power
Board
24V, 12V,3.5V etc.
N
☞A9
Y
Replace T-con/Main
Board or module
And Adjust VCOM
N
Repair Power
Board or parts
Check Power Board 24V output
Normal
voltage
Normal
voltage
Y
Replace Inverter
or module
End
N
Repair Power
Board or parts
※Precaution
☞A4 & A2
Always check & record S/W Version and White
Balance value before replacing the Main Board
Replace Main Board
Re-enter White Balance value
1
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
A. Video error
Established
date
No video/ No audio
Error
symptom
Revised date
2/16
☞A9
No Video/
No audio
Check various
voltages of Power
Board ( 3.5V,12V,20V
or 24V…)
Normal
voltage?
Y
N
Check and
replace
MAIN B/D
End
Replace Power
Board and repair
parts
2
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
A. Video error
☞ A3
Check RF Signal level
Normal
Signal?
Y
Established
date
Picture broken/ Freezing
Error
symptom
Revised date
3/16
. By using Digital signal level meter
. By using Diagnostics menu on OSD
( Setting→ Quick Setting → Programmes → Programme Tuning → Manual Tuning → Check the Signal )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Check whether other equipments have problem or not.
(By connecting RF Cable at other equipment)
→ DVD Player ,Set-Top-Box, Different maker TV etc`
N
Check RF Cable
Connection
1. Reconnection
2. Install Booster
☞ A4
Normal
Picture?
Y
Check
S/W Version
N
N
Y
Check
Tuner soldering
Close
N
Y
N
Normal
Picture?
SVC
Bulletin?
S/W Upgrade
Contact with signal distributor
or broadcaster (Cable or Air)
Normal
Picture?
Y
N
Replace
Main B/D
Y
Close
Close
3
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
A. Video error
Revised date
4/16
☞ A7
☞A6
Check color by input
-External Input
-COMPONENT
-AV
-HDMI
Established
date
Color error
Error
symptom
Color
error?
Y
N
※ Check
and replace
Link Cable
(V by one)
and contact
condition
Y
Color
error?
Y
Color
error?
Replace Main B/D
Replace module
N
N
End
Check error
color input
mode
External Input/
Component
error
Check
external
device and
cable
External device Y
/Cable
normal
Replace Main/T-con B/D
N
Request repair
for external
device/cable
N
HDMI
error
Check external
device and
cable
External device Y
/Cable
normal
Replace Main/T-con B/D
4
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
A. Video error
Established
date
Vertical / Horizontal bar, residual image,
light spot, external device color error
Error
symptom
Revised date
5/16
Vertical/Horizontal bar, residual image, light spot
Replace
Module
☞A6
☞ A7
Check color condition by input
-External Input
-Component
-HDMI
Screen Y
normal?
Check external
device
connection
condition
Y
Normal?
Check and
replace Link
Cable
N
N
Screen N
normal?
Y
Request repair
for external
device
Replace
module
N
End
Screen
normal?
Replace Main/T-con B/D
(adjust VCOM)
For LGD panel
Y
Replace Main B/D
End
For other panel
External device screen error-Color error
Check S/W Version
Check N
version
Y
External
Input
error
Component
error
S/W Upgrade
Normal
screen?
Check screen
condition by input
-External Input
-Component
-HDMI/DVI
HDMI/
DVI
N
Y
End
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
N
Screen
normal?
Replace
Main/T-con
B/D
Y
Request repair for
external device
Y
Screen
normal?
N
Replace
Main /T-con
B/D
5
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Standard Repair Process
B. Power error
Established
date
No power
Error
symptom
Revised date
☞A8
Check
Logo LED
6/16
☞A9
DC Power on
by pressing Power Key
On Remote control
Y
Power LED
On?
. Stand-By: Red or Turn On
N
. Operating: Turn Off
Normal N
operation?
Check Power
On ‘”High”
OK?
Y
Replace
Power
B/D
Y
Check Power cord
was inserted properly
Replace Main B/D
☞A9
Measure voltage of each output of Power B/D
N
Normal?
Y
Y
※
Close
Check ST-BY 3.5V
Normal
Y
voltage?
☞A9
Normal
voltage?
Y
Replace Main B/D
N
Replace Power B/D
N
Replace Power
B/D
6
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Standard Repair Process
B. Power error
Established
date
Off when on, off while viewing, power auto on/off
Error
symptom
Revised date
7/16
Check outlet
☞A10
Check A/C cord
Error?
N
Check Power Off
Mode
CPU
Abnormal
Normal?
Replace Main B/D
Y
End
N
Check for all 3- phase
power out
Y
Abnormal
1
☞A9
Fix A/C cord & Outlet
and check each 3
phase out
(If Power Off mode
is not displayed)
Check Power B/D
voltage
※ Caution
Check and fix exterior
of Power B/D Part
* Please refer to the all cases which
can be displayed on power off mode.
Replace Power B/D
Normal
voltage?
Y
Replace Main B/D
N
Replace Power B/D
Status
Power off List
" POWEROFF_REMOTEKEY "
" POWEROFF_OFFTIMER "
" POWEROFF_SLEEPTIMER "
" POWEROFF_INSTOP "
" POWEROFF_AUTOOFF "
Normal " POWEROFF_ONTIMER "
" POWEROFF_RS232C "
" POWEROFF_RESREC "
" POWEROFF_RECEND "
" POWEROFF_SWDOWN "
" POWEROFF_UNKNOWN "
" POWEROFF_ABNORMAL1 "
Abnormal
" POWEROFF_CPUABNORMAL "
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
off
off
off
off
off
off
off
off
off
off
off
off
off
Explanation
by REMOTE CONTROL
by OFF TIMER
by SLEEP TIMER
by INSTOP KEY
by AUTO OFF
by ON TIMER
by RS232C
by Reservated Record
by End of Recording
by S/W Download
by unknown status except listed case
by abnormal status except CPU trouble
by CPU Abnormal
7
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Standard Repair Process
C. Audio error
Established
date
No audio/ Normal video
Error
symptom
Revised date
☞A11
No audio
Screen normal
8/16
☞A12+A9
Check user
menu & gt;
Speaker off
N
Off
Check audio B+
24V of Power
Board
Normal
voltage
Y
N
Cancel OFF
Check
Speaker
disconnection
Y
Replace Power Board and repair parts
N
Disconnection
Replace MAIN Board
End
Y
Replace Speaker
8
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Standard Repair Process
Error
symptom
C. Audio error
Established
date
Wrecked audio/ discontinuation/noise
Revised date
9/16
→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio
Check input
signal
-RF
-External Input
signal
Wrecked audio/
Discontinuation/
Noise for
all audio
Signal
normal?
☞A12+A9
Check and replace
speaker and
connector
Check audio
B+ Voltage (24V)
Y
Y
Wrecked audio/
Discontinuation/
Noise only
for D-TV
N
Normal
voltage?
Replace Main B/D
N
Wrecked audio/
Discontinuation/
Noise only
for Analog
(When RF signal is not
received)
Request repair to external
cable/ANT provider
(In case of
External Input
signal error)
Check and fix
external device
Replace Power B/D
Replace Main B/D
Wrecked audio/
Discontinuation/
Noise only
for External Input
Connect and check
other external
device
Normal
audio?
End
N
Y
Check and fix external device
9
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Standard Repair Process
Established
date
D. Function error
Error
symptom
MR15/P operating checking
Revised date
11/15
2. MR15 (Magic Remocon) operating error
☞A4
Check the
INSTART menu
RF Receiver ver
is “00.00”?
N
Check MR15
itself Operation
Normal Y
operating?
Press the
wheel
N
☞A14
Y
Y
Check & Replace
Battery of MR15
Check & Repair
RF assy
connection
Y
Normal
operating?
☞A4
RF Receiver ver
is “00.00”?
N
Close
Turn off/on the
set and press
the wheel
Is show ok N
message?
Close
Close
Is show ok
message?
N
N
Press the back
key about 5sec
Y
Y
Replace
MR15
Close
Down load the Firmware
* If you conduct the loop at 3times, change the M4.
* INSTART MENU14.RF
Remocon Test3. Firmware
download
11
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Standard Repair Process
Established
date
D. Function error
Error
symptom
Remote control & Local switch checking
Revised date
10/16
1. Remote control(R/C) operating error
☞A13
Check R/C itself
Operation
Check & Repair
Cable connection
Connector solder
Normal Y
operating?
N
Check R/C Operating
When turn off light
in room
If R/C operate,
Explain the customer
cause is interference
from light in room.
☞A13
Normal
operating?
N
Y
Check & Replace
Baterry of R/C
Replace
Main B/D
☞A13
Check B+
3.5V
On Main B/D
☞A9
Close
Normal
Voltage?
Y
Check IR
Output signal
N
Check 3.5v on Power B/D
Replace Power B/D or
Replace Main B/D
(Power B/D don’t have problem)
Normal
Signal?
Y
N
Repair/Replace
IR B/D
Y
Normal
Close
operating?
N
Replace R/C
10
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Standard Repair Process
Established
date
D. Function error
Error
symptom
Wifi operating checking
Revised date
12/16
3.Wifi operating error
☞A4
Check the
INSTART menu
☞A15
Wi-Fi Mac value
is “NG”?
N
Check the Wifi wafer
1pin
Normal
Voltage?
N
Replace
Main B/D
Y
☞A15
Y
Close
Check & Repair
Wifi cable
connection
☞A4
Wi-Fi Mac value
is “NG”?
N
Close
Y
Change the Wifi
assy
12
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Standard Repair Process
D. Function error
Check
input
signal
Y
Signal
input?
Established
date
External device recognition error
Error
symptom
Revised date
Check technical
information
- Fix information
- S/W Version
Technical
information?
N
Check and fix
external device/cable
N
External Input and
Component
Recognition error
14/16
Replace Main B/D
Y
Fix in
accordance
with technical
information
HDMI/
DVI, Optical
Recognition error
Replace Main B/D
14
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Standard Repair Process
Error
symptom
Identify
nose
type
Circuit
noise
Mechanical
noise
E. Noise
Established
date
Circuit noise, mechanical noise
Revised date
Check
location of
noise
15/16
Replace PSU
Check location of
noise
※ When the nose is severe, replace the module
(For models with fix information, upgrade the
S/W or provide the description)
※ Mechanical noise is a natural
phenomenon, and apply the 1st level
description. When the customer does not
agree, apply the process by stage.
※ Describe the basis of the description
in “Part related to nose” in the Owner’s
Manual.
OR
OR
※ If there is a “Tak Tak” noise from the
cabinet, refer to the KMS fix information and
then proceed as shown in the solution manual
(For models without any fix information,
provide the description)
15
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Standard Repair Process
F. Exterior defect
Error
symptom
Zoom part with
exterior damage
Exterior defect
Module
damage
Revised date
16/16
Replace module
Cabinet
damage
Established
date
Replace cabinet
Remote
controller
damage
Stand
dent
Replace remote controller
Replace stand
16
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Contents of Standard Repair Process Detail Technical Manual
No.
1
2
Error symptom
Page
A. Video error_ video error /Video
lag/stop
5
Check back light with naked eye
Check White Balance value
A2
TUNER input signal strength checking
method
A3
Version checking method
Remarks
A1
A4
Tuner Checking Part
A. Video error_ No video/Normal
audio
3
4
Content
A5
6
A. Video error _Vertical/Horizontal bar,
residual image, light spot
Connection diagram
A6
7
A. Video error_ Color error
Check Link Cable (EPI) reconnection
condition
A7
8
& lt; Appendix & gt;
Defected Type caused by T-Con/
Inverter/ Module
Exchange Module (1)
A-1/2
Exchange Module (2)
A-2/2
Continue to the next page
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Contents of Standard Repair Process Detail Technical Manual
Continued from previous page
No.
Error symptom
9
Content
Page
Check front display Logo
A8
Check power input Voltage & ST-BY 3.5V
A9
POWER OFF MODE checking method
A10
Checking method in menu when there is
no audio
A11
Voltage and speaker checking method
when there is no audio
A12
Remote controller operation checking
method
A13
Motion Remote operation checking
method
A14
Wifi operation checking method
A15
Tool option changing method
Remarks
A16
B. Power error_ No power
10
11
12
13
B. Power error_Off when on, off
while viewing
C. Audio error_ No audio/Normal
video
14
15
D. Function error
16
17
E. Etc
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Standard Repair Process Detail Technical Manual
Error
symptom
Content
A. Video error_No video/Normal audio
Check back light with naked eye
Established
date
Revised
date
A1
After Remove the Rear Cover, turning on the power and check with the naked eye,
Whether you can see video
A1
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Standard Repair Process Detail Technical Manual
Error
symptom
A. Video error_No video/Normal audio
Content
Check White Balance value
Established
date
Revised
date
A2
Entry method
1. Press the ADJ button on the remote controller for adjustment.
2. Enter into White Balance of item 10.
3. After recording the R, G, B (GAIN, Cut) value of Color Temp
(Cool/Medium/Warm), re-enter the value after replacing the MAIN BOARD.
A2
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Standard Repair Process Detail Technical Manual
Error
symptom
A. Video error_Video error, video lag/stop
Content
TUNER input signal strength checking method
Established
date
Revised
date
A3
Quick Settings Programmes Programme Tunning
Manual Tuning
When the signal is strong, use the
attenuator (-10dB, -15dB, -20dB etc.)
A3
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Standard Repair Process Detail Technical Manual
Error
symptom
Content
A. Video error_Video error, video lag/stop
Version checking method
Established
date
Revised
date
A4
1. Checking method for remote controller for adjustment
Version
Press the IN-START with the remote
controller for adjustment
A4
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Standard Repair Process Detail Technical Manual
Error
symptom
A. Video error_Video error, video lag/stop
Content
TUNER checking part
Established
date
Revised
date
A5
Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
2. After measuring each voltage from power supply, finally replace the MAIN BOARD.
A5
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Standard Repair Process Detail Technical Manual
Error
symptom
Content
A. Video error _Vertical/Horizontal bar,
residual image, light spot
connection diagram
Established
date
Revised
date
A6
As the part connecting to the external input, check
the screen condition by signal
A6
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Standard Repair Process Detail Technical Manual
Error
symptom
Content
A. Video error_Color error
Check Link Cable (EPI) reconnection condition
Established
date
Revised
date
A7
Check the contact condition of the Link Cable, especially dust or mis insertion.
A7
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LGE Internal Use Only
Appendix : Exchange the Module (1)
Vertical abnormal display
Crosstalk
Brightness difference
Press damage
Line Dim
Crosstalk
Un-repairable Cases
In this case please exchange the module.
Burnt
A – 1/2
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Appendix : Exchange the Module (2)
Angle view Color difference
Brightness dot noise
Half dead
Brightness difference
Green Noise on power on/off time
Line Defect
Un-repairable Cases
In this case please exchange the module.
Mura
A – 2/2
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Standard Repair Process Detail Technical Manual
Error
symptom
B. Power error _No power
Content
Check front display Logo
Established
date
Revised
date
A17
ST-BY condition: On or Off
Power ON condition: Turn Off
A8
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Standard Repair Process Detail Technical Manual
Error
symptom
Content
B. Power error _No power
Check power input voltage and ST-BY 3.5V
Established
date
Revised
date
A18
Check the DC 24V, 12V, 3.5V.
24Pin(Power Board ↔ Main Board)
1
3
5
7
9
11
13
15
17
19
21
②
③
2
4
6
8
10
12
14
16
18
20
22
INV CTL
PDIM#2
GND
3.5V
GND
12V
12V
GND
12V_ON
24V
24V
23
①
PWR ON
DPC
3.5V
3.5V
GND
12V
12V
12V
GND
24V
24V
GND
24
GND
A9
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Standard Repair Process Detail Technical Manual
Error
symptom
B. Power error _Off when on, off whiling viewing Established
date
Content
POWER OFF MODE checking method
Revised
date
A19
Entry method
1. Press the IN-START button of the remote controller for adjustment
2. Check the entry into adjustment item 3
A10
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Standard Repair Process Detail Technical Manual
Error
symptom
C. Audio error_No audio/Normal video
Content
Checking method in menu when there is no audio
Established
date
Revised
date
A20
Checking method
1. Press the Setting button on the remote controller
2. Select the Sound function of the Menu
3. Select the Sound Out
4. Select TV Speaker
A11
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Standard Repair Process Detail Technical Manual
Error
symptom
C. Audio error_No audio/Normal video
Content
Voltage and speaker checking method
when there is no audio
②
24Pin(Power Board
1
PWR ON
3
DPC
5
3.5V
7
3.5V
9
GND
11
12V
13
12V
15
12V
17
GND
19
24V
21
24V
23
GND
Established
date
Revised
date
↔ Main Board)
2
INV CTL
4
PDIM#2
6
GND
8
3.5V
10
GND
12
12V
14
12V
16
GND
18
12V_ON
20
24V
22
24V
24
GND
A21
①
③
1
SPK_R-
1
SPK_R+
3
SPK_L-
4
SPK_L+
Checking order when there is no audio
① Check the contact condition of or 24V connector of Main Board
② Measure the 24V input voltage supplied from Power Board
(If there is no input voltage, remove and check the connector)
③ Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the
GND and output terminal, the speaker is normal.
A12
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Standard Repair Process Detail Technical Manual
Error
symptom
D. Function error
Content
Remote controller operation checking method
Established
date
Revised
date
A22
③
P4100
1
2
3
4
5
6
7
8
9
GND
KEY1
KEY2
3.5V_ST
GND
LOGO_LIGHT
IR
GND
EYE_SCL
10
EYE_SDA
①
②
Checking order
1, 2. Check IR cable condition between IR & Main board.
3.
Check the st-by 3.5V on the terminal 4.
4. When checking the Pre-Amp when the power is in ON condition, it is normal when the
Analog Tester needle moves slowly, and defective when it does not move at all.
A13
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Standard Repair Process Detail Technical Manual
Error
symptom
Content
D. Function error
Motion Remote operation checking method
Established
date
Revised
date
A23
P4100
①
EYE_SDA
P4101
②
Checking order
1
2
3
4
5
6
7
GND
M_RFModule_RESET
NOT USE
WOL/WIFI_POWER_ON
GND
WIFI_DP
WIFI_DM
8
③
1.
2.
3.
4.
GND
KEY1
KEY2
3.5V_ST
GND
LOGO_LIGHT
IR
GND
EYE_SCL
10
③
1
2
3
4
5
6
7
8
9
3.5V_WIFI
Check IR cable condition between IR & Main board.
Check WIFI Combo cable condition between WIFI Combo Assy & Main board.
Check the st-by 3.5V P4100 on the terminal 4
Check the 3.5V_WIFI P4101 on the terminal 8
A14
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Standard Repair Process Detail Technical Manual
Error
symptom
Content
D. Function error
Wifi operation checking method
Established
date
Revised
date
A24
P4101
①
GND
M_RFModule_RESET
NOT USE
WOL/WIFI_POWER_ON
GND
WIFI_DP
WIFI_DM
8
③
1
2
3
4
5
6
7
3.5V_WIFI
②
Checking order
1, 2. Check Wifi cable condition between Wifi assy & Main board.
3.
Check the 3.3V on the terminal 8.
A15
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Standard Repair Process Detail Technical Manual
Error
symptom
Content
E. Etc
Tool option changing method
①
Established
date
Revised
date
A25
②
Changing method
1.
Contact the USB memory. (USB 1,2,3 jack)
2.
Enter the password. (ex. 000000)
* Access USB Memory has each password.
A16
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