RT8809A=RT8809B.pdf

AsRock P67 Pro3 Brak napięcia na pin EN

L6751A (jest datasheet na L6751B ) ma niezalezne sterowanie na kanały zasilania cpu. (Vcore i Vigfx) Byc może driver jet uszkodzony? - zdejmij i zmierz na ohmy przejscia Popatrz w * boardview od Z68 pro3 (ma taki sam L6751A) Na drivery syg. EN idzie od L6751B p.s datasheet na RT8809A=RT8809B (DQ=) zasilanie grafiki Link Podają ,że na L6751B pin"s 48 - 1,05V 49-50-51 - 1,05V 53 - 5V 54 - ze Stby przez diodę 4,5V 55 - 12V


RT8809A/B
Multi-Phase PWM Controller for GPU Core Power Supply
General Description
The RT8809A/B is a dual-phase synchronous buck PWM
controller with integrated drivers which are optimized for
high performance graphic microprocessor and computer
applications. The IC integrates a G-NAVP TM PWM
controller, two 12V MOSFET drivers with internal bootstrap
diodes, as well as output current monitoring and protection
functions into the WQFN-24L 4x4 package. The
RT8809A/B adopts DCR and RDS(ON) current sensing. Load
line voltage positioning (droop) and over current protection
are accomplished through continuous inductor DCR current
sensing, while RDS(ON) current sensing is used for accurate
channel current balance. Using both methods of current
sampling utilizes the best advantages of each technique.
The RT8809A/B also features a one-bit VID control
operation in which the feedback voltage is regulated and
tracks external input reference voltage. Other features
include, adjustable operating frequency, external
compensation, and enable/shutdown functions.

Ordering Information
RT8809A/B
Package Type
QW : WQFN-24L 4x4 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
A : With Droop Function
B : Without Droop Function
Note :

Features
Dual-Phase PWM Controller
Two Embedded MOSFET Drivers and Embedded
Switching Boot Diode
Green-NAVP TM (Green Native Adaptive Voltage
Positioning) Topology
Dynamic Auto Phase Control with Programmable
Threshold
Cross-talk Jitter Suspend (CJSTM)
Remote GND Detection for High Accuracy
Automatic Diode Emulation Mode/Or Ultrasonic
Mode at Light Load
Lossless RDS(ON) Current Sensing for Current Balance
Lossless DCR Current Sensing for AVP & OCP
Reference Voltage Output with 1% Accuracy
External Reference Input with Soft-Start (RISS)
Embedded One-Bit VID Control
Programmable OCP Threshold
Programmable Switching Frequency
Reference Tracking UVP/OVP Protection
Shoot Through Protection and Short Pulse Free
Technology
RoHS Compliant and Halogen Free

Applications
Middle to High End GPU Core Power
High End Desktop PC Memory Core Power
Low Voltage, High Current DC/DC Converter
Voltage Regulator Modules

Pin Configurations
(TOP VIEW)
RSET
VID
BOOT2
UGATE2
PHASE2
LGATE2

Richtek products are :
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.

24 23 22 21 20 19

VSET
VREF
EN/MSEL
RMPSET
COMP
FB

1

18

2

17

3

PGND

4

25

5

16
15
14
13

6
8

9 10 11 12

VRTN
TON
OCP
CSN
CSP
PS

7

VCC
VDD
LGATE1
PHASE1
UGATE1
BOOT1

WQFN-24L 4x4
DS8809A/B-02 July 2011

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1

RT8809A/B
Marking Information
RT8809AGQW

RT8809BGQW
07= : Product Code

08= : Product Code

YMDNN : Date Code

07=YM
DNN

08=YM
DNN

RT8809AZQW

YMDNN : Date Code

RT8809BZQW
07 : Product Code

08 : Product Code

YMDNN : Date Code

07 YM
DNN

08 YM
DNN

YMDNN : Date Code

Typical Application Circuit
VIN
12V

RT8809A/B
17 VDD

C8
10uF
C4 Optional

C5
1.2nF

2 VREF

R18
11k

VRTN
R19
15k

BOOT1 13
UGATE1 14

1

PHASE1 15

VSET

24 RSET
R4
Optional

R21 43k
R22 56k

9

OCP

12 PS

R16 160k

VIN
EN/MODE

VCC 18

4 RMPSET

R20 160k

8 TON

R17 100

3 EN/MSEL

VID 23
BOOT2 22
UGATE2 21
PHASE2 20

PGND

FB

6

VRTN 7

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2

C9
0.1uF
Q1
L1

R5 0
Q2
GPIO
R9 0

C14
0.1uF
Q3

R7
NC
C12
NC
VIN
C13
10uF
/16V x 5

R8 0
Q4

LGATE2 19

CSP 11
CSN 10

C6
10uF/16V x 5

R6 0

LGATE1 16

COMP 5
25 (Exposed pad)

R3 1
C7
10uF

C2
1.5nF

C1
2.2nF

R2

R1

3.9k

R12
NC
C15
NC

0.36uH
/0.8m

R10
9.1k

VOUT
1.1V
C10
820uF
/2.5V x 4

C11
10uF
/6.3V x 10

L2
0.36uH/0.8m
R11
9.1k
R13 NC

C3 0.1uF

2k

R14
100

R15
100
VCC_SNS

VSS_SNS

DS8809A/B-02 July 2011

RT8809A/B
Functional Pin Description
Pin No.

Pin Name

Pin Function

1

VSET

Output Voltage Setting. Connect a voltage divider from VREF to VSET to set the
output voltage.

2

VREF

Reference Voltage Output (2V). RT8809A/B generates a 2V reference voltage from
VREF pin to VRTN.
Chip Enable and Mode Selection. This pin is a tri-state input. Pull up this pin to
exceed than 4.2V, controller operation into DEM mode. Pull up this pin to between
1.2V to 3V, controller operation into ASM mode. Pull down this pin to GND,
controller will shutdown.
Internal Ramp Slew Rate Setting. Connect a resistor (RRMP) from RMPSET to GND
to the ramp slew rate. The value of RRMP must be set equal to RTON.
Compensation Pin. This pin is the output node of the error amplifier.

3

EN/MSEL

4

RMPSET

5

COMP

6

FB

7

VRTN

8

TON

9

OCP

10

CSN

Feedback Pin. This pin is the negative input node of the error amplifier.
Remote Differential Feedback, Invert Input. This pin is the negative node of the
differential remote voltage sensing.
On Time (Switching Frequency) Setting. Connect a resistor (R TON ) from TON to
VIN to set the switching frequency. The value of RTON must be set equal to RRMP.
OCP Level Setting. Connect a resistor from OCP to GND to set the current limit
threshold.
This pin is negative input of current sensing.

11

CSP

This pin is positive input of current sensing.

12

PS

13

BOOT1

14

UGATE1

15

PHASE1

16

LGATE1

17

VDD

18

VCC

19

LGATE2

20

PHASE2

21

UGATE2

22

BOOT2

23

VID

24

RSET

25
PGND
(Exposed Pad)

DS8809A/B-02 July 2011

Dynamic Phase Control Input. Connect a resistor from PS to GND to set the auto
down phase threshold.
Bootstrap Power Pin of PHASE1. This pin powers the high side MOSFET driver.
Upper Gate Driver of PHASE1. This pin provides the gate drive for the converter's
high side MOSFET. Connect this pin to the high side MOSFET gate.
This pin is return node of the high side driver of PHASE1. Connect this pin to high
side MOSFET sources together with the low side MOSFET drain and the inductor.
Lower Gate Driver of PHASE1. This pin provides the gate drive for the converter's
low side MOSFET. Connect this pin to the low side MOSFET gate.
Internal Regulator Power. The regulated voltage provides power supply for all low
voltage circuits.
Chip/Driver Power Pin. Connect this pin to GND by a ceramic cap larger than 1uF.
Lower Gate Driver of PHASE2. This pin provides the gate drive for the converter's
low side MOSFET. Connect this pin to the low side MOSFET gate.
This pin is return node of the high side driver of PHASE2. Connect this pin to high
side MOSFET sources together with the low side MOSFET drain and the inductor.
Upper Gate Driver of PHASE2. This pin provides the gate drive for the converter's
high side MOSFET. Connect this pin to the high side MOSFET gate.
Bootstrap Power Pin of PHASE2. This pin powers the high side MOSFET driver.
Programming Output Voltage Control. When VID pin is logic high, internal
N-MOSFET that connected to RSET pin is turn on.
Output Voltage Setting. Connect a resistor from RSET pin to VSET pin, the output
voltage can be switched two level by driving VID pin.
The exposed pad must be soldered to a large PCB and connected to GND for
maximum power dissipation.

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3

RT8809A/B
Function Block Diagram
RT8809A (With Droop Function)
VID

VREF

RSET

VCC

Reference
Output Gen.

Internal
Regulator & BG

VDD

Power On Reset
& Central Logic
UV Trip Point

VSET

+
-

OV Trip Point

Control & Protection Logic

+
-

Boot-Phase
Detection 1
Ramp
Gen

RMPSET
VRTN

Soft-Start &
Slew Rate
Control

FB

EN/MSEL

+
ERROR
AMP

COMP
EN/Mode
Select

Boot-Phase
Detection 2

VSETA

+

+

+

+

+
LPF

+
+

+

BOOT1
UGATE1
PHASE1

TON
Gen 1

PWM
CMP

PWM1

+
+
To Power
on Reset

To driver Logic
ZCD
To Power on
Reset
PHASE1 To driver Logic

LGATE1
Driver
Logic

TON
Gen 2

BOOT2
UGATE2
PHASE2

PWM2

LGATE2
PGND

VIN
Detection

TON

S/H

APS

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4

+
-

GM
+

Current
Balance

PS
CSP
CSN
OCP

GM
+

S/H

5

AOC
Isum

Phase
shedding
OCP

+

1/2

VB

++

To Protection Logic

DS8809A/B-02 July 2011

RT8809A/B
RT8809B (Without Droop Function)
VID

VREF

RSET

VCC

Reference
Output Gen.

Internal
Regulator & BG

VDD

Power On Reset
& Central Logic
VSET

UV Trip Point

+
-

OV Trip Point

Control & Protection Logic

+
-

Boot-Phase
Detection 1
Ramp
Gen

RMPSET

Boot-Phase
Detection 2

VSETA
VRTN

Soft-Start
+

FB

ERROR
AMP

COMP
EN/MSEL

EN/Mode
Select

+

+

+

+

+
LPF

BOOT1
UGATE1
PHASE1

TON
Gen 1

PWM
CMP

PWM1

+
+
To Power
on Reset

To driver Logic
ZCD
To Power on
Reset
PHASE1 To driver Logic

LGATE1
Driver
Logic

TON
Gen 2

BOOT2
UGATE2
PHASE2

PWM2

LGATE2
PGND

VIN
Detection

TON

S/H

GM
+

S/H

GM
+

Current
Balance
PS
APS

CSP
CSN
OCP

DS8809A/B-02 July 2011

+
-

AOC

Isum

Phase
shedding
OCP

+

1/2

++

To Protection Logic

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5

RT8809A/B
Absolute Maximum Ratings

(Note 1)

VDD, VSEN, COMP, VSET, VREF, EN/MSEL, PS, OCP, CSN,
CSP, RSET, VID, RMPSET to PGND ------------------------------------------------------------ -0.3V to 6V
VCC, TON to PGND --------------------------------------------------------------------------------- -0.3V to 15V
VRTN to PGND ---------------------------------------------------------------------------------------- -0.3V to 0.3V
BOOTx to PHASEx ---------------------------------------------------------------------------------- -0.3V to 15V
PHASEx to PGND
DC -------------------------------------------------------------------------------------------------------- -3V to 15V
& lt; 20ns --------------------------------------------------------------------------------------------------- -5V to 30V
UGATEx to PHASEx
DC -------------------------------------------------------------------------------------------------------- -0.3V to BOOTx - PHASEx
& lt; 20ns --------------------------------------------------------------------------------------------------- -5V to (BOOTx - PHASEx + 5V)
LGATEx to PGND
DC -------------------------------------------------------------------------------------------------------- -0.3V to PVCC+ 0.3V
& lt; 20ns --------------------------------------------------------------------------------------------------- -5V to (VCC + 5V)
Power Dissipation, PD @ TA = 25°C
WQFN-24L 4x4 --------------------------------------------------------------------------------------- 1.923W
Package Thermal Resistance (Note 2)
WQFN-24L 4x4, ?JA ---------------------------------------------------------------------------------- 52°C/W
WQFN-24L 4x4, ?JC --------------------------------------------------------------------------------- 7°C/W
Junction Temperature -------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) ---------------------------------------------------------- 260°C
Storage Temperature Range ----------------------------------------------------------------------- -65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) ------------------------------------------------------------------------- 2kV
MM (Machine Mode) --------------------------------------------------------------------------------- 200V

Recommended Operating Conditions

(Note 4)

Supply Voltage, VCC --------------------------------------------------------------------------------- 4.5V to 13.2V
Junction Temperature Range ----------------------------------------------------------------------- -40°C to 125°C
Ambient Temperature Range ----------------------------------------------------------------------- -40°C to 85°C

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6

DS8809A/B-02 July 2011

RT8809A/B
Electrical Characteristics
(VCC = 12V, No Load, TA = 25°C, unless otherwise specified)

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Supply Input
Supply Current

IVCC + IPVCC EN = 3.3V, Not Switching

--

4

--

mA

Shutdown Current

ICC + IPVCC

EN = 0V

--

--

500

uA

VVCC_th

VCC Rising

--

4.2

--

V

--

0.4

--

V

--

2

--

-1%

--

1%

0.5

--

2

V

--

1.5

--

ms

--

300

--

us

--

10

--

mV/us

-8

--

8

mV

RL = 47k?

--

80

--

dB

CLOAD = 5pF
CLOAD = 10pF (Gain = -4,
Rf = 47k, VOUT = 0.5V to 3V)

--

10

--

MHz

--

5

--

V/us

0.5

--

2

V

--

250

--

uA

Power On Reset
VCC POR Threshold

Power On Reset Hysteresis VVCC_hys
Reference
Reference Output

VREF

Reference Input Range

VSET

(No Load, Active Mode )
Accuracy
VSET pin (this max. voltage will affect
VCOMP max.)

V

Start Up Delay
Initial Soft-Start time
Reference Change Delay
Time
Internal VID Change Slew
Rate (RT8809A Only)
Error Amplifier

tb

Input Offset Voltage

Initially, VOUT = 0.1V to 1.2V

VOSEA

tc
td

DC Gain

VOUT = 1.2V to Set Voltage

Gain Bandwidth Product

GBW

Slew Rate

SR

Output Voltage Range

VCOMP

RL = 47k? (max. depend on VSET max.)

MAX Source Current

IOUTEA

VCOMP = 2V

Current Sense Amplifier (for Droop and OCP and Phase Shedding)
Input Offset Voltage

VOSCS

-1

--

1

mV

Impedance at Neg. Input

RCSN

1

--

--

M?

Impedance at Pos Input

RCSP

1

--

--

M?

---

5
0

---

V/V

-50

--

100

mV

DC Gain

RT8809A
RT8809B

Input range

VCSP - VCSN

TON Setting
TON Pin Output Voltage

VTON

IRTON = 62uA

--

VSET

--

V

ON-Time Setting

TON

IRTON = 62uA

--

350

--

ns

TON Input Current Range

I RTON

25

--

280

uA

Protection
Under Voltage Lockout
Threshold

VUVLO

--

3.8

--

V

Falling edge

To be continued
DS8809A/B-02 July 2011

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7

RT8809A/B
Parameter
Symbol
Test Conditions
Absolute Over
RT8809A/BGQW
VOVABS With Respect to VOUT(MAX)
Voltage Protection
RT8809A/BZQW
Threshold

Min

Typ

Max

2.1

2.2

--

2.6

2.9

--

--

138

--

%

--

50%

--

%

VNV

-50

--

--

mV

IOCP

7.2

8

8.8

uA

--

--

0.5

V

ASM Mode

1.2

--

3

DEM Mode

4.2

--

--

-1

--

5

uA

--

8

--

uA

--

500

--

ns

VBOOTx - VPHASEx = 6V
V
- VPHASEx = 0.1V,
R UGATEsk UGATEx
IUGATEx = 50Ma

--

1.2

--

A

--

2

--

?

Lower Driver Source
Lower Driver Sink

ILGATEsr VCC - VLGATEx = 6V
R LGATEsk VLGATEx = 0.1V, ILGATEx = 50mA

---

1.2
1.4

---

A
?

Internal Boost Charging Switch
On-Resistance

R BOOT

--

20

--

?

Relative Over Voltage Protection
Threshold

VREL_OV With Respect to VOUT

Under Voltage Protection Threshold

VUV

Negative Voltage Protection
Threshold
Current Source by OCP Pin

Measured at VSENS with Respect
to Unloaded Output Voltage (UOV)

Unit
V

Logic Inputs
EN Threshold Voltage

VIL

EN Pin Mode Select Voltage

Low Level (SD) (Hysteresis)

Leakage Current of EN

V

Auto Phase Control
Current Source by PSI Pin

IPS

Maximum Duty Cycle
UGATE Min. Off Time
Gate Driver
Upper Driver Source
Upper Driver Sink

IUGATEsr

PVCC to BOOTx

Note 1. Stresses listed as the above " Absolute Maximum Ratings " may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. ?JA is measured in natural convection at TA = 25°C on a high effective four-layers thermal conductivity test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of ?JC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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8

DS8809A/B-02 July 2011

RT8809A/B
Typical Operating Characteristics
Efficiency vs. Load Current

Efficiency vs. Load Current
100

100

90

90
80

Phase 2 Active

70

Efficiency (%)

Efficiency (%)

80

60
50
40
30
20

70
60
50
40
30
20

10

10

VIN = VCC = 12V, VOUT = 1.1V

0
0

5

10

15 20 25 30 35 40

VIN = VCC = 12V, VOUT = 1.1V

0
0.01

45 50 55 60

0.1

Load Current (A)

1

10

Load Current (A)

TON vs. Temperature

VREF vs. Temperature

360

2.04

355

2.03

350

2.02

VREF (V)

TON (ns)

345
340
335
330

2.01
2.00
1.99
1.98

325
320

VIN = VCC = 12V, No Load

315
-50

-25

0

25

50

75

100

125

1.97

VIN = VCC = 12V, No Load

1.96
-50

-25

0

25

50

75

Temperature (°C)

Power On from EN

35

RT8809A, VIN = VCC = 12V, IOUT = 50A

30

Inductor Current (A)

125

Temperature (°C)

Inductor Current vs. Output Current

100

VEN
(10V/Div)

25

Phase 1
Phase 2

20

VOUT
(1V/Div)

15
10

UGATE1
(50V/Div)

5

UGATE2
(50V/Div)

VIN = VCC = 12V

0
20

25

30

35

40

45

50

55

60

Time (1ms/Div)

Output Current (A)

DS8809A/B-02 July 2011

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9

RT8809A/B
Power On from EN

Power Off from EN

RT8809B, VIN = VCC = 12V, IOUT = 50A

VIN = VCC = 12V, IOUT = 50A

VEN
(10V/Div)

VEN
(10V/Div)

VOUT
(1V/Div)

VOUT
(1V/Div)

UGATE1
(50V/Div)

UGATE1
(50V/Div)

UGATE2
(50V/Div)

UGATE2
(50V/Div)
Time (1ms/Div)

Time (1ms/Div)

Power On from VCC

Power On from VCC

RT8809A, VIN = VCC = 12V, IOUT = 50A

RT8809B, VIN = VCC = 12V, IOUT = 50A

V CC
(10V/Div)

V CC
(10V/Div)

VOUT
(1V/Div)

VOUT
(1V/Div)

UGATE1
(50V/Div)

UGATE1
(50V/Div)

UGATE2
(50V/Div)

UGATE2
(50V/Div)
Time (1ms/Div)

Time (1ms/Div)

Power Off from VCC

Dynamic Output Voltage Control
RT8809A, VSET = 0.78V to 1.15V, IOUT = 40A

VIN = VCC = 12V, IOUT = 50A

V CC
(10V/Div)

VSET
(1V/Div)

VOUT
(1V/Div)

VOUT
(1V/Div)

UGATE1
(50V/Div)

UGATE1
(50V/Div)

UGATE2
(50V/Div)

UGATE2
(50V/Div)
Time (1ms/Div)

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10

Time (40us/Div)

DS8809A/B-02 July 2011

RT8809A/B
Dynamic Output Voltage Control

Dynamic Output Voltage Control

RT8809B, VSET = 0.78V to 1.15V, IOUT = 40A

RT8809A, VSET = 1.15V to 0.78V, IOUT = 40A

VSET
(1V/Div)

VSET
(1V/Div)

VOUT
(1V/Div)

VOUT
(1V/Div)

UGATE1
(50V/Div)

UGATE1
(50V/Div)

UGATE2
(50V/Div)

UGATE2
(50V/Div)
Time (200us/Div)

Time (40us/Div)

Dynamic Output Voltage Control

Load Transient Response
RT8809A, VIN = VCC = 12V, RLL = 1.5m?

RT8809B, VSET = 1.15V to 0.78V, IOUT = 40A

VSET
(1V/Div)

VOUT
(500mV/Div)

VOUT
(1V/Div)

IOUT
(50A/Div)

UGATE1
(50V/Div)

UGATE1
(50V/Div)

UGATE2
(50V/Div)

UGATE2
(50V/Div)
Time (200us/Div)

Time (10us/Div)

Load Transient Response

Load Transient Response

RT8809B, VIN = VCC = 12V

RT8809A, VIN = VCC = 12V, RLL = 1.5m?

VOUT
(500mV/Div)

VOUT
(500mV/Div)

IOUT
(50A/Div)

IOUT
(50A/Div)

UGATE1
(50V/Div)

UGATE1
(50V/Div)
UGATE2
(50V/Div)

UGATE2
(50V/Div)
Time (10us/Div)

DS8809A/B-02 July 2011

Time (10us/Div)

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11

RT8809A/B
OVP

Load Transient Response

VIN = VCC = 12V, IOUT = 25A

RT8809B, VIN = VCC = 12V

VOUT
(500mV/Div)

VOUT
(1V/Div)

IOUT
(50A/Div)

UGATE1
(20V/Div)

UGATE1
(50V/Div)
UGATE2
(50V/Div)

LGATE1
(10V/Div)
Time (10us/Div)

Time (20us/Div)

UVP

Short Circuit
VIN = VCC = 12V

VIN = VCC = 12V, IOUT = 50A

VOUT
(1V/Div)

VOUT
(1V/Div)

UGATE1
(20V/Div)

IL1
(20A/Div)

LGATE1
(10V/Div)

IL2
(20A/Div)
Time (10us/Div)

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12

Time (10ms/Div)

DS8809A/B-02 July 2011

RT8809A/B
Application Information
RT8809A/B is a dual-phase synchronous buck PWM
controller with integrated drivers which is optimized for highperformance graphic microprocessor and computer
applications. A COT (Constant-On-Time) PWM controller
and two 12V MOSFET drivers with internal bootstrap diodes
are integrated so that the external circuit is easily designed
and the component count is reduced.
RT8809A/B adopts G-NAVPTM (Green-Native Adaptive
Voltage Positioning), which is Richtek's proprietary
topology derived from finite DC gain compensator with
current mode control for RT8809A, the load line can be
easily programmed by setting the DC gain of the error
amplifier for RT8809B, the load line is fixed to zero.
RT8809A/B also adopts lossless DCR and RDS(ON) current
sensing. Voltage positioning (only for RT8809A), dynamic
phase control and current limit are accomplished through
continuous inductor DCR current sensing, while RDS(ON)
current sensing is used for accurate channel current
balance.
RT8809A/B supports dynamic mode transition function with
various operating states, which include dual-phase, single
phase, diode emulation and audio skipping modes. These
different operating states make the system efficiency as
high as possible.
RT8809A/B provides a one-bit VID control operation in which
the feedback voltage is regulated and tracks external input
reference voltage. It also features complete fault protection
functions including over voltage, under voltage and current
limit.
DEM/ASM Mode Selection
DEM (Diode Emulation Mode) and ASM (Audio Skipping
Mode) operation can be enabled by driving the tri-state
EN/MSEL pin to a logic high level. The RT8809A/B can
switch operation into DEM when EN/MSEL pin is pulled
up to above 4.2V. In DEM operation, RT8809A/B
automatically reduces the operation frequency at light load
conditions for saving power loss. If EN/MSEL is pulled
between 1.2V to 3V, the controller will switch operation
into ASM. In ASM operation, the minimum switching
frequency is limited to 30 kHz to avoid the acoustic noise.
Finally, if the pin is pulled to GND the RT8809A/B will
shutdown.
DS8809A/B-02 July 2011

Power On Reset
The POR (power on reset) circuit monitors the supply
voltage of the controller (VCC). When VCC exceeds the
POR rising threshold, the controller will be enable. During
soft-star period, the output voltage will first boot to around
1V, and then change to the set level when using RT8809A.
For RT8809B, output voltage will directly ramp to the set
level. If VCC falls below the POR falling threshold during
normal operation, all MOSFETs stop switching and the
controller resets. The POR rising and falling threshold has
a hysteresis to prevent noise mis-trigger.
Soft-Start
RT8809A/B provides soft-start function. The soft-start
function is used to prevent large inrush current while
converter is being powered-up. An internal current source
charges the internal soft-start capacitor such that the
internal soft-start voltage ramps up in a monotone to a
VBOOT voltage RT8809A or the set level (RT8809B). The
FB voltage will track the internal soft-start voltage during
soft-start interval. Therefore, the duty cycle of the UGATE
signal at power up as well as the input current limited.
During the soft-start period, the controller will be in dualphase operation by default to ensure enough charge during
start-up.
One-Bit VID and Dynamic Output Voltage Control
The output voltage is determined by the applied voltage on
the VSET pin. RT8809A/B generates a 2V reference voltage
from VREF to VRTN. As shown in Figure 1, connecting a
resistor divider from the VREF pin to the VSET pin can set
the output voltage according to below calculation :
VOUT = 2V × ? R2 ?
?
?
? R1 + R2 ?
RT8809A/B also features a one-bit VID control through an
internal N-MOSFET also shown in Figure 1. By connect a
resistor (R3) from RSET pin to VSET pin, the output voltage
can be switched between two levels by controlling the VID
pin. When the VID pin is logic high, the internal N-MOSFET
turns on to set the output voltage to a lower level. The
output voltage can be calculated as below :
? (R2//R3) ?
VOUT = 2V × ?
?
? R1 + (R2//R3) ?
www.richtek.com
13

RT8809A/B
One-Bit VID and Dynamic Output Voltage Control

C : Capacitance for on time compute (13.7pF)

In RT8809A, the dynamic VID slew rate is fixed to 10mV/
us. For RT8809B, it can be set lower than 10mV/us by
CVSET as shown in Figure 1. That is, assume the ?VOUT =
300mV, R1=11k?, R2 = R3 = 27k?, the desired slew
rate at falling is SRF = 10mV/us, and the CVSET can be
calculated by below formula.
?VOUT
C VSET =
= 1nF
5 × (R1 // R2 // R3 ) × SRF

VREF : Reference voltage for on time compute

And then, the rising slew rate SRR will be
SRR =

?VOUT
= 7.67mV/uS
5 × (R1 // R2 ) × C VSET

IL : Inductor current
RDS(ON)_L-MOS : RDS(ON) of Low Side MOSFET
RDS(ON)_H-MOS : RDS(ON) of High Side MOSFET
RDC : DCR of inductor
RLL : Load line resistance
The value of RTON can be selected using Figure 3 and the
value of RRMP must be set equal to RTON.

TON
VREF

CCRCOT
On-Time
Computer

REF Generator
(2V)

R1

RTON

CVSET

R3

GPIO

VIN

C1
RMPSET

VSET
R2

R1

RRMP
On-Time

RSET

Figure 2. On-Time Setting with RC Filter

VID

Frequency vs. RTON
700

Figure 1. Output Voltage Setting with One Bit VID
Control

Switching frequency is a trade-off between efficiency and
converter size. Higher operation frequency allows the use
of smaller components. This is common in ultra portable
devices where the load currents are lower and the controller
is powered from a lower voltage supply. On the other, lower
frequency operation offers higher overall efficiency at the
expense of component size and board space. Figure 2
shows the On-Time Setting Circuit. Connect a resistor
(RTON) from TON to VIN and a resistor (RRMP) from RMPSET
to GND to set the switching frequency according to below
formula :
VIN - VSET
×
RTON =
fS × C × VREF
VSET + IL × (RDS(ON)_L-MOS + RDC - RLL )
VIN + IL × (RDS(ON)_L-MOS - RDS(ON)_H-MOS )

Where
fS : Switching frequency
RTON : TON setting resistor
www.richtek.com
14

600

Frequency (kHz)1

Adjustable Switching Frequency

650
550
500
450
400
350
300
250
200
150
0

50

100

150

200

250

300

RTON (?)
?

Figure 3. Frequency vs. RTON
Current Sense Setting (with Temperature
Compensation)
The RT8809A/B uses continuous inductor current sensing
to make the controller less noise sensitive. Low offset
amplifiers are used for loop control and over current
detection. The CSP and CSN denote the positive and
negative input of the current sense amplifier of any phase.
Since the DCR of the inductor is temperature dependent,
it affects the down phase threshold, OCP threshold and
DS8809A/B-02 July 2011

RT8809A/B
output voltage accuracy, especially at heavy load.
Temperature compensation is recommended for the
lossless inductor DCR current sense method. Figure 4
shows a simple but effective way to compensate the unwanted temperature variations of the inductor DCR by using
an NTC thermistor.
VOUT

L2

PHASE2
RP

RS

CSP

CX can be obtained by below formula,

COUT

RNTC

?
RS
L× ? 2 +
?
REQU_25°C
?
CX =
RS × DCR25°C

RX

+
VX
-

CSN

DCR

where R EQU_TH is equal to R P + R NTC // R X at high
temperature and REQU_TL is equal to RP + RNTC // RX at low
temperature. Usually, RX is set to equal RNTC (25°C). RP
and RX are selected to linearize the NTC's temperature
characteristic. For a given NTC and RP, the design is to
first obtain RS and then CX. Usually, set RX = RNTC. To
solve (1), RS must first be obtained as below :

REQU_TH

-

The RT8809A/B adopts Richtek's proprietary G-NAVPTM
topology. G-NAVPTM is based on the finite-gain peak current
mode with CCRCOT (Constant Current Ripple Constant
On Time; CCRCOT) topology. For RT8809A, the output
voltage will decrease with increasing output load current.
For RT8809B, the output voltage is independent with output
load current. The control loop consists of PWM modulators
with power stages, current sense amplifiers and an error
amplifier as shown in Figure 5.
VIN
VOUT
UGATE1

CCRCOT
PWM
Driver
Logic

LGATE1
VIN
UGATE2
PHASE2

CMP

RT8809A

+
GM
-

RNTC, T°C = R25°C

DS8809A/B-02 July 2011

CX
CSN

+
GM
-

(3)

C3

C2

C1

R2

R1

VSEN

REQU_TL

? ?? 1 ? ? 1 ? ? ?
? -?
?? ?
? ? ??
× e? ?? T + 273 ? ? 278 ? ? ?

DCR

CSP

COMP

The standard formula for the resistance of the NTC
thermistor as a function of temperature is given by :

L2
RX

VCS

(2)

Where ? is equal to DCRTH/DCRTL

COUT

RX

LGATE2

RT8809B

?

L1 DCR

PHASE1

FB

+
-

1

(5)

Loop Control

The RT8809A/B observes the voltage VX, across the CSP
and CSN pins for inductor current information. To design
VX without regard to the temperature coefficient, refer to
below formula :
RS
2+
REQU_TH
DCRTH
(1)
=
RS
DCRTL
2+
REQU_TL

2(? -1)

?
?
?
?

CX

Figure 4. Inductor DCR Sensing

RS =

(4)

where the 0.00393 is the temperature coefficient of copper.

-

RS

DCRT°C = DCR25°C x [1 + 0.00393 x ( T - 25) ]

DCR

+

PHASE1

To calculate DCR value at different temperatures, can use
the equation below :

COMP2

L1

where R25°C is the thermistor's nominal resistance at room
temperature, ? (beta) is the thermistor's material constant
in Kelvins, and T is the thermistor's actual temperature in
Celsius.

VREF

VRTN

VRTN

Figure 5. Simplified Schematic for Droop and Remote
Sense in CCM

www.richtek.com
15

RT8809A/B
Similar to the peak current mode control with finite
compensator gain, the HS_FET on-time is determined by
the CCRCOT ON-Time generator. When the load current
increases, VCS increases, the steady state COMP voltage
also increases and VOUT decreases, achieving Active
Voltage Positioning (AVP). RT8809A/B internally cancels
the inherent output offset of the finite gain peak current
mode controller.

to determine the resistive feedback components of the
error amplifier gain, C1 and C2 must be calculated for the
compensation. The target is to achieve the constant
resistive output impedance over the widest possible
frequency range. The pole frequency, fP, of the compensator
must be set to compensate the output capacitor ESR
zero :
1
fP =
(8)
2? × RC × C

Droop Setting

where C is the capacitance of the output capacitor, and
RC is the ESR of output capacitor. C2 can be calculated
as follows :

Due to the native droop characteristics, the Active Voltage
Positioning (AVP) can be conveniently achieved by
properly setting the error amplifier gain. The target is to
have
VOUT = VREF - ILOAD x RLL

(6)

Then solving the switching condition VCOMP2 = VCS in
Figure 5 yields the desired error amplifier gain as
5 × DCR
R2 = 2
AV =
R1
RLL

(7)

where RLL is the equivalent load line resistance as well as
the desired static output impedance. For a given R1, the
design is to get R2 according to (7). And the R2 should
be greater than 1.4k?.
VOUT

AV2 & gt; AV1

C2 =

RC × C
R2

The zero of compensator has to be placed at half of the
switching frequency to filter the switching related noise,
such that,
1
(10)
C1 =
R1× ? × fS
Dynamic Phase Number Control
The RT8809A/B controls the operation phase number
according to the total current. Figure 7 shows the dynamic
phase number control circuit. By connecting a resistor
(RPS) from the PS pin to GND, the phase transition
threshold can be set. The formula is :

RPS =
AV2
AV1
0

Load Current

Figure 6. Error Amplifier Gain (AV) Influence on VOUT
Accuracy
Note that the droop function is not available for the
RT8809B

Loop Compensation
Optimized compensation of the RT8809A/B allows for best
possible load step response of the regulator's output. A
type-I compensator with a single pole and single zero is
adequate for a proper compensation. Figure 5 shows the
compensation circuit. Prior design procedure shows how
www.richtek.com
16

(9)

DCR × ISUM × 5
1u

where ISUM is the sum of the inductor valley current. For
example, if DCR is 0.74m?, and the desired up phase
threshold is 15A, the value of RPS will be
-3
RPS = 0.74 × 10 × 15 × 5 = 55.5k?
1× 10-6

Once the total inductor valley current is higher than the
threshold, the controller will transit to dual-phase operation.
when the total current becomes lower than the setting
threshold minus around 5A hysteresis, the active phase
number will return to single phase. If the PS pin is set
floating, the controller will force to dual-phase operation.

DS8809A/B-02 July 2011

RT8809A/B
Over Voltage Protection
PS
L1
L2

+

CMP

-

RPS

DCR

Active
Phase
Number

DCR

RX
RX

VPS

CX

COUT
CSN
CSP

VCX

gm
+

The RT8809A/B monitors the output voltage via the CSN
pin for Over Voltage Protection (OVP). Once the output
voltage exceeds the OVP threshold, OVP is triggered.
The RT8809A/B will try to turn on low side MOSFETs and
turn off high side MOSFETs to protect the load until the
OVP situation is removed. A 4us delay is used in the
OVP detection circuit to prevent false trigger.
Under Voltage Protection

Figure 7. Dynamic Phase Number Control Circuit
Current Balance
The RT8809A/B implements internal current balance
mechanism in the current loop. The RT8809A/B senses
per phase current signal and compares it with the average
current. If the sensed current of any particular phase is
higher than average current, the on-time of this phase will
be adjusted to be shorter.
Current Limit Setting
The RT8809A/B includes a built-in builds-in current limit
protection function. Figure 8 shows the protection circuit.
The current limit threshold is programmable by an external
resistor, ROC, at the OCP pin. The value of ROC can be
set according to the following formula :
DCR × ISUM × 6
ROC =
8u
where ISUM is the desired current limit threshold. Once
the sensed total current exceeds the current limit
threshold, the driver will be forced to turn off UGATE until
the OCP situation is removed.

The voltage on CSN pin is also monitored for under voltage
protection. If the output voltage is lower than the UVP
threshold, UVP will be triggered. The RT8809A/B will then
turn off both high side and low side MOSFETs. When
UVP is triggered, The RT8809A/B will enter hiccup mode
and continuously try to restart until the UVP situation is
cleared.
Inductor Selection
The switching frequency and ripple current determine the
inductor value as follows :
L(MIN) =

VIN - VOUT
× TON
IRIPPLE(MAX)

where TON is the UGATE turn on period.
Higher inductance results in achieves lower ripple current
and hence in higher efficiency but with a slower load
transient response as a, trade off. Thus, a need for more
output capacitors may be required, driving the cost up.
Find a low loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. The core
must be large enough not to be saturated at the peak
inductor current.
Output Capacitor Selection

OCP
L1
L2

DCR

-

CMP
OCP

+

ROC

DCR

RX
RX

VOC

CX

COUT
CSN
CSP

gm
+

VCX

Figure 8. Over Current Protection Circuit
DS8809A/B-02 July 2011

Output capacitors are used to maintain high performance
for the output beyond the bandwidth of the converter itself.
Two different kinds of output capacitors can be found, bulk
capacitors closely located to the inductors and ceramic
output capacitors in close proximity to the load. Latter
ones are for mid frequency decoupling with especially
small ESR and ESL values while the bulk capacitors have
to provide enough stored energy to overcome the lowfrequency bandwidth gap between the regulator and the
GPU.
www.richtek.com
17

RT8809A/B
Thermal Considerations

Layout Considerations

For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :

Careful PC board layout is critical to achieving low
switching losses and clean, stable operation. The
switching power stage requires particular attention. If
possible, mount all of the power components on the top
side of the board with their ground terminals flushed
against one another. Follow these guidelines for optimum
PC board layout :

PD(MAX) = (TJ(MAX) - TA) / ?JA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and ?JA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of the
RT8809A/B, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, ?JA, is layout dependent. For WQFN24L 4x4 package, the thermal resistance, ?JA, is 52°C/W
on a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C - 25°C) / (52°C/W) = 1.923W for
WQFN-24L 4x4 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, ?JA. For the RT8809A/B package, the derating
curve in Figure 9 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
Maximum Power Dissipation (W)
1

2.0

Keep the high current paths short, especially at the
ground terminals.
Keep the power traces and load connections short. This
is essential for high efficiency.
When trade-offs in trace lengths must be made, it's
preferable to allow the inductor charging path to be made
longer than the discharging path.
Place the current sense components close to the
controller. CSP and CSN connections for current limit
and voltage positioning must be made using Kelvin sense
connections to guarantee the current sense accuracy.
The PCB trace from the sense nodes should be
paralleled back to the controller.
Route high speed switching nodes away from sensitive
analog areas (COMP, FB, CSP, CSN, etc...)

Four-Layer PCB

1.6

1.2

0.8

0.4

0.0
0

25

50

75

100

125

Ambient Temperature (°C)

Figure 9. Derating Curves for the RT8809A/B Package

www.richtek.com
18

DS8809A/B-02 July 2011

RT8809A/B
Outline Dimension
D2

D

SEE DETAIL A
L
1

E

E2

1

e

b

1

2

2

DETAIL A
Pin #1 ID and Tie Bar Mark Options

A
A3
A1

Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters

Dimensions In Inches

Symbol
Min

Max

Min

Max

A

0.700

0.800

0.028

0.031

A1

0.000

0.050

0.000

0.002

A3

0.175

0.250

0.007

0.010

b

0.180

0.300

0.007

0.012

D

3.950

4.050

0.156

0.159

D2

2.300

2.750

0.091

0.108

E

3.950

4.050

0.156

0.159

E2

2.300

2.750

0.091

0.108

e
L

0.500
0.350

0.020
0.450

0.014

0.018

W-Type 24L QFN 4x4 Package

Richtek Technology Corporation

Richtek Technology Corporation

Headquarter

Taipei Office (Marketing)

5F, No. 20, Taiyuen Street, Chupei City

5F, No. 95, Minchiuan Road, Hsintien City

Hsinchu, Taiwan, R.O.C.

Taipei County, Taiwan, R.O.C.

Tel: (8863)5526789 Fax: (8863)5526611

Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com

Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.

DS8809A/B-02 July 2011

www.richtek.com
19


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