ACER_ASPIRE_ONE_AOD_257_ZE6_REV_1B.pdf

ACER D257 - Jak podłączyć HDD LED do netbooka?

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1

2

3

4

5

6

7

8

01

ZE6 Block Diagram
A

A

667 MT/s

DDRIII-SODIMM
P3

Pineview

CPU
P4,5,6,7

Graphics Interfaces

DDR SYSTEM MEMORY

CK505
INT_LVDS

P2

10.1 " Panel
Up to 1280*800 or 1366*768

P14

CRT

CRT

DMI

P14

N570 1.66G: AJSLBXEVT05
N475 1.83G: AJSLBX5UT08
N455 1.66G: AJSLBX9VT05

DMI(x2)

Charger

B

SATA - HDD

PCIE-4

SATA

P19

USB-5

SIM Card

3G/WiMAX
P20

PCI-Express(Port1~4)

PCIE-2

Tigerpoint

PCIE-1

P8,9,10,11,12,13

USB-2

VCC_CORE

LAN
RTL8105TA
P18

RTC

PN : AJSLGXX0T14

P15

BATTERY

USB-7

WLAN

RTS5209-GR
P21

Intel High Definition Audio

+1.5V
Discharge
VCCGFX

IHDA
LPC

P20

P31

Card Reader

P11

P20

C

+1.05V

PCIE-3

USB-5

3G

P29

+1.5VSUS
+SMDDR_VREF
+0.75V_DDR_VTT
+1.5V
P30

USB-6

Bluetooth module

P28

PCI-E

SB

P14

C

WLAN/WiMAX
P20

USB

P17

CCD

USB-7

USB 2.0 (Port0~7)

USB-0,1,3

USB port*3

P20

USB-4

B

+3VPCU
+5VPCU
+3V_S5
+5V_S5
+3VSUS
+3V
+5V

DMI

SATA 0

P27

P32

LPC

Audio Codec Realtek ALC271X

EC

NPCE791L
P22

P16

D

D

Int. SPK
CONN

Int. AMIC
CONN

MIC
Jack

Combo
Jack

Touch Pad /B
Con.

K/B Con.
P15

SPI Flash

P15

P22

Charger
P24

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

Block Diagram
1

2

3

4

5

6

7

1

Sheet
8

of

35

5

4

3

2

1

CLK GEN (CLK)

02
VDD_CLK_3.3V

+3V

+1.5V

VDD_CLK_1.5V
R212
1

2.2/J_6
2

+3V

L22
PBY160808T-301Y-N/2A/300ohm_6

L20
C191

PBY160808T-301Y-N/2A/300ohm_6
D

.1U/10V_4

Place close to L8

C188

.1U/10V_4

PM_STPPCI#_R

4.7U/10V/8

.1U/10V_4

R163

10K/J_4

& lt; 20100819_FAE Poyueh & gt; Add 2.2ohm resistor for noise suppress

D

C163

.1U/10V_4

C195

PM_STPCPU#

5

VDD_CORE_1.5

VDD_PCI_3.3

VDD_CORE_1.5

45

VDD_48M_3.3

30
VDD_CLKIO_1.05V

C145

C162
.1U/10V_4

.1U/10V_4

CG_XOUT
CG_XIN
C154
33P/50V_4

2

CL=20p
1

CLK_BSEL1_FSB R217

7
8

1K_4

& lt; Layout note & gt;
Crystal place within 500mil of CK505

33/J_4

R191

FSB
USB_48M

15

USB48_1/FSB

10K_4

FSC

[10] PCLK_ICH
[22] LCLK_EC
[20] PCLK_DEBUG

R205
R204
R219

22/J_4
22/J_4
33/J_4

17

CLK_MCH_BCLK [4]
CLK_MCH_BCLK# [4]

To CPU (Host CLK)

CLK_PCIE_LANP
CLK_PCIE_LANN

41
40

PE4CLK+ [20]
PE4CLK- [20]

38
37

PE2CLK+ [20]
PE2CLK- [20]

34
33

CLK_PCIE_DMIP
CLK_PCIE_DMIN

32
31

CLK_CARDREADER [21]
CLK_CARDREADER#
[21]

28
27

SRC_6
SRC_6#

6

REF/FSC

[18]
[18]

To LAN (LAN)

10

33M_SEL

11

25MHz/PCI_2/SEL_33MHz
VSS_PCI
VSS_48M
VSS_LCD
VSS_SATA
VSS_SRC
VSS_CPU
VSS_REF

1 = Pin 43/44 as CPU_ITP
ITP_EN

0 = Pin 43/44 as SRC_1

pin 10 has internal pull down resistor.

To CPU (PLL CLK)

*10K/J_4 33M_SEL

20
21

DREFSSCLK [4]
DREFSSCLK# [4]

To CPU (DPLSS CLK)

100 MHz

26
25

CLK_PCIE_SATA [9]
CLK_PCIE_SATA# [9]

To SB (SATA CLK)

100 MHz

SATA
SATA#
CLKREQ_A#
CLKREQ_B#
CLKREQ_C#
CKPWRGD/PD#

47
46
29

CLKREQ_LAN#_R
CLKREQ_MPC#_R
CLKREQ_MNC#_R

R141
R142
R201

475/F_4
475/F_4
475/F_4

Control SRC_1

CLKREQ_LAN# [18]
CLKREQ_WLAN# [20]
CLKREQ_CARD# [21]

55

VR_PWRGD_CK410

Control SRC_3
[11]

Control SRC_5

Register B5b6 for CLKREQ_A#
0 = SRC1, 1=SRC2
Register B5b4 for CLKREQ_B#
0 = SRC3, 1=SRC4
Register B5b3 for CLKREQ_C#
0 = SRC5, 1=SRC6

Clock Gen I2C

0_4

3

5

4

R186
2.2K_4
SMBDT1

1

1

3

R147

10K_4

SMBDT1 [3,20]

2N7002K
Q15

+3V

A

CLK_BSEL1_FSB
2N7002K
Q9

VR_PWRGD_CK410

VR_PWRGD_CK410

[11]

C182

Quanta Computer Inc.

.1U/10V_4

PROJECT : ZE6

CLK_BSEL2_FSC
Document Number

Date:

*0_4

SMBCK1 [3,20]

+3V

*10K_4

Size
R189

SMBCK1

1

2

*1K_4
0_4

R203
2.2K_4

2
3
2N7002K
Q16

[11,20] PDAT_SMB

*0_4

R188

B

+3V

& lt; 20100819 & gt; Add 475 ohm for current leakage

*1K_4

R187

+1.05V
[4] CPU_BSEL2

R215
R214

+1.05V

1 = Pin 11 as 33MHz
0= Pin 11 as 25MHz

*10P/50V_4

96 MHz

[23,26] VR_PWRGD_CK410#

4.7K/J_4

R197

C172

100 MHz

Thermal Pad

R216

R208

*10P/50V_4

33M_SEL

To SB (DMI CLK)

VR PWRGD

[4] CPU_BSEL1
+3V

C176

100 MHz

LCD_CLK
LCD_CLK#

no connect FSA to CPU, due to there is no FSA PIN for CPU.
need to check check how to handle it in CPU CLK_BESEL0

0221 : follow vendor's suggestion, change from 10K to 4.7K

*10P/50V_4

FSC

To Card Reader

R146

A

*10P/50V_4

C189

2

10K/J_4

C192

FSB

100 MHz

[11,20] PCLK_SMB

*10K/J_4

*10P/50V_4

100 MHz

DREFCLK [4]
DREFCLK# [4]

SLG8LV631V

R207

C190

ITP_EN

To Mini Card 1 (WLAN)
To CPU (DMI CLK)

[4]
[4]

18
19

PCIF/ITP_EN

FSC FSB Frequency
0
0
133MHz
0
1
166MHz
1
1
200MHz
1
0
100MHz

C

USB_48M

CLK_PCIE_ICH [8]
CLK_PCIE_ICH# [8]
DREFCLK
DREFCLK#

& lt; EMI & gt;

100 MHz

To Mini Card 2 (3G/Wimax) 100 MHz

DOT96/SRC7
DOT96#/SRC7#

57

R206

20K/F_4

166 MHz

44
43

USB48_2

ITP_EN

B

+3V

10K/J_4

R374

166 MHz

50
49

SRC_5
SRC_5#

12
16
22
24
39
51
56

Follow Silegro schematic

To SB

SRC_4
SRC_4#

SDA
SCL

33/J_4

CLK_BSEL2_FSC R190

[8] CLKUSB_48
[11] 14M_ICH

10K/J_4

R148

CFG input hardware strapping to allocate PLL assignment.
LOW = Both CPU and SRC clock drive from PLL3
HIGH = CPU clock drive from PLL1, SRC clock drive from PLL3.
Contains 100k pull-down resistor.

To CPU (Core CLK)

SRC_2
SRC_2#

XTAL_OUT
XTAL_IN

CG_XOUT
R218

PM_STPPCI# [11]
PM_STPCPU# [11]
CLK_CPU_BCLK [4]
CLK_CPU_BCLK# [4]

SRC_1/CPU_ITP
SRC_1/CPU_ITP#

14.318MHZ
C152
33P/50V_4

*0/J_4
*0/short_J_4

SRC_3
SRC_3#

3
4

SMBDT1
SMBCK1

[3,20] SMBDT1
[3,20] SMBCK1

Y2

R164
R157

CPU_1
CPU_1#
NC
NC
NC
NC

0.1uF near every power pin

CG_XIN

PM_STPPCI#_R
PM_STPCPU#_R

53
52

VDD_CPU_IO_1.05

1
2
13
54

C171

.1U/10V_4

36
42

CPU_0
CPU_0#

VDD_SRC_IO_1.05

48

C

PCI_STOP#
CPU_STOP#

VDD_SRC_IO_1.05

35

0_6
L21
PBY160808T-301Y-N/2A/300ohm_6

4.7U/10V/8

R202

USB_48M

1/19 : 439549_439549_CorbettPark_Schm_Rev0.5: If this pin is
used as PCI_STOP#, it is required to provide a 10-k pull-up to
Vcc3_3. It is not recommended to connect this signal to the
Tiger Point(NM10) as it may cause unexpected system behavior.

23

14

+1.05V

VDD_REF_3.3

9
VDD_IO can be ranging
from 1.05V to 3.3V.

C178

10K/J_4

CLKREQ_MNC#_R

U9

0.1uF near every power pin

Place close to L18

10K/J_4

R149

Place close to L13
0.1uF near every power pin

4.7U/10V/8

R209

R153

CLKREQ_MPC#_R

CLKREQ_LAN#_R

C185

C157

.1U/10V_4

C146

Friday, March 11, 2011

& lt; 20090721(B2A) & gt;
Change Q3,Q5,Q6 from BAM700200F6 to BAM70020002 (with ESD protection function)
3

Rev
1C

CLOCK GENERATOR
2

Sheet
1

2

of

35

4

3

2

M_A_DQ[63:0]

JDIM1A
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

R130
R129

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_A_DQS0
M_A_DQS1
M_A_DQS3
M_A_DQS2
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#3
M_A_DQS#2
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DIMM0_SA0
DIMM0_SA1
SMBCK1
SMBDT1

[2,20] SMBCK1
[2,20] SMBDT1

C

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

M_A_DM0
M_A_DM1
M_A_DM3
M_A_DM2
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_BS0
M_A_BS1
M_A_BS2
M_CS#0
M_CS#1
M_CLK0
M_CLK0#
M_CLK1
M_CLK1#
M_CKE0
M_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

116
120

D

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

[5] M_ODT0
[5] M_ODT1
[5] M_A_DM[7:0]

[5] M_A_DQS[7:0]

[5] M_A_DQS#[7:0]

B

PC2100 DDR3 SDRAM SO-DIMM
(204P)

[5] M_A_A[14:0]

[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
10K_4
10K_4

1

+1.5VSUS

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ7
M_A_DQ6
M_A_DQ3
M_A_DQ2
M_A_DQ0
M_A_DQ5
M_A_DQ1
M_A_DQ4
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ24
M_A_DQ25
M_A_DQ27
M_A_DQ26
M_A_DQ29
M_A_DQ28
M_A_DQ30
M_A_DQ31
M_A_DQ18
M_A_DQ23
M_A_DQ22
M_A_DQ19
M_A_DQ21
M_A_DQ17
M_A_DQ16
M_A_DQ20
M_A_DQ33
M_A_DQ32
M_A_DQ35
M_A_DQ34
M_A_DQ37
M_A_DQ36
M_A_DQ38
M_A_DQ39
M_A_DQ44
M_A_DQ45
M_A_DQ42
M_A_DQ46
M_A_DQ40
M_A_DQ41
M_A_DQ47
M_A_DQ43
M_A_DQ48
M_A_DQ49
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ61
M_A_DQ56
M_A_DQ63
M_A_DQ58
M_A_DQ57
M_A_DQ60
M_A_DQ59
M_A_DQ62

[5]

2.48A

199

+3V

R119

+3V

JDIM1B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

*10K_4

77
122
125

+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

R116
1K/F_4
*0_6
R117
1K/F_4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

GND
GND

D

C

+0.75V_DDR_VTT

205
206

DDR3-DIMM0_H=4_RVS

+1.5VSUS

R115

NC1
NC2
NCTEST

198
30

[4] PM_EXTTS#0
[5] DDR3_DRAMRST#

+SMDDR_VREF

VDDSPD

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

PC2100 DDR3 SDRAM SO-DIMM
(204P)

5

DDR_STD(DDR)

+SMDDR_VREF_DIMM
+SMDDR_VREF_DIMM

C109
470p/50V_4

B

+1.5VSUS

DDR3-DIMM0_H=4_RVS

R138
1K/F_4

Place these Caps near So-Dimm0.
R140

+SMDDR_VREF

+SMDDR_VREF_DQ0

*0_6

+1.5VSUS
+SMDDR_VREF_DIMM
C112
4.7U/6.3V_6

C126
4.7U/6.3V_6

C124
4.7U/6.3V_6

C114
0.1u/10V_4

+ C108
C110
220u/2V_7343
0.1u/10V_4

4.7U/6.3V_6

A

C125
4.7U/6.3V_6

+3V

C113
0.1u/10V_4

R139
1K/F_4

C127
0.1u/10V_4

C115

C116
4.7U/6.3V_6

+SMDDR_VREF_DQ0

C111
0.1u/10V_4

C107

C132
0.1u/10V_4

C131
2.2u/6.3V_6

2.2u/6.3V_6

C128
0.1u/10V_4

A

+0.75V_DDR_VTT

C118
C129
2.2u/6.3V_6

C123
0.1u/10V_4

C117

C122

C119

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1A

DDRIII SO-DIMM-0
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

3

of

35

5

4

3

2

1

04

PINEVIEW_M

U21C

& lt; Layout note & gt;
Place within 750mil from CPU

L11

CRT_R
CRT_G
CRT_B

N31
P30
P29
N30

15/F_4
15/F_4

CRT_HSYNC
CRT_VSYNC

DAC_IREF
DPL_REFCLKINP
DPL_REFCLKINN
DPL_REFSSCLKINP
DPL_REFSSCLKINN

L31
L30

[14]
[14]

& lt; Layout note & gt;
Close to pin within 250mil

CRT_R [14]
CRT_G [14]
CRT_B [14]

CRT_R

CRT_G

R94
150/F_4

CRT_DDC_DATA
CRT_DDC_CLK

CRT_B

R95
150/F_4

R92
150/F_4

P28 VGA_IREF R96
Close pin & lt; 500mil
Y30
Y29
AA30
AA31

R90

665/F_4

& lt; Layout note & gt;
Close to pin within 500mil
DREFCLK [2]
DREFCLK# [2]
DREFSSCLK [2]
DREFSSCLK# [2]

[14] INT_LVDS_PWM
+3V

HPL_CLKINN
HPL_CLKINP

R79

K29
J30
L5
AA3

2.37K/F_4

LIBG R22
J28
N22
N23
LBKLT_EN
L27
L26
*2.2K/J_4 LCTLA_CLK L23
*2.2K/J_4 LCTLB_DATAK25
K23
K24
H26

CLK_MCH_BCLK# [2]
CLK_MCH_BCLK [2]

U5
3 OF 6
IMVP_PWRGD

2

LBKLT_EN

T33
T41
T36
T37

1

TC7SH08FU
4

INT_LVDS_BLON

100K_4

R99

DMI

G2
G1
H3
J2

DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1

G5
D14
D13
B14
C14
C16

H_THERMDA
H_THERMDC

[8]
[8]
[8]
[8]

D30
E30

H_PWRGD

H10
J10
K5
H5
K6

CLK_CPU_BCLK# [2]
CLK_CPU_BCLK [2]
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

CPU_BSEL1 [2]
CPU_BSEL2 [2]

H30
H29
H28
G30
G29
F29
E29

VID0
VID1
VID2
VID3
VID4
VID5
VID6

L7
D20
H13
D18

RSVD
RSVD
RSVD
RSVD

THRMDA_1
THRMDC_1

H_PROCHOT# [26]
H_PWRGD [11]

L6
E17

VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6

RSVD
TDI
TDO
TCK
TMS
TRST_B

& lt; 20090511(A1A)_Checklist Rev0.7 & gt;
PROCHOT_B:68ohm±5% pull-up to Vcc1_05
(VCCP) at both CPU side and Intel MVP

+1.05V

H27

BSEL_0
BSEL_1
BSEL_2

[14]

68_4

A13 H_GTLREF

BCLKN
BCLKP

BPM_2_0#/RSVD
BPM_2_1#/RSVD
BPM_2_2#/RSVD
BPM_2_3#/RSVD

*0_4

REV = 1.1

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1

B18
B20
C20
B21

T9
XDP_TDI
T35
XDP_TCK
XDP_TMS
XDP_TRST#

PINEVIEW_M

U21A

BPM_1B_0
BPM_1B_1
BPM_1B_2
BPM_1B_3

0.1u/10V_4

5

C82

DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1

R295

C18
W1

RSVD
RSVD

G11
E15
G13
F13

ICH_DPRSTP# [11,26]
H_DPSLP# [11]
H_INIT# [9]

E13 H_THRMTRIP#

THERMTRIP_B

GTLREF

+3V

R93

F3
F2
H4
G3

D

& lt; 20090610(A1A)_Sighting Report Rev002_Number:3359187 & gt;
Avoid a glitch during system power up
T8
T39
T13
T10

H_SMI# [9]
H_A20M# [9]
H_FERR# [9]
H_INTR [9]
H_NMI [9]
H_IGNNE# [9]
H_STPCLK# [9]

G6
G10
G8
T30
E11
F15 H_PREQ#

DPRSTP_B
DPSLP_B
INIT_B
PRDY_B
PREQ_B

VSS

W8
W9

Pineview-M 1.66G

[8] DMI_TXP0
[8] DMI_TXN0
[8] DMI_TXP1
[8] DMI_TXN1

LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LBKLT_EN
LBKLT_CTL
LCTLA_CLK
LCTLB_CLK
LDDC_CLK
LDDC_DATA
LVDD_EN

E7
H7
H6
F10
F11
E5
F8

SMI_B
A20M_B
FERR_B
LINT00
LINT10
IGNNE_B
STPCLK_B

PM_DPRSLPVR [11,26]
PM_EXTTS#0 [3]
IMVP_PWRGD [11,23,26]
PLTRST# [11,18,20,21,22,23]

LCD Panel Backlight

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

LVD_A_CLKM
LVD_A_CLKP
LVD_A_DATAM_0
LVD_A_DATAP_0
LVD_A_DATAM_1
LVD_A_DATAP_1
LVD_A_DATAM_2
LVD_A_DATAP_2

PROCHOT_B
CPUPWRGOOD

*0/short_4

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

AA21
W21
T21
V21

R89
R88

REV = 1.1

U25
U26
R23
R24
N26
N27
R26
R27

INT_TXLCLKN
INT_TXLCLKP
INT_TXLOUTN0
INT_TXLOUTP0
INT_TXLOUTN1
INT_TXLOUTP1
INT_TXLOUTN2
INT_TXLOUTP2

[14] LVDS_CLK
[14] LVDS_DATA
[14] INT_LVDS_DIGON

MISC

AA7
AA6
R5
R6

[14]
[14]
[14]
[14]
[14]
[14]
[14]
[14]

CRT_SDA [14]
CRT_SCL [14]

RSVD

PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
PWROK
RSTINB

C

R81
R80

ICH

CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN

M30 VGA_HSYNC_R
M29 VGA_VSYNC_R

LVDS

VGA

CRT_HSYNC
CRT_VSYNC

CPU

REV = 1.1

XDP_RSVD_00
XDP_RSVD_01
XDP_RSVD_02
XDP_RSVD_03
XDP_RSVD_04
XDP_RSVD_05
XDP_RSVD_06
XDP_RSVD_07
XDP_RSVD_08
XDP_RSVD_09
XDP_RSVD_10
XDP_RSVD_11
XDP_RSVD_12
XDP_RSVD_13
XDP_RSVD_14
XDP_RSVD_15
XDP_RSVD_16
XDP_RSVD_17

PINEVIEW_M

U21D

3

R292
D

D12
A7
D6
C5
C7
T34
C6
D8
B7
A9
1K/F_4 D9
C8
T29
B8
C10
D10
B11
B10
B12
T40
C11

[26]
[26]
[26]
[26]
[26]
[26]
[26]

C

CLK GEN no FSA pin for CPU_BSEL0,
so just pull high to fix it.

K9
D19
K7 H_EXBGREF

RSVD_TP
RSVD_TP
EXTBGREF

+1.05V
& lt; Layout note & gt;
Place within 500mil from CPU pin

EXP_CLKINN
EXP_CLKINP

R10
R9
N10
N9

EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS

RSVD
RSVD
RSVD
RSVD

RSVD_TP
RSVD_TP

L10
L9
L8

EXP_COMP

R91

49.9/F_4

EXP_RBIAS

R310

C30
D31

RSVD_C30
RSVD_D31

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

4 OF 6

RSVD_K2
RSVD_J1
RSVD_M4
RSVD_L3

RSVD_K3
RSVD_L2
RSVD_M2
RSVD_N2

1 OF 6

& lt; Layout note & gt;
Place within 500mil from CPU pin

XDP PU

+1.05V

XDP_TMS

R63

& lt; Layout note & gt;
Place within 500mil from CPU pin and 5mil spacing

& lt; Layout note & gt;
Place within 500mil from CPU pin

R62

51/J_4

H_PREQ#

R294

51/J_4

XDP_TCK

R293
R61

+3V

2.2K/J_4 LVDS_CLK
2.2K/J_4 LVDS_DATA

& lt; EMI & gt;

51/J_4

XDP_TRST#

R74
R69

+3V

+1.05V

51/J_4

XDP_TDI

K3
L2
M2
N2

B

51/J_4

Max 500mil

Near CPU pin

R51
976/F_4

R280
1K/F_4

1D: No Stuff C8007 (CRB v1.0)
C52

H_EXBGREF
PM_EXTTS#0 R77

10K_4

*220P/50V_4

R55
3.32K/F_4

CPU Thermal monitor(THM)

C36
1U/6.3V_4

R281
2K/F_4

C251
1U/6.3V_4

125 Degree Protection(CPU)

+3V

R76

R52

10K_4

*10K_4

R75

*0/short_4

C54

0.1u/10V_4

Q2
2N7002K

IMVP_PWRGD

2
& lt; 20090721(B2A) & gt;
Change Q7 from BAM700200F6
to BAM70020002 (with ESD
protection function)

U4
H_THERMDA

C121
*220p/50V_6

+3V

R126
R133

7

[22] 2ND_MBDATA
[11,22] THERM_ALERT#

+5V

+3V

R59

*0_4

THERM_ALERT#_R
FAN_ON#

+3V
10K_4

2
1

Q8
MMBT3904
3

FAN_PWM_CN

3

FAN_PWM_E

FAN_SIG

[22]

ALERT#:pull up at SB side

+5V
CN16

10K_4

DXP

ALERT#

DXN

OVERT#

GND

2

C40

3

2200p/50V_4

5

H_THERMDC

SMSC ADDRESS: 98H

+1.05V

& lt; Layout Note & gt;
Routing 10:10 mils and
away from noise source
with ground gard

R47
1K_4
R60
CPU

56_4

Q1
1
3
MMBT3904

H_THRMTRIP#

SMSC : AL001412003

R67

4 6
3 5
2
1
FAN

SYS_SHDN#

[25,26,30]

PM_THRMTRIP#

[9]

Quanta Computer Inc.

1

PROJECT : ZE6
Size

Document Number

Date:

[22] CPUFAN#

*0_4

Tigerpoint

Q6
MMBT3904

2

CPUFAN#

VCC

SDA

IC CTRL(8P) EMC1412-1-ACZL-TR
FAN_SIG
10K_4
R128

10K_4 FAN_PWM_B

4

SCLK

10K_4

R137

A

FAN_ON# R124

6

1

1

8

[22] 2ND_MBCLK

2

C130
*220p/50V_6

C257
*220P/50V_4

+1.05V
+3V

8/11 B-test : for EMI

FAN_SIG

H_GTLREF

*220P/50V_4

XDP_BPM#5 : Length & lt; 200mil

CPU FAN CTRL(THM)

Friday, March 11, 2011

Rev
1B

Pineview DMI/Display
5

4

3

B

C61

Pineview-M 1.66G

FAN_PWM_CN

470/J_4
470/J_4
470/J_4

Pineview-M 1.66G

N11
P11

+1.05V

K2
J1
M4
L3

R65
R66
R64

750/F_4

& lt; Layout note & gt;
PLACE TCK/TDI/TMS TERMINATION NEAR CPU

3

[2] CLK_PCIE_DMIN
[2] CLK_PCIE_DMIP

N7
N6

2

Sheet
1

4

of

35

A

5

4

3

2

1

05

PINEVIEW_M

U21B
[3] M_A_A[14..0]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_WE#
M_A_CAS#
M_A_RAS#

C

M_CLK0
M_CLK0#
M_CLK1
M_CLK1#

M_CLK0
M_CLK0#
M_CLK1
M_CLK1#

1

[22,23,27] HWPG_1.5V

5

[22,23,27,29] SUSON

R121

DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3
DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3

3

DDRAM_PWROK

DDRAM_PWROK

C294
& lt; Layout note & gt;
Close to pin
+1.5VSUS

R348
R349
C295

0.1U/10V_4

DDR_VREF
80.6/F_4 SM_RCOMP
80.6/F_4 SM_RCOMP#
0.01U/25V_4

AB4
AK8

DDR_VREF
DDR_RPD
DDR_RPU

AK29

RSVD

+1.5VSUS

R352

+SMDDR_VREF

R351
1K/F_4

*0_4

& lt; EMI & gt;

DDR_VREF

R353
1K/F_4

A

C297

C296
0.1u/16V_6

*1000p/50V_4
2 OF 6
DG 2.1 : It is strongly recommended that the SODIMM VREF motherboard traces, going from
their VREF resistor dividers to their specified SODIMM VREF pins, be ground referenced
on the motherboard where ever possible to help minimize risks of any possible noise
being coupled onto VREF. If they can't be referenced to ground we recommend placing
a site for a 0603 capacitor near the VREF divider. These 0603 capacitor sites must be
connected on one end to the non ground reference plane the VREF trace is referenced
to and the other end must be connected to ground.

M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31

AG22
AG21
AD19

M_A_DQS4
M_A_DQS#4
M_A_DM4

AE19
AG19
AF22
AD22
AG17
AF19
AE21
AD21

M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39

AE26
AG27
AJ27

M_A_DQS5
M_A_DQS#5
M_A_DM5

AE24
AG25
AD25
AD24
AC22
AG24
AD27
AE27

M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47

AE30
AF29
AF30

M_A_DQS6
M_A_DQS#6
M_A_DM6

AG31
AG30
AD30
AD29
AJ30
AJ29
AE29
AD28

M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55

AB27
AA27
AB26

M_A_DQS7
M_A_DQS#7
M_A_DM7

DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

AA24
AB25
W24
W22
AB24
AB23
AA23
W27

M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DM_6

DDR_A

& lt; Layout note & gt;
Close to DDR_VREF pin

AH1
AJ2
AK6
AJ7
AF3
AH2
AL5
AJ6

DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47

RSVD_TP
RSVD_TP

AL28
AK28
AJ26

M_A_DQS3
M_A_DQS#3
M_A_DM3

DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DM_5

VSS
RSVD

AB11
AB13

AK5
AK3
AJ3

DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39

RSVD_AD17
RSVD_AC17
RSVD_AB15
RSVD_AB17

*10K_4
[3] DDR3_DRAMRST#

M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23

DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DM_4

R350

B

AG8
AG7
AF10
AG11
AF7
AF8
AD11
AE10

DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31

R120
10K_4

M_A_DQS2
M_A_DQS#2
M_A_DM2

DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DM_3

DDR_A_CK_3
DDR_A_CKB_3
DDR_A_CK_4
DDR_A_CKB_4

AD17
AC17
AB15
AB17

+1.5VSUS

12.1K/F_4

AD8
AD10
AE8

DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23

DDR_A_CSB_0
DDR_A_CSB_1
DDR_A_CSB_2
DDR_A_CSB_3

2
U7
TC7SH08FU

M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15

DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DM_2

DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2

DDR_A_CK_0
DDR_A_CKB_0
DDR_A_CK_1
DDR_A_CKB_1

4

M_A_DQS1
M_A_DQS#1
M_A_DM1

AB6
AB7
AE5
AG5
AA5
AB5
AB9
AD6

DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7

+3V_S5

DDR3 PWROK

AB8
AD7
AA9

DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15

AG15
AF15
AD13
AC13

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7

DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DM_0

DDR_A_WEB
DDR_A_CASB
DDR_A_RASB

AC15
AD15
AF13
AG13

[3]
[3]
[3]
[3]

M_A_DQS0
M_A_DQS#0
M_A_DM0

AC4
AC1
AF4
AG2
AB2
AB3
AE2
AE3

DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DM_1

DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14

AD3
AD2
AD4

DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_7

[3] M_ODT0
[3] M_ODT1

AK24
AH26
AH24
AK27

M_A_DQ[63..0] [3]

DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55

[3] M_CKE0
[3] M_CKE1

AH10
AH9
AK10
AJ8

M_ODT0
M_ODT1

[3] M_CS#0
[3] M_CS#1

AH22
AK25
AJ21
AJ25

M_CKE0
M_CKE1

[3] M_A_BS0
[3] M_A_BS1
[3] M_A_BS2

AJ20
AH20
AK11

M_CS#0
M_CS#1

[3] M_A_WE#
[3] M_A_CAS#
[3] M_A_RAS#

AK22
AJ22
AK21

M_A_BS0
M_A_BS1
M_A_BS2

D

AH19
AJ18
AK18
AK16
AJ14
AH14
AK14
AJ12
AH13
AK12
AK20
AH12
AJ11
AJ24
AJ10

REV = 1.1

M_A_DM[7..0] [3]
M_A_DQS[7..0] [3]
M_A_DQS#[7..0] [3]
D

C

B

A

Quanta Computer Inc.

Pineview-M 1.66G

PROJECT : ZE6
Size

4

Rev
1B

Pineview DDR
Date:

5

Document Number

3

2

Friday, March 11, 2011

Sheet
1

5

of

35

2

3

4

VCCGFX

C85

1U/6.3V_4

C72

3.5A

1U/6.3V_4

C88

1U/6.3V_4

C78

1U/6.3V_4

C86

1U/6.3V_4

+1.5VSUS
R111

C101

VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX

1.38A

*0/short_8

2.2U/6.3V_6

C100

1U/6.3V_4

C99

1U/6.3V_4

C96

1U/6.3V_4

C103

1U/6.3V_4

AK13
AK19
AK9
AL11
AL16
AL21
AL25

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

& lt; Layout note & gt;
Close to pin

+1.5VSUS

R112

VCC1.5_VCCCK_DDR

*0/short_6

AK7
AL7

C102
C106
22U/6.3V_8

1U/6.3V_4

U10
U5
U6
U7
U8
U9
V2
V3
V4
W10
W11

+1.05V

C278

22u/6.3V_8

C81

4.7U/6.3V_6

C76

1U/6.3V_4
AA10
AA11

VCCCK_DDR
VCCCK_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

POWER

2.27A
DDR

B

REV = 1.1

T13
T14
T16
T18
T19
V13
V19
W14
W16
W18
W19

1U/6.3V_4

C77

A

VCCSENSE
VSSSENSE
VCCA

VCCACK_DDR
VCCACK_DDR

AA19

V11
AC31
C91
C93

1U/6.3V_4
1U/6.3V_4

C69

1U/6.3V_4

C58

1U/6.3V_4

C39

1U/6.3V_4

C57

1U/6.3V_4

C32

22u/6.3V_8

C34

22u/6.3V_8

C33

22u/6.3V_8

A

B

VCC1.5_VCCA
C280
0.01U/25V_4

R322

VCC_SENSE [26]
VSS_SENSE [26]

*0/short_6
+1.5V
& lt; Layout note & gt;
Close to pin

D4
C255
B4
B3

VCCP_VCCP

R57
100/F_4

+1.05V

& lt; 20090526(A1A)_EDS Rev0.7 & gt;
D4 pin is VCCP, not VCC
*0/short_4
+1.05V

*0.1u/10V_4
R291

C

VCCD_AB_DPL

VCCD_HMPLL
VCCSFR_AB_DPL

0.06A
VCC1.8_LCCALVD

0.154A

R98
VCC1.8_VCCACRTDAC

T30

VCCALVD
VCCDLVD

R100

V30
W31

0.1uH/300mA_6

+1.8V
C92
1u/6.3V_4

C87
22U/6.3V_8

VCCACRTDAC

+3V

0.2A/600ohm_6
C79
1u/6.3V_4

C323
*22U/6.3V_8
+1.05V
+1.05V

C75

1U/6.3V_4

C253
C254

1U/6.3V_4
1U/6.3V_4

+1.05V
D

0.006A
T31
J31
C3
B2
C2
A21

0.33A

0.48A
DMI

+1.8V

06

*0.1u/10V_4

LVDS

*0.1u/10V_4

C29
B29
Y2

0.08A

VCCP
VCCP

C94

A23
A25
A27
B23
B24
B25
B26
B27
C24
C26
D23
D24
D26
D28
E22
E24
E27
F21
F22
F25
G19
G21
G24
H17
H19
H22
H24
J17
J19
J21
J22
K15
K17
K21
L14
L16
L19
L21
N14
N16
N19
N21

R56
100/F_4

VCC

C80

+1.8V

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCORE

EXP\CRT\PLL

& lt; Layout note & gt;
VCCA_DDR and VCCACK_DDR rails can be
on the same source but make sure the
plane shapes are split near Pineview-M
to avoid noise coupling

8

1.32A

& lt; Layout note & gt;
Close to pin AA19

C

7

PINEVIEW_M

1U/6.3V_4

C74

6

VCORE

U21E

2.2U/6.3V_6

CPU

C84

5

GFX/MCH

1

VCC_GIO
VCCRING_EAST
VCCRING_WEST
VCCRING_WEST
VCCRING_WEST
VCC_LGI_VID

VCCA_DMI
VCCA_DMI
VCCA_DMI

0.104A

RSVD
VCCSFR_DMIHMPLL
VCCP

C256
*1u/6.3V_4

T1
T2
T3

VCCP_DMI
C273
1U/6.3V_4
C272
1U/6.3V_4

R315

VCCP_VCCAPLL_DMI
P2
R326
AA1VCC1.8_DMIHMPLL
E2

+1.05V

*0/short_6
+1.05V

R313
*0/short_4
+1.8V

*0_4

+1.05V

C267
*1u/6.3V_4

C284
1u/6.3V_4

D

5 OF 6
Pineview-M 1.66G

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1B

Pineview Power
Date:
1

2

3

4

5

6

Friday, March 11, 2011
7

Sheet

6

of
8

35

1

U21F

A

REV = 1.1
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
6 OF 6
GND

A11
A16
A19
A29
A3
A30
A4
AA13
AA14
AA16
AA18
AA2
AA22
AA25
AA26
AA29
AA8
AB19
AB21
AB28
AB29
AB30
AC10
AC11
AC19
AC2
AC21
AC28
AC30
AD26
AD5
AE1
AE11
AE13
AE15
AE17
AE22
AE31
AF11
AF17
AF21
AF24
AF28
AG10
AG3
AH18
AH23
AH28
AH4
AH6
AH8
AJ1
AJ16
AJ31
AK1
AK2
AK23
AK30
AK31
AL13
AL19
AL2
AL23
AL29
AL3
AL30
AL9
B13
B16
B19
B22
B30
B31
B5
B9
C1
C12
C21
C22
C25
C31
D22
E1
E10
E19
E21
E25
E8
F17
F19

07

PINEVIEW_M

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

F24
F28
F4
G15
G17
G22
G27
G31
H11
H15
H2
H21
H25
H8
J11
J13
J15
J4
K11
K13
K19
K26
K27
K28
K30
K4
K8
L1
L13
L18
L22
L24
L25
L29
M28
M3
N1
N13
N18
N24
N25
N28
N4
N5
N8
P13
P14
P16
P18
P19
P21
P3
P4
R25
R7
R8
T11
U22
U23
U24
U27
V14
V16
V18
V28
V29
W13
W2
W23
W25
W26
W28
W30
W4
W5
W6
W7
Y28
Y3
Y4

A

T29

Pineview-M 1.66G

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1B

Pineview GND
Date:
1

Friday, March 11, 2011

Sheet

7

of

35

1

LAN
WLAN

3G

PE1RXPE1RX+
PE1TXPE1TX+
PE2RXPE2RX+
PE2TXPE2TX+
PE3RXPE3RX+
PE3TXPE3TX+
PE4RXPE4RX+
PE4TXPE4TX+

C65
C59

0.1U/10V_4 DMI_TXN1_C
0.1U/10V_4 DMI_TXP1_C

C259
C262

0.1U/10V_4 PCIE_TXN1_C
0.1U/10V_4 PCIE_TXP1_C

C263
C266

0.1U/10V_4 PCIE_TXN2_C
0.1U/10V_4 PCIE_TXP2_C

C270
C268

0.1U/10V_4 PCIE_TXN3_C
0.1U/10V_4 PCIE_TXP3_C

C271
C274

PCIE_TXN4_C
*3G@0.1U/10V_4
*3G@0.1U/10V_4
PCIE_TXP4_C

R23
R24
P21
P20
T21
T20
T24
T25
T19
T18
U23
U24
V21
V20
V24
V23

K21
K22
J23
J24
M18
M19
K24
K25
L23
L24
L22
M21
P17
P18
N25
N24

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USB

0.1U/10V_4 DMI_TXN0_C
0.1U/10V_4 DMI_TXP0_C

PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4

PCI-E

Card Reader
A

[18]
[18]
[18]
[18]
[20]
[20]
[20]
[20]
[21]
[21]
[21]
[21]
[20]
[20]
[20]
[20]

C53
C46

DMI

[4] DMI_RXN0
[4] DMI_RXP0
[4] DMI_TXN0
[4] DMI_TXP0
[4] DMI_RXN1
[4] DMI_RXP1
[4] DMI_TXN1
[4] DMI_TXP1

0110 : exchange USB port 1 and port 3
to fix charger port will auto wake up issue.

TGP

U20B

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

USBRBIAS
USBRBIAS#

R78

24.9/F_4 DMI_COMP H24
J22
[2] CLK_PCIE_ICH#
[2] CLK_PCIE_ICH

W23
W24

D4
C5
D3
D2
E5
E6
C2
C3

G2
G3

USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBOC#R_1
USBOC#L_1
USBOC#
USBOC#R_1
USBOC#
USBOC#
USBOC#
USBOC#

SYSTEM (Right down)
SYSTEM (Right up)
CCD
SYSTEM (Left)
SIM
3G
BT
WLAN

*0/short_4
*0/short_4

USBOC#R_1

USBOC#R [17,22]
USBOC#L [17,22]

R305

8.2K_4

USBOC#L_1

R298

8.2K_4

USBOC#

R303
R297

USBRBIAS R314

[17]
[17]
[17]
[17]
[14]
[14]
[17]
[17]
[20]
[20]
[20]
[20]
[15]
[15]
[20]
[20]

R306

1K/F_4

+3V_S5

22.6/F_4

A

placed within 500 mil of the chipset

CLK48

+1.5V

H7
H6
H3
H2
J2
J3
K6
K5
K1
K2
L2
L3
M6
M5
N1
N2

DMI_ZCOMP
DMI_IRCOMP

F4 CLKUSB_48

CLKUSB_48

[2]

CLKUSB_48

DMI_CLKN
DMI_CLKP
2

R309
*10/F_4

Tiger Point
C258
*10P/50V_4

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1B

Tiger Point DMI/PCIE/USB
Date:
1

Friday, March 11, 2011

Sheet

8

of

35

5

4

3

2

1

09
U20C

AC17
AB13
AC13
AB15
Y14

C

RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23

AB16
AE24
AE23

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AE6
AD6
AC7
AD7
AE8
AD8
AD9
AC9

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

[19]
[19]
[19]
[19]

D

SATA HDD
& lt; 20090514(A1A)_Checklist Rev0.7 & gt;
SERIRQ:8.2K pull-up
A20GATE:10K pull-up

R107
R108
R338
R339

SERIRQ
GA20
KBRST#
PCH_GPIO36

SATA_CLKN
SATA_CLKP

AD4
AC4

SATARBIAS#
SATARBIAS
SATALED#

AD11
AC11
AD25

R335

SATARBIAS#

10K/J_4

+3V

8.2K_4
10K_4
10K/J_4
*10K/J_4

& lt; Layout note & gt;
Close to pin within 200mil

C

24.9/F_4

SATALED#
R340

RSVD27
RSVD28

& lt; Layout note & gt;
Close to pin within 500mil

CLK_PCIE_SATA# [2]
CLK_PCIE_SATA [2]

RSVD24
RSVD25
RSVD26

AA14
V14

SATA

R12
AE20
AD17
AC15
AD18
Y12
AA10
AA12
Y10
AD15
W10
V12
AE21
AE18
AD19
U12

D

TGP

SATALED# [15]
+3V

B

AD16
AB11
AB10
AD23

PCH_GPIO36

RSVD29
RSVD30
RSVD31
GPIO36

HOST

+1.05V

A20GATE
A20M#
CPUSLP#
IGNNE#
INIT3_3V#
INIT#
INTR
FERR#
NMI
RCIN#
SERIRQ
SMI#
STPCLK#
THERMTRIP#

U16 GA20
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17
AC21 KBRST#
AA16
AA21
V18
AA20

& lt; Layout note & gt;
Close to pin

GA20 [22]
H_A20M# [4]
H_IGNNE#

R84
56/J_4

[4]

+1.05V

H_INIT# [4]
H_INTR [4]
H_FERR#
H_NMI [4]
KBRST# [22]
SERIRQ [22]
H_SMI# [4]
H_STPCLK# [4]

& lt; Layout note & gt;
Close to pin within 1 "

[4]

B

R103
56/J_4

PM_THRMTRIP# [4]

3

Tiger Point

A

NOTE：
1. CPUSLP# is supported only on nettop platforms.

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1B

Tiger Point Sata/Host
Date:
5

4

3

Friday, March 11, 2011
2

Sheet

9

of
1

35

A

5

4

3

U20A

A5
PCI_DEVSEL# B15
J12
T27
A23
PCI_IRDY#
B7
C22
PCI_SERR#
B11
PCI_STOP#
F14
PCI_LOCK#
A8
PCI_TRDY#
A10
PCI_PERR#
D10
PCI_FRAME# A16

[2] PCLK_ICH

D

& lt; 20090601(A1A)_Checklist Rev0.7 & gt;
Strap1#/strap2#: signals have weak
internal pull-ups

PAR
DEVSEL#
PCICLK
PCIRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#

T26
T31

EC_SCI#

[22] EC_SCI#

G16
A20

+3V
B

PCI

REQ1#
REQ2#

PCH_GPIO48 G14
PCH_GPIO17
A2
PCH_GPIO22 C15
C9

PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
PCI_INTE#
PCI_INTF#
PCI_INTG#
PCI_INTH#

B2
D7
B3
H10
E8
D6
H8
F8

PCH_A16WP
10K/J_4
8.2K/J_4

T38
R271
R73

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

GNT1#
GNT2#

PCI_REQ1#
PCI_REQ2#

C

A18
E16

D11
K9
M13

2

GPIO48/ STRAP1#
GPIO17/ STRAP2#
GPIO22
GPIO1

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1

PCI_INTA#
PCI_INTC#
PCI_INTF#
PCI_INTB#

RP4

1
3
5
7

2 8.2K_8P4R
4
6
8

PCI_IRDY#
PCI_LOCK#
PCI_PERR#
PCI_TRDY#

RP3

1
3
5
7

2 8.2K_8P4R
4
6
8

1
3
5
7

2 8.2K_8P4R
4
6
8

PCI_DEVSEL#RP5
PCI_FRAME#
PCI_REQ1#
PCI_REQ2#

*1K_4
*1K_4

R71
R299

8.2K_4

PCH_GPIO22

+3V

2 8.2K_8P4R
4
6
8

+3V

+3V

Description

IRQ

PIRQA

USB UHCI Controller #2
Internal LAN; Option for SCI, TCO, HPET#0,1,2
Option for SCI, TCO, HPET#0,1,2
Option for SCI, TCO, HPET#0,1,2

PIRQH

Boot BIOS Location

USB UH Controller #3; SATA/IDE Native Mode

PIRQE

H16
M15
C13
L16

AC'97 Codec; option for SMBUS

PIRQC

PIRQF

STRAP0#
RSVD01
RSVD02

PIRQB

PIRQD

C/BE0#
C/BE1#
C/BE2#
C/BE3#

USB UHCI Controller #1, #4

USB EHCI Controller; Option for SCI, TCO, HPET#0,1,2

SPI
PCI
LPC (Default)
*1K_4
*1K_4

R72
R300

PCI_GNT#2

B

Internal PU
Should not be PD

+3V

Quanta Computer Inc.

A16 SWAP Override strap

PROJECT : ZE6

Low = A16 swap override enabled
High = Default

Size

4

Document Number

Rev
1B

TigerPoint PCI(3/6)
Date:

5

D

+3V

R284

A

PCH_A16WP
(INT PU)

+3V

PIRQG

PCH_GPIO48
(INT PU)

PCH_GPIO48
PCH_GPIO17

10

+3V

C

Tiger Point

1
0
1

8.2K/J_4
8.2K/J_4
10K_4

RP1
1
3
5
7

PCI_INTD#
PCI_INTH#
PCI_INTG#
PCI_INTE#

ICH Boot BIOS select

0
1
1

R272
R283
R54

PCI_STOP#
PCI_SERR#
EC_SCI#

1

PCH_GPIO17
(INT PU)

1

TGP

3

Friday, March 11, 2011
2

Sheet

10

of
1

35

A

5

4

3

2

1

& lt; 20090515(A1A)_Checklist Rev0.7 & gt;
BATLOW#:8.2K pull-up to V3ALWAYS
WAKE#:10K pull-up to VccSus3_3
SYS_RST#:10K pull-up to VccSus3_3

EMI
14M_ICH

LPCAD0
LPCAD1
LPCAD2
LPCAD3

AA5
V6
AA6
Y5
W8
Y8
Y4

T17

[20,22] LPCFRAME#

C285
*10P/50V_4

[16] ACZ_BITCLK_AUDIO
[16] ACZ_RESET#_AUDIO
[16] ACZ_SDIN0

R324
R323

[16] ACZ_SDOUT_AUDIO
[16] ACZ_SYNC_AUDIO
[2] 14M_ICH

debug port for google require

33/J_4
33/J_4

33/J_4
33/J_4

ACZ_BITCLK_R
ACZ_RST#_R

P6
U2
W2
V2
P8
ACZ_SDOUT_R AA1
ACZ_SYNC_R
Y1
14M_ICH
AA3

3

4

R2
T1
M8
P9
R4

SMBALERT#/GPIO11
SMBCLK
SMBDATA
SMLALERT#
SMLINK0
SMLINK1
SPI_MISO
SPI_MOSI
SPI_CS#
SPI_CLK
SPI_ARB

SPI

2

1

T43
T46
T14
T15
T45

RTCX1
RTCX2
RTCRST#

SMB

SMBALERT#
E20
PCLK_SMB
H18
PDAT_SMB
E23
SMB_LINK_ALERT# H21
SMLINK0
F25
SMLINK1
F24

[2,20] PCLK_SMB
[2,20] PDAT_SMB

C

RTC_X1 W4
RTC_X2 V5
RTCRST#
T5

RTC

15P/50V_4

LAN_CLK
LANR_STSYNC
LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

CPUPWRGD/GPIO49

LAN

C275

EE_CS
EE_DIN
EE_DOUT
EE_SHCLK

EPROM

U3
AE2
T6
& lt; 20090529(A1A)_Checklist Rev0.7 & gt;
V3
If integrated LAN is not used
LAN_RST# tie it to GND.
T4
P7
B23
C279
15P/50V_4
AA2
AD1
AC2
R320
W3
32.768KHz,+-20PPM
T7
10M/J_4
Y3
U4

HDA_BIT_CLK
HDA_RST#
HDA_SDI0
HDA_SDIN1
HDA_SDIN2
HDA_SDOUT
HDA_SYNC
CLK14

BM_BUSY#/GPIO0
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
DPRSLPVR
STP_PCI#
STP_CPU#
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
CLKRUN#
GPIO33
GPIO34
GPIO38
GPIO39

AUDIO

R321
R316

LDRQ1#/GPIO23
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LFRAME#

LPC

[20,22]
[20,22]
[20,22]
[20,22]

MISC

T18
R327
*33/J_4

D

TGP

U20D

THRM#
VRMPWRGD
MCH_SYNC#
PWRBTN#
RI#
SUS_STAT#/LPCPD#
SUSCLK
SYS_RESET#
PLTRSTB
WAKE#
INTRUDER#
PWROK
RSMRST#
INTVRMEN
SPKR
SLP_S3#
SLP_S4#
SLP_S5#
BATLOW#
DPRSTP#
DPSLP#
RSVD31

+3V_S5

T15 BM_BUSY#
W16 PCH_GPIO6
W14 PCH_GPIO7
K18 EC_SMI#
H19 PCH_GPIO9
M17 PCH_GPIO10
A24 PCH_GPIO12
C23 PCH_GPIO13
P5 PCH_GPIO14
E24 PCH_GPIO15
AB20
Y16
AB19
R3 PCH_GPIO24
C24 DMI_AC_ENABLE
D19 PCH_GPIO26
D20 PCH_GPIO27
F22 PCH_GPIO28
AC19 CLKRUN#
U14 PCH_GPIO33
AC1 MBID0
AC23 MBID1
AC24 MBID2

T20
T19
EC_SMI# [22]

PCLK_SMB
PDAT_SMB
PCH_GPIO10
PM_BATLOW#
THERM_ALERT#
DNBSWON#
PCH_GPIO9

AB22

10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
8.2K_4
10K_4
10K/J_4
10K/J_4
10K/J_4

R337
R106
R333

1K/F_4
8.2K_4
8.2K_4

DMI_AC_ENABLE

R290

1K_4

TPT_PWROK

R336

10K_4

EC_RSMRST#

T28
T32
T11
CLKRUN# [22]
T16

R286
R274
R285
R278
R296
R304
R308
R301
R279
R289
R287
R317

MCH_SYNC#
CLKRUN#
BM_BUSY#

1C: Intel suggestion enable AC mode

2.2K_4
2.2K_4
8.2K_4
8.2K_4
8.2K_4
*10K_4
8.2K_4

EC_SMI#
SYS_RST#
SMBALERT#
SMB_LINK_ALERT#
PCIE_WAKE#
SMLINK1
SMLINK0
PCH_GPIO15
ICH_RI#
PCH_GPIO12
PCH_GPIO13
PCH_GPIO14

PM_DPRSLPVR [4,26]
PM_STPPCI# [2]
PM_STPCPU# [2]
T44

R273
R288
R277
R282
R104
R276
R275

R334

10K_4

THERM_ALERT# [4,22]
VR_PWRGD_CK410 [2]

H20
E25
F21

SUSB# [22]
SUSC# [22]
T12

B25 PM_BATLOW#
AB23
AA18
F20

ICH_DPRSTP# [4,26]
H_DPSLP# [4]

DNBSWON# [22,23]
T42
SUSCLK [22]
VCCRTC
PCIE_WAKE# [18,20]
R347

1M/F_6

EC_RSMRST# [22,23]
R331

SB_BEEP [16]

+3V

R329
10K_4

PLT_RST#
1u/10V_6

PLTRST# [4,18,20,21,22,23]

1

B

*TC7SH08FU
4

2

[22,23] HWPG

*TC7SH08FU
4

2

TPT_PWROK

TPT_PWROK [23]

1

[4,23,26] IMVP_PWRGD

R330
*10K_4

3

CH500H-40

5

U6
U17
C293

R332
10K_4

*0.1u/10V_4

5

VCCRTC

D33

C98

R342
*10K_4

R328
*10K_4

+3V

+3V
C252 *0.1u/10V_4

R343
*10K_4

MBID2
MBID1
MBID0

TPT Power OK

Platform Reset

+3VPCU

C

332K/F_4

& lt; 20090721(B2A) & gt;
Stuff U19 and C275 and un-stuff R205 for power sequence

RTC(RTC)

D

+3V

H_PWRGD [4]

AB17
V16
AC18 MCH_SYNC#
E21 DNBSWON#
H23 ICH_RI#
G22
D22 SUSCLK
G18 SYS_RST#
G23 PLT_RST#
C25 PCIE_WAKE#
SM_INTRUDER#
T8
U10 TPT_PWROK
AC3 EC_RSMRST#
AD3 ICH_INTVRMEN
J16

Tiger Point

B

11

R344

R307

3

D32
VCCRTC_3

RTCRST#

100K_4

1

20K/F_6
C288

G1

2

CH500H-40

*SHORT_PAD

R135
R302

1u/10V_6
R354
1K_4

R110

[22,23] ECPWROK

20MIL
3

VCCRTC_1

R160

2K/F_4

VCCRTC_2

R165

2K/F_4

ACZ_SDOUT
(INT PD)

2

1
Q10
MMBT3904

*0_4

+5V_S5

20MIL

VCCRTC_4

0_4

*0/short_4

R161

ACZ_SYNC
(INT PD)

INTVRMEN
Description

1
1

68.1K/F_4
0
CN5
RTC SOCKET

R162

0

1

A

0

0

* 4 x 1s

Enable internal VccSus1_5 VRM
(default)
Disable

A

Reserved

150K/F_4
1

1

2

0

1

Reserved

Quanta Computer Inc.

1 x 4s(1 port/4 lanes)

PROJECT : ZE6
Size

1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
4

3

2

Rev
1A

TigerPoint GPIO
Date:

5

Document Number
Friday, March 11, 2011

Sheet
1

11

of

35

1

& lt; Layout note & gt;
Place 0402 caps close to ball
Place 0603/0805 caps close to ICH
D30 1
VCC5_VCC5REF
C37
1u/10V_4

2 1SS355

R270

100/F_4

D31 1

TGP

RVCC5_VCC5REF_SUS
C264
0.1u/10V_4

U20E

6mA
10mA

VCC5REF

VCC5REF_SUS

45mA

VCCSATAPLL

6uA

VCCRTC

24mA

VCCDMIPLL

10mA

VCCUSBPLL

14mA

VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4

2 1SS355

R312

10/F_4

+3V
+5V
+3V_S5
+5V_S5

F12
VCC1.5_SATAPLL
C83
0.1u/10V_4

F5

C291
C290

Y6

R109

0.1U/10V_4
0.01U/25V_4

AE3

*0/short_6

+1.5V

C97
4.7U/10V/8
VCCRTC

VCC1.5_VCCDMIPLL
C281
0.01U/25V_4

Y25

L26

*0/short_6

+1.5V

F6
C283
*4.7u/6.3V_6

W18

VCCP_VCC1_05

AA8
M9
M20
N22

VCC1.5_VCC1.5

R341

*0/short_6

R319

C66
C67
C60
C89
C289

*0/short_6

0.1U/10V_4
0.1U/10V_4
1U/6.3V_4
1U/6.3V_4
4.7U/10V/8

+1.5V

POWER

1.422A

V_CPU_IO

12

0.955A
A

0.216A

0.092A

VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4

VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6

VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4

J10
K17
P15
V10

H25
AD13
F10
G10
R10
T9

F18
N4
K7
F1

VCCP_VCC1_05
C71
C68
C277

VCC3_VCC3
C90
C48
C70
C73
C47

1U/6.3V_4
1U/6.3V_4
4.7U/10V/8

+1.05V
A

R105

*0/short_6

+3V

RVCC3_VCCSUS3
R311
C261
1U/6.3V_4
C51
1U/6.3V_4
C260
0.1U/10V_4

*0/short_6

+3V_S5

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
0.1U/10V_4
0.1U/10V_4

5

Tiger Point

Quanta Computer Inc.
PROJECT : ZE6
Size
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

Rev
1B

TigerPoint Power
Date:

1

Document Number
Friday, March 11, 2011

Sheet

12

of

35

1

13
U1LB

U20F

TGP

VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

A

VSS57
VSS58
VSS59

RSVD32

A1
A25
B6
B10
B16
B20
B24
E18
F16
G4
G8
H1
H4
H5
K4
K8
K11
K19
K20
L4
M7
M11
N3
N12
N13
N14
N23
P11
P13
P19
R14
R22
T2
T22
V1
V7
V8
V19
V22
V25
W12
W22
Y2
Y24
AB4
AB6
AB7
AB8
AC8
AD2
AD10
AD20
AD24
AE1
AE10
AE25

A

G24
AE13
F2

AE16

Tiger Point

Quanta Computer Inc.
PROJECT : ZE6
Size
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

Rev
1B

TigerPoint GND
Date:

1

Document Number
Friday, March 11, 2011

Sheet

13

of

35

5

& lt; 20090724(B2A) & gt;
Change R5 from CS41002JB20 to
CS44702JB15 (Follow vendor's
suggestion and reduce power)

4

3

HALL SENSOR(HSR)

R102

+3VPCU

2

LED Panel POWER SWITCH(LDS)

100K_4

1

CAMERA POWER(CCD)
+3V
CCD_POWER

0.15A

Irush=1.5A
D6
1

2

LID#

1

+3V

CCD_POWER

*0/short_8

2
C242

*VPORT_6
LCDVCC_1
MR1
PT3661-BB

LCDVCC
R257

BAS316

C239

C233

*0.1u/10V_4

LID# [22]

0.1u/10V_4

33p/50V_4

D

1000p/50V_4

C236

C230
D5

4.7U/10V/8

C245

*0/short_8
1

R101
10K_4

2

0.1u/25V_6

3

C95

D

R260

+

PT3661-BB: AL003661003 ; pull-up: 470K ohm

*0.1u/10V_4

C232
10u/10V_8

LED Panel(LDS)

+3V

VIN

R269

*0/short_8 V_BLIGHT
C248
4.7U/25V_8

3

DISPON
R83
10K_4
& lt; 20090721(B2A) & gt;
Change Q13,Q14 from BAM700200F6 to
BAM70020002 (with ESD protection function)

3

2N7002K

+5V

0_8

reserve for IVO panel
C235

[4] INT_LVDS_DIGON

1

IN

OUT
GND
GND

5

[4] INT_LVDS_PWM
[22] CONTRAST

100K_4

R259

2

EC_FPBACK#

C324
*0.1U/50V_6

LCDVCC
+3V
CCD_POWER

2

ON/OFF

C325
*4.7U/25V_8

1

IN

3

[4]

R82

3

6
4

1

INT_LVDS_BLON

2N7002K

LCDVCC_1

U16

1u/10V_6
2
Q3

C

1

R385

BL#

2
Q5

IC(5P) G5243AT11U

R48
R43
C25

CCD_POWER

*0/J_4
DISPON
LCD_VADJ
INT_TXLOUTN2_L
INT_TXLOUTP2_L

100K_4

[22]

LCDVCC
LCDVCC

USBP2-_CCD
USBP2+_CCD

*0/short_J_4

*3300P/50V_4

Q4
DTC144EU

INT_TXLOUTN1_L
INT_TXLOUTP1_L
R33

*0/short_4

C250

0.1u/10V_4

F1

R35
R39

16

R41

L14

[4] CRT_B
R85

R86
150/F_4

R87

CRT_G1

PBY160808T-220Y-N

CRT_B1

R34

C62

C63

C64

C56

C50

C55

*10p/50V_4

150/F_4

*10p/50V_4

*10p/50V_4

10p/50V_4

10p/50V_4

CRT_11

12

DDCDAT_1

13

*0/short_4
*0/short_4

R40

*0/short_4

31
32

31
32

LCD CONN

CRTHSYNC

T7

14

DDCCLK_1

B

CRTVSYNC

15

INT_TXLOUTN1_L
INT_TXLOUTP1_L

[4] INT_TXLOUTN1
[4] INT_TXLOUTP1

10p/50V_4
CRT CONN

INT_TXLOUTN2_L
INT_TXLOUTP2_L

[4] INT_TXLOUTN2
[4] INT_TXLOUTP2

+3V
C38

C

*0/short_4

LCDVCC

11

17

150/F_4

CRT_R1

PBY160808T-220Y-N

L15

[4] CRT_G

PBY160808T-220Y-N

L16

[4] CRT_R

6
1
7
2
8
3
9
4
10
5

LVDS_CLK
LVDS_DATA
R384
*0_8

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

*0/short_4

CN10

SMD1206P110TFT

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

*0/short_4

R38

CRTVDD5

2

INT_TXLCLKN_L
INT_TXLCLKP_L
[4] LVDS_CLK
[4] LVDS_DATA

*0/short_4

R37

1

+5V

INT_TXLOUTN0_L
INT_TXLOUTP0_L
INT_TXLOUTN0_L
INT_TXLOUTP0_L

[4] INT_TXLOUTN0
[4] INT_TXLOUTP0

01/15 Modify

CRT(CRT)

B

C247
0.1U/50V_6
CN1

+3V

U3
CRTVDD5

1

CRT_BYP

7
8

0.1u/10V_4
C43

0.22u/25V_6

2

+3V

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1

16
14

CRT_VSYNC1
CRT_HSYNC1

15
13

R45
R44

22_4
22_4

CRT_VSYNC
CRT_HSYNC

VSYNC_R
HSYNC_R

L10
L9

BLM18BA220SN1D_22_6
BLM18BA220SN1D_22_6

CRTVSYNC
CRTHSYNC

CRTVDD5

[4]
[4]

C249

+3V

INT_TXLCLKN_L
INT_TXLCLKP_L

*10p/50V_4

CRTVDD5

C20

2

1 *33p/50V_4

CRTVSYNC

C21

2

1 *33p/50V_4

R31

*0/short_4

R32

[4] INT_TXLCLKN
[4] INT_TXLCLKP

*0/short_4

USBP2+_CCD
USBP2-_CCD

[8] USBP2+
[8] USBP2-

CRTHSYNC

A

A

CRT_R1
CRT_G1
CRT_B1

C49
0.1u/10V_4

3
4
5
6

VIDEO_1
VIDEO_2
VIDEO_3
GND

DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2

10
11

CRT_SCL
CRT_SDA

9
12

DDCCLK_1
DDCDAT_1

CRT_SCL
CRT_SDA

[4]
[4]

CRT_SCL
CRT_SDA

R53
R58

2.2K_4
2.2K_4

R46
2.2K_4

R42
2.2K_4

C31

*10p/50V_4

DDCCLK_1

C27

*10p/50V_4

DDCDAT_1

Quanta Computer Inc.

IP4772_Rout=10ohm

PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

CRT/LVDS
5

4

3

2

Sheet
1

14

of

35

5

4

TOUCH PAD (TPD)

3

2

3mA

1

BLUETOOTH(BTM)

+5V_TP
+5V

+5V_TP
4.7K/J_4
R262

CN3

7
8

R261

& lt; EMI & gt;
L12

1
2
3
4
5
6

TP_R#
TP_L#

& lt; EMI & gt;

+5V_TP

0.4A/120ohm_6
0.4A/120ohm_6

TPDATA [22]
TPCLK [22]

CX08T121000:0.4A/120ohm_6
CX121T04000:0.4A/120ohm_6

TP_CONN

C29
10P/50V_4

3A/120ohm_8
CX121T30001:3A/120ohm_8
BT@AO3413

L25
L24

TPDATA_CN
TPCLK_CN

CN6
C30

1

+3V

BT_POWER

3

.1U/10V_4

Q14

C28

[8] USBP6+
[8] USBP6-

+ C160

2

D

4.7K/J_4

10P/50V_4

C159
BT@1000p/50V_4

BT@0.22u/25V_6
R169
[20,22]

T22

BT_LED

5
4
3
2
1

D

6
7

BT@CONN

BT_POWERON#
BT@10K_4
C156
*BT@1000p/50V_4

TP_L#
1

3
4
5
6

TP_R#
D35
*14V/38V/100P_4

2

TP switch

C

2

D36
*14V/38V/100P_4

TP switch

SW3
1
2

1

SW2
1
2

3
4
5
6

KEYBOARD (KBC)

LED/SW (UIF)

PWR Button

C

SW1

B

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

MX7
MX6
MX5
MY0
MY1
MY2
MX4
MY3
MY4
MY5
MY6
MY7
MY8
MX3
MY9
MX2
MX1
MY10
MY11
MX0
MY12
MY13
MY14
MY15

MX7 [22]
MX6 [22]
MX5 [22]
MY0 [22]
MY1 [22]
MY2 [22]
MX4 [22]
MY3 [22]
MY4 [22]
MY5 [22]
MY6 [22]
MY7 [22]
MY8 [22]
MX3 [22]
MY9 [22]
MX2 [22]
MX1 [22]
MY10 [22]
MY11 [22]
MX0 [22]
MY12 [22]
MY13 [22]
MY14 [22]
MY15 [22]

MX7
MX6
MX5
MY0
MY1
MY2
MX4
MY3
MY4
MY5
MY6
MY7
MY8
MX3
MY9
MX2
MX1
MY10
MY11
MX0
MY12
MY13
MY14
MY15

7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1

8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2

3

R222
R223

1
D16

1

D17

1

+3VPCU

470/J_4

0402 size

NBSWON#

[22,23]

D22
*5.5V/25V/410P_4

power switch

[22]

2 *5.5V/25V/410P_4

2 *5.5V/25V/410P_4

SW4

2

R224

200/J_4

BATLED0#

R225

470/J_4

BATLED1#

3
4
5
6

[22]

1

3

[22]

2
1

NBSWON#

*DIP-TJG-533-S-V-T/R

LED_AMBER/BLUE
D18

1

2 *5.5V/25V/410P_4

D20

25

SUSLED#

[22]

LED3

FULL LED
CHG LED

1

2 *3G@5.5V/25V/410P_4

side view

CP5
220P_8P4R
CP6
220P_8P4R

PWRLED#

side view

CP2
220P_8P4R

CP4
220P_8P4R

200/J_4

LED_AMBER/BLUE

CP1
220P_8P4R

CP3
220P_8P4R

2 *5.5V/25V/410P_4

1

2

2

& lt; EMI & gt;

CN2

D15
LED2

PWR LED
SUS LED

NBSWON#

2
1
1

+3VPCU
& lt; 20100303(C3A) & gt;
20110117 : add CP1~CP6 for EMI issue

3
4
5
6

B

+3V
LED5

3G LED
WLAN LED

2

R228

*3G@270/J_4

1

3

R229

470/J_4

3G_MINI_LED#
WLAN_LED#

W/O 3G: use BE0R0083Z00
W
3G: use BEB00023ZA0

[20]
[20]

LED_AMBER/BLUE
D21

26

2 *5.5V/25V/410P_4

1

side view

SATALED#

2

KB CONN

+5V
LED4
3

HDD LED

R226

1

*330/J_4

[9]

& lt; 20090609(A1A)_Checklist Rev1.0 & gt;
Need the buffer for LED driving
capability since the IOL is 6mA only.

*BSS84
Q18

1

3

*LED_BULE
D19

2 *5.5V/25V/410P_4

1

side view
PWR: Blue Vf: 2.55~3.15V, If=20mA
SUS: Orange Vf=1.6~2.0V, If=20mA
A

A

+3V
LED1
2

PWR indicator

1

R238

120/J_4

Quanta Computer Inc.

LED_BLUE

PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

KB/BT/TP/LED/Power Connector
5

4

3

2

Sheet
1

15

of

35

5

4

3

2

HPR

Codec(ADO)

1

HEADPHONE

HPL
MIC1-VREFO-L

Universal Jack
CN14

MIC1-VREFO-R

COMBO MIC
HPL

R361

47/F_4

HPL-1

L28

*0/short_6

R359

47/F_4

HPR-1

L27

*0/short_6

HPR_SYS

C151 place near to codec

R360

C299

C300

*1K/J_4

2200P/50V_4

2200P/50V_4

D8

C136

ADOGND

C133

C137

*10u/6.3V_6

D

*14V/38V/100P_4

2

+

C135

ADOGND

0.1u/10V_4

HP_JD#
D9

*14V/38V/100P_4

ADOGND

UNIVERSAL JACK
010030FR006G119ZR

1

ADOGND

Place next to pin 27

2
4
5

D7
*14V/38V/100P_4

ADOGND

D

2

4.7U/6.3V_6

C134

2

C140

R358
*1K/J_4

IN_MIC-VREFO

1

1

MIC2-VREFO

Place near codec

2.2u/6.3V_6

3
6
1

HPL_SYS

HPR

ADOGND

+
+5VA

2.2U/6.3V_6

+5VA

+

ADOGND
MIC2-VREFO

2.2u/6.3V_6

25

SPDIFO
PGND

C

1

Place next to pin 46

C3C
R200

20K/F_4

17

R155

Q7
2SK3018

MIC2-JD#

20K/F_4

COMBO MIC

R125

22K/F_4

2

C120
4.7U/10V/8

LINE2_L2
SENSEA

R179

39.2K/F_4

HP_JD#

R175

13

20K/F_4

MIC1_JD#

ADOGND

ANALOG
C

ALC271X

PCBEEP dont coupling any signals if possible
8/17 separate PCBEEP to Digital from Realtek suggestion
R199

PCBEEP_1

C181

1u/10V_6 BEEP_1
C193

C174
4.7U/6.3V_6

R213
4.7K_4

47K/J_4

R220

1.6Vrms

*0/short_6 +AZA_VDD

C170
0.1u/10V_4

1

LINE2_R2

14

LINE2-L
Sense A

ADOGND

ADOGND

MIC2_L2

15

MIC2-JD#
ADOGND

MIC2_R2

16

LINE2-R

SENSEB

Audio Codec

3

R152

18

DIGITAL
+3V

2

27

28

29

30

31

32

33

34

35

26

AVDD1

AVSS1

VREF

LDO-CAP

MIC2-VREFO

MIC1-VREFO-R

MIC1-VREFO-L

HP-OUT-L

HP-OUT-R

36

SPDIFO2/EAPD

PCBEEP

49

PVDD2

12

48

RESET#

Spilt by DGND

11

47

0.1u/10V_4

SYNC

C168

4.7U/6.3V_6

10

C167

DVDD-IO

C166

4.7U/6.3V_6 0.1u/10V_4

Placement near

19

MIC2-L

9

EAPD#
C165

MIC2_L2

*14V/38V/100P_4

MIC2-R

SPK-R+

MIC1_L1

20

Sense-B

SPK-R-

MIC2_R2

2.2U/6.3V_6

& lt; 20100917 & gt; Add 22k PD by FAE
suggestion for discharing

MIC1_R1

21

JDREF

PVSS2

SDATA-IN

46

8

45

22

MIC1-L

(Vista Premium Version)

2.2U/6.3V_6

C155

1K/J_4

R118
22K/F_4

D39

MIC1-R

DVSS2

+5V

44

R_SPK+

Spilt by PGND
+5VPVDD2
*0/short_6

Place next to pin 25

MONO-OUT

PVSS1

R123

ADOGND

23

LINE1-L

7

R_SPK-

Place next to pin 39
C3C
R174

COMBO MIC

SPK-L-

BIT-CLK

43

C153

4.7U/6.3V_6

24

LINE1-R

SPK-L+

6

42

C138
0.1u/10V_4

PVDD1

SDATA-OUT

41

0.1u/10V_4

5

40

C150

4.7U/6.3V_6

PD#

C147

CBN

CBP
39

L_SPK-

C149

4.7U/6.3V_6 0.1u/10V_4

4

+5VPVDD1

*0/short_6

L_SPK+
C148

GPIO1/DMIC-CLK

+5V

AVDD2

GPIO0/DMIC-DATA

38

AVSS2

DVDD1

37

CPVEE

ADOGND

ANALOG
Spilt by AGND

3

ADOGND

Place next to pin 38

C3C
R151

R122
2.2K/J_4

C139
U8

1

C142
0.1u/10V_4

2

C141
4.7U/6.3V_6

47K_4

System MIC

MIC1-VREFO-R
MIC1-VREFO-L

PCBEEP [22]
SB_BEEP [11]

R356
4.7K/F_4

R355
4.7K/F_4

If either HDA device io power use +1.5V,
all device IO power change to +1.5V

100p/50V_4

CN13

Place next to pin 1
R196
T49
T50

DMIC_DAT_L
DMIC_CLK_L

*0/short_6
+AZA_VDD
C-test

C173
ACZ_RESET#_AUDIO
ACZ_SYNC_AUDIO
ACZ_SDIN R185

33/J_4

ACZ_SDIN0

[11]

4.7u/6.3V_6

MIC1_L2

R113

1K/F_4

MIC1_L3

R346

*0/short_6

MIC1_R1

C144

4.7u/6.3V_6

MIC1_R2

R114

1K/F_4

MIC1_R3

R345

*0/short_6

3
6
1

MIC1_L
MIC1_R

2
4
5

C183

0.1u/10V_4

C151

4.7U/6.3V_6

MIC1_JD#
C326

[11]

UNIVERSAL JACK
010030FR006G119ZR

C105
C286

C287

C298

*470p/50V_4

*470p/50V_4

*0.1u/16V_6

*22P-50V_4 *22P-50V_4

[11]

MIC1_JD#

Place next to pin 9

ACZ_SDOUT_AUDIO

[11]

ACZ_BITCLK_AUDIO

[11]

Normal Open Jack

1

ACZ_RESET#_AUDIO
PD#

0V : Power down Class D SPK amplifer
3.3V : Power up Class D SPK amplifer

MIC1_L1

D34
ADOGND

ADOGND
*VPORT_6

2
C175

*22p/50V_4

Near CN13

ADOGND

place near codec IC

ADOGND
R363
R136
R193
R178
R144
R97
R158
R127

B

*Short_4
*0_6
*0_6
*0_6
*0_6
*0_6
*0_6
*0_6

B

Internal Analog MIC
IN_MIC-VREFO

R357
R132
R325
R168
R180
C292
C282

Power (ADO)

R131
10K_4

*1000p/50V_4
*1000p/50V_4

R539

6/15:C203,R210,R98 short for EMI request

1K/J_4

C158
C161

LINE2_R2
LINE2_L2

1u/10V_6
1u/10V_6

1

ADOGND

place near codec IC

CN4

1
2

L17 Place close to Codec

Demodulation Filter

*0_6
*0_6
*0_6
*0_6
*0_6

INT_MIC

D38

C104
C327

2

DIGITAL

ANALOG

L17

0_8

C328

*22P-50V_4

*14V/38V/100P_4

+5V

*22P-50V_4

*22P-50V_4

+5VA
ADOGND
ADOGND

Mute(ADO)

ADOGND
ADOGND

ADOGND

Internal Speaker
+5V

R184
*10K_4
A

PD#

40mil for each signal
CN7

*BAS316

*BAS316

D13

D14

R_SPK+
R_SPKL_SPKL_SPK+

ACZ_RESET#_AUDIO

R210
R198
R192
R176

R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1

*0/short_6
*0/short_6
*0/short_6
*0/short_6

4
3
2
1

EAPD#

A

5
6

SPEAKER-CON
*BAS316

R375

D12

C194
*68p/50V_6

AMP_MUTE# [22]

C186
*68p/50V_6

C177
*68p/50V_6

C169
*68p/50V_6

0_4

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1A

AUO/AMP
5

4

3

2

Sheet
1

16

of

35

5

4

3

2

1

17

USB for iPod charge (USB)
G547E1P81U: Enable: high active
Need infrom EC engineer modify

+3VPCU

+5VPCU

R369

C317

U22
G547E1P81U

*0.1u/10V_4
2
3

5

*47K_4

BC_CEN

2
USB_BC_EN

4
[22] USB_CHARGE_ON

3

D

4
1

1

5VUSB_1

8
7
6

OUT3
OUT2
OUT1

EN
GND

D

5

OC#

C314
1u/6.3V_4

U23
*TC7SH08FU

IN1
IN2

USBOC#L [8,22]
R368

0/J_4

B-test:
have charge IC function: stuff U10,U23,R369,C179,R376,R377,R380,R381
no charge IC function
: stuff R368,R378,R379,R382,R383

5VUSB_1

& lt; Layout note & gt;
Close to CONN

& lt; Layout note & gt; 3528 type H=1.9mm

2A
+5VPCU
C307
C179

& lt; Layout note & gt;
Co-lay

*0.1u/10V_4

+ C313

Left

.1U/10V_4
100U/6.3V_3528

*0/J_4 USBP3-_L1
*0/J_4 USBP3+_L1

R382
R383

0/J_4
0/J_4

USBP3-_L1
USBP3+_L1
USBP3-_L2
USBP3+_L2

7
6

TDM
TDP

8

CB

DM
DP
GND
EPAD

2
3
4
9

R181

USBP3-_L
USBP3+_L

R376
R377

R378
R379

0/J_4
0/J_4

CN19

*0/short_4

*0/J_4 USBP3-_R
*0/J_4 USBP3+_R

USBP3-_L2
USBP3+_L2

*0/short_4

USBP3-_L
USBP3+_L

USBP3-_R
USBP3+_R

USBP3-_CN
USBP3+_CN

USBP3-_R
USBP3+_R

VDD
DD+
GND1

D10
*5V/30V/0.2P_4

GND6
GND5
GND7
GND8

6
5
7
8

USB_CONN

2

2

D11
*5V/30V/0.2P_4

QCI P/N & Footprint

[22] CHARGE_IC_ON

& lt; 20100128(B2A) & gt;
Change CN14,16,17(USB CONN) from DFHS04FR201
to DFHS04FR362.

System Status: .
& gt; Lo: AM, autodetection charger identification active.
& gt; HI: PM, pass-through mode active, DP/DM connected to TDP/TDM.

C

1
2
3
4

1

R380
R381

USBP3USBP3+

USBP3USBP3+

R177

1

USBP3USBP3+
[8] USBP3[8] USBP3+

U10
*IC(8P)MAX14566AE
1
5
CEN
VCC

C

USB(USB)
+5VPCU

[22] USB_EN#

U19
IC(8P)G547E2P81U
8
IN1
OUT3
7
IN2
OUT2
6
OUT1
4
EN#
1
GND
9
5
GND-C OC#
2
3

USB_EN#

2A
5VUSB_0

& lt; Layout note & gt;
Close to CONN

Right up

C17

+ C35
CN9

0.1u/10V_4

USBOC#R [8,22]

220u/6.3V_7343

R18

1
2
3
4

*0/short_4

USBP1-_CN
USBP1+_CN

[8] USBP1[8] USBP1+
R16

*0/short_4

VDD
DD+
GND1

GND6
GND5
GND7
GND8

6
5
7
8

USB_CONN

1

R318
*10K_4

1

C276
4.7u/10V_6

+3VPCU

D2
*5V/30V/0.2p_4

2

2

D1
*5V/30V/0.2p_4

B

B

5VUSB_0

& lt; Layout note & gt;
Close to CONN

C269

+ C16
0.1u/10V_4
*100u/6.3V_3528

R70

R68

*0/short_4

Right down

*0/short_4

CN12
1
2
3
4
D4
*5V/30V/0.2p_4

GND6
GND5
GND7
GND8

6
5
7
8

USB_CONN

2

D3
*5V/30V/0.2p_4

2

VDD
DD+
GND1

1

1

USBP0-_CN
USBP0+_CN

[8] USBP0[8] USBP0+

A

A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1B

USB on Board/LED/SW/HOLE
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

17

of

35

5

4

3

2

1

LAN (LAN)

18
+3V_LAN

R255

VDD10

*0/short_6

*0/short_6

1

Close To IC
C243
0.1U/16V_4

C15
0.1U/16V_4

2

C5
0.1U/16V_4
D

C228
0.1U/16V_4

C224

C229
0.1U/16V_4

C246
0.1U/16V_4

2

R252

EVDD10

1

+3V_S5

C237
1U/10V_4

C241
0.1U/16V_4

Close To IC Pin 13.

*4.7U/10V/8
D

R256

*0/short_6

CTRL12

Close to IC
Close To IC Pin 31.

C238
0.1U/16V_4

C10

33P/50V_4

25MCLKX1
25MCLKX2

1

R15

2.49K/F_4

Y1
25MHz-LAN

25MCLKX1
25MCLKX2
CTRL12
RSET

R265
GPO
LAN_LINKLED#

1K/J_4

+3V_LAN

+3V_LAN

CLKREQ_LAN#_L

36
37
38
39

EEDI/SDA
LED3/EEDO
EECS/SCL
VDD10
PCIE_WAKE#
ISOLATE#

R266

10K/J_4

R267

10K/J_4

T6

Int. PU in SB

PCIE_WAKE# [11,20]

+3V_LAN

R30
R27

1K/J_4
15K/J_4

C

+3V

RTL8105TA-VC-CG

40
41
42

GND
GND
GND
GND

24
23
22
21
20
19
18
17

R268

1

[2] CLKREQ_LAN#

EEDIPIN/TDI/SPISI/SDA
EEDOPIN/LED3/SPISO
EECSPIN/TCS/SCL
VDD1
LANWAKEBPIN
VDD3
ISOLATEBPIN
PERSTBPIN

2

VDD10
*0/short_4
CLKREQ_LAN#_L

R13

RSET
CTRL12
CKXTAL2
CKXTAL1
LEDPIN/SPICSB
VDD3
GPOUTPIN
EESKPIN/LED1/TCLK/SPISCK

C

HV
MDIP0
MDIN0
MDIP1
MDIN1
NC
VDD1
CLKREQBPIN

HSIP
HSIN
REFCLK_P
REFCLK_N
VDDTX
HSOP
HSON
GNDTX

PU in CLK Gen.

1
2
3
4
5
6
7
8

+3V_LAN

*10K/J_4
*10K/J_4

EECS/SCL

9
10
11
12
13
14
15
16

TX0P
TX0N
TX1P
TX1N

GND
GND
GND

33P/50V_4

GND
GND
GND

R28

EEDI/SDA

2
C8

33
34
35

R251

PCIE_WAKE#

32
31
30
29
28
27
26
25

U2

LAN_ACTLED#

*0/short_4

PLTRST# [4,11,20,21,22,23]

C244
*4.7U/10V/8

[8] PE1TX+
[8] PE1TX[2] CLK_PCIE_LANP
[2] CLK_PCIE_LANN
C11
C12

[8] PE1RX+
[8] PE1RX-

EVDD10
PCIE_RXP0_LAN
PCIE_RXN0_LAN

.1U/10V_4
.1U/10V_4

For Rural

TRANSFORMER (LAN)

RJ45 Connector (LAN)

B

B

CN8
U13
TX0P
TX0N
TX1P
TX1N

R9
R8
R7
R6

0/J_4
0/J_4
0/J_4
0/J_4

TX0P_R
TX0N_R
TX1P_R
TX1N_R

1
2
3
4

1
2
3
4

U15

8
7
6
5

X-TX1N
X-TX1P
X-TX0N
X-TX0P

8
7
6
5

1
2
3
4

*UCLAMP2512T.TCT

R254

LAN_LINKLED#

1
2
3
4

8
7
6
5

8
7
6
5

C240

*510/J_6

+3V_LAN

*0.1U/50V_8

TERM9

11
12
8

*UCLAMP2512T.TCT

7

YY+
NC4/3NC/3+

X-TX1N
with ESD solution:R22,R13,R20,R26 need to use 1 ohm.
without ESD solution:R22,R13,R20,R26 need to use 0 ohm.

TX0N_R
TX0P_R
C210
C214

NC2/2-

4

8
7
6
5
4
3
2
1

TDTD+
CT
NC
NC
CT
RDRD+

TXTX+
CT
NC
NC
CT
RXRX+

9
10
11
12
13
14
15
16

X-TX1P

LAN_ACTLED#
R242

R239

*0/J_4
C209

NS0014 LF_Bothhand

R240

R243

C213

2

X-TX0P
X-TX0N
X-TX0P

3

X-TX0N

X-TX1N
X-TX1P
TERM0

2

TX1N_R
TX1P_R

C215

RX-/1-

5

U14
with ESD solution: stuff R35,U3,U8,D8
without ESD solution: remove R35,U3,U8,D8

C216

6

TERM9

1

*510/J_6

+3V_LAN

*0.1U/50V_8

9
10

NC1/2+
RX+/1+
TX-/0TX+/0+
GND
GND

14
13

WW+
RJ45-CONN

D28
75/F_8

*10p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4

75/F_8

11/18 change connector pin define
Main:DFTJ12FR087
White LED:pin9(-),pin10(+)
Amber LED:pin11(-),pin12(+)

0.01U/25V_4

A

1

*BS3500N-C

A

TERM9

The value should be
0.01uF-0.4uF.

Quanta Computer Inc.

C223
1000P/3KV_1808

PROJECT : ZE6
Size

Document Number

Rev
1B

LAN RTL8105TA-VC-CG
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

18

of

35

5

4

3

2

1

D

D

CN11
1
2
3
4
5
6
7

C

SATA_TXP0A
SATA_TXN0A

C45
C44

0.01u/16V_4
0.01u/16V_4

SATA_TXP0
SATA_TXN0

SATA_RXN0A
SATA_RXP0A

C42
C41

0.01u/16V_4
0.01u/16V_4

SATA_RXN0
SATA_RXP0

8
9
10
11
12
13

14
15
16
17

U18
*CM1213-04SO

SATA_RXN0 [9]
SATA_RXP0 [9]

SATA_RXP0A

1
2

SATA_TXN0A

1A

5V_SATA
C19

C26

.1U/10V_4

*0.1U/10V_4

4.7U/10V/8

R36
+

C18
MAIN_SATA

SATA_TXP0 [9]
SATA_TXN0 [9]

3

CH1
VN
CH2

CH4
VP
CH3

6

SATA_RXN0A
+5V

5
4

SATA_TXP0A

C265
*0.1u/10V_4

*0/short_8 +5V

C

C22
*100U/6.3V_3528

C test: unstuff C22 for Cost down

B

B

A

A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1B

SATA-HDD
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

19

of

35

5

4

Mini Card(MNC)

3

+1.5V_Mini1_VDD

2

20

+3V_Mini1_VDD
+3V_Mini1_VDD
R367
4.7K/F_4

CN20

[8] PE2RX+
[8] PE2RX-

15
13
11
9
7
5
3
1

[2] PE2CLK+
[2] PE2CLKCLKREQ_WLAN#

[2] CLKREQ_WLAN#

MINI-CARD1

53

Q20
1

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

MINI1_WAKE#

R170

*0/short_8

+3VSUS
1

USBP7+ [8]
USBP7- [8]

3

WLAN_LED# [15]

C322

R171

C308

C309

C312

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

R386

0.1u/10V_4

+3V_Mini1_VDD
D

WLAN@0_4

WL_SMDATA
WL_SMCLK

RN1
*4.7K_4P2R

0.5A
PLTRST#_2
RF_EN

R365

*0/short_4

PLTRST#

PLTRST# [4,11,18,21,22,23]

RF_EN [22]

+1.5V

+1.5V_Mini1_VDD
R172

16
14
12
10
8
6
4
2

UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

C321

*10u/10V_8

*0_8

Q12
*3G@2N7002K

4
2

WLAN_LED#_R
R366
*0/short_4

0.75A

+3V_Mini1_VDD

2

WL_SMDATA

1

*0_8
R237

LPCFRAME# [11,22]
LPCAD3 [11,22]
LPCAD2 [11,22]
LPCAD1 [11,22]
LPCAD0 [11,22]

C310

C311
*0.1u/10V_4

*1000p/50V_4

*0/short_4

C164
*10u/10V_8
+3V_Mini1_VDD
Q17
*2N7002E

3

[2,3] SMBCK1

*2N7002E
R373

Q19
*2N7002E

3

[2,3] SMBDT1

3
1

[8] PE2TX+
[8] PE2TX-

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

+3V

3G_MINI_LED#

2

D

Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8

*0/short_4

2

*0_4
*0_4

RF_LED_ON R159

2

R371
R370

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

GND

PLTRST#
[2] PCLK_DEBUG

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

GND

[15,22] BT_POWERON#

*0/J_4

54

R372

3
[11,18] PCIE_WAKE#
+3V_Mini1_VDD

1

+3V_Mini1_VDD

WL_SMCLK

1

R227

*0/short_4

3G sku: stuff R362, Q12, don't stuff R386
W/O 3G sku: don't stuff R362,Q12, stuff R386

*10K_4

C

C

Mini Card 2 / GPS(MNC)
+3VSUS

+3V_Mini2_VDD

R143

*3G@0_8

R173

*3G@0_8

+3V_Mini2_VDD

C143

C302

C303

C305

C319

1

+1.5V_Mini2_VDD
+3V_Mini2_VDD

1.1A

C320

C301

+3V_Mini2_VDD

B

[2] PE4CLK+
[2] PE4CLKT48

CLKREQ_3G#

T23

3G_WAKE_2_R

15
13
11
9
7
5
3
1

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

53

*3G@MINI-CARD2

GND

R362

*3G@0.1u/10V_4 *3G@0.1u/10V_4*3G@0.47u/6.3V_4 *3G@10p/50V_4

*3G@100K/F_4
WLAN_LED#_R
3G_MINI_LED#

3G_MINI_LED# [15]

0.5A

+1.5V
+1.5V_Mini2_VDD

USBP5+_R
USBP5-_R
R134

+3V_Mini2_VDD

*3G@0_8

3G_SMDATA
3G_SMCLK

C304

C318
+3V_Mini2_VDD
R154

*3G@1000p/50V_4 *3G@0.1u/10V_4
PLTRST#_1

R364

*3G@0_4

PLTRST#

*3G@2N7002E

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR

R166

Q11

3G_EN [22]

16
14
12
10
8
6
4
2

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

*3G@4.7u/10V_8 *3G@0.1u/10V_4 *3G@0.1u/10V_4

[2,11] PDAT_SMB
R145

2

[8] PE4RX+
[8] PE4RX-

GND

[8] PE4TX+
[8] PE4TX-

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

*3G@10K_4

*3G@10K_4
B

PDAT_SMB 3

3G_SMDATA

1

*3G@0_4
R156

USBP5+_R
USBP5-_R

*3G@0_4

USBP5+ [8]
USBP5- [8]
+3V_Mini2_VDD

54

3G_WAKE_R

T47

Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8

2

+3V

CN17
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

R150

*3G@0_4

2

Q13
*3G@2N7002E
+3V
[2,11] PCLK_SMB

ESD1

SIM

UIM_RST

1

CH1

2
UIM_CLK

Max: 7.5mA (Option)
JSIM1

GND
GND

GND
GND

*3G@SIM-Conn

UIM_PWR
UIM_VPP
UIM_RST
UIM_DATA

C227

CH2

CH3

PCLK_SMB 3

R167

5
4

3G_SMCLK

1

UIM_VPP
*3G@0_4

UIM_DATA

*3G@27p/50V_4

UIM_DATA

C221

*3G@10p/50V_4

UIM_CLK

C231

*3G@10p/50V_4

UIM_RST

C222

*3G@27p/50V_4

C219

*3G@33p/50V_4

& lt; 20090604(A1A)_Qualcomm design guide & gt;
Place 0.1uF near connector's VCC pin

A

UIM_PWR

2

*3G@0_4

1
2
3
4
5

1

R11

GND(C5)
VCC(C1)
VPP(C6)
RST(C2)
DATA(C7)

12
14

USBP4+_R
USBP4-_R

[8] USBP4+
[8] USBP4-

3

VP

6

*3G@CM1293-04SO

CLK(C3)
D-(C8)
D+(C4)
CT
CD

13
11

*3G@0_4

A

6
7
8
9
10

UIM_PWR

UIM_VPP

R14

UIM_CLK
USBP4-_R
USBP4+_R

VN

CH4

C225
C226
*3G@1u/10V_6
*3G@0.1u/10V_4

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

Mini-Card/WL/3G/SIM
5

4

3

2

Sheet
1

20

of

35

5

4

3

RTS5209

2

1

for EMI issue: change R232,R233,R234,
R235,R236,R231,R211 to 33 ohm.

+3V3_IN

VCC_XD
CN18
R195
*100K_4
[4,11,18,20,22,23]

PLTRST#

SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3
SD_D2

C184
*1U/6.3V_4X

R232
R233
R234
R235
R236
R231

13
1
2
3
4
10
19
23
25
5
8
17
21

SD_CD#
SD_WP/XD_D7
SD_D1_R
SD_D0_R
SD_CLK_R
SD_CMD_R
SD_D3_R
SD_D2_R
SD_D7/XD_RDY
SD_D6/XD_RE#
SD_D5/XD_CE#
SD_D4/XD_WE#

33/J_4
33/J_4
33/J_4
33/J_4
33/J_4
33/J_4

D

[2] CLKREQ_CARD#

7
15
26
27

1

[8] PE3TX-

2

[2] CLK_CARDREADER
[2] CLK_CARDREADER#

4
C197

[8] PE3RX+

C198

0.1U/10V_4X

PCIE_RXP2_R 6

[8] PE3RX-

C199

0.1U/10V_4X

PCIE_RXN2_R 7

C200

AV12

0.1U/10V_4X

5

GND

8

DV12

9

VCC_XD
+3V3_IN

*0/short_6

11

TP8

SD_CD#

SD_WP/XD_D7

XD_D6

38

37

33/J_4

SP14

SP15

SD_CD#

39

TP7

MS_INS#

40
MS_INS#

41

EECS

EESK

GPIO/EEDI

EEDO

42
EESK

PLTRST#

43
EECS

EEDO

CLKREQ_CARD#

44

AV12

SP9
SP8

RTS5209-GR

SP7

GND

SP6

DV12

SP5

Card1_3V3

DV12_S

3V3_IN

GND

Card2_3V3

SD_D2

MS-GND1
MS-GND2

XD-GND1
XD-GND2
XD-GND3

XD_CD#
SD_D7/XD_RDY
SD_D6/XD_RE#
SD_D5/XD_CE#
MS_BS/XD_CLE
MS_D5/XD_ALE
SD_D4/XD_WE#
MS_D1/XD_WP#

37
38
39
40
41
42
43
44

MS_D4/XD_D0
MS_D0/XD_D1
MS_D2/XD_D2
MS_D6/XD_D3
MS_D3/XD_D4
MS_D7/XD_D5
XD_D6
SD_WP/XD_D7

D

36
46
47

36

MS_D7/XD_D5

35

MS_D3/XD_D4

34

MS_D6/XD_D3

33

MS_D2/XD_D2

32

MS_D0/XD_D1

31

MS_D4/XD_D0

30

MS_D1/XD_WP#

29

MS_D5/XD_ALE

28

MS_BS/XD_CLE

C

VCC_XD
C203

4.7U/6.3V_6X

C202

0.1U/10V_4X

C315
DV12_S

26

C208

0.1u/10V_4

0.1u/10V_4

GND

25

C306

0.1u/10V_4

27

SD_D2

C316
4.7U/10V/8

SD_CLK

SD_D3
24

SD_CMD
23

SD_D3

22

SD_CMD

SD_CLK

SD_D0
21
SD_D0

SD_D1
20
SD_D1

SP4
SD_D4/XD_WE# 19

SP2

SP1

SP3
SD_D5/XD_CE# 18

14

SD_D6/XD_RE# 17

13

*PBY160808T-601Y-N_1A DV12

GND

C201
0.1U/10V_4X

XD_CD#

L23

45

SP10

DV33_18

AV12

PERST#

SP11

XD_CD#

C204
4.7U/10V/8

12

SP12

REFCLKN

HSON

R211

28
29
30
31
32
33
34
35

12/06 change connector pin define and footprint
Main:DFHS44FR015

SP13

HSOP

MS_CLK

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

45

CM7R-052-H-D

REFCLKP

SD_D7/XD_RDY 16

R230

+3V

10

10P/50V_4

XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP

MS-VCC
MS-BS
MS-DATA1
MS-DATA0
MS-DATA2
MS-INS
MS-DATA3
MS-SCLK

add C196 for EMI.

HSIN

DV33_18

Zdiff = 100 ohm

4.7U/6.3V_6X

MS_BS/XD_CLE
MS_D1/XD_WP#
MS_D0/XD_D1
MS_D2/XD_D2
MS_INS#
MS_D3/XD_D4
MS_CLK_R

C196

*0/short_4 MS_CLK

XD-VCC

SD-GND1
SD-GND2
SD-WP-GND
SD-CD-GND

22
9
11
12
14
16
18
20
6
24

XD_D6
R221

HSIP

15

Zdiff = 100 ohm
C

3

GND

Zdiff = 100 ohm

47

48
RREF

[8] PE3TX+

3V3_IN

U11

CLK_REQ#

6.2K/F_4

CARDREF

R194

46

0.1U/10V_4X

TP6

TP5

+3V3_IN
C180

VCC_XD

SD-VCC
SD-CD-SW
SD-WP-SW
SD-DAT1
SD-DAT0
SD-CLK
SD-CMD
SD-DATA3
SD-DAT2
MMC-DATA7
MMC-DATA6
MMC-DATA5
MMC-DATA4

B

B

C207
*4.7U/6.3V_6X

C205
0.1U/10V_4X

add C206 for EMI and close to chip pin

C206
SD_CLK_R
10P/50V_4

A

A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1A

RTS5138
5

4

3

2

Sheet
1

21

of

35

5

4

3

2

1

I/O ADDRESS SETTING(KBC)

EC (KBC)

SHBM=0: Enable shared memory with host BIOS

30mil

+A3VPCU
C7

C6

.1U/10V_4

C220

C1

.1U/10V_4

.1U/10V_4

.1U/10V_4

VCC1
VCC2
VCC3
VCC4
VCC5

U1

LCLK_EC

8

[11] CLKRUN#
[9] GA20

121

[9] KBRST#

122

[10] EC_SCI#

29

[14] EC_FPBACK#

6
124

[16] AMP_MUTE#
[4,11,18,20,21,23]

7

PLTRST#

[20] RF_EN

123

[9] SERIRQ

125
9

[11] EC_SMI#

[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]

C

& lt; EMI & gt;
LCLK_EC

R4
*22/J_4

C2
*10P/50V_4

FOR CPU Thermal Sensor
FOR VGA

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

[24] MBCLK
[24] MBDATA
[4] 2ND_MBCLK
[4] 2ND_MBDATA
T4
T5

[15] TPCLK
[15] TPDATA

B

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

54
55
56
57
58
59
60
61

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

TPCLK
TPDATA

[15,20] BT_POWERON#

70
69
67
68
119
120
72
71
10
11

R21

*0/short_4
E775_32KX1

77

R3

[11] SUSCLK

*0/short_4

12
13

If PECI 3.0 access functionality is not used,
connect VTT pin to GND.

C217

R22

10K_4

1/13 Comfirm by vendor mail :
Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware

& lt; 20090602(A1A)_Vendor suggest & gt;
Place 10nF-0.1uF capacitors for
every AD input. And close to the AD
input.

C218

.1U/10V_4

4.7U/6.3V_6

D

+3VPCU
C9

E791AGND

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3

A/D

GPIO94/DA0
GPI95/DA1
GPI96/DA2

D/A

GPIO11/CLKRUN

97
98
99
100
101
105
106

.01U/16V_4
BATLED0#
BATLED1#

TEMP_MBAT [24]
R258

ICMNT_EC

*0/short_4

C234

E791AGND

ICMNT [24]

R17
R29

100K/J_4
100K/J_4

& lt; 20090831(A1A)_EC team suggest & gt;
1.change R7027/R7028 to 1M or 100K ohm
2.change PWR/SUS LED's power from +3VPCU to +3V_S5 or +3VSUS
can reduce pull-high resistor of SUSLED#/PWRLED#

3300P/50V_4

GPIO85/GA20
KBRST/GPIO86
GPIO01/TB2
GPIO02
GPIO03
GPIO04
GPIO05
GPIO06/IOX_DOUT/RTS1
GPIO07
GPIO16
GPIO30
GPIO36/CTS1
GPIO41
GPIO42/SCL3B/TCK
GPIO43/SDA3B/TMS
GPIO44/TDI
GPIO
GPO47/SCL4
GPIO50/PSCLK3/TDO
GPIO51
GPIO52/PSDAT3/RDY
GPIO53/SDA4
GPIO70
GPIO71
GPIO72
GPIO75/SPI_SCK
GPO76/SHBM
GPIO77
GPIO81
GPO82/IOX_LDSH/TEST
GPO84/IOX_SCLK/XORTR
GPIO97

LPC

ECSCI/GPIO54
GPIO24/LDRQ
GPIO10/LPCPD
LREST
GPIO67/PWUREQ
SERIRQ
GPIO65/SMI
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3

GPIO56/TA1
GPIO20/TA2/IOX_DIN_DIO
GPIO14/TB1

TIMER

SMB

GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2

PS/2

GPIO00/32KCLKIN
VTT
PECI
NPCE791L

GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO32/D_PWM
GPIO45/E_PWM
GPIO40/F_PWM/RI1
GPIO66/G_PWM
GPIO33/H_PWM/SOUT1

GPIO87/CIRRXM/SIN_CR
GPIO34/SIN1/CIRRXL
GPIO46/CIRRXM/TRST
GPO83/SOUT_CR/TRIST

IR

F_SDI/F_SDIO1
F_SDO/F_SDIO0
F_CS0
F_SCK

FIU

GPIO55/CLKOUT/IOX_DIN_DIO

GND1
GND2
GND3
GND4
GND5
GND6

3
126
127
128
1
2

VCC_POR
VREF

64
79
95
96
108
93
94
114
109
15
80
17
20
21
24
25
26
27
28
73
74
75
82
83
84
91
110
112
107

ACIN [24]
R24
R10

SM BUS PU(KBC)

NBSWON# [15,23]
USBOC#R [8,17]
USBOC#L [8,17]
LID# [14]

*0/J_4
*0/J_4

CHARGE_IC_ON

L3
PBY160808T-250Y-N/3A/25ohm_6

+3VPCU

MBCLK
MBDATA

R20
R19

4.7K/J_4
4.7K/J_4

2ND_MBCLK
2ND_MBDATA

R264
R263

10K_4
10K_4

[17]

+3V

T3
VRON [23,26]

HWPG
THERM_ALERT#_1 R5

S5_ON
HDMI_IN

R25
R26

THERM_ALERT# [4,11]
SUSB# [11]
USB_CHARGE_ON [17]
D/C# [24]
S5_ON [23,25,30]

T1

PWROK_EC_uR
RSMRST#_uR

*0/J_4

T25

D37

SPI FLASH(KBC)

SUSC# [11]
ECPWROK [11,23]
EC_RSMRST# [11,23]
MAINON [23,27,28,29]
3G_EN [20]

*0/short_4
*0/short_4

BAS316

DNBSWON#

SPI_SDI_uR

R245

22_4 SPI_SDI_uR_R

[11,23]

2

SPI_SDO_uR_R

R246

+3VPCU

10K_4

6

SPI_CS0#_uR

1

VDD

SI

HOLD

SCK
CE

WP
VSS

8
7

R241
3.3K_4

HOLD#

C211

3
.1u/10V_4

4

MX25L1606EM2I-12G

SUSON [5,23,27,29]
FAN_SIG [4]

32
118
62
65
22
16
81
66

SO

5

SPI_SCK_uR_R

USB_EN# [17]

31
117
63

C

+3VPCU
U12

Winbond W25Q16CVSSIG
EON
EN25F40-100HIP
MXIC
MX25L1606EM2I-12G

CONTRAST [14]
PCBEEP [16]
PWRLED# [15]
BATLED0# [15]
CPUFAN# [4]
SUSLED# [15]

AKE38ZP0N02
AKE38ZA0Q00
AKE38FP0Z01

BATLED1# [15]

1/13 Comfirm by vendor mail :
If the Southbridge enables 'Long Wait Abort' by
default, the flash device should be 50MHz (or faster)

& lt; 20090721_FAE suggestion & gt;
Stuff 100K and close to EC side
for improving power consumption

113
14
23
111

T24

86
87
90
92

SPI_SDI_uR
SPI_SDO_uR
SPI_CS0#_uR
SPI_SCK_uR

SPI_SDI_uR

30

ECDB_CLOCK

85

VCC_POR#

R23

47K/J_4

104

VREF_uR

R12

*0/short_4 +A3VPCU

R248

22/J_4 SPI_SDO_uR_R

R247

22/J_4 SPI_SCK_uR_R

+3V

HWPG
R244

T2

B

R2

100K/J_4
10K_4

+3VPCU
D27

*BAS316

D23

*BAS316

D24

*BAS316

D25

R1

*BAS316

HWPG [11,23]

*0/short_4

HWPG_1.5V

[23,28,29]

BAS316

D29

[23,29] HWPG_VCCGFX
[5,23,27]

5
18
45
78
89
116

[11,20] LPCFRAME#
[11,20] LPCAD0
[11,20] LPCAD1
[11,20] LPCAD2
[11,20] LPCAD3
[2] LCLK_EC

3G_EN

2

4

C13

.1U/10V_4

VDD

C14

.1U/10V_4

1
BAS316

VCORF

C3

4.7U/6.3V_6

AGND

0.03A (30mils)

+3VPCU_EC
C212

SHBM

D26

+3V_VDD_EC

& lt; Layout note & gt;
Place every 0.1uF
close to every
power pin

D

+3V

10mA

4.7U/6.3V_6

E791AGND

E791AGND

103

2.2/J_6
2

19
46
76
88
115

R249
1

*0/J_6

VCORF_uR 44

+3VPCU

R250

102

PBY160808T-250Y-N/3A/25ohm_6

AVCC

L1

HWPG_1.05V

[29] HWPG_1.8V
[25] SYS_HWPG
C4
1U/6.3V_4

E791AGND

E791AGND

INTERNAL KEYBOARD STRIP SET(KBC)

INTERNAL KEYBOARD STRIP SET (KBC)
A

10/26 UnStuff

SM BUS ARRANGEMENT TABLE
+3VPCU

MY0
RP2
10
MX4 9
MX5 8
MX6 7
MX7 6

10K/J_10P8R
1 MX3
2 MX2
3 MX1
4 MX0
5

SM Bus 1
SM Bus 2

R253

A

+3VPCU

*10K_4

Battery
CPU thermal sensor

Quanta Computer Inc.

+3VPCU

PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1A

WPCE781 & FLASH
5

4

3

2

Sheet
1

22

of

35

5

3

2

5
6
7

2
3
4

HOLE15

5
6
7

2
3
4

HOLE13

5
6
7

2
3
4

5
6
7

D

8
1
9

2
3
4

8
1
9

5
6
7

HOLE12

8
1
9

2
3
4

HOLE8

8
1
9

HOLE5

D

1

Power Sequence Connector 30pin (CPU)

Hole

8
1
9

EMI

4

CN15
*HG-C276D98P2

*HG-C276D98P2

*HG-C276D98P2

*HG-C276D98P2

*HG-C276D98P2

NBSWON#
+3V_S5
EC_RSMRST#
SUSON
+1.5VSUS
MAINON
+5V
+1.5V
+1.8V
HWPG_VCCGFX
VRON
VR_PWRGD_CK410#
ECPWROK
PLTRST#

[15,22] NBSWON#
+3V_S5

2
3
4

*hg-tc276bc256d98p2

5
6
7

*HG-C276D98P2

2
3
4

*HG-C276D98P2

[11,22] EC_RSMRST#
[5,22,27,29] SUSON

HOLE10

5
6
7

2
3
4

5
6
7
8
1
9

5
6
7

HOLE4

8
1
9

2
3
4

HOLE16

8
1
9

5
6
7
8
1
9

2
3
4

HOLE14

8
1
9

HOLE9

*HG-C276D98P2

*HG-TC276BC315D98P2

+1.5VSUS
[22,27,28,29] MAINON
+5V
+1.5V
+1.8V
[22,29]
[22,26]
[2,26]
[11,22]
[4,11,18,20,21,22]

HWPG_VCCGFX
VRON
VR_PWRGD_CK410#
ECPWROK
PLTRST#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

S5_ON
+5V_S5
DNBSWON#
+3VSUS
HWPG_1.5V
+3V
+1.05V
HWPG_1.05V
VCCGFX
HWPG
VCORE
IMVP_PWRGD
TPT_PWROK
PLTRST#

S5_ON [22,25,30]
+5V_S5
DNBSWON# [11,22]
+3VSUS
HWPG_1.5V [5,22,27]
+3V
+1.05V
HWPG_1.05V [22,28,29]
VCCGFX
HWPG [11,22]
VCORE
IMVP_PWRGD [4,11,26]
TPT_PWROK [11]
PLTRST# [4,11,18,20,21,22]

*30pin POWER SEQ CONN
HOLE2

HOLE3

5
6
7

2
3
4

5
6
7

HOLE19
h-c197d63p2

1
*HG-TC276BC315D98P2

C

HOLE20
*3G@h-c197d63p2

*HG-TC276BC315D98P2

*HG-TC276BC315D98P2

HOLE18
h-tc177bc295d126p2

HOLE17
h-tc177bc295d126p2

1

2
3
4
8
1
9

5
6
7
8
1
9

2
3
4

8
1
9

HOLE7

C

1

1

VCORE

+3V_S5

14

+5V

24

VR_PWRGD_CK410#

+5V_S5

15

+1.05V

25

EC_RSMRST# 16

+1.5V

26

ECPWROK

DNBSWON#

17

HWPG_1.05V

27

TPT_PWROK

SUSON

18

+1.8V

28

H_PWRGD

+3VSUS

19

VCCGFX

29

PLTRST#

10

8
1
9

1

1

1

23

9

HWPG

+1.5VSUS

20

HWPG_VCCGFX

30

RESERVE

VRON

IMVP_PWRGD

B

1

PAD1

22

+3V

8
HOLE11
*O-ZE6-3

21

MAINON

6

B

HWPG_1.5V

13

4

5
6
7

11
12

S5_ON

7

2
3
4

HOLE6
*O-ZE6-2

NBSWON#

3

5

HOLE1
*hg-c276do94x106p2

GND

2
HOLE21
*3G@h-c197d63p2

A

A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1A

HDMI(1/2)
5

4

3

2

Sheet
1

23

of

35

4

3

VA1

PJ1

PL3
HI0805R800R-00/5A/80ohm_8
VA

1
2
3

VA2

3
2

8
7
6
5

3
PC63
0.1u/50V_6

PR102
220K/F_6

CSIP_1

30

PQ35
AO4427

VIN
1
2
3

2

VIN_SRC

PC80
0.1u/50V_6

PC79
2200p/50V_4

1

PC66
2200p/50V_6

1

4

PC64
0.1u/50V_6

7
6
5
4

1

PR116
0.01_0612

8
7
6
5

PR6
33K_6

PD10
SMAJ20A

D

PC65
0.1u/50V_6

D

1
2

PD8
SW1010CPT

PR101
220K/F_6

PR7
10K_6

6

2

5

3

1

2

D/C#

[22]

PR103
*0/short_4

4

3

1
2

2

PQ33
AO4427

PD9
SBR1045SP5-13
1

4

5

POWER_JACK
dcjk-2dc2003-000111-3p-v

PQ34
IMD2AT108

VIN_SRC

2
PQ1
DMN601K-7
1

CSIP_1
VIN
PC71
1u/10V_4
PR106
10/F_6

PR108
10/F_6
PC6
2200p/50V_4

PR4
4.7_6

PC67
0.1u/25V_4

PC78
1u/10V_4

ISL88731_VDDP

9

PR2
100K/F_4
MBCLK

VCC

BOOT

SDA

UGATE

SCL

PHASE

ACOK

LGATE

PR113
2.7_6
88731B_2
25

4
PQ2
AON7410

24

ISL88731_UGATE

23

PR115
0.01_0612

ISL88731_PHASE

20

C

ISL88731_LGATE

PL6
6.8uH_7X7X3
1

BAT-V

2

5

10

VDDSMB

PC74
0.1u/50V_6
88731B_1

PC76
4.7u/25V_8

3
2
1

11
MBDATA

VDDP

CSSN

NC
GND
GND
GND
GND
CSSP

+3VPCU

5

21

26

27

PD11
*RB500V-40

+3VPCU
PC73
1u/10V_4

PC7
0.1u/50V_6

CSIN

1
33
32
31
30
28

CSIP
C

PR5
49.9/F_4

PC75
0.1u/25V_4

PU7
ISL88731C

DCIN

22

88731ACSET

2

PGND

19

18 CSOP

B

4

MBAT+

5
BAT-V

6

100_4

PC9
10u/25V_1206
PC8
10u/25V_1206

BAT-V

B

PR120
10/F_6

CSOP_1

BAT-V

BAT-V

GND

29

12

NC

NC

15

PC72
100p/50V_4
PC1
*1u/10V_4

PC4
0.01u/25V_4

47p/50V_4

ICMNT

PR111
*0/short_4
PR109
100_4

14

8

PR104
2.21K/F_4
PC68
0.1u/25V_4

ICM

GND

PC70

PC5
2200p/50V_4

PR114
100_4
VBF

VCOMP

TEMP_MBAT [22]

PC69
47p/50V_4

17 CSON
PR117
*0/short_4
16

NC

7

PR107
TEMP_MBAT_C

ICOMP
NC

HI0805R800R-00/5A/80ohm_8
PL5

10 1
2
3
4
5
6
7
9 8
PJ2
bat-btj-08tc0b-8p-l-v
Batt_Conn

VREF
CSON

HI0805R800R-00/5A/80ohm_8
PL4

PR112
100K_4

CSOP_1

PC10
2200p/50V_4

PC77
0.1u/25V_4

+3VPCU
3

PQ43
AON7410

PR121
10/F_6
CSOP

ACIN

PC11
0.01u/25V_4

4

DCIN

PR105
82.5K/F_4

PR1
22K/F_4

PR3
2.2/F_4

3
2
1

13

[22] ACIN

PR110
100_4

PC2
0.01u/25V_4

ISL88731 thermal pad
tie to Pin12
ICMNT

[22]

PC3
*0.01u/25V_4

PU6
*CM1293A-04SO
A

1

MBCLK [22]

2
MBDATA [22]

TEMP_MBAT

3

CH1
VN
CH2

CH4
VP
CH3

6
5
4

A

MBDATA
+3VPCU
MBCLK

Quanta Computer Inc.

Add ESD diode base on EC FAE suggestion

PROJECT : ZE6
Size

Document Number

Rev
1A

CHARGER (ISL88731)
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

24

of

35

5

4

MAIND

SYS_SHDN#

MAIND [27,29]

SUSD

3

SYS_SHDN#

Ven=7.23V

TP13

TP16
[22] SYS_HWPG

VIN

+3VPCU

VIN

VL

4.7u/6.3V_6
PC123

3
OUT2
FB2

4

+3V_TON

10

+3V_DH

9

+3V_B

11

+3V_LX

12

+3VPCU

5

PC129
0.1u/50V_6

+3V_FB

PR174
1/F_6

C

PR176
*4.7_6

PR178
6.81K/F_4
+

4
PC131
0.1u/50V_6
PQ47
AON7702

PC132
*680p/50V_6

2

PC133
*680p/50V_6

TP12

PL11
2.2uH_7X7X3
+3VPCU

8223_EN
PR179
10K/F_4

+3VPCU
TP10

+3V_DL

7

3
2
1

+3V_SKIP

4

3
2
1

FB1

LGATE2

GND

VOUT1

+3VPCU
3.3Volt +/- 5%
TDC : 3A
PEAK : 4A
OCP : 5A
Width : 120mil

5

REF

VREG3

VREG5

PHASE2

LGATE1

PR180
*Short_4

1
2
3

PC130
0.1u/50V_6

PHASE1

GND

2

4

BOOT2

PU3
RT8223M

14

PC126
4.7u/25V_8

15

24

+5V_FB

PQ46
AON7702

PR177
*4.7_6

+
PC117
220u/6.3V_6X4.2

19

+5VPCU

UGATE2

BOOT1

25

+5V_DL

PR175
15.4K/F_4

20

UGATE1

ENTRIP2

+5V_LX

5

+5VPCU

22

17

16
VIN
+5V_B

TONSEL

ENTRIP1

21

PR173
1/F_6

PR167
*0/short_4

PQ45
AON7410

SKIPSEL

PGOOD

ENC

+5V_DH
PC128
0.1u/50V_6

EN

1

23

1
2
3

13

18

SYS_SHDN#

4

PL10
2.2uH_7X7X3

PC125
2200p/50V_6
PR169
*0_4

PR172
*0/short_4

+3V_PG

PQ44
AON7410

PR166
*0_4

PR171
330K/F_4

6

PR170
100K/F_4

5

+5VPCU
5 Volt +/- 5%
TDC : 4.7A
PEAK : 6.2A
OCP : 7A
Width : 180mil

8223_EN

PC122
0.1u/25V_4

PR168
*0/short_4

TP9

8223_VIN

PC121
2200p/50V_6

8

PC120
4.7u/25V_8

D

PC124
1u/6.3V_4

5

4.7u/6.3V_6
PC127

1
2

PC119
*100u/25V_6X5.8

+5VPCU

C

TP15

+3VPCU

VIN
PR165
10_8

PR164
665K/F_4

+

TP11

8223REF

VIN

VIN

D

1

[4,26,30]

SUSD [29]
TP14

2

PC134
0.1u/10V_4

PR184
10K/F_4

1

PR181
100K/F_4

PR182
80.6K/F_4

PR183
56.2K/F_4

PC118
220u/6.3V_6X4.2

+5V_DL

PD12
CHN217

L(ripple current)
=(9-5)*5/(2.2u*0.4M*9)
=2.525A
Iocp=7-(2.525/2)=5.74A
Vth=5.74A*14mOhm=80mV
R(Ilim)=(80mV*10)/10uA
~80.323K

B

PC135
0.1u/50V_6

2

OCP:7A

PR185
*0_6
+3V_DL

3

L(ripple current)
=(9-3.3)*3.3/(2.2u*0.5M*9)
~1.9A
Iocp=5-(1.9/2)=4.05A
Vth=4.05A*14mOhm=56.7mV
R(Ilim)=(56.7mV*10)/10uA
~56.7K

PR186
*0/short_6

PR187
*0/short_6

1
PC137
0.1u/50V_6

OCP:5A

PR188
*0/short_6

2
PD13
CHN217

3
PC136
0.1u/50V_6

1

B

+15V_ALWP

+15V
PR189
22_8

PC138
0.1u/50V_6

+3VPCU
+5VPCU

+5VPCU

+3VPCU
+3VPCU

PR193
1M_6

PR194
*1M_6

SUSD
MAIND 2

2

S5D

2

A

PR195
1M_6

PQ49
DMN601K-7

1

1

PQ25
AO3404

TDC : 0.148A
PEAK : 0.2A
Width : 10mil

PQ24
AO3404

A

+3VSUS
+3V_S5

PQ50
DMN601K-7
PQ51
DMN601K-7

PC139
1000p/50V_4

+5V_S5

+5V

TDC : 0.008A
PEAK : 0.01A
Width : 10mil
5

PQ26
AO3404

2

1

PQ48
DTC144EU

2

1

2

PQ19
AO3404

1

1

2

1

S5_ON

1

2,23,30]

PQ32
AO3404

2

1

MAIND

2

3

3

3

3

S5D

TDC : 1.32A
PEAK : 1.76A
Width : 60mil

3

PR192
22_8

3

PR191
22_8

VIN

3

PR190
1M_6

+15V

+5V_S5

3

+3V_S5

3

VIN

4

TDC : 1.627A
PEAK : 2.2A
Width : 70mil
3

Quanta Computer Inc.

+3V

TDC : 1.496A
PEAK : 2A
Width : 60mil

PROJECT : ZE6
Size

Document Number

Rev
1A

SYSTEM 5V/3V (RT8223M)
Date:
2

Friday, March 11, 2011

Sheet
1

25

of

35

5

4

3

2

1

12/10 : PR141 need to add after thermal final tune.
PR8

*0_4

PR141

SYS_SHDN#

*0_4

PR12
10K/F_4

1
PC82
0.22u/25V_6

14

[4] VID0
PR22

[4,11] ICH_DPRSTP#

*0/short_4 6

PR23

[4,11] PM_DPRSLPVR

499/F_4

7

PR119

5
LX

1
2
3

DH

BST

TIME

ILIM

VCC

TP3

D1

DL

PC89

D0
CSP

PR18
1.8K/F_4

PU8
DPRSLPVR

MAX8796GTJ+

CSN

PC87
0.22u/6.3V_4

4
1000p/50V_4

PWR

PR20

AGND

PR19
4.02K/F_4

[4,11,23]

PR137

*0/short_4

B

10/F_4

PR14

10/F_4

VCC_SENSE

[6]

VSS_SENSE [6]

1000p/50V_4

*0/short_4

PR133

PR21

PC86

PR129
PR138

ESR=9m
8796CSP

*0/short_4

PR132

[22,23] VRON

[2,23] VR_PWRGD_CK410#

PC83
100p/50V_4
PR131

IMVP_PWRGD

PC17
330u/2V_7343

PC15
*680p/50V_6

1000p/50V_4

GNDS
1K/J_4

+

PC92
330u/2V_7343

Load-line=-5.9mV/A
for Pine Trial-M

FB_SRC

VIN
+3V

+
PR15
10K/F_4

4

8796CSN

PC12

fsw=300KHz

PR122
10K_6_NTC

2.74K/F_4

2

PR130
200K/F_4

tSW = 16.3pF x (RTON + 6.5K )

PR16

3

33

PGND
21

CCV
32

V3P3

GNDS

13

12

SHDN
11

10

9

TON

PR140
*100K/F_4_NTC

CLKEN

FB
PWRGD

THRM

13K/F_4
B

PQ37
AOL1718
PR24
*4.7_6

*2.7K/F_4

8

PR17
*0/short_4

1000p/50V_4

5

DPRSTP

C

VCORE

8796DL

22

2200p/50V_4

1

OCP:14A

8796LX

D2

PC16

PWR

TP4

PL7
1uH

D3

PR125
2.7K/F_4

8796THRM

VID5

DCR=3m

1

8796VCC

*0_8
VID6

D4

PC88

0.1u/50V_6
PR126

PR124

D5

PC84

2

*0_8

+3VPCU

25

26

24

27

28

29

30

31

23
D6

5

[4] VID1

15

*0_8

PR127

1
2
3

16

PR128

VID 1.0V

1

17

[4] VID2

D

VID3

PQ36
AOL1448

2

[4] VID3
C

PGDIN

18

VRHOT

19

VID2

4
VDD

20

[4] VID4

PC90
100u/25V_6X5.8

PC13
2200p/50V_6

8796DH

10/F_6

[4] VID5

*0_8

+3VPCU

VID4

12.7K/F_4

PR11

PC14
4.7u/25V_8

2

PR123
2.2_6

PC81
1u/10V_4

[4] VID6

*0_8

PR135

+

2
2

8796VCC

PC85
1u/10V_4

*0_8

VID0

VIN

1

+5V

*0_8

PR139

TP1

VID1
PR118
60.4K/F_4

D

PR136

PR25

TP2
+5V

1

[4,25,30]

*68/F_4

PR9

+1.05V
[4] H_PROCHOT#

*0/short_8

PR146

*0/short_8

10K/F_4

FB_SRC
PR134
*0/short_4

PR13

*10/F_4

GNDS

PR10

*10/F_4

VCORE

C187
*.1U/10V_4

Connect to output cap GND

+3V

PC91
*470p/50V_4

A

A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1A

VCore( IMAX8796GTJ+)
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

26

of

35

5

4

3

2

1

33

[PWM]
PC26
10u/6.3V_8

30mil
0.75A

PR45
*0/short_6

PC27
0.1u/50V_6

8207A_VBST

+0.75V_DDR_VTT
D

VIN

8207A_LX
8207A_DL

PC93
4.7u/25V_8

PC22
10u/6.3V_8

VTTGND

DRVL

LL

DRVH

VBST

PC96
0.1uF/50V_6
PL8
2.2uH

PGND

VTTSNS

PQ39
AON7410

CS_GND

PC94
2200p/50V_6

PC28
4.7u/25V_8

add for EMI
+1.5VSUS

18

+1.5VSUS

+1.5VSUS
1.5 Volt +/- 5%
TDC : 7A
PEAK : 9A
OCP : 10A
Width : 280mil

17
5

2

VLDOIN

1

VTT

GND

3
2
1

19

20

21

22

23

24

4
25

PC23
10u/6.3V_8

PR32
10K/F_4

NC

PC20
1u/10V_4

PR29
100K/F_4

(For RT8207A

PC101
330u/2V_7343

PC35
10u/6.3V_8

PC32
1000pF/50V_4

C

+3V_S5

VIN

PQ38
AON7702

PC29
1000p/50V_4

HWPG_1.5V [5,22,23]

2
*0/short_4

add for EMI

add for EMI

400KHZ) close to PC2016

SUSON [5,22,23,29]

2
*0/short_4

1
PR28

MAINON [22,23,28,29]

+5V_S5

PR34
*0_4

B

PC19
1u/10V_4

13

S5_1.8V 1
PR27

PC18
*33p/50V_6

+

PR33
5.1/F_6

PR30
620K/F_4

S3_1.8V

4

+5V_S5

14

PR41
*0/short_6

PR40
*0/short_6

PR48
2.2/F_4

PR36
13K/F_4

15

12

S5
11

S3

PGOOD

10

COMP

V5FILT

16

3
2
1

VTTREF
VDDQSET

PC21
0.033u/50V_6

6

V5IN

9

+5V_S5
C

CS

PU1
RT8207L

MODE

VDDQSNS

5

+SMDDR_VREF

GND

8

4

NC

+1.5VSUS

7

3

15mil
0.375A

D

5

8207A_DH

Vout = (PR150/PR149) X 0.75 + 0.75
L(ripple current)
=(19-1.5)*1.5/(2.2u*400k*9)
~1.57A
Vtrip= (10-1.57/2)*14mohm=0.129V
RILIM=Vtrip/10uA~12.901Kohm

8207A_SET
S5_1.8V

S3_1.8V
PR26

*0_4

+1.5VSUS

B

3

PR31
10K/F_4

[25,29] MAIND

MAIND

2
PQ27
AO3404

1

S3

+1.5V

TDC : 2A
PEAK : 2.7A
Width : 80mil

A

S5

+1.5VSUS

REF

VTT

S0

1

1

ON

ON

ON

S3

0

1

ON

ON

OFF

S4/S5

0

0

OFF

OFF

OFF
A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1A

DDR 1.5V(TPS51116)
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

27

of

35

5

4

3

2

1

34
VIN
+5V_S5
D

D

4

PR91
10K_4

2
PC56
*0.1u/50V_6

3
4

HWPG_1.05V

UGATE

VOUT

PHASE

VDD
FB
PGOOD

OC
VDDP
LGATE

GND

PGND

NC

TPAD

3
2
1

PQ41
AON7410

12

PL9
2.2uH_7X7X3

UGATE-1.05V

11

PHASE-1.05V
PR95
5.62K/F_4

10
PC61
1u/10V_4

9

LGATE-1.05V

8

5
14

+

PR163
*4.7_6

4
PQ42
AON7702

7
3
2
1

6

TON

13

1

1

BOOT

C

PC113
0.1u/10V_4

2

16

EN/DEM

PC62
0.1u/50V_6

5

15
+3V

[22,23,29]

PR93
*0/short_6

+1.05V
PC58
4.7u/10V_6

G5602

MAINON

C

2

PU5
PR92
*0/short_4

PC116
4.7u/25V_8

1

PR94
2.2/F_6

PR90
1M/F_4

[22,23,27,29]

PC114
2.2n/50V_4

PD7
RB500V-40

5

PR87
10_6

PC115
*680p/50V_6

17

NC

PC111
330u/2.5V_6X4.2

PC57
1u/10V_4

PC112
*10u/6.3V_8

PC55
*1000p/50V_6

B

R1

PR89
4.02K/F_4

PC54
*33p/50V_6

VOUT=(1+R1/R2)*0.75

+1.05VSUS
1.05 Volt +/- 5%
TDC : 5.5A
PEAK : 7.3A
OCP : 9A
Width : 220mil

1.05V_FB

R2

PR88
10K/F_4
PR86
*0/short_6

B

PR85
*0/short_6

A

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

L(ripple current)
=(19-1.05)*1.05/(2.2u*272k*19)
~1.658A
Rth=14m*(9-0.829)/20uA
RILIM=5.719Kohm

A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1A

+1.05V(G5602)
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

28

of

35

5

4

PR59
1M_4

3

3

VCCGFX
0.89Volt +/- 5%
TDC : 1.98A
PEAK : 2.64A
Width : 80mil

SUSD [25]

3

3

SUSD

PQ9
DTC144EU

2

2

2

PQ17
*DMN601K-7
1

PQ11
DMN601K-7

D

VCCGFX

PC30
*2200p/50V_4

PQ8
DMN601K-7

+1.05V

PC106
10u/6.3V_8

PQ40
AO3402

1

2

1

SUSON

1

[5,22,23,27]

PR58
1M_4

1

1

+1.5V

+1.05V

PR52
22_8

PR50
*22_8

PR51
22_8

PR147
47/F_4

Rg

2

MAIND

[25,27]

3

3

3

2

2

2

PR144
127/F_4

2

PQ14
*DMN601K-7
1

PQ12
DMN601K-7
1

1

1

PQ13
DMN601K-7

PQ15
DMN601K-7

PQ16
DMN601K-7

C

Rh

Vout1 = (1+Rg/Rh)*0.5

PR196

+5VPCU

4
HWPG_1.05V

VCCGFX

PR197

2

*0/short_4

3
8
9

+3VSUS
PR66
22_8

+3V
B

VPP PGOOD
VEN
VIN
GND
GND

NC

HWPG_1.8V

6

5

3
3

PC142
PC143
10u/6.3V_8 0.1u/50V_6

R1

HWPG_1.05V

PQ7
DTC144EU

2

2

R2

PR200
34K/F_4

+1.8V
1.8Volt +/- 5%
TDC : 0.5A
PEAK : 0.7A
Width : 20mil

Vout =0.8(1+R1/R2)
=1.8V

PQ10
DMN601K-7
1

1

[22,23,28]

PR198
43.2K/F_4
PC141
10u/6.3V_8

PC144
*0.1u/50V_6

[22]

+1.8V

7

PR199
100K_4

VO

1

0.8V
PR54
1M_4

100K_4

PU4
G9661

1u/16V_6

ADJ

PC140

PR55
1M_4

PC100
0.1u/10V_4

PC33
*2200p/50V_4

B

VIN

6

1

PR68
1M_4

1

PQ18
DTC144EU

2

+5V
VCC

HWPG_VCCGFX [22,23]
PR143
10K/F_4
HWPG_1.05V
PC95
*0.1u/10V_4

PC102
33n/25V_4

3

3

MAIND
3

MAINON_ON_G

MAINON

1

PR60
1M_4

C

[22,23,27,28]

4

2

PR53
22_8

PGD
EN

+15V
PR142
102/F_4

PR67
1M_4

FB

GND

+5V

DRV

3

PC40
10u/6.3V_8

2

+3V

PR145
100K_4

2

5

VIN

+3V

PU9
G9334

3

+
PC103
330u/2V_7343

PC105
0.1u/10V_4

1

PR56
22_8

SUS_ON_G

D

2

2

PR64
*22_8

3

+15V

1

PR49
1M_4

+3VSUS

2

+1.5VSUS

1

VIN

A

A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1A

Discharge/1.8V
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

29

of

35

1

2

3

4

5

36

Thermal Protection (DCD)
VIN

A

A

PR47
1M/F_4

1

PD2
SW1010CPT

PQ3
AO3409

3

TSNS_ON 2

S5_ON

3

2

VL

B

1

PQ6
DTC144EU
VL

B

SYS_SHDN#

3

+

1

2

3

4

PU2A
AS393MTR-E1

PQ4
DMN601K-7
PC25
0.1U/25V_4

1

2.469V

2

S5_ON

PR44
200K/F_4

8

PC24
0.1U/25V_4
PR43
10K/J(NTC) _6

[22,23,25]

[4,25,26]

PR35
200K/F_4

3

PR42
1.3K/F_4

2
PR39
200K/F_4

PQ5
DMN601K-7

C

1

C

PU2B
5
6

+

7

AS393MTR-E1

D

D

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Rev
1A

Thermal protect
Date:
1

2

3

4

Friday, March 11, 2011

Sheet
5

30

of

35

5

4

3

2

1

30
DDR3 SO-DIMM

DMI (100MHz)

Page 03
CLOCK GEN CK505
(SLG8SP513VTR
,ICS9LPRS365BKLFT)

MEM (333MHz)

D

LVDS CLK (Max. 200MHz)

11.6 " LED Panel

D

Page 15

SATA (100MHz)

Tigerpoint
PCI (33MHz)

BIT CLK (24MHz)

Audio ALC272
Page 26

REF (14.31818MHz)
CPU FSB (166MHz)

Intel@Pineview-M

USB (48MHz)
MCH FSB (166MHz)

SUSCLK (32KHz)

Page 9~14
MCH DMI (100MHz)

C

Page 5~8

LCD CLK (100MHz)

C

Y2(32.768K KHz)

DOT 96 (96MHz)

PCIE (100MHz)

LAN AR8131L

Y3(25 MHz)

Page 19

Page 2
PCIE (100MHz)

WLAN(Mini Card 1)

Page 21
PCIE (100MHz)

WLAN(Mini Card 2)

Page 21
B

B

PCI CLK (33MHz)

EC
(WPCE781L/FLASH)

Y4(32.768 KHz)

Page 23
PCI CLK (33MHz)

Debug Card
Page 21
Card Reader
RTS5138
Page 22

48MHz

Y5(12 MHz)

A

A

Quanta Computer Inc.

Y1(14.318 MHz)

PROJECT : ZE6
Size

Document Number

Rev
1B

Clock Distribution Diagram
Date:
5

4

3

2

Friday, March 11, 2011

Sheet
1

31

of

35

5

4

3

2

1

31

ISL6261A
PU3

D

D

VCC_CORE
& lt; VRON & gt;

+5VPCU
& lt; AC/DC Insert & gt;
+5VPCU

+5V_S5
& lt; S5D & gt;

AO3404
PQ0010

VIN

AO3404
PQ0009

+5V
& lt; MAIND & gt;

POWER
VIN

+3VPCU
& lt; AC/DC Insert & gt;

SYSTEM
5V/3V
(RT8206BGQW)

AO3404
PQ0008

PU0001

+3V_S5
& lt; S5D & gt;

+3VPCU

CHARGER
(ISL88731)

VIN

PU2

USB Connecter
RTC, TPT

+3VSUS
& lt; SUSD & gt;

+3V
& lt; MAIND & gt;

RT9025-25PSP
PU1

RTC, Hall Sensor, Light Sensor, EC, BIOS

+3V_S5

TPT , LAN , LAN EEPROM , RJ45 LED

+3VSUS

+2.5V
& lt; MAINON & gt;

+1.5VSUS

+1.5VSUS

VIN

+1.8V

B

+1.5VSUS
& lt; SUSON & gt;
AO3404
PQ2002

+1.5V

3G

CLK_GEN, CPU, TPT ,

LCD , CCD, DMIC, BT, Codec, WLAN/Wimax, Card reader, EC, DDR, HDMI

DDR
CPU, HDMI
CPU, TPT

+0.75V_DDR_VTT DDR
+1.5V
& lt; MAINON & gt;
+SMDDR_VREF
+1.05V

+0.75V_DDR_VTT
& lt; MAINON & gt;

CPU, DDR

B

CLK_GEN , CPU, TPT

VCCGFX

CPU

+2.5V

+SMDDR_VREF
& lt; SUSON & gt;

G9334ADJ

C

TPT , CRT , TouchPad , Codec , SATA , FAN , HDMI

+3VPCU

AO3404
PQ0013

+3V

RT8207A
PU2000

CPU

+5V_S5
+5V

AO3404
PQ0005

ADAPTER

LCD Backlight

+5VPCU

C

BATTERY

VCC_CORE

Distribution

HDMI

+1.05V
& lt; MAINON + (RC) & gt;
+1.05V

UP6111AQDD

G9334ADJ
PU9004
G9334ADJ
PU9003

A

VCCGFX
& lt; HWPG_1.05V & gt;

+1.8V
& lt; HWPG_1.05V & gt;

A

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

Power Tree
5

4

3

2

1

Sheet

32

of

35

5

4

3

2

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32

ZGA Power On Sequence

From AC,BATT
D

From PWM to EC

VIN
+5VPCU +3VPCU VCCRTC
HWPG_SYS(PCU)

D

& gt; =18ms (VCCRTC to RTCRST#)(t200)

From Button to EC
From EC to PWM

From EC to SB
From EC to SB

RTCRST#
NBSWON#
S5_ON
+5V_S5

& gt; =0ms (VCCRTC to S5 well)(t203)
+5V_S5 power up before +3V_S5, or
after +3V_S5 within 0.7V (t201)

+3V_S5
EC_RSMRST#
DNBSWON#

+3V_S5 power down before +5V_S5,
or after +5V_S5 within 0.7V

& gt; =5ms (S5 well to EC_RSMRST#)(t205)
100ms (EC define)
1~2 RTCCLK (SUSC# to SUSB#)(t234)

From SB to EC
From EC to PWM
From PWM to EC

SUSB#,SUSC#
SUSON
+3VSUS +1.5VSUS +SMDDR_VREF
HWPG_1.5V (SUS)

From EC to PWM

MAINON

C

C

+5V power up before +3V, or
after +3V within 0.7V (t209)

+3V power down before +5V,
or after +5V within 0.7V

+5V +3V +1.5V +0.75V_DDR_VTT

+1.05V power down before +1.5V,
or after +1.5V within 0.7V

From PWM to EC,PWM MAINON + (RC)
+1.05V

+1.5V power up before +1.05V, or
after +1.05V within 0.7V (t211)
& gt; =0ms (+3.3V to +1.05V)(T1)

From PWM to EC,PWM HWPG_1.05V
+1.8V VCCGFX
From PWM to EC
HWPG_VCCGFX
From PWM to EC HWPG
From EC to PWM

& gt; =0ms (+1.8V to +1.05V)(T3)
& gt; =0ms (+1.05V to +1.8V)(T2)

VRON

10~100us (VCC_CORE=1.2V)(Tc)

VCC_CORE
From PWM to CLK,SB VR_PWRGD_CK410#
B

0~0.6ms (VCC_CORE@VID value)(Td)
B

BCLK
From CLK Gen
From PWM to EC,CPU IMVP_PWRGD
99ms (S0 well of TPT to TPT_PWROK)(t214)

To SB
From SB to CPU
From SB

TPT_PWROK
H_PWRGD

0.05~200ms;Typ=20ms (VCC_CORE to H_PWRGD)(Te)
& gt; =10BLK=60ns(BCLK stable to H_PWRGD)(Tf)

PLTRST#
1~10ms (H_PWRGD to PLTRST#)(Th)

*Note: EC will sampling SUSB# & SUSC# every 5ms.

ICH SMBUS Table
CLK GEN

A

(SMB_DATA)/(SMB_CLK) (+3V_S5)
Power Plane

RAM

V

V

+3V

MOS CKT (Level shift)

+3V

Stuff

Stuff

EC SMBUS Table
Mini Card (WLAN)

V

Mini Card (3G)

Battery

V

+3V

*Reserve

EC781 SDA1 / SCL1 (+3VPCU)

CPU thermal Sensor

V

EC781 SDA2 / SCL2 (+3V)

+3V_SUS

EC781 SDA3 / SCL3 (+3VPCU)
Power Plane

Stuff

MOS CKT (Level shift)

*Reserve: There is not SMBUS function in AVL

A

V

+3VPCU

+3V

X

X

Quanta Computer Inc.
PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

SYSTEM INFORMATION
5

4

3

2

1

Sheet

33

of

35

5

4

3

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1

33

NBSWON# 3

SLP_S3#(SUSB#):
Control non-critical power plane when system into S3(Suspend to RAM)/S4(Suspend to Disk)/S5(Soft off).

4
S5_ON

SLP_S4#(SUSC#):
Control non-critical power plane when system into S4(Suspend to Disk)/S5(Soft off).Used to control DRAM power

1b
AC Adapter
BATT Charger
PU9001

D

1
VIN

Battery

6
EC_RSMRST#

+3VPCU
Always System power

Regulator
PQ9007

+5VPCU

RSMRST#
D

7
DNBSWON#

2

9
SUSON

5 +5V_S5 power up before +3V_S5
+3VPCU/+5VPCU +5V_S5
MOS
PQ0008/PQ0009 +3V_S5

PWRBTN#

8
SUSC#

SLP_S4#

SUSB#

12
MAINON

SLP_S3#

EC

TigerPoint
ECPWROK

Pineview

19
VRON

U8002
24
H_PWRGD
TPT_PWROK

CPUPWRGD

PWROK

CPUPWRGOOD

C

RSTIN#

23

Regulator
PU3

PLTRST#

U23

20
VCC_CORE

VIN

U8003

C

PWROK

25
PLTRST#

VRMPWRGD

IMVP_PWRGD 22
VR_PWRGD_CK410#
16
+1.8V

+1.8VSUS

MOS

1.05V power up before 1.8V

SYS_HWPG

PQ9021

+1.05V

VCCGFX(0.89V)

17

B

14
+1.05V

MAINON +(RC)

Regulator
PU6000

HWPG_VCCGFX

15

LDO
PU9004

VIN

21
VR_PWRGD_CK410

HWPG_1.8V

16

18
HWPG

HWPG_1.05V

B

HWPG_2.5V

CKPWRGD

1.5V power up before 1.05V

HWPG_1.5V

CK505
+3VPCU

+2.5V

LDO
PU1
+1.5VSUS

+1.5V

LDO
PQ2002
+3VPCU/+5VPCU

+5V

MOS
PQ0005/PQ0010

U9

13

+3V

+5V power up before +3V

11
+0.75V_DDR_VTT 13
A

A

VIN

Regulator

+1.5VSUS

PU2000

+3VPCU

SUSD

MOS

+SMDDR_VREF

+3VPCU

MOS

10
+3VSUS

Quanta Computer Inc.
PROJECT : ZE6

PQ0013
Size

Document Number

power sequence block diagram
Date:
5

4

3

2

Friday, March 11, 2011
1

Sheet

34

of

35

Rev
1B

5

4

3

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1

MODEL

Model

REV
A1

ZE6 MB

CHANGE LIST

ZE6
FROM

To

X

FIRST RELEASED: (PCB:A)

1A

Page 2 : add R374 for CLK GEN change version
Page 11 : change RTC connector type from SMT to holder.
Page 15 : modify TP connector pin define
Page 16 : modify audio and mic connector pin define.
Page 17 : modify USB charger IC circuit to support or not support charger function.

D

B

D

Page 29 : modify 1.8V IC enable signal to HWPG_1.05V
20110117 Page 15 : add CP1~CP6 for EMI issue
20110117 Page 15 : for EMI issue: change R232,R233,R234,R235,R236,R231,R211 to bead CX5BB121001
20110118 Page 27 : for EMI issue: add PC96 ,PC32 and stuff PR48, PC29
20110118 Page 30 : Thermal temperature setting at 75C, change PR42 from 1.54K/F to

1.3K/F

20110131 Page 14 : add 5V into LCD connector for IVO panel to use.

B

C

C

B

B

1D
A

A

Quanta Computer Inc.
PROJECT MODEL :

DOC NO.

11.6

APPROVED BY:

DATE:

2009/12/05

PROJECT : ZE6
Size

PART NUMBER:

DRAWING BY:

REVISON:

1B

4

3

2

Rev
1B

Change list
Date:

5

Document Number
Friday, March 11, 2011

Sheet
1

35

of

35