Temperatury rdzeni procka masz w normie. (zblizone do realnych) Temperatura grafiki Ok. Jedynie wskazania czujnika TZ01 (ten ostatni zrzut > na czerwono) jest dziwny?! -temperatura szybko rośnie do ponad 7x st.C. Może KBC "dziwnie odczytuje " wskazania czujników / bład wsadu KBC żle to interpretuje i masz te "zacinania"interpretuje . Czujnik TZ01 i PCH biorą dane z BIOS"a, zas na KBC powinna być pin. ( odpowiedzialny za .. GPU CPU thermal)* lub coś zblizone Albo Bios albo PCH, tak 80:20 *(w Asusach ulot Bios to standart, zwłaszcza te modele) ______________ Modele: Asus A75A/A75VB/A75VC/A75VD/A75VJ/A75VM, K75A/K75VB/K75VC/K75VD/K75VJ/K75VM, R700AR700V/R700VD/R700VJ/R700VM: - to platforma Compal QCL70 rev.A( lub B), płyta opisywana jako LA-8222P rev.? Te modele poniżej to już "troszkę co innego" Asus A75D/A75DE, K75D/K75DE, R700D/R700DE/R700T, X75D/X75DE: - Compal QML70 Czujnik od pomiaru TZ01 i grafiki moga być - TZ01 (element pomiarowy to tranzystor, ząs IC to element wykonawczy http://obrazki.elektroda.pl/7738465500_1401776978_thumb.jpg - do grafiki http://obrazki.elektroda.pl/1257159200_1401777068_thumb.jpg W Asus RV700 czujnik jest na ukł. PU1/ str.43 SM.
A
B
C
D
E
1
1
Compal Confidential
2
2
QCL70 MB Schematic Document
LA-8222P
3
3
Rev: 1.0
2012.01.09
4
4
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A
B
C
D
SCHEMATIC A8222
Rev
B
4019G8
Sheet
Monday, February 13, 2012
E
1
of
61
1
2
3
Compal Confidential
4
QCL70
ZZZ1
PCB-MB
PCB P/N for Load BOM
A
DDR3 1333/1600MHz 1.5V
Mobile
DAZ0NE00100
PEG 16X
NV N13P-GL / GS
(N13M-GE1)
+1.5V, +0.75VS
A
Page 10, 11
rPGA 988B Socket
Page 4 ~ 9
port 5,1
USB conn x2
USB Board
port 3
100MHz
5GB/s
Camera
Page 30
Card Reader
RTS5137
port 4
RGB, HV Sync, DDC
Page 30
HDMI, DDC
Page 35
Page 30
USB2.0
LVDS, EDID, DISPOFF#, PWM
CRT Conn
Page 33
DMI x4
100MHz
2.7GT/s
HDMI
BANK 0, 1, 2, 3
Dual Channel
+VCC_CORE, +VCCP,
+VCC_GFXCORE_AVG, +1.5V_CPU_VDDQ,
+1.8VS, _VCCSA
FDI x8
(UMA)
LCD conn
DDR3-SO-DIMM X 2
Ivy Bridge
Processor
Page 20 ~ 29
B
5
Memory Card Slot
SD/MMC
Page 34
Page 34
Intel
PANTHER-POINT
PCH
B
port 10
MiniCard-2
Page 41
port 0,2
USB3.0
port 1,3
USB3.0 conn x2
Page 37
HM76/HM75
Audio Jack (HP)
Azalia
Realtek
ALC269
FCBGA 989 Balls
Page 12 ~ 19
Audio Jack (MIC)
Page 33
SATA
port 0
Speaker Connector
2.5 " SATA HDD Connector
Page 33
Page 33
Page 33
Page 31
C
C
PCI-e
port 1
port 2
LAN/CRT Board
10/100/1000 LAN
Realtek GbE
RTL8111F
port 1
+1.05VS, +1.8VS, +3VS,
+3V_PCH, +5V_PCH, +RTCVCC,
+VCCAFDI_VRM
2.5 " SATA HDD Connector
Page 31
Mini Card-1
WLAN
Bluetooth
port 2
SATA ODD Connector
Page 41
Page 32
Page 31
SPI ROM
4MB For win7
8MB For win8
SPI
Page 12
LPC BUS
Touch Pad CONN.
D
Page 39
ENE KB9012QF
Reserve KB930QF
+3VLP/+3VALW
page 40
Int. KBD
DC/DC Interface CKT.
D
Page 39
Page 29,42
SPI ROM
128KB
Fan Control
Page 38
Compal Secret Data
Security Classification
Issued Date
Page 40
2011/08/23
Deciphered Date
2012/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
SCHEMATIC A8222
Rev
B
4019G8
Date:
1
Compal Electronics, Inc.
3
4
Monday, February 13, 2012
Sheet
5
2
of
61
A
X76@:
VRAMX16X8
ZZZ
X76L01@
CLKOUT
HYN 128*16*8
ZZZ2
X76L02@
ZZZ3
ZZZ5
1G SAM
ZZZ6
PCI1
2G D HYN
X76L06@
LPC Debug Port
PCI4
ZZZ11
X76L12@
ZZZ12
N13P-GS
GS@
X76L11@
U10
N13P-GL
GL@
GS@
U10
USB2.0+3.0
2
USB2.0+3.0
1
USB2.0+3.0
None
2
USB2
None
3
CAMERA
4
None
PCH
0
4
EC
PCI3
1G HYN
VRAMX16X8-GS
Card Reader
USB2
6
None
7
None
8
None
9
None
10
JMINI1 (WLAN) Bluetooth
11
None
12
None
13
None
None
Voltage Rails
GL@
VIN
GS 2G SAM
Power Plane
N13P-GS
N13P-GL
Adapter power supply (19V)
N/A
Deep
S3
N/A
N/A
BATT+
GS 2G HYN
Description
S1
S3
Battery power supply (12.6V)
N/A
N/A
N/A
S5
PCH
N/A
N/A
B+
GEL@: N13M-GE1 or N13P-GL N13M-GE1
GS@: N13P-GS
GE@
U10
GE@
DIS@: VGA componet
9012@: EC(ENE 9012 chip)
XDP@: Intel debug port
930@: EC(ENE 930 chip)
N13M-GE1
IU3@: USB3.0 by PCH
PS8520
USB30@: USB3.0 controller IC
N13M-GE1 x8
GE8@
U10
GE8@
AC or battery power rail for power circuit
N/A
N/A
N/A
N/A
+3VLP
3.3V power rail for 51ON power management
ON
ON
ON
ON
+3VALW
3.3V always on power rail
ON
ON
ON AC/ON; DC/OFF
+LAN_IO
3.3V power rail for ethernet
ON
ON
OFF
OFF
+3VS_WLAN
3.3V power rail for DDR SPI,PCH,HDD,Audio,Card Reader ON
OFF
OFF
OFF
3.3V power rail for VGA
ON
OFF
OFF
OFF
+LCDVDD
3.3V power rail for LCD
ON
OFF
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON AC/ON; DC/OFF
5V power rail for PCH suspend well plane
ON
ON
OFF
OFF
5V power rail for HDD,AUDIO,FAN,Touch PAD
ON
OFF
OFF
OFF
5V power rail for SATA ODD
ON
OFF
OFF
OFF
1.8V power rail for CPU,PCH
ON
OFF
OFF
OFF
1.05V power rail for PCH
ON
OFF
OFF
OFF
1.05V power rail for CPU VCCIO,PCH
ON
OFF
OFF
OFF
+1.05VSG
1.05V power rail for N13P
ON
OFF
OFF
OFF
+1.5V
1.5V power rail for DDR3 system memory
ON
ON
ON
OFF
+1.5V_CPU_VDDQ
1.5V power rail CPU VDDQ
ON
OFF
OFF
OFF
+1.5VSG
1.5V power rail for N13P,VRAM
ON
OFF
OFF
OFF
+1.5VS
1.5V power rail for PCH,WLAN/BT combo
ON
OFF
OFF
OFF
+0.75VS
0.75V power rail for DDR VREF
ON
OFF
OFF
+VCCSA
ASM1466
+3VS
+VCCP
PS8520
W7@: WIN7
W8@: WIN8
OFF
+1.05VS
AI@: AI Charger
NAI@: Non AI Charger
OFF
OFF
+5VS_ODD
VCCSA for CPU system agent
ON
OFF
OFF
OFF
+VCC_CORE
ASM1466@
OFF
ON
+1.8VS
ZZZ10
OFF
ON
+5VS
ASM1466
PAR8520@
ON
3.3V power rail for PCH suspend well plane
+3VSG
N13M-GE1 x8
3.3V power rail for WLAN/BT Combo
+3V_PCH
+5V_PCH
ZZZ9
CORE Voltage for CPU
ON
OFF
OFF
OFF
1.5V power rail for N13P,VRAM
ON
OFF
OFF
OFF
CORE Voltage for N13P Graphics ON OFF OFF
ON
OFF
OFF
OFF
PCI EXPRESS
SMBUS Control Table
MINI1
BATT
PCH
EC
SODIMM
DGPU
X
X
V
X
X
V
X
X
X
X
X
V
PCH
V
X
X
X
V
X
SATA
X
X
X
V
X
V
SATA0
SATA1
None
Lane 5
None
Lane 6
None
Lane 7
None
Lane 8
None
1
HDD
EC_SMB_CK1
EC_SMB_DA1
KB930
EC_SMB_CK2
EC_SMB_DA2
KB930
PCH_SMBCLK
PCH_SMBDATA
PCH_SMLCLK
PCH_SMLDATA
+VCC_GFXCORE_AXG
+VGA_CORE
DIFFERENTIAL
DESTINATION
FLEX CLOCKS
DESTINATION
CLKOUT_PCIE0
10/100/1G LAN
CLKOUTFLEX0
CLK_SD_48M
CLKOUT_PCIE1
MINI CARD WLAN
CLKOUTFLEX1
None
CLKOUT_PCIE2
CLK
None
Lane 4
HDD
MINI CARD WLAN
Lane 3
OFF
10/100/1G LAN
Lane 2
DESTINATION
PCH
DESTINATION
Lane 1
1
SOURCE
DESTINATION
USB2.0+3.0
3
PCH_LOOPBACK
PCI2
2G B HYN
X76L05@
USB2 PORT
1
5
PCI0
2G SAM
USB3 PORT DESTINATION
DESTINATION
X76L15@
None
CLKOUTFLEX2
None
CLKOUT_PCIE3
None
CLKOUTFLEX3
None
CLKOUT_PCIE4
None
CLKOUT_PCIE5
None
CLKOUT_PCIE6
None
CLKOUT_PCIE7
None
CLKOUT_PEG_B
None
SATA2
ODD
SATA3
None
SATA4
None
SATA5
None
QCL70 * 16 (LA8222P)
Board ID Table for AD channel
Vcc
Ra / Rc
Symbol Note :
Board ID
3.3V +/- 5%
100K +/- 5%
Rb / Rd
33K +/- 5%
V AD_BID min
0.634 V
V AD_BID typ
0.819V
V AD_BID max
0.945 V
: means Digital Ground
Compal Secret Data
Security Classification
Issued Date
: means Analog Ground
2011/08/23
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
A
Monday, February 13, 2012
Sheet
3
of
61
5
4
3
2
1
1
+VCCP
2
R1
24.9_0402_1%
JCPU1A
D
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
14
14
14
14
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
B28
B26
A24
B23
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
14
14
14
14
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
G21
E22
F21
D21
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
14
14
14
14
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
G22
D22
F20
C21
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
14
14
14
14
14
14
14
14
C
14
14
14
14
14
14
14
14
+VCCP
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
A21
H19
E19
F18
B21
C20
D18
E17
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
A22
G19
E20
G18
B20
C19
D19
F17
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI_FSYNC0
FDI_FSYNC1
J18
J17
FDI0_FSYNC
FDI1_FSYNC
14 FDI_INT
FDI_INT
H20
FDI_INT
14 FDI_LSYNC0
14 FDI_LSYNC1
FDI_LSYNC0
FDI_LSYNC1
J19
H17
FDI0_LSYNC
FDI1_LSYNC
A18
A17
B16
eDP_COMPIO
eDP_ICOMPO
eDP_HPD#
C15
D15
eDP_AUX
eDP_AUX#
C17
F16
C16
G15
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
C18
E16
D16
F15
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
1
14 FDI_FSYNC0
14 FDI_FSYNC1
R2
EDP_COMP
B
eDP_COMPIO
and ICOMPO
signals
should be
shorted
near balls
and routed
with
typical
impedance
& lt; 25 mohms
eDP
2
24.9_0402_1%
PCI EXPRESS* - GRAPHICS
B27
B25
A25
B24
DMI
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
PEG_COMP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
Intel(R) FDI
14
14
14
14
JCPU1I
PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
J22
J21
H22
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
PCIE_GTX_CRX_N15
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_N10
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_N0
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N0
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
PCIE_GTX_CRX_P15
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_P11
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_P0
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P0
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
C33
C34
C35
C36
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N0
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P0
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
C49
C50
C51
C52
C53
C54
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P0
PCIE_GTX_C_CRX_N[0..15] 20
PCIE_GTX_C_CRX_P[0..15] 20
PCIE_CTX_C_GRX_N[0..15] 20
PCIE_CTX_C_GRX_P[0..15] 20
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
D
C
B
TYCO_2013620-2_IVY BRIDGE
CONN@
TYCO_2013620-2_IVY BRIDGE
CONN@
A
A
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
4
of
61
5
4
3
2
1
+3V_PCH
+3VALW
AL32
PROCHOT#
AN32
THERMTRIP#
R3
10K_0402_5%
+VCCP
R8
H_DRAMRST#
@
14 PM_DRAM_PWRGD
H_DRAMRST# 6
1
R11
1
5
S_PWG
2
0_0402_5%
D_PWG
2
0_0402_5%
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
AK1
A5
A4
+3V_PCH
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
1
200_0402_1%
PR-7
2
R14
+VCCP
C
R36
VDDPWRGOOD 1
2 VDDPWRGOOD_R
130_0402_1%
BUF_CPU_RST#
V8
AR33
SM_DRAMPWROK
RESET#
TCK
TMS
TRST#
2
TDI
TDO
AR28
AP26
XDP_TDI_R
XDP_TDO_R
1
1
XDP_TCK
XDP_TMS
XDP_TRST#
2
15,32,36,40,41 PLT_RST#
A
R15
75_0402_5%
U2
P
5
XDP_PRDY#
XDP_PREQ#
AR26
AR27
AP30
Y
4
R17
1
2
43_0402_1%
BUFO_CPU_RST#
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
AL35 XDP_DBRESET#_R1 1
R37
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
2
BUF_CPU_RST#
C
SN74LVC1G07DCKR_SC70-5
@
R20
0_0402_5%
XDP_DBRESET#_R 12,14
0_0402_5%
PR-7
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
2
UNCOREPWRGOOD
AP29
AP27
NC
2 H_CPUPWRGD_R AP33
33_0402_5%
VDDPWRGOOD
4
G
H_CPUPWRGD 1
R12
O
74AHC1G09GW TSSOP 5P
3
16 H_CPUPWRGD
JTAG & BPM
PM_SYNC
B
+3VS
PWR MANAGEMENT
AM34
A
2
C69
0.1U_0402_16V4Z
H_PM_SYNC
PR-2
1
D
R4
200_0402_1%
P
R9
14 SYSTEM_PWROK
SM_DRAMRST#
PRDY#
PREQ#
14 H_PM_SYNC
2
U1
+1.5V_CPU_VDDQ
1
1
1
1K_0402_1%
1K_0402_1%
2
2
2
1
1
R576
0_0402_5%
@
1
R21
R22
1
CLK_CPU_DPLL_R
CLK_CPU_DPLL#_R
R577
0_0402_5%
+3VS
1
H_THERMTRIP#
16 H_THERMTRIP#
PECI
A16
A15
CLK_CPU_DMI 13
CLK_CPU_DMI# 13
1
R23
1
2 H_PROCHOT#_R
56_0402_5%
AN33
DPLL_REF_CLK
DPLL_REF_CLK#
2 0_0402_5%
2 0_0402_5%
1
1
2
40,43 H_PROCHOT#
CATERR#
R18
R19
G
H_PECI
40 H_PECI
AL33
CLK_CPU_DMI_R
CLK_CPU_DMI#_R
3
H_CATERR#
A28
A27
2
@
DDR3
MISC
T1
THERMAL
PAD
SKTOCC#
CLOCKS
AN34
D
PROC_SELECT#
BCLK
BCLK#
C65
0.1U_0402_16V4Z~D
16 H_SNB_IVB#
MISC
PR-7
C26
2
2
JCPU1B
TYCO_2013620-2_IVY BRIDGE
CONN@
PR-17
C72
1
VDDPWRGOOD_R
2
12P_0402_50V8J
Reserve for EMI please close to JCPU1
@
C70
1
H_DRAMRST#
2
100P_0402_50V8J
PU/PD for JTAG signals
+VCCP
Reserve for EMI please close to JCPU1
XDP_TMS
B
PR-2
C640
1
51_0402_5% 1
2 R26
XDP_TDI_R
51_0402_5% 1
2 R27
+3VS
H_CPUPWRGD_R
2
100P_0402_50V8J
B
XDP_DBRESET#_R1 1K_0402_5% 1
2 R24
XDP_TDO_R
51_0402_5% 1
2 R29
H_CPUPWRGD_R
2 R25
XDP_TCK
51_0402_5% 1
2 R32
XDP_TRST#
51_0402_5% 1
2 R33
Reserve for EMI please close to JCPU1
@
C68
1
10K_0402_5%1
H_PECI
2
100P_0402_50V8J
@
C71
1
XDP_DBRESET#_R1
2
100P_0402_50V8J
Reserve for EMI please close to JCPU1
DDR3 Compensation Signals
Reserve for EMI please close to JCPU1
PR-17
SM_RCOMP0
BUF_CPU_RST#
2
100P_0402_50V8J
140_0402_1%1
2 R34
SM_RCOMP1
25.5_0402_1%
1
2 R38
SM_RCOMP2
1
C647
200_0402_1%1
2 R39
Reserve for EMI please close to JCPU1
A
+VCCP
Processor Pullups
H_PROCHOT# 62_0402_5%
1
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
2
R16
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
A
2
Sheet
Monday, February 13, 2012
1
5
of
61
5
4
3
2
1
JCPU1C
JCPU1D
B
10 DDR_A_BS0
10 DDR_A_BS1
10 DDR_A_BS2
SA_BS[0]
SA_BS[1]
SA_BS[2]
AE8
AD9
AF9
C
SA_CAS#
SA_RAS#
SA_WE#
10 DDR_A_CAS#
10 DDR_A_RAS#
10 DDR_A_WE#
AB6
AA6
V9
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
AE10
AF10
V6
D
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
DDRA_CLK0 10
DDRA_CLK0# 10
DDRA_CKE0 10
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
AA5
AB5
V10
RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]
AK3
AL3
AG1
AH1
DDRA_SCS0# 10
DDRA_SCS1# 10
SA_ODT[0]
SA_ODT[1]
RSVD_TP[9]
RSVD_TP[10]
AH3
AG3
AG2
AH2
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AB3
AA3
W10
SA_CS#[0]
SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]
DDRA_ODT0 10
DDRA_ODT1 10
DDRA_CLK1 10
DDRA_CLK1# 10
DDRA_CKE1 10
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
C4
G6
J3
M6
AL6
AM8
AR12
AM15
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
D4
F6
K3
N6
AL5
AM9
AR11
AM14
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
DDR_A_DQS#[0..7]
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_DQS[0..7]
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
10
10
DDR_A_MA[0..15] 10
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
R6
AA10
AB8
AB9
DDRB_CLK0 11
DDRB_CLK0# 11
DDRB_CKE0 11
AE1
AD1
R10
DDRB_CLK1 11
DDRB_CLK1# 11
DDRB_CKE1 11
RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]
AB2
AA2
T9
RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]
AA1
AB1
T10
SB_CS#[0]
SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]
AD3
AE3
AD6
AE6
DDRB_SCS0# 11
DDRB_SCS1# 11
SB_ODT[0]
SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]
AE4
AD4
AD5
AE5
DDRB_ODT0 11
DDRB_ODT1 11
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D7
F3
K6
N3
AN5
AP9
AK12
AP15
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C7
G3
J6
M3
AN6
AP8
AK11
AP14
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
D
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
11 DDR_B_BS0
11 DDR_B_BS1
11 DDR_B_BS2
11 DDR_B_CAS#
11 DDR_B_RAS#
11 DDR_B_WE#
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
AE2
AD2
R9
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
11 DDR_B_D[0..63]
AB4
AA4
W9
RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]
DDR SYSTEM MEMORY A
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR SYSTEM MEMORY B
10 DDR_A_D[0..63]
C
DDR_B_DQS#[0..7]
11
DDR_B_DQS[0..7]
11
DDR_B_MA[0..15]
11
B
TYCO_2013620-2_IVY BRIDGE
CONN@
TYCO_2013620-2_IVY BRIDGE
CONN@
1
+1.5V
R40
1K_0402_5%
Q6
D
D
S
S
3
1
2
BSS138_SOT23
H_DRAMRST#
5 H_DRAMRST#
DDR3_DRAMRST#_R
1
R41
2
1K_0402_5%
DDR3_DRAMRST# 10,11
2
R42
4.99K_0402_1%
2
1
G
A
A
1
0_0402_5%
1
0_0402_5%
@
2
2
R43
R44
PR-7
DRAMRST_CNTRL_PCH 9,13,40
EC_DRAMRST_CNTRL_PCH
40
Instant ON
C73
0.047U_0402_16V7K
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
6
of
61
5
4
3
2
1
CFG Straps for Processor
JCPU1E
CFG2
+VCC_GFXCORE_AXG
1
+VCC_CORE
1
??
2
R48
49.9_0402_1%
@
R46
49.9_0402_1%
@
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
2
VCC_AXG_VAL_SENSE
VSS_AXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE
RSVD5
L7
AG7
AE7
AK2
RSVD32
W8
RSVD33
RSVD34
RSVD35
AT26
AM33
AJ27
RSVD37
RSVD38
RSVD39
RSVD40
R45
1K_0402_1%
T8
J16
H16
G16
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
CFG4
@ R47
@R47
1K_0402_1%
RSVD27
Display Port Presence Strap
RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9
RSVD_NCTF10
CFG4
B34
A33
A34
B35
C35
RSVD51
RSVD52
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
CFG6
AJ32
AK32
BCLK_ITP
BCLK_ITP#
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
AN35
AM35
CFG5
R49
1K_0402_1%
@
R50
1K_0402_1%
@
1
1
2
RSVD24
RSVD25
J15
VSS_VAL_SENSE
C
R52
49.9_0402_1%
@
RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13
AT2
AT1
AR1
2
R51
49.9_0402_1%
@
2
1
J20
B18
VSS_AXG_VAL_SENSE
??
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
AR35
AT34
AT33
AP35
AR34
2
F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5
1
C
RESERVED
2
Please place as close as JCPU1
D
AH27
AH26
RSVD28
RSVD29
RSVD30
RSVD31
CFG
CFG4
CFG5
CFG6
AJ31
AH31
AJ33
AH33
AJ26
CFG2
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
1
VCC_DIE_SENSE
VSS_DIE_SENSE
AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
1
CFG0
2
D
B
B
KEY
PCIE Port Bifurcation Straps
B1
11: (Default) x16 - Device 1 functions 1 and 2 disabled
Please place as close as JCPU1
CFG[6:5]
TYCO_2013620-2_IVY BRIDGE
CONN@
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
A
A
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
7
of
61
5
4
JCPU1F
3
2
1
POWER
+VCCP
+VCC_CORE
PEG AND DDR
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
D
C
+VCCP
PR-7
@
2
VR_SVID_CLK 50
0_0402_5%
R54
75_0402_5%
2
2
H_CPU_SVIDCLK 1
R53
Place the PU
resistors close to CPU
1
1
AJ29
AJ30
AJ28
H_CPU_SVIDALRT# R55
H_CPU_SVIDCLK
VR_SVID_DAT
1
2
43_0402_1%
VR_SVID_ALRT# 50
+VCCP
Place the PU
resistors close to CPU
1
1
VIDALERT#
VIDSCLK
VIDSOUT
VR_SVID_DAT
@
2
2
R56
130_0402_1%
B
VR_SVID_DAT 50
1
+VCC_CORE
R57
100_0402_1%
1
R58 1
R59
2
2 0_0402_5%
0_0402_5%
+VCCP
VCCSENSE 50
VSSSENSE 50
R60
2
1
10_0402_1%
B10
A10
R61
100_0402_1%
2
VCCIO_SENSE
VSS_SENSE_VCCIO
AJ35 VCCSENSE_R
AJ34 VSSSENSE_R
1
VCC_SENSE
VSS_SENSE
2
PR-7
VCCIO_SENSE 48
A
1
A
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
C75
0.1U_0402_16V4Z
B
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO40
SVID
C
SENSE LINES
D
8.5A
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
C74
0.1U_0402_16V4Z
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
CORE SUPPLY
97AAG35
2
R62
0_0402_5%
TYCO_2013620-2_IVY BRIDGE
CONN@
Issued Date
COMPAL Electronics，Inc
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
8
of
61
5
4
3
2
1
+VCC_GFXCORE_AXG
1
JCPU1H
R67
100_0402_1%
2
Place near CPU
VCC_AXG_SENSE 50
POWER
VSS_AXG_SENSE 50
JCPU1G
R71
1K_0402_1%
2
2
+V_SM_VREF
2
2
1
1
R72
1K_0402_1%
G
G
PMV45EN_SOT23-3
R73
1K_0402_1%
@
2
RUN_ON_CPU1.5VS3
2
VREF
3
1
@
@
1
D
B4
D1
0.1U_0402_16V7K
C149
+V_DDR_REFA_R
+V_DDR_REFB_R
SA RAIL
2
1
2
1
2
1
+
2 3
6A
+VCCSA
1
2
1
2
1
2
1
2
@
1
+
2 3
C85
330U_D2_2VM_R6M
+VCCSA_SENSE 49
1
1.8V RAIL
2
1
C78
330U_D2_2VM_R6M
H23
2
1
C84
10U_0805_6.3VAM
VCCSA_SENSE
2
1
C89
10U_0603_6.3V6M
M27
M26
L26
J26
J25
J24
H26
H25
1
C88
10U_0805_6.3VAM
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
5A
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
C83
10U_0805_6.3VAM
DDR3 -1.5V RAILS
+1.5V_CPU_VDDQ
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
C82
10U_0805_6.3VAM
VCCSA_VID[0]
VCCSA_VID[1]
49
49
2
A19
H_VCCSA_VID0
H_VCCSA_VID1
@ R74
0_0402_5%
CONN@
VCCIO_SEL
R75
10K_0402_5%
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
D
C
TYCO_2013620-2_IVY BRIDGE
CONN@
B
@
1
B
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
+3VS
2
TYCO_2013620-2_IVY BRIDGE
C22
C24
VCCIO_SEL
MISC
2 3
+V_SM_VREF_CNT
C87
10U_0805_6.3VAM
+
VCCPLL1
VCCPLL2
VCCPLL3
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
AL1
C81
10U_0805_6.3VAM
2
1
C97
C97
330U_D2_2VM_R6M
330U_D2_2VM_R6M
2
1
C96
C96
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
C95
C95
1U_0402_6.3V6K
1
PR-7
C94
10U_0805_6.3VAM
0_0805_5%
B6
A6
A2
1
R69 @
S
S
SM_VREF
C86
10U_0805_6.3VAM
+1.8VS_CPU_VCCPLL
2
2
0_0402_5%
R70
1K_0402_1%
C80
10U_0805_6.3VAM
1.5A
R277
+1.5V
+1.5V_CPU_VDDQ
Q8
+1.8VS
1
VAXG_SENSE
VSSAXG_SENSE
+V_SM_VREF should
have 10 mil trace width
2
100_0402_1%
1
SENSE
LINES
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
AK35
AK34
C79
10U_0805_6.3VAM
C
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
GRAPHICS
33A
D
1
R68
1
+VCC_GFXCORE_AXG
AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
+1.5V_CPU_VDDQ
Q7
AO4304L_SO8
1
1 0.1U_0402_16V7K
R80
1K_0402_1%
@
1
2
2
5
C77
2200P_0402_50V7K
1
4
2N7002KDWH_SOT363-6
6
2
S
R79
1K_0402_1%
BSS138_SOT23
@
RUN_ON_CPU1.5VS3
Q4B
RUN_ON_CPU1.5VS3#
Q10
4
1 0.1U_0402_16V7K
2
1
2
2
C93
+V_DDR_REFA_R
+V_DDR_REFB_R
5A
+1.5V_CPU_VDDQ
1
2
3
1
C92
S
2 0_0402_5%
2 0_0402_5%
8
7
6
5
R63
36.5K_0402_1%
R65
100K_0402_5%
D
2
G
3
6,13,40
2
1
DRAMRST_CNTRL_PCH
1 0.1U_0402_16V7K
1
@
@
1
1
1
DRAMRST_CNTRL_PCH
3
R77
R78
1 0.1U_0402_16V7K
2
3
2
G
+V_DDR_REFA
+V_DDR_REFB
2
C91
Q9
BSS138_SOT23
2
1
C90
D
+5VALW
2
+1.5V
+5VALW
R64
20K_0402_5%
+1.5V
C76
10U_0603_6.3V6M
+1.5V_CPU_VDDQ
R66
40 CPU1.5V_S3_GATE
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
1
Q4A
2
2
2N7002KDWH_SOT363-6
1
0_0402_5%
A
RUN_ON_CPU1.5VS3#
A
42
PR-7
Issued Date
COMPAL Electronics，Inc
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Rev
B
4019G8
Monday, February 13, 2012
Sheet
1
9
of
61
5
4
3
2
1
3.56A
+1.5V
6 DDR_A_D[0..63]
+1.5V
1
+1.5V
R81
1K_0402_1%
6 DDR_A_DQS[0..7]
DDR3 SO-DIMM A
6 DDR_A_DQS#[0..7]
2
JDIMM1
+V_DDR_REFA
1
2
1
2
C99
2.2U_0402_6.3V6M
2
1K_0402_1%
C98
0.1U_0402_10V6K
1
R82
D
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
+1.5V
DDR3_DRAMRST# 6,11
2
1
2
1
2
@
1
2
10U_0603_6.3V6M
2
1
C107
2
1
C106
C106
2
1
10U_0603_6.3V6M
2
DDR_A_D22
DDR_A_D23
1
C105
+
C104
1
DDR_A_D20
DDR_A_D21
10U_0603_6.3V6M
DDR_A_D14
DDR_A_D15
10U_0603_6.3V6M
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
Layout Note:
Place near JDIMM1
DDR3_DRAMRST#
C103
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
DDR_A_D12
DDR_A_D13
10U_0603_6.3V6M
DDR_A_D26
DDR_A_D27
D
DDR_A_D6
DDR_A_D7
C102
DDR_A_D24
DDR_A_D25
DDR_A_DQS#0
DDR_A_DQS0
10U_0603_6.3V6M
DDR_A_D18
DDR_A_D19
6 DDR_A_MA[0..15]
DDR_A_D4
DDR_A_D5
C101
DDR_A_DQS#2
DDR_A_DQS2
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
10U_0603_6.3V6M
DDR_A_D16
DDR_A_D17
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
C100
330U_B2_2.5VM_R15M
330U_B2_2.5VM_R15M
DDR_A_D10
DDR_A_D11
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
Layout Note: Place these 4 Caps near
Command and Control signals of JDIMM1
C
C
6 DDR_A_WE#
6 DDR_A_CAS#
DDR_A_WE#
DDR_A_CAS#
6 DDRA_SCS1#
DDR_A_MA13
DDRA_SCS1#
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
1
2
R86
R86
10K_0402_5%
2
R85
10K_0402_5%
2
1
C119
C119
0.1U_0402_10V6K
1
C153
2.2U_0402_6.3V6M
+3VS
2
A
1
DDR_A_D58
DDR_A_D59
205
G2
G1
206
TYCO_2-1932323-1_204P
CONN@
DDRA_ODT1
R83
1K_0402_1%
DDRA_SCS0# 6
DDRA_ODT0 6
DDRA_ODT1 6
+VREF_CA
DDR_A_D36
DDR_A_D37
1
2
DDR_A_D38
DDR_A_D39
Layout Note:
Place near JDIMM1.203,204
1
2
+0.75VS
R84
1K_0402_1%
1
2
DDR_A_D44
DDR_A_D45
1
2
1
2
1
2
C117
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR_A_D42
DDR_A_D43
DDRA_SCS0#
DDRA_ODT0
C116
1U_0402_6.3V6K
DDR_A_D40
DDR_A_D41
2
+1.5V
DDR_A_BS1 6
DDR_A_RAS# 6
C115
1U_0402_6.3V6K
DDR_A_D34
DDR_A_D35
DDRA_CLK1 6
DDRA_CLK1# 6
DDR_A_BS1
DDR_A_RAS#
C114
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR_A_DQS#4
DDR_A_DQS4
DDRA_CLK1
DDRA_CLK1#
C109
2.2U_0402_6.3V6M
B
2
1
DDR_A_MA2
DDR_A_MA0
C108
0.1U_0402_10V6K
DDR_A_D32
DDR_A_D33
2
1
1
6 DDR_A_BS0
DDR_A_MA10
DDR_A_BS0
2
1
2
DDRA_CLK0
DDRA_CLK0#
1
DDR_A_MA6
DDR_A_MA4
C113
C113
1U_0402_6.3V6K
1U_0402_6.3V6K
6 DDRA_CLK0
6 DDRA_CLK0#
DDR_A_MA11
DDR_A_MA7
C112
1U_0402_6.3V6K
DDR_A_MA3
DDR_A_MA1
+1.5V
DDRA_CKE1 6
DDR_A_MA15
DDR_A_MA14
C111
1U_0402_6.3V6K
DDR_A_MA8
DDR_A_MA5
DDRA_CKE1
C110
C110
1U_0402_6.3V6K
DDR_A_MA12
DDR_A_MA9
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
1
DDR_A_BS2
6 DDR_A_BS2
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
2
DDRA_CKE0
6 DDRA_CKE0
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PCH_SMBDATA
PCH_SMBCLK
A
PCH_SMBDATA 11,13,39,41
PCH_SMBCLK 11,13,39,41
+0.75VS
0.65A@0.75V
9.2H
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
SCHEMATIC A8222
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
10
of
61
5
4
3
2
1
+1.5V
+1.5V
1
6 DDR_B_DQS#[0..7]
JDIMM2
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
2
C141
2.2U_0402_6.3V6M
1
1
2
C142
0.1U_0402_10V6K
0.1U_0402_10V6K
+3VS
A
1
R92
2
10K_0402_5%
205
G1
G2
206
2
2
1
2
DDRB_CKE1 6
C
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
Layout Note:
Place near JDDRH.203 and 204
DDR_B_MA2
DDR_B_MA0
+0.75VS
DDRB_CLK1
DDRB_CLK1#
DDRB_CLK1 6
DDRB_CLK1# 6
DDR_B_BS1
DDR_B_RAS#
DDR_B_BS1 6
DDR_B_RAS# 6
DDRB_SCS0#
DDRB_ODT0
+1.5V
1
DDRB_SCS0# 6
DDRB_ODT0 6
DDRB_ODT1
R89
1K_0402_1%
DDRB_ODT1 6
+VREF_CB
2
DDR_B_D36
DDR_B_D37
1
2
DDR_B_D38
DDR_B_D39
1
2
1
2
1
2
1
2
R90
1K_0402_1%
B
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PCH_SMBDATA
PCH_SMBCLK
PCH_SMBDATA 10,13,39,41
PCH_SMBCLK 10,13,39,41
+0.75VS
A
0.65A@0.75V
TYCO_2-2013287-1_204P
CONN@
5.2H
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
1
C130
DDR_B_D58
DDR_B_D59
1 R91
2
10K_0402_5%
2
1
10U_0603_6.3V6M
DDR_B_D56
DDR_B_D57
2
1
10U_0603_6.3V6M
DDR_B_D50
DDR_B_D51
2
1
C138
1U_0603_10V6K
1U_0603_10V6K
DDR_B_DQS#6
DDR_B_DQS6
2
1
C129
DDR_B_D48
DDR_B_D49
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
DDR_B_D42
DDR_B_D43
2
@
C137
1U_0603_10V6K
DDR_B_D40
DDR_B_D41
2
1
C128
DDR_B_D34
DDR_B_D35
2
@
C136
1U_0603_10V6K
1U_0603_10V6K
B
2
1
DDR_B_MA15
DDR_B_MA14
C140
2.2U_0402_6.3V6M
DDR_B_DQS#4
DDR_B_DQS4
DDRB_CKE1
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
C139
0.1U_0402_10V6K
DDR_B_D32
DDR_B_D33
2
1
C127
DDR_B_MA13
DDRB_SCS1#
DDR_B_D30
DDR_B_D31
1
10U_0603_6.3V6M
6 DDRB_SCS1#
1
C135
1U_0603_10V6K
DDR_B_WE#
DDR_B_CAS#
DDR_B_DQS#3
DDR_B_DQS3
+
C126
6 DDR_B_WE#
6 DDR_B_CAS#
@
1
10U_0603_6.3V6M
DDR_B_MA10
DDR_B_BS0
+1.5V
DDR_B_D28
DDR_B_D29
C125
6 DDR_B_BS0
+1.5V
Layout Note:
Place near JDDRH
10U_0603_6.3V6M
10U_0603_6.3V6M
DDRB_CLK0
DDRB_CLK0#
Layout Note: Place these 4 Caps near
Command and Control signals of JDDRH
DDR_B_D22
DDR_B_D23
C124
C124
6 DDRB_CLK0
6 DDRB_CLK0#
DDR_B_D20
DDR_B_D21
10U_0603_6.3V6M
DDR_B_MA3
DDR_B_MA1
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
DDR3_DRAMRST# 6,10
DDR_B_D14
DDR_B_D15
C123
DDR_B_MA8
DDR_B_MA5
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
DDR3_DRAMRST#
10U_0603_6.3V6M
DDR_B_MA12
DDR_B_MA9
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
D
DDR_B_D12
DDR_B_D13
C122
330U_B2_2.5VM_R15M
330U_B2_2.5VM_R15M
DDR_B_BS2
DDR_B_D6
DDR_B_D7
C134
1U_0402_6.3V6K
DDRB_CKE0
6 DDR_B_MA[0..15]
C133
1U_0402_6.3V6K
6 DDRB_CKE0
6 DDR_B_BS2
C
6 DDR_B_DQS[0..7]
DDR_B_DQS#0
DDR_B_DQS0
C132
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR_B_D26
DDR_B_D27
DDR_B_D4
DDR_B_D5
C131
1U_0402_6.3V6K
DDR_B_D24
DDR_B_D25
6 DDR_B_D[0..63]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
1
DDR_B_DQS#1
DDR_B_DQS1
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
2
DDR_B_D8
DDR_B_D9
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
1
DDR_B_D2
DDR_B_D3
1K_0402_1%
2
2
1
1
DDR_B_D0
DDR_B_D1
C121
C120
2
0.1U_0402_10V6K
2.2U_0402_6.3V6M
D
1
R88
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
2
2
+V_DDR_REFB
+1.5V
3.56A
R87
1K_0402_1%
4
3
2
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
Sheet
1
11
of
61
5
4
3
2
Please close to JXDP2
PCH_RTCX2
2
10M_0402_5%
Y1
2
1
XDP@
+RTCVCC
32.768KHZ_12.5PF_9H03200019
1
R94
1
SM_INTRUDER#
2
1M_0402_5%
1
C144
18P_0402_50V8J
C145
18P_0402_50V8J
2
R95
R96
14,40 PCH_RSMRST#
14,40 PBTN_OUT#
2
+1.05VS
+3V_PCH
CLRP1 & CLRP2 place near DIMM
R97
R98
2
JXDP2
1K_0402_5%
XDP@2
1
1 XDP@ 2
0_0402_5%
RSMRST#_XDP
PCH_PWRBTN#_XDP
1 XDP@ 2
0_0402_5%
1 XDP@ 2
0_0402_5%
+3V_PCH_XDP
XDP_DBRESET#_R
5,14 XDP_DBRESET#_R
U3A
far away hot spot
PCH_JTAG_TDO
40 HDA_SDO
R101
1
2
RTCRST#
SRTCRST#
2
K22
INTRUDER#
C17
INTVRMEN
T10
SPKR
K34
HDA_RST#
E34
G34
HDA_SDIN2
A34
HDA_SDIN3
HDA_SDOUT
A36
HDA_SDO
PCH_SPI_WP
C36
HDA_DOCK_EN# / GPIO33
N32
R109
IHDA
SATA
33 HDA_SDOUT_AUDIO
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0
31
31
31
31
AM10
AM8
AP11
AP10
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
31
31
31
31
AD7
AD5
AH5
AH4
SATA_PRX_DTX_N2
SATA_PRX_DTX_P2
SATA_PTX_DRX_N2
SATA_PTX_DRX_P2
31
31
31
31
AB8
AB10
AF3
AF1
H7
JTAG_TMS
SATAICOMPO
JTAG_TDI
SATAICOMPI
@
JTAG_TDO
200_0402_5%
PCH_SPI_CLK_RR
T3
SPI_CLK
PCH_SPI_CS#_RR Y14
PCH_JTAG_TCK
1 10K_0402_5%
2
1 10K_0402_5%
R107
ODD
1
R114
C
VRM enable
VRM disable
+3VS
2
@
1 1K_0402_5%
2
37.4_0402_1%
+1.05VS_SATA3
SPI_CS1#
AB12
AB13
SATA3_COMP
1
R115
2
49.9_0402_1%
AH1
RBIAS_SATA3
1
R120
2
750_0402_1%
SPI_CS0#
PCH_SPI_SI_RR
V4
PCH_SPI_SO_RR
+5VS
U3
R123
SATA0GP / GPIO21
V14
SPI_MISO
1
FLASH_EN
HDA_SYNC
PCH_GPIO21
P1
2
PCH_SATALED#
SATA1GP / GPIO19
SPI_MOSI
P3
BBS_BIT0_R
SATALED#
PCH_SATALED# 39
10K_0402_5%
This signal has a weak internal pull-down
On Die PLL VR is supplied by
1.5V when smapled high
1.8V when sampled low
Needs to be pulled High for Chief River platfrom
PANTHER-POINT_FCBGA989
B
2
1
HDA_SYNC
2
U4
R132 1
2PCH_SPI_HOLD#
3.3K_0402_5%
C150
2
PCH_SPI_WP#
+3VS
R131
PCH_SPI_CLK_RR 1
2
0_0402_5%
U5
3
VCC
4
KSI4
KSI5
KSI6
KSI7
A0
B0
C0
D0
E0
A1
B1
C1
D1
E1
6
D
FLASH_EN
2
5
6
PCH_SPI_CS#_R
PCH_SPI_CLK
YD
YE
8
11
PCH_SPI_SI_R
PCH_SPI_SO_R
GND
GND
GND
GND
3
7
10
20
FLASH_EN 40
+3V_SPI
1
2
0_0402_5%
R133
PCH_SPI_CLK_R
+RTCBATT
RTC Battery
EMI
W=20mils
2
W=20mils
1
3
C154
1
2
2
D1
+RTCVCC
PI3V512QE_QSOP24
Q
R136
1K_0402_5%
MAX. 8000mil
C
5
12
YA
YB
YC
S
PCH_SPI_CLK_R
SEL
HOLD
1
PCH_SPI_SI_R
C152
R139
1
1
2PCH_SPI_CLK_RRR
@
33_0402_5% @
22P_0402_50V8J
7
PCH_SPI_CS#_R
2
VSS
KSI4
KSI5
KSI6
KSI7
24
22
18
17
14
W
PCH_SPI_HOLD#
S
2N7002KW 1N SOT323-3
39,40
39,40
39,40
39,40
VDD
VDD
VDD
VDD
23
21
16
15
13
PCH_SPI_CS#_RR
PCH_SPI_CLK_RRR
PCH_SPI_SI_RR
PCH_SPI_SO_RR
EMI
+3VALW
8
D
PCH_SPI_WP#
3
Q63
2
G
1
@
2 PCH_WP
0_0402_5%
2
0_0402_5%
1
0.1U_0402_16V4Z
R134 1
2PCH_SPI_WP#
3.3K_0402_5%
2
1
4
9
19
+3V_SPI
PCH_SPI_WP 1
R137
1
R135
1 1K_0402_5%
+3V_PCH
SPI ROM ( 4M/8MByte )
+3V_SPI
40 EC_SPI_WP
R128
BSS138_SOT23
Q11
2
R129
1M_0402_5%
3
HDA_SYNC
D
D
2
33_0402_5%
1
1
S
R127
B
+3V_PCH
Please place to close to U3
G
33 HDA_SYNC_AUDIO
A
1 10K_0402_5%
2
+1.05VS_VCC_SATA
SATA_COMP
SATA3RBIAS
R118
100_0402_1%
2
2
2
1
51_0402_5%
2
BBS_BIT0_R
1 330K_0402_5%
2
R104
PCH_SATALED#R105
PCH_INTVRMEN R106
*LOW=Default
HIGH=No Reboot
SATA3COMPI
T1
R124 2
1 10K_0402_5%
PCH_GPIO21
+RTCVCC
2
HDA_SPKR R110
SATA3RCOMPO
PCH_JTAG_TDI
100_0402_1%
HDD2
R103
INTVRMEN
Y10
H1
+3VS
SERIRQ
* H：Integrated
L：Integrated
Y11
K5
HDD1
Y3
Y1
AB3
AB1
JTAG
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
R113
1
R117
JTAG_TCK
SPI
100_0402_1%
1
200_0402_5%
PCH_JTAG_TMS
1
2
1
R116
R112
J3
PCH_JTAG_TMS
+3V_PCH
2
1
@
200_0402_5%
PCH_JTAG_TDO
2
1
R111
PCH_JTAG_TCK
PCH_JTAG_TDO
@
+3V_PCH
27
28
Y7
Y5
AD3
AD1
PCH_JTAG_TDI
+3V_PCH
D
SERIRQ 40
AM3
AM1
AP7
AP5
HDA_DOCK_RST# / GPIO13
C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 G1
26 G2
ACES_87152-26051
CONN@
PAD~D
PAD~D
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
HDA_SDIN1
C34
HDA_RST#
2
33_0402_5%
HDA_SDOUT
2
33_0402_5%
T12
T13
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
HDA_SDIN0
Reserve for EMI
please close to RH170
1
SERIRQ
PCH_JTAG_TCK
LPC_FRAME# 40,41
@
@
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA 6G
HDA_SYNC
HDA_SDIN0
33 HDA_SDIN0
1
V5
PCH_JTAG_TDI
PCH_JTAG_TMS
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
HDA_BCLK
L34
C148
10P_0402_50V8J
R108
LPC_LDRQ0#
LPC_LDRQ1#
LPC_AD0 40,41
LPC_AD1 40,41
LPC_AD2 40,41
LPC_AD3 40,41
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
N34
HDA_SPKR
HDA_BIT_CLK
2
33_0402_5%
1
2
33 HDA_RST_AUDIO#
LPC_FRAME#
E36
K36
SERIRQ
HDA_RST#
1
D36
HDA_SDOUT
0_0402_5%
HDA_SYNC
@
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LDRQ0#
LDRQ1# / GPIO23
HDA_BIT_CLK
R102
C38
A38
B37
C37
FWH4 / LFRAME#
PCH_INTVRMEN
HDA for AUDIO
33 HDA_BITCLK_AUDIO
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
1
2
RTCX2
D20
G22
SM_INTRUDER#
CLRP2
SHORT PADS
ME CMOS
2
RTCX1
C20
PCH_RTCRST#
1
1
A20
PCH_RTCX2
CMOS
CLRP1
SHORT PADS
2
C147
1U_0603_10V6K
PCH_RTCX1
PCH_SRTCRST#
1
C146
1U_0603_10V6K
1
2
R99
20K_0402_5%
1
2
R100 20K_0402_5%
RTC
+RTCVCC
PR-7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
PCH_SPI_SO_R
0.1U_0402_16V4Z
D
1
C143
1
1
0.1U_0402_16V4Z~D
+3V_PCH
PCH_RTCX1
R93
1
W=20mils
+CHGRTC
DAN202UT106_SC70-3
A
W25Q32BVSSIG_SO8
W7@
Reserve for EMI please close to U4
U5
W8@
C155
R142
1
1
2PCH_SPI_CLK_R
@
0_0402_5% @
10P_0402_50V8J
Compal Secret Data
Security Classification
2
W25Q64FVSSIG_SO8
8M ROM=SA000039A20
Issued Date
Reserve for EMI please close to U5
2011/08/23
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Monday, February 13, 2012
Sheet
1
12
of
61
4
3
2
1
SMBALERT#
2
R149
1
R150
1
R151
1
R152
1
R153
1
R154
1
R155
SMBDATA
U3B
SML0CLK
41
41
41
41
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
C160 1
C161 1
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C
PERN1
PERP1
PETN1
PETP1
PCIE_PRX_USB3TX_N4
PCIE_PRX_USB3TX_P4
PCIE_PTX_USB3RX_N4
PCIE_PTX_USB3RX_P4
C1043 1
C1044 1
PCIE_PRX_USB3TX_N4
PCIE_PRX_USB3TX_P4
PCIE_PTX_USB3RX_N4_C
PCIE_PTX_USB3RX_P4_C
USB30@
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
USB30@
BG37
BH37
AY36
BB36
PERN5
PERP5
PETN5
PETP5
BJ38
BG38
AU36
AV36
PERN6
PERP6
PETN6
PETP6
10/100/1G LAN --- & gt;
+3V_PCH
32 LANCLK_REQ#
MiniWLAN (Mini Card 1)--- & gt;
41 CLK_PCIE_WLAN#
41 CLK_PCIE_WLAN
+3VS
41 WLANCLK_REQ#
R167 1
R168 1
2 0_0402_5%
2 0_0402_5%
R169 1
2 10K_0402_5%
R170 2
R171 2
R172 2
1 0_0402_5%
1 0_0402_5%
1 10K_0402_5%
PCIE_LAN#
PCIE_LAN
LANCLK_REQ#
PCIE_WLAN#
PCIE_WLAN
WLANCLK_REQ#
J2
AB49
AB47
M1
AA48
AA47
R175
1
2 10K_0402_5%
C8
SML0CLK
G12
C13
PCH_HOT#
SML1CLK / GPIO58
E14
PCH_SMLCLK
PCH_SMLCLK 20,40
M16
PCH_SMLDATA
PCH_SMLDATA
SML0CLK
SML0DATA
DRAMRST_CNTRL_PCH
DRAMRST_CNTRL_PCH
2
R750
CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14M
@
T14
PAD
CL_DATA1
T11
@
T15
PAD
CL_RST1#
P10
@
T16
PAD
M10
PEG_CLKREQ#_R
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
AB37
AB38
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLKOUT_DMI_N
CLKOUT_DMI_P
AV22
AU22
CLK_CPU_DMI#
CLK_CPU_DMI
AM12
AM13
CLKIN_DMI_N
CLKIN_DMI_P
BF18
BE18
CLKIN_DMI#
CLKIN_DMI
--- & gt;
36 CLK_PCIE_USB30#
36 CLK_PCIE_USB30
+3V_PCH
36 CLKREQ_USB30#
B
R1054 2 USB30@ 1 0_0402_5%
R1055 2 USB30@ 1 0_0402_5%
R176
2
PCIE_USB30#
PCIE_USB30
10K_0402_5%
1
CLKIN_GND1_N
CLKIN_GND1_P
BJ30
BG30
CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DOT_96N
CLKIN_DOT_96P
G24
E24
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA_N
CLKIN_SATA_P
AK7
AK5
CLKIN_SATA#
CLKIN_SATA
REFCLK14IN
K45
CLK_PCH_14M
CLKIN_PCILOOPBACK
H45
CLK_PCI_LPBACK
XTAL25_IN
XTAL25_OUT
V47
V49
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
Y47
CLKOUTFLEX0 / GPIO64
K43
CLKOUTFLEX1 / GPIO65
F47
CLKOUTFLEX2 / GPIO66
H47
@
T18
PAD
CLKOUTFLEX3 / GPIO67
K49
@
T19
PAD
PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P
A8
Y43
Y45
+3V_PCH
R177
2
1 10K_0402_5%
L12
R158
R159
R160
R161
R162
R163
R164
R165
R166
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
C
If use extenal CLK gen, please place close to CLK gen
else, please place close to PCH
CLKOUT_PCIE2N
CLKOUT_PCIE2P
Y37
Y36
EC
PEG_CLKREQ#_R
20
CLK_PCIE_VGA# 20
CLK_PCIE_VGA 20
VGA
CLK_CPU_DMI# 5
CLK_CPU_DMI 5
+3VS
+3VS
R173
2.2K_0402_5%
PCIECLKRQ3# / GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
SMBCLK
6
R174
2.2K_0402_5%
1
PCH_SMBCLK 10,11,39,41
2N7002KDWH_SOT363-6
Q2A
B
5
USB3.0 controller
1
100K_0402_1%
@
M7
CL_CLK1
PCIECLKRQ1# / GPIO18
V10
6,9,40
DRAMRST_CNTRL_PCH
CLKOUT_DP_N
CLKOUT_DP_P
CLKOUT_PCIE1N
CLKOUT_PCIE1P
2
1K_0402_1%
PCH_SMLDATA 20,40
SML0ALERT# / GPIO60
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
2
10K_0402_5%
1
R157
D
SML0DATA
MEMORY
2
+3VS
DRAMRST_CNTRL_PCH
SML1DATA / GPIO75
PERN8
PERP8
PETN8
PETP8
Y40
Y39
A12
PCH_SMLCLK
PCH_HOT#
PERN7
PERP7
PETN7
PETP7
BE38
BC38
AW38
AY38
32 CLK_PCIE_LAN#
32 CLK_PCIE_LAN
SMBDATA
SMBDATA
SML0DATA
SMBALERT# 39
PEG_A_CLKRQ# / GPIO47
BG40
BJ40
AY40
BB40
C
C9
SML1ALERT# / PCHHOT# / GPIO74
PERN4
PERP4
PETN4
PETP4
SMBCLK
SMBUS
BF36
BE36
AY34
BB34
H14
Controller
36
36
36
36
--- & gt;
SMBALERT#
CLOCKS
USB3.0 controller
PERN3
PERP3
PETN3
PETP3
E12
SMBCLK
PERN2
PERP2
PETN2
PETP2
BG36
BJ36
AV34
AU34
MiniWLAN (Mini Card 1)--- & gt;
BE34
BF34
BB32
AY32
SMBALERT# / GPIO11
+3V_PCH
2
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2
C158 1
C159 1
1
PCIE_PRX_GLANTX_N1
PCIE_PRX_GLANTX_P1
PCIE_PTX_GLANRX_N1
PCIE_PTX_GLANRX_P1
Link
32
32
32
32
10/100/1G LAN --- & gt;
PCIE_PRX_GLANTX_N1
BG34
PCIE_PRX_GLANTX_P1
BJ34
PCIE_PTX_GLANRX_N1_C AV32
PCIE_PTX_GLANRX_P1_C AU32
PCI-E*
D
1
10K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
1
R156
SMBCLK
1
5
PCIECLKRQ4# / GPIO26
SMBDATA
3
4
PCH_SMBDATA 10,11,39,41
2N7002KDWH_SOT363-6
V45
V46
R178 2
L14
1 10K_0402_5%
AB42
AB40
@
@
R180
C162
CLK_PCI_LPBACK2
1
1
2
33_0402_5%
22P_0402_50V8J
+3V_PCH
R179 1
2 10K_0402_5%
PEG_B_CLKREQ#
Reserve for EMI please close to
U3
R182 1
2 10K_0402_5%
PCIE_CLKREQ6#
XTAL25_OUT
+3V_PCH
R184 1
PAD
PAD
Y2
A
1
1
3
GND
2
1
2 10K_0402_5%
T48
T49
@
@
GPIO46
CLK_BCLK_ITP#
CLK_BCLK_ITP
3
CLK_PCI_LPBACK
15
PEG_B_CLKRQ# / GPIO56
T13
1
R181
2
90.9_0402_1%
+1.05VS_VCCDIFFCLKN
PCIECLKRQ6# / GPIO45
CLKOUT_PCIE7N
CLKOUT_PCIE7P
XCLK_RCOMP
CLKOUT_PCIE6N
CLKOUT_PCIE6P
V38
V37
+3V_PCH
1
R183
E6
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
V40
V42
XTAL25_IN
2
1M_0402_5%
PCIECLKRQ5# / GPIO44
K12
AK14
AK13
PCIECLKRQ7# / GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
FLEX CLOCKS
+3V_PCH
CLKOUT_PCIE5N
CLKOUT_PCIE5P
Q2B
CLK_SD_48M_R
R185
1
2
CLK_SD_48M
0_0402_5%
@ T17
PAD
CLK_SD_48M 34
A
PANTHER-POINT_FCBGA989
GND
2
2
4
C163 25MHZ_10PF_ 7V25000014
12P_0402_50V8J
C164
12P_0402_50V8J
1
CLK_PCH_14M
@
@
R189
C165
2
1
1
2
33_0402_5%
22P_0402_50V8J
Compal Secret Data
Security Classification
Issued Date
2011/08/23
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Monday, February 13, 2012
Sheet
1
13
of
61
5
4
3
2
PCH_ENBKL
40 PCH_ENBKL
U3C
1
U3D
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
BE24
BC20
BJ18
BJ20
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
4
4
4
4
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
4
4
4
4
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
AW24
AW20
BB18
AV18
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
AY24
AY20
AY18
AU18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
+1.05VS_VCC_EXP
AW16
DMI_ZCOMP
FDI_FSYNC0
AV12
DMI_IRCOMP
FDI_FSYNC1
BC10
FDI_FSYNC1
BH21
DMI2RBIAS
FDI_LSYNC0
AV14
FDI_LSYNC0
FDI_LSYNC1
BB10
FDI_LSYNC1
DSWVRMEN
A18
R802 1
40 SUSACK#
SUSACK#_R
@
2
0_0402_5%
C12
SUSACK#
XDP_DBRESET#_R
5,12 XDP_DBRESET#_R
K3
SYS_RESET#
PR-7
SYSTEM_PWROK
1
R196
2
SYSTEM_PWROK_I
0_0402_5%
P12
SYS_PWROK
1
2
PM_PWROK_R
0_0402_5%
L22
PWROK
L10
APWROK
C
40 PCH_PWROK
R197
PR-7
R198 1
2 0_0402_5%
PM_DRAM_PWRGD
5 PM_DRAM_PWRGD
R200
1
R801 1
40 SUSWARN#
@
2
0_0402_5%
SUSWARN#_R
E22 PCH_DPWROK_R
WAKE# 1
CLKRUN# / GPIO32
N3
PM_CLKRUN#
SUS_STAT# / GPIO61
G8
SUSCLK
2 R199
SUSCLK / GPIO62
N14
SLP_S5# / GPIO63
D10
SLP_S4#
H4
1
R203
E20
SLP_S3#
F4
R800 1
@
R194 1
4
4
4
4
4
4
4
4
R191
E10
30 PCH_TXOUT030 PCH_TXOUT130 PCH_TXOUT230 PCH_TXOUT0+
30 PCH_TXOUT1+
30 PCH_TXOUT2+
2 0_0402_5%
PCH_DPWROK
PCH_DPWROK
A10
T22
1
0_0402_5%
30 PCH_TZOUT030 PCH_TZOUT130 PCH_TZOUT2-
PM_CLKRUNEC#
40
30 PCH_TZOUT0+
30 PCH_TZOUT1+
30 PCH_TZOUT2+
PAD
SUSCLK_R 40
1 LVDS_IBG
AF37
2.37K_0402_1%~D AF36
AK39
AK40
LVDSA_CLK#
LVDSA_CLK
PCH_TXOUT0PCH_TXOUT1PCH_TXOUT2-
AN48
AM47
AK47
AJ48
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
PM_SLP_S4# 40
PM_SLP_S3# 40
G10
T23
30 PCH_CRT_HSYNC
30 PCH_CRT_VSYNC
PAD
G16
T24
H_PM_SYNC
K14
PCH_GPIO29
T25
PAD
T39
M40
CRT_DDC_CLK
CRT_DDC_DATA
M47
M49
T43
T42
DDPC_CTRLCLK
DDPC_CTRLDATA
2 0_0402_5%
PR-7
SLP_LAN# / GPIO29
H_PM_SYNC
HDMICLK_NB 35
HDMIDAT_NB 35
P46
P42
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
AP47
AP49
AT38
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
DDPD_CTRLCLK
DDPD_CTRLDATA
C
M43
M36
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
AT45
AT43
BH41
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
PANTHER-POINT_FCBGA989
5
R204
1K_0402_0.5%
2
R751 1
TMDS_B_DATA2# 35
TMDS_B_DATA2 35
TMDS_B_DATA1# 35
TMDS_B_DATA1 35
TMDS_B_DATA0# 35
TMDS_B_DATA0 35
TMDS_B_CLK# 35
TMDS_B_CLK 35
DAC_IREF
CRT_IRTN
RB751V-40_SOD323-2
Reserve 40 AC_PRESENT
TMDS_B_HPD 35
AV42 TMDS_B_DATA2#
AV40 TMDS_B_DATA2
AV45 TMDS_B_DATA1#
AV46 TMDS_B_DATA1
AU48 TMDS_B_DATA0#
AU47 TMDS_B_DATA0
AV47 TMDS_B_CLK#
AV49 TMDS_B_CLK
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
1
AC_PRESENT_R
AT49
AT47
AT40 TMDS_B_HPD
CRT_HSYNC
CRT_VSYNC
33_0402_5%
2 HSYNC_PCH
2 VSYNC_PCH
33_0402_5%
PAD
AP14
R201
1
1
R202
CRT_BLUE
CRT_GREEN
CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
30 PCH_CRT_DDC_CLK
30 PCH_CRT_DDC_DAT
N48
P49
T49
D
P38 HDMICLK_NB
M39 HDMIDAT_NB
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
PCH_TZOUT0+
PCH_TZOUT1+
PCH_TZOUT2+
AP39
AP40
SDVO_CTRLCLK
SDVO_CTRLDATA
LVDSB_CLK#
LVDSB_CLK
PCH_TZOUT0PCH_TZOUT1PCH_TZOUT2-
CRT_IREF
2
@
SDVO_INTN
SDVO_INTP
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
PCH_TZCLKPCH_TZCLK+
AM42
AM40
LVD_VREFH
LVD_VREFL
PCH_TXCLKPCH_TXCLK+
AP43
AP45
SDVO_STALLN
SDVO_STALLP
LVD_IBG
LVD_VBG
AE48
AE47
D2
1
40,44 ACIN
SDVO_TVCLKINN
SDVO_TVCLKINP
L_BKLTEN
L_VDD_EN
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
30 PCH_CRT_BLU
30 PCH_CRT_GRN
30 PCH_CRT_RED
PM_SLP_S5# 40
PMSYNCH
RI#
30 PCH_TZCLK30 PCH_TZCLK+
40
PCIE_WAKE# 32,36,41
SLP_A#
BATLOW# / GPIO72
RI#
2
T20
PAD~D
4
PR-7
1 R267
2
@
0_0402_5%
SLP_SUS#
ACPRESENT / GPIO31
L_CTRL_CLK
L_CTRL_DATA
2 0_0402_5% PCH_RSMRST#_R
PM_SLP_S3#
PWRBTN#
H20
PCH_GPIO72
12,40 PBTN_OUT#
T45
P39
4
FDI_LSYNC1
PM_SLP_S4#
SUSWARN#/SUSPWRDNACK/GPIO30
L_DDC_CLK
L_DDC_DATA
CTRL_CLK
CTRL_DATA
PR-7
PBTN_OUT#_R
2
0_0402_5%
L_BKLTCTL
T40
K47
30 PCH_LCD_CLK
30 PCH_LCD_DATA
4
FDI_LSYNC0
PM_SLP_S5#
RSMRST#
P45
4
FDI_FSYNC1
SUS_STAT#
C21
30 PCH_INV_PWM
30 PCH_TXCLK30 PCH_TXCLK+
FDI_FSYNC0
R195 2
0_0402_5%
B9
DRAMPWROK
2
J47
100K_0402_5% M45
DSWODVREN
WAKE#
K16
PCH_RSMRST#_R
0_0402_5%
2
DPWROK
B13
PR-7
12,40 PCH_RSMRST#
System Power Management
4mil width and place
within 500mil of the PCH
1 R190
30 PCH_ENVDD
4
4
4
4
4
4
4
4
FDI_INT 4
FDI_FSYNC0
BG25
DMI_IRCOMP
2
49.9_0402_1%
RBIAS_CPY
2
750_0402_1%
1
R193
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
BJ24
1
R192
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
Digital Display Interface
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
LVDS
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
CRT
BC24
BE20
BG18
BG20
FDI
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
4
4
4
4
D
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI
4
4
4
4
PANTHER-POINT_FCBGA989
@
1
C166
XDP_DBRESET#_R
2
100P_0402_50V8J
+3VS
B
B
Reserve for EMI please close to U3
1
R206
1
R207
1
R208
1
R209
5
+3VS
PR-7
2
2
0_0402_5% B
PCH_PWROK
1 A
U7
+RTCVCC
P
1
Y
4
SYSTEM_PWROK
+3VS
R211 1
R212 1
SYSTEM_PWROK 5
G
R210
3
50 VGATE
PCH_CRT_DDC_CLK
2
2.2K_0402_5%
PCH_CRT_DDC_DAT
2
2.2K_0402_5%
CTRL_CLK
2
2.2K_0402_5%
CTRL_DATA
2
2.2K_0402_5%
DSWODVREN
R213
2
DSWODVREN
R214
2
NC7SZ08P5X_NL_SC70-5
+3V_PCH
1 330K_0402_5%
@
PCH_GPIO72
R217 1
2 10K_0402_5%
RI#
R219 1
2 10K_0402_5%
WAKE#
R221 1
2 10K_0402_5%
AC_PRESENT_R
R222 1
R223 1
2 10K_0402_5%
PCH_DPWROK
R803 2
PCH_RSMRST#
R225 1
2 PCH_CRT_BLU
150_0402_1%~D
2 PCH_CRT_GRN
150_0402_1%~D
2 PCH_CRT_RED
150_0402_1%~D
2 PCH_ENVDD
100K_0402_5%~D
2 200K_0402_5%
SUSWARN#_R
1
R215
1
R216
1
R218
1
R220
2 10K_0402_5%
@
A
R224
8.2K_0402_5%
A
2
1 100K_0402_5%
2 10K_0402_5%
PM_CLKRUN#
2
@
@
+3VS
1
R230 1
PCH_LCD_CLK
PCH_LCD_DATA
1 330K_0402_5%
DSWODVREN - On Die DSW VR Enable
H：Enable
L：Disable
*
PCH_GPIO29
2 2.2K_0402_5%
2 2.2K_0402_5%
R226
SYSTEM_PWROK_I
2
1
10K_0402_5%
1
100K_0402_5%
2
@ R227
R130
10K_0402_5%
Compal Secret Data
Security Classification
Issued Date
1
PM_PWROK_R
Intel CRB EMRLDLKE2 Rev1.0
2011/10/19
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Monday, February 13, 2012
Sheet
1
14
of
61
5
4
3
2
1
U3E
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
37 USB3_RX1_N
37 USB3_RX2_N
37 USB3_RX1_P
37 USB3_RX2_P
37 USB3_TX1_N
37 USB3_TX2_N
37 USB3_TX1_P
37 USB3_TX2_P
PIRQA#
PIRQB#
PIRQC#
PIRQD#
DGPU_HOLD_RST#
PCH_GPIO52
DGPU_PWR_EN
C46
C44
E40
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
PCH_WAN_RADIO_OFF#
D47
E42
F46
41 PCH_WAN_RADIO_OFF#
@
C167
ODD_DA#
1
2
0.1U_0402_16V4Z~D
G42
G40
C42
D44
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PCH_GPIO2
ODD_DA#
PCH_GPIO4
PCH_GPIO5
31 ODD_DA#
Reserve for EMI please close to U3
PAD
T26
@
K10
PCH_PLTRST#
B
CLK_PCI_LPBACK R232
CLK_PCI_LPC
R233
CLK_LPC_DEBUG1 R234
13 CLK_PCI_LPBACK
40 CLK_PCI_LPC
41 CLK_LPC_DEBUG1
PR-8
1 22_0402_5%
2 22_0402_5%
2 22_0402_5%
2
1
1
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
29,53 DGPU_PWR_EN
@
CLK_PCI0
CLK_PCI1
CLK_PCI3
C6
H49
H43
J48
K42
H40
AT8
GPIO19 = & gt; BBS_BIT0
GPIO51 = & gt; BBS_BIT1
Boot BIOS Strap
BBS_BIT0
BBS_BIT1
0
0
Boot BIOS
Location
LPC
D
0
Reserved(NAND)
0
Reserved
1
Panther Point USB Port Mapping
USB 2.0 Port Number
1
1
1
SPI
*
USB 3.0 Port Number
0
1
1
2
Intel Anti-Theft Techonlogy
AY5
BA2
2
3
High=Endabled
NV_ALE
Low=Disable(floating)
AT12
BF3
3
4
NV_ALE
*
+1.8VS
NV_ALE
USB
K40
K38
H38
G38
AV5
AV10
RSVD28
RSVD29
RSVD
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
RSVD23
RSVD24
PCI
C
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
USB3Rn1
USB3Rn2
USB3Rn3
USB3Rn4
USB3Rp1
USB3Rp2
USB3Rp3
USB3Rp4
USB3Tn1
USB3Tn2
USB3Tn3
USB3Tn4
USB3Tp1
USB3Tp2
USB3Tp3
USB3Tp4
AT10
BC8
RSVD25
TP21
TP22
TP23
TP24
AY7
AV7
AU3
BG4
RSVD5
RSVD6
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
B21
M20
AY16
BG46
D
RSVD1
RSVD2
RSVD3
RSVD4
RSVD26
RSVD27
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
USB20_N0 37
USB20_P0 37
USB20_N1 37
USB20_P1 37
USB20_N2 33
USB20_P2 33
USB20_N3 30
USB20_P3 30
USB20_N4 34
USB20_P4 34
USB20_N5 33
USB20_P5 33
@ R228 1
2 1K_0402_5%
USB2/3 port 1
USB2/3 port 2
USB2 Conn. R
C
Camera
Card Reader
USB2 Conn. R
+3V_PCH
HM76 not Support USB Port6,7
USB20_N10
USB20_P10
USB_OC0# 10K_0402_5%
USB_OC2# 10K_0402_5%
USB_OC7# 10K_0402_5%
USB_OC5# 10K_0402_5%
USB20_N10 41
USB20_P10 41
1
1
1
1
2
2
2
2
R76
R229
R582
R725
Over Current Pin Default Usage
A14
K20
B17
C16
L16
A16
D14
C14
1
Port 2 & 3
Port 4 & 5
Port 6 & 7
4
Port 8 & 9
5
Port 10 & 11
6
2
2
2
2
Port 0 & 1
2
1
1
1
1
Port 12 & 13
R780
R781
R782
R783
Within 500 mils
1
R231
2
22.6_0402_1%
B33
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
USBRBIAS
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
PCH Mapping
0
Bluetooth
USB_OC1#
USB_OC4#
USB_OC3#
USB_OC6#
C33
USBRBIAS
OC Pin
3
USBRBIAS#
Mini Card(WLAN)
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC0# 37
USB_OC1# 37
USB_OC2# 37
+3V_PCH
(For USB Port0, 1)
(For USB Port2)
(For USB Port5)
B
+3VS
1
R445
0_0402_5%
PCH_WAN_RADIO_OFF#
PCI_PIRQA#
ODD_DA#
PCH_GPIO5
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
PCH_GPIO52
PCH_GPIO2
8.2K_0402_5% 1
8.2K_0402_5% 1
2
2
2
2
R788
R789
R790
R791
5,32,36,40,41
4
PLT_RST#
OUT
2
IN2
5
PCH_PLTRST#
1
2
1 R240
100_0402_5%
2
20 DGPU_RST#
P
DIS@
IN1
2
0_0402_5%
4
Y
DIS@
R241
100K_0402_5%
DIS@
MC74VHC1G08DFT2G_SC70-5
C169 DIS@
1
2
0.1U_0402_16V4Z~D
U9
PCH_PLTRST#
B 2
A
1
DGPU_HOLD_RST#
NC7SZ08P5X_NL_SC70-5
2
3
1
1
1
1
C168
1
2
0.1U_0402_16V4Z~D
G
U8
1
@
R238
10K_0402_5%
5
R784
R785
R786
R787
VCC
2
2
2
2
GND
1
1
1
1
+3VS
PR-8
2
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
@
1
R236
+3VS
1
PCH_GPIO4
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQC#
R444
0_0402_5%
@
2
+3VS
3
1
PANTHER-POINT_FCBGA989
1 R244
@
1 R443
1 R288
@
A
1
R235
2 10K_0402_5%
2 10K_0402_5%
@
2
0_0402_5%
2 10K_0402_5%
1
DGPU_HOLD_RST#
Compal Secret Data
Security Classification
DGPU_PWR_EN
R243
100K_0402_5%
Issued Date
2
A
2 R792
2 R793
2011/08/23
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Monday, February 13, 2012
Sheet
1
15
of
61
5
4
3
2
1
+3VS
KB_RST#
1
PCH_GPIO48
D
R247
R248
1
R249
R250
@
1
R252
1
R253
1
R255
PCH_GPIO22
ODD_EN#
DGPU_PWROK
U3F
2 200K_0402_5%
CRT_DET
2 10K_0402_5%
PCH_GPIO1
2
R812
A42
USB30_SMI#
2 10K_0402_5%
H36
BMBUSY# / GPIO0
TACH4 / GPIO68
C40
ODD_EN#
TACH1 / GPIO1
TACH5 / GPIO69
B41
PCH_GPIO69
@ T27
PAD
GPIO70
@ T28
PAD
+3VS
GPIO71
@ T29
PAD
TACH2 / GPIO6
TACH6 / GPIO70
C41
40 EC_SCI#
EC_SCI#
E38
TACH3 / GPIO7
TACH7 / GPIO71
A40
40 EC_SMI#
EC_SMI#
C10
2 10K_0402_5%
2 10K_0402_5%
EC_LID_OUT#
1
0_0402_5%
40 EC_LID_OUT#
2 10K_0402_5%
2
PCH_GPIO16
GPIO15
U2
1 10K_0402_5%
DGPU_PWROK
D40
PCH_GPIO22
PECI
SATA4GP / GPIO16
TACH0 / GPIO17
C
DS_WAKE#
40 DS_WAKE#
@
1
R804
2
0_0402_5%
SCLOCK / GPIO22
GPIO24
PCH_GPIO27
E16
GPIO27
PCH_GPIO28
+3VS
T5
E8
1
10K_0402_5%
2
10K_0402_5%
1 @
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
1
10K_0402_5%
2
10K_0402_5%
P8
GPIO28
PCH_GPIO69
2
R807
1
R257
2
R259
1
R260
1
R261
2
R262
1
R263
A20GATE
RCIN#
40 DGPU_PWROK
41 PCH_BT_ON
PCH_GPIO1
PCH_BT_ON
K1
THRMTRIP#
INIT3_3V#
GATEA20
P4
P5
H_CPUPWRGD
AY10
T14
AY1
TS_VSS2
AH10
TS_VSS4
N2
M3
V13
2
1
PCH_GPIO39
PCH_GPIO49
USB30_SMI#
NC_1
P37
SDATAOUT1 / GPIO48
VSS_NCTF_15
2
R265 1 0_0402_5%
@
PCH_GPIO49
V3
SATA5GP / GPIO49 / TEMP_ALERT#
VSS_NCTF_16
GPIO57
VSS_NCTF_17
1
HDD2_DETECT#
PCH_LID_SW_IN#
EC_SMI#
1
1
1
R269
BJ5
VSS_NCTF_6
VSS_NCTF_24
BJ6
VSS_NCTF_7
VSS_NCTF_25
C2
VSS_NCTF_8
VSS_NCTF_26
C48
VSS_NCTF_9
VSS_NCTF_27
D1
VSS_NCTF_10
VSS_NCTF_28
D49
VSS_NCTF_11
VSS_NCTF_29
E1
VSS_NCTF_12
VSS_NCTF_30
E49
VSS_NCTF_13
VSS_NCTF_31
F1
VSS_NCTF_32
F49
BF49
VSS_NCTF_14
trace out
2 10K_0402_5%
R271
B
PANTHER-POINT_FCBGA989
2 1K_0402_5%
R270
NCTF
VSS_NCTF_23
BF1
2 10K_0402_5%
BJ46
VSS_NCTF_5
BE49
R268
B
VSS_NCTF_22
BE1
2 10K_0402_5%
BJ45
VSS_NCTF_4
BD49
PCH_GPIO28
VSS_NCTF_21
BD1
+3V_PCH
BJ44
VSS_NCTF_3
A6
PCH_GPIO27
10K_0402_5%
VSS_NCTF_20
B47
2
BJ4
VSS_NCTF_2
B3
1
VSS_NCTF_19
A5
@ R266
PAD
BH47
VSS_NCTF_1
A46
DS_WAKE#
@ T30
BH3
A45
2
R805
Reserve for EMI please close to UH1
BG48
D6
A44
@
1
10K_0402_5%
H_CPUPWRGD
2
100P_0402_50V8J
C
A4
+3VALW
1
C170
BG2
HDD2_DETECT#
30 CABC_SAVING
PCH_GPIO37
100K_0402_5%
H_THERMTRIP# 5
AK10
VSS_NCTF_18
R264
H_THERMTRIP#
R258
SDATAOUT0 / GPIO39
PCH_GPIO48
2
@
SLOAD / GPIO38
PCH_GPIO39
H_SNB_IVB# 5
R256
SATA3GP / GPIO37
PCH_GPIO38
1
CLOSE TO THE BRANCHING POINT
AK11
TS_VSS3
M5
5
H_THERMTRIP#_C
1
390_0402_5%
1
@
0.1U_0402_16V7K
C151
DF_TVS
2
AH8
SATA2GP / GPIO36
PCH_GPIO37
R254
2.2K_0402_5%
DF_TVS
2
1K_0402_5%
KB_RST# 40
AY11
DF_TVS
GPIO35
V8
GATEA20 40
AU16
TS_VSS1
K4
31 ODD_DETECT#
PROCPWRGD
STP_PCI# / GPIO34
ODD_DETECT#
PCH_GPIO37
PCH_GPIO38
D
+1.8VS
LAN_PHY_PWR_CTRL / GPIO12
G2
PCH_LID_SW_IN#
R579
DMI Termination Voltage
Set to Vcc when HIGH
NV_CLE
Set to Vss when LOW
R251
10K_0402_5%
C4
2 10K_0402_5%
ODD_EN# 31
GPIO8
36 USB30_SMI#
2 10K_0402_5%
PR-7
PCH_GPIO22
T7
1
1
2 10K_0402_5%
2
1
PCH_BT_ON
R246
2
PCH_GPIO16
@
R245
1
1
CPU/MISC
1
ODD_DETECT#
GPIO
CRT_DET
trace out
GPIO28
On-Die PLL Voltage Regulator
This signal has a weak internal pull up
*
H：On-Die voltage regulator enable
L：On-Die PLL Voltage Regulator disable
1
@ R272
2
PCH_GPIO28
1K_0402_5%~D
2
+3VS
R273
10K_0402_5%
High: CRT Plugged
A
1
A
1
30 CRT_DET#
D
3
CRT_DET
S
Q12
2N7002KW 1N SOT323-3
2
G
Compal Secret Data
Security Classification
Issued Date
2011/08/23
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Monday, February 13, 2012
Sheet
1
16
of
61
5
4
3
2
1
PCH Power Rail Table
Refer to CPU EDS R1.5
+1.05VS
POWER
U3G
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
1mA VCCADAC
U48
VSSADAC
+VCCADAC
U47
C172
0.1U_0402_16V7K
+1.05VS_VCCCORE
1
Voltage
L1
1300mA
C171
0.01U_0402_16V7K
2
+3VS
Voltage Rail
PJP802
2
1
BLM18PG181SN1_0603
S0 Iccmax
Current (A)
BJ22
AN16
AN17
+1.05VS
PR-7
1
1
2
2
1
2
C188
1U_0402_6.3V6K
+3VS
2
1
C187
1U_0402_6.3V6K
2
1
C186
1U_0402_6.3V6K
1
C185
1U_0402_6.3V6K
2
1
C184
10U_0805_6.3VAM
2
0.228
VccADAC
3.3
0.001
VccADPLLA
1.05
0.075
VccADPLLB
1.05
0.075
1.05
1.3
VccDMI
1.05
0.042
1.05
3.709
1.05
0.903
3.3
0.01
VccDSW
3.3
0.001
VccDFTERM
1.8
0.002
VccRTC
3.3
6 uA
VccSus3_3
+1.8VS
3.3
0.065
L2
Near AP43
VCCTX_LVDS[1]
AM37
VCCTX_LVDS[2]
AM38
AP36
+VCCTX_LVDS
C178 1
1
1
C180
0.01U_0402_16V7K
C179
0.01U_0402_16V7K
2
2
2
AP37
2
1
0.1UH_MLF1608DR10KT_10%_1608
22U_0805_6.3V6M
CRT
LVDS
VCCIO[17]
VCCIO[19]
VCC3_3[6]
V33
0.1uH inductor, 200mA
+3VS
1
VCC3_3[7]
V34
2
VCCIO[18]
C182
0.1U_0402_16V7K
+1.5VS
3709mA
VCCVRM[3]
AT16
PR-7
+VCCP_VCCDMI
VCCIO[20]
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
3.3
VccSPI
VCCIO[16]
AP23
+1.05VS_VCC_EXP
Vcc3_3
D
AK37
40mAVCCTX_LVDS[3]
VCCIO[15]
AP21
C
0.001
+3VS
VCCAPLLEXP
AN27
+1.05VS_VCC_EXP
0.001
5
V_PROC_IO
C173
10U_0805_6.3VAM
AK36
VCCTX_LVDS[4]
AN26
R275
0_0805_5%
5
V5REF_Sus
2
V5REF
VccASW
2
1
0.001
VccIO
1
VCCIO[28]
AN21
R274
0_0805_5%
2
VSSALVDS
HVCMOS
AN19
1
1mAVCCALVDS
VCCIO[24]
AT20
+VCCP_VCCDMI
1
1
R387
75mA VCCCLKDMI
AB36
+1.05VS_VCC_DMI_CCI
1
1
2
AN33
C
VCCIO[26]
2
0_0805_5%
C183
2
+1.05VS 2
1U_0402_6.3V6K
0_0805_5%
C189
1U_0402_6.3V6K
PR-7
VCCIO[25]
AN34
+VCCP
R276
VCCDMI[1]
DMI
+1.05VS
VCC CORE
2
VCCIO
2
1
C177
1U_0402_6.3V6K
1
C176
1U_0402_6.3V6K
2
C175
1U_0402_6.3V6K
D
1
1.05
VccCore
PAD-OPEN 4x4m 1
@
C174
10U_0805_6.3VAM
2
0.1U_0402_16V7K
AP16
BG6
+1.05VS
AP17
+VCCP_VCCDMI
AU20
B
VCCVRM[2]
VccAFDIPLL
VCCIO[27]
VCCDMI[2]
2mA VCCDFTERM[2]
AG17
VCCDFTERM[3]
AJ16
VCCDFTERM[4]
AJ17
10mA VCCSPI
0.01
1.8 / 1.5
0.167
AG16
V1
+1.8VS
1
2
C191
0.1U_0402_16V7K
+1.5VS
FDI
2
VCC3_3[3]
DFT / SPI
BH29
C190
3.3 / 1.5
VccVRM
1
VccSusHDA
VCCDFTERM[1]
VccCLKDMI
1.05
0.095
VccDIFFCLKN
1.05
0.055
VccALVDS
2
C193
R279
1U_0402_6.3V6K
3.3
0.001
VccTX_LVDS
1.8
0.04
1
+3V_PCH
0_0603_5%
1
2
0.075
VccSSC
@
2
R278
+3V_VCCPSPI
PANTHER-POINT_FCBGA989
1.05
1
+3VS
0_0603_5%
B
PR-7
A
A
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
17
of
61
5
4
3
2
1
+1.05VS
+VCCACLK
1
0_0603_5%
POWER
U3J
AD49
2
VCCASW[7]
AC26
VCCASW[8]
AC27
C208
1U_0402_6.3V6K
C207
1U_0402_6.3V6K
C206
1U_0402_6.3V6K
2
VCCASW[6]
AA31
1
VCCASW[5]
AA29
1
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
R289
PR-7
2
2
AN24
VCCSUS3_3[3]
P20
VCCSUS3_3[5]
@
2
R285
+1.05VM_VCCSUS
1
0_0603_5%
2
Y49
VCC3_3[2]
AJ2
VCCIO[13]
VCCIO[6]
2
18mil
C220
1U_0402_6.3V6K
AG33
2
C227
0.1U_0402_16V7K
2
1
+
1
2
2
+1.05VS_VCCA_B_DPL
1
2
AC17
AD17
1
+
2
V_PROC_IO
1
2
VCCASW[22]
1mA
2
1
T19
VCCSUSHDA
P32
+1.05VS
V21
VCCASW[21]
+1.05VS
T21
VCCASW[23]
R286
1
0_0805_5%
1
2
1
2
A22
VCCRTC
10mA
+VCCSUSHDA
1
PANTHER-POINT_FCBGA989
2
2
0_0402_5%
+3V_PCH
If it support 3.3V audio signals
POP:RH12 (0ohm)
2011/08/23
A
If it support 1.5V audio signals
POP:RH12 (180 ohm)/RH13 (150 ohm)
Compal Secret Data
Security Classification
Issued Date
@
1
R291
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
2
2
PR-7
+1.05VS_VCC_SATA
PR-7
C235
1U_0402_6.3V6K
1
2
L9
10UH_LBR2012T100M_20%~D
C233
220U_B2_2.5VM_R35M
+1.05VS
DCPSUS[1]
DCPSUS[2]
+RTCVCC
+1.05VS_VCCA_A_DPL
C232
220U_B2_2.5VM_R35M
A
2
1
C230
1U_0402_6.3V6K
L8
10UH_LBR2012T100M_20%~D
1
2
C234
1U_0402_6.3V6K
2
1
C225
4.7U_0603_6.3V6K
C226
0.1U_0402_16V7K
2
1
T17
V19
@
C224
1U_0402_6.3V6K
2
+1.5VS
DCPSST
BJ8
1
+1.05VS
0_0805_5%
C216
1U_0402_6.3V6K
+1.05VS_VCC_SATA
+1.05VM_VCCSUS
C223
0.1U_0402_16V7K
C229
0.1U_0402_16V7K
2
1
C222
1U_0402_6.3V6K
C228
0.1U_0402_16V7K
1
V16
1
B
AC16
VCCIO[4]
1
2
+VCCSST
+VCCP
VCCIO[2]
VCCSSC 95mA
AF11
2
+1.05VS_SATA3
AK1
VCCVRM[1]
MISC
PR-7
VCCAPLLSATA
VCCIO[7]
VCCDIFFCLKN[1]
55mA
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
HDA
1
0_0603_5% 1
+1.05VS
18mil
+1.05VS_VCCDIFFCLKN
PR-7
R284
C215
0.1U_0402_16V7K
AF14
VCCIO[3]
+1.05VS_VCCDIFFCLKN
1U_0402_6.3V6K
2
R287
AF17
AF33
AF34
AG34
CPU
2
75mA
VCCADPLLB
C218
RTC
+1.05VS
BF47
AH14
C214
0.1U_0402_16V7K
AH13
2
VCCADPLLA
75mA
+3VS
+1.05VS_SATA3
1
AF13
DCPRTC
VCCVRM[4]
C210
1U_0603_10V6K
1
2
SATA
BD47
+1.05VS_VCCA_B_DPL
1
2
C211
0.1U_0402_16V7K
2
+PCH_V5REF_RUN
1
T34
VCCIO[12]
+1.05VS_VCCA_A_DPL
+3VS
W16
VCCASW[20]
N16
C217
0.1U_0402_16V7K
C209
1U_0402_6.3V6K
1
VCC3_3[4]
+1.05VS
B
2
AA16
VCCIO[5]
+VCCRTCEXT
+1.5VS
C
D4
RB751V40_SC76-2
1
VCC3_3[8]
VCCASW[19]
C202
0.1U_0603_25V7K
+3VS
R283
10_0402_5%
+3V_PCH
VCCASW[18]
W33
2
+5VS
+3VS
W31
1
2
VCCASW[17]
W29
+1.05VS
+3V_PCH
P22
VCC3_3[1]
+PCH_V5REF_SUS
1
+PCH_V5REF_RUN
N22
VCCSUS3_3[4]
D3
RB751V40_SC76-2
1
N20
VCCASW[16]
W26
VCCSUS3_3[2]
1mA
VCCASW[15]
W24
V5REF
P34
2
R282
10_0402_5%
1
DCPSUS[4]
+VCCA_USBSUS
+1.05VS
R292
150_0402_1%
2
1
@
VCCASW[14]
W23
C213
1U_0402_6.3V6K
+3VS_VCC_CLKF33
1
1
C212
10U_0603_6.3V6M
2
0_0805_5%
VCCASW[13]
W21
+3VS
+PCH_V5REF_SUS
AN23
1mA
1
2
AA27
+1.05VS
M26
903mA
2
+3V_PCH
1
VCCASW[4]
V5REF_SUS
VCCSUS3_3[1]
VCCASW[3]
AA26
+5V_PCH
+VCCA_USBSUS
1
AA24
C204
22U_0805_6.3V6M
+3V_PCH
T26
VCCASW[1]
VCCASW[2]
P24
1
2
AA19
V24
VCCIO[34]
DCPSUS[3]
VCCSUS3_3[10]
VCCSUS3_3[6]
1
2
2
+3V_PCH
1
AL24
@
C200
1U_0402_6.3V6K
AA21
2
1
V23
VCCIO[14]
1
@ C201
1U_0402_6.3V6K
1
2
T24
VCCSUS3_3[9]
119mA
VCCAPLLDMI2
D
C195
1U_0402_6.3V6K
2
C221
1U_0402_6.3V6K
+VCCSUS1
1
T23
2
AL29
C
VCCSUS3_3[7]
+1.05VS
1
VCC3_3[5]
BH23
1
T29
DCPSUSBYP
T38
+1.05VS
C203
22U_0805_6.3V6M
2
VCCIO[32]
T27
VCCDSW3_33mA
C205
V12
1
@ C196
0.1U_0402_16V7K
P28
VCCSUS3_3[8]
T16
+3VS_VCC_CLKF33
@
P26
VCCIO[33]
+VCCPDSW
C199
0.1U_0402_16V7K
2
C231
0.1U_0402_16V7K
2
0_0603_5%
N26
VCCIO[30]
VCCACLK
0.1U_0402_16V7K
C194
0.1U_0402_16V7K
VCCIO[29]
VCCIO[31]
1
+PCH_VCCDSW
1
R290
D
0_0603_5%
@
USB
+3VALW
2
PCI/GPIO/LPC
1
R281
C198
0.1U_0402_16V7K
2
R280
PR-7
Clock and Miscellaneous
+3V_PCH
4
3
2
Sheet
Monday, February 13, 2012
1
18
of
61
5
4
3
2
1
U3I
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
U3H
D
H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
C
B
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
PANTHER-POINT_FCBGA989
A
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
D
C
B
A
PANTHER-POINT_FCBGA989
Compal Secret Data
Security Classification
Issued Date
2011/08/23
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
19
of
61
B
C
D
R330
3
1
2
1
GND
2
LCD_BL_PWM
O
LCD_VCC
GPIO4
O
LCD_BLEN
GPIO5
O
GPU_VID1
GPIO6
O
GPU_VID2
GPIO7
O
3D Vision
GPIO8
I/O
OVERT
GPIO9
I/O
ALERT
O
MEM_VREF_CTL
O
I
PWR_LEVEL
O
THERM_LOAD_STEP_DOWN
GPIO14
I
HPD_AB
GPIO15
I
HPD_C
GPIO16
O
THERM_LOAD_STEP_UP
GPIO17
I
HPD_D
I
HPD_E
GPIO19
I
HPD_F
USAGE
I2CC_SCL
I2CC_SDA
R2
R3
T4
T3
VID_PLLVDD
PEX_RST_N
PEX_TERMP
N13P-PES-A1_FCBGA908
@
@ 1
2
R293
10K_0402_5%
@ 1
2
R294
10K_0402_5%
@ 1
2
R295
10K_0402_5%
2 DIS@ 1
R296
10K_0402_5%
@ 1
2
R297
10K_0402_5%
2 DIS@ 1
R298
10K_0402_5%
DIS@ 1
R308
DIS@ 1
R309
DIS@ 1
R310
@ 1
R311
DIS@ 1
R312
@ 1
R313
1
ACIN_BUF 53
NC7SZ08P5X_NL_SC70-5
2
P
2
A
Y
@
VGA_BUF# 40
R428
0_0402_5%
I2CB_SCL
I2CB_SDA
GPU_VID0(Real N13P)
2
1
DIS@
D5
CH751H-40PT_SOD323-2
VGA_LCD_CLK
VGA_LCD_DATA
I2CS_SCL
I2CS_SDA
+3VSG
under GPU
close to ball : AD8
VGA_DDC_CLK R316 1 DIS@
VGA_DDC_DATA R317 1 DIS@
I2CB_SCL
I2CB_SDA
AD8 +PLLVDD
1 @
2
R322 0_0402_5%
AD7
XTAL_IN
XTAL_OUT
H3
H2
XTALIN
XTALOUT
J4
H1
1
XTAL_OUTBUFF
XTAL_SSIN
2
1
2
2 2.2K_0402_5%
2 2.2K_0402_5%
R318 1 DIS@
R319 1 DIS@
2 2.2K_0402_5%
2 2.2K_0402_5%
2
Reserved
GPIO21
R324 1 DIS@
R325 1 DIS@
GPIO22
2 2.2K_0402_5%
2 2.2K_0402_5%
I/O
SLI_RASTER_SYNC
GPIO23
I2CS_SCL
I2CS_SDA
1
Reserved
GPIO20
2 2.2K_0402_5%
2 2.2K_0402_5%
VGA_LCD_CLK R320 1 DIS@
VGA_LCD_DATA R321 1 DIS@
2
0.1U_0402_16V4Z
AE8 +GPU_PLLVDD
R328
10K_0402_5%
DIS@
2
PR-7
1
R7
R6
2
3
I2CB_SCL
I2CB_SDA
4
VGA_DDC_CLK
VGA_DDC_DATA
B
G
10K_0402_5% U11
R4
R5
MEM_VDD_CTL(PES)
5
DIS@
I2CA_SCL
I2CA_SDA
53
53
53
53
53
53
1
1
GPIO
AJ12
AP29
GPU_VID0
GPU_VID1
GPU_VID2
GPU_VID3
GPU_VID4
GPU_VID5
R315
XTAL_OUTBUFF
XTAL_SSIN
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
2
2
2
2
2
2
O
SLI_SWAPRDY
3
GPIO24
+3VSG
R329
DIS@
under GPU
close to ball : AE8,AD7
+1.05VSG
12P_0402_50V8J
C242
DIS@
2
I2CS_SCL
L10
DIS@
1
2
BLM18PG300SN1D_2P
60mA
+PLLVDD
1
1
O
GPIO3
1 10K_0402_5%
27MHZ_10PF_7V27000050
1
2
GPIO2
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
R314 DIS@
2
ACIN_BUF_VGA
PLLVDD
1M_0402_5%
3
GND
Y3
DIS@ 4
AG10
AP9
AP8
C236
1
DIS@
AJ26
AK26
XTALIN
GPU_VID3
GPIO11
2 0_0402_5%
+3VSG
10K_0402_5%
@
XTALOUT
12P_0402_50V8J
C241
DIS@
PEX_TREMP
2
1
R327 DIS@ 2.49K_0402_1%
GPU_VID4
O
2
15 DGPU_RST#
O
GPIO1
GPIO13
1
1
1
1
1
1
DIS@ C240
22U_0805_6.3V6M
PEX_TSTCLK_OUT+
PEX_TSTCLK_OUT1
200_0402_1%
2
R326 @
R302
R303
R304
R305
R306
R307
@
1
PR-7
DIS@ C238
0.1U_0402_16V4Z
3
DACA_VDD
DACA_VREF
DACA_RSET
I2CS_SCL
I2CS_SDA
PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N
R301
AM9
AN9
SP_PLLVDD
AL13
AK13
AK12
13 CLK_PCIE_VGA
13 CLK_PCIE_VGA#
VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
DIS@ C237
0.1U_0402_16V4Z
2
10K_0402_5%
PEG_CLKREQ#
GPU_GPIO16
GPU_GPIO16
1
1 DIS@
GPIO0
GPIO12
+3VSG
1 10K_0402_5%
1 10K_0402_5%
VID_0
ACIN_BUF_VGA
VID_5
1
R323
I/O
GPIO18
R299 2 DIS@
R300 2 DIS@
AK9
AL10
AL9
DACA_HSYNC
DACA_VSYNC
VID_1
VID_2
2
+3VSG
PEX_WAKE_N
GPIO
GPIO10
VID_4
VID_3
2
2
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
P6
M3
L6
P5
P7
L7
M7
N8
M1
M2
L1
M5
N3
M4
N4
P2
R8
M6
R1
P3
P4
P1
DACA_RED
DACA_GREEN
DACA_BLUE
DACs
4 PCIE_CTX_C_GRX_N[0..15]
I2C
PCIE_CTX_C_GRX_N[0..15]
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
CLK
PCIE_CTX_C_GRX_P[0..15]
4 PCIE_CTX_C_GRX_P[0..15]
+3VSG
Part 1 of 7
PCI EXPRESS
4 PCIE_GTX_C_CRX_N[0..15]
1
AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25
AJ11
PCIE_GTX_C_CRX_N[0..15]
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_P[0..15]
4 PCIE_GTX_C_CRX_P[0..15]
AN12
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27
E
The boot voltage is 1.0V
U10A
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
DIS@ C239
0.1U_0402_16V4Z
A
Q5A
1
6
PCH_SMLCLK 13,40
2N7002KDWH_SOT363-6
GEL@
SPEC: 30ohm (ESR:0.05)
L10= 30ohm
1
R742
2
GS@ 0_0402_5%
+3VSG
D
1
1
1
PEG_CLKREQ#_R
@
R334
2.2K_0402_5%
2
for safe
SPEC: 180ohm (ESR:0.2)
L11= 180ohm
5
1
2
DIS@ C246
22U_0805_6.3V6M
2
L11
DIS@
1
2
BLM18PG181SN1D_2P
I2CS_SDA
4
Q5B
3
PCH_SMLDATA 13,40
2N7002KDWH_SOT363-6
GEL@
1
R741
4
2
GS@ 0_0402_5%
PR-7
2
PEG_CLKREQ#
0_0402_5%
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
@
R335
2.2K_0402_5%
2
13 PEG_CLKREQ#_R
S
2
G
2
Q13
2N7002KW 1N SOT323-3
DIS@
3
1
R333
2
1
DIS@ C245
22U_0805_6.3V6M
2
2
4
1
DIS@ C244
4.7U_0603_6.3V6K
1
1
1
DIS@
R331
10K_0402_5%
R332
10K_0402_5%
DIS@ C243
0.1U_0402_16V4Z
+GPU_PLLVDD
+3VSG
+3V_PCH
150mA
2011/08/23
2012/12/31
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC A8222
Rev
B
4019G8
Date:
A
B
C
D
Sheet
Monday, February 13, 2012
E
20
of
61
A
VRAM Interface
MDA[15..0]
25 MDA[15..0]
MDA[31..16]
26 MDA[63..48]
27 MDC[31..16]
MDA[63..48]
26 MDA[47..32]
MDC[15..0]
27 MDC[15..0]
MDA[47..32]
25 MDA[31..16]
28 MDC[47..32]
MDC[31..16]
MDC[47..32]
MDC[63..48]
28 MDC[63..48]
U10C
26 DQMA[7..4]
25 DQSA[3..0]
26 DQSA[7..4]
25 DQSA#[3..0]
26 DQSA#[7..4]
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7
M31
G31
E33
M33
AE31
AK30
AN33
AF33
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7
M30
H30
E34
M34
AF30
AK31
AM34
AF32
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
MEMORY INTERFACE
A
P30
F31
F34
M32
AD31
AL29
AM32
AF34
DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31
FBA_CMD_RFU0
FBA_CMD_RFU1
R28 FBA_DEBUG0
AC28 FBA_DEBUG1
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
R336
@
2
@
2
R338
R30
R31
AB31
AC31
+1.5VSG
60.4_0402_1%
1
1
60.4_0402_1%
K31
L30
H34
J34
AG30
AG31
AJ34
AK34
FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N
FB_CLAMP
FB_DLL_AVDD
E1
K27
U27
100mA
FB_VREF
CLKA0 25
CLKA0# 25
CLKA1 26
CLKA1# 26
J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33
100mA
FBA_PLL_AVDD
N13P-PES-A1_FCBGA908
@
MDC0
MDC1
MDC2
MDC3
MDC4
MDC5
MDC6
MDC7
MDC8
MDC9
MDC10
MDC11
MDC12
MDC13
MDC14
MDC15
MDC16
MDC17
MDC18
MDC19
MDC20
MDC21
MDC22
MDC23
MDC24
MDC25
MDC26
MDC27
MDC28
MDC29
MDC30
MDC31
MDC32
MDC33
MDC34
MDC35
MDC36
MDC37
MDC38
MDC39
MDC40
MDC41
MDC42
MDC43
MDC44
MDC45
MDC46
MDC47
MDC48
MDC49
MDC50
MDC51
MDC52
MDC53
MDC54
MDC55
MDC56
MDC57
MDC58
MDC59
MDC60
MDC61
MDC62
MDC63
R32
AC32
FBA_DEBUG0
FBA_DEBUG1
H26
27 DQMC[3..0]
28 DQMC[7..4]
FB_CLAMP
Under GPU
close to ball : K27
C247 DIS@
1
2
0.1U_0402_16V4Z
+FB_PLLAVDD
1
2
C248
0.1U_0402_16V4Z
DIS@
CMDC[30..0]
Part 3 of 7
CMDA0
CMDA1
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16
CMDA17
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30
27 DQSC[3..0]
28 DQSC[7..4]
27 DQSC#[3..0]
28 DQSC#[7..4]
Under GPU
close to ball : U27
G9
E9
G8
F9
F11
G11
F12
G12
G6
F5
E6
F6
F4
G4
E2
F3
C2
D4
D3
C1
B3
C4
B5
C5
A11
C11
D11
B11
D8
A8
C8
B8
F24
G23
E24
G24
D21
E21
G21
F21
G27
D27
G26
E27
E29
F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
E11
E3
A3
C9
F23
F27
C30
A24
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
DQSC0
DQSC1
DQSC2
DQSC3
DQSC4
DQSC5
DQSC6
DQSC7
D10
D5
C3
B9
E23
E28
B30
A23
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
DQSC#0
DQSC#1
DQSC#2
DQSC#3
DQSC#4
DQSC#5
DQSC#6
DQSC#7
D9
E4
B2
A9
D22
D28
A30
B23
FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7
DQMC0
DQMC1
DQMC2
DQMC3
DQMC4
DQMC5
DQMC6
DQMC7
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17
FBB_CMD_RFU0
FBB_CMD_RFU1
C12
C20
FBB_DEBUG0
FBB_DEBUG1
G14
G20
FBB_CLK0
FBB_CLK0_N
FBB_CLK1
FBB_CLK1_N
D12
E12
E20
F20
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
27,28
CMDC0
CMDC1
CMDC2
CMDC3
CMDC4
CMDC5
CMDC6
CMDC7
CMDC8
CMDC9
CMDC10
CMDC11
CMDC12
CMDC13
CMDC14
CMDC15
CMDC16
CMDC17
CMDC18
CMDC19
CMDC20
CMDC21
CMDC22
CMDC23
CMDC24
CMDC25
CMDC26
CMDC27
CMDC28
CMDC29
CMDC30
F8
E8
A5
A6
D24
D25
B27
C27
+1.5VSG
R337
FBB_DEBUG0 2
@
FBB_DEBUG1 2
@
R339
60.4_0402_1%
1
1
60.4_0402_1%
1
CLKC0 27
CLKC0# 27
CLKC1 28
CLKC1# 28
Or use same as L10 PN: SM01000FE00
+FB_PLLAVDD
FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N
+FB_PLLAVDD
D6
D7
C6
B6
F26
E26
A26
A27
FBB_PLL_AVDD
+1.05VSG
DIS@
L12
1
2
FBMA-L11-160808300LMA25T_2P
1
300mA
H17
1
2
DIS@ C250
1U_0402_6.3V6K
25 DQMA[3..0]
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
1
2
SPEC: 30ohm (ESR:0.01)
L12= 30ohm
2
+FB_PLLAVDD
100mA
1
2
DIS@ C249
0.1U_0402_16V4Z
1
L28
M29
L29
M28
N31
P29
R29
P28
J28
H29
J29
H28
G29
E31
E32
F30
C34
D32
B33
C33
F33
F32
H33
H32
P34
P32
P31
P33
L31
L34
L32
L33
AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28
AJ29
AK29
AJ30
AK28
AM29
AM31
AN29
AM30
AN31
AN32
AP30
AP32
AM33
AL31
AK33
AK32
AD34
AD32
AC30
AD33
AF31
AG34
AG32
AG33
MEMORY INTERFACE B
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
DIS@ C252
1U_0402_6.3V6K
CMDA[30..0] 25,26
Part 2 of 7
DIS@ C251
22U_0805_6.3V6M
U10B
Under GPU
close to ball : H17
N13P-PES-A1_FCBGA908
@
GS@
FB_CLAMP 1
2
R726
10K_0402_5%
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/08/23
Deciphered Date
2012/12/31
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
A
Monday, February 13, 2012
Sheet
21
of
61
5
4
D
3
2
1
D
U10D
Part 4 of 7
PR-6
C
TEST
AK11
R358 1
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
LVDS/TMDS
TESTMODE
AM10
AM11
AP12
AP11
AN11
JTAG_TCK R359 1
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST
DIS@
@
AG3
AG2
AB3
AB4
ROM_CS_N
ROM_SCLK
ROM_SI
ROM_SO
H6
H4
H5
H7
GPU
Frenq.
L2
R362
1 @
CEC
L3
R363 1 DIS@
J1
MULTI_STRAP_REF0_GND
10K_0402_5%
2
900 MHz
N13P-GS
+3VSG
900 MHz
900 MHz
N13P-GS
BUFRST_N
900 MHz
900 MHz
Memory Size
Memory Config
strap0
strap1
strap2
strap3
strap4
ROM_SI
ROM_SO
128M* 16* 8
2GB
128M* 16* 8
2GB
64M* 16* 8
1GB
64M* 16* 8
1GB
128M* 16* 8
2GB
Samsung
SA000047QA0
Hynix B
SA00003YO30
Samsung
SA00004GS30
Hynix
SA000041S60
Hynix D
SA00003YO30
R
PU 45K
R
PU 45K
R
PU 45K
R
PU 45K
R
PD 5K
R
PD 5K
R
PD 5K
R
PD 5K
R
PD 15K
R
PD 15K
R
PD 15K
R
PD 15K
R
PD 25K
R
PD 25K
R
PD 25K
R
PD 25K
R
PD 45K
R
PD 45K
R
PD 45K
R
PD 45K
R
PD 45K
R
PD 35K
R
PD 20K
R
PD 15K
R
PD 30K
R
PU 10K
R
PU 10K
R
PU 10K
R
PU 10K
ROM_SCLK
R
PU 5K
R
PU 5K
R
PU 5K
R
PU 5K
For N13P-GL strap table
2 10K_0402_5%
GPU
+3VSG
1 DIS@ 2
R364
40.2K_0402_1%
Frenq.
900 MHz
N13P-GL
900 MHz
N13P-GL
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
J2
J7
J6
J5
J3
PR-6
Need check with NVIDIA
For N13P-GS strap table
N13P-GS
ROM_CS#
ROM_SCLK
ROM_SI
ROM_SO
R361
10K_0402_5%
1 DIS@ 2
GENERAL
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
900 MHz
Memory Size
Memory Config
strap0
strap1
strap2
strap3
strap4
ROM_SI
ROM_SO
128M* 16* 8
2GB
128M* 16* 8
2GB
64M* 16* 8
1GB
64M* 16* 8
1GB
128M* 16* 8
2GB
Samsung
SA000047QA0
Hynix B
SA00003YO30
Samsung
SA00004GS30
Hynix
SA000041S60
Hynix D
SA00003YO30
R
PU 45K
R
PU 45K
R
PU 45K
R
PU 45K
R
PD 45K
R
PD 45K
R
PD 45K
R
PD 45K
R
PU 10K
R
PU 10K
R
PU 10K
R
PU 10K
R
PD 5K
R
PD 5K
R
PD 5K
R
PD 5K
R
PD 10K
R
PD 10K
R
PD 10K
R
PD 10K
R
PD 45K
R
PD 35K
R
PD 20K
R
PD 15K
R
PD 30K
R
PU 10K
R
PU 10K
R
PU 10K
R
PU 10K
B
ROM_SCLK
R
PD 15K
R
PD 15K
R
PD 15K
R
PD 15K
K3
K4
IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
AF3
AF2
PR-6
@
@
@
@
N13P-GS
SERIAL
THERMDP
THERMDN
IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
2 10K_0402_5%
PAD T32
PAD T33
PAD T34
PAD T35
N13P-GS
IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N
AK3
AK2
2 10K_0402_5%
1 DIS@ 2
R360
10K_0402_5%
MULTI_STRAP_REF0_GND
B
@ 1
2
R347
15K_0402_5%
VSSSENSE_VGA 53
@ 1
2
R355
34.8K_0402_1%
1 DIS@ 2
R357
0_0402_5%
@ 1
2
R346
4.99K_0402_1%
VSSSENSE_VGA_R
@ 1
2
R354
10K_0402_1%
L5
@ 1
2
R345
4.99K_0402_1%
GND_SENSE
@ 1
2
R353
34.8K_0402_1%
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N
VCCSENSE_VGA 53
2
1
R344
@
10K_0402_1%
AE3
AE4
AF4
AF5
AD4
AD5
AG1
AF1
1 DIS@ 2
R356
0_0402_5%
ROM_SI
ROM_SO
ROM_SCLK
STRAP3
STRAP4
2
1
R352
@
10K_0402_1%
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
VCCSENSE_VGA_R
2
1
R343
@
34.8K_0402_1%
AD2
AD3
AD1
AC1
AC2
AC3
AC4
AC5
L4
+3VSG
2
1
R351
@
4.99K_0402_1%
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
STRAP0
STRAP1
STRAP2
VDD_SENSE
C
+3VSG
@ 1
2
R342
34.8K_0402_1%
AM1
AM2
AM3
AM4
AL3
AL4
AK4
AK5
MULTI LEVEL STRAPS
Straps
@ 1
2
R350
4.99K_0402_1%
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
@
T31
@ 1
2
R341
4.99K_0402_1%
AK1
AJ1
AJ3
AJ2
AH3
AH4
AG5
AG4
PAD
@ 1
2
R349
45.3K_0402_1%
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
P8
AC6
AJ28
AJ4
AJ5
AL11
C15
D19
D20
D23
D26
H31
T8
V32
2 DIS@ 1
R340
45.3K_0402_1%
AJ9
AH9
AP6
AP5
AM7
AL7
AN8
AM8
AK8
AL8
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
@ 1
2
R348
4.99K_0402_1%
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
NC
AM6
AN6
AP3
AN3
AN5
AM5
AL6
AK6
AJ6
AH6
N13P-GL
900 MHz
IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
N13P-GL
900 MHz
N13P-GL
For N13M-GE1 strap table
GPU
Frenq.
900 MHz
N13M-GE1
N13P-PES-A1_FCBGA908
@
900 MHz
N13M-GE1
Memory Size
Memory Config
strap0
strap1
strap2
strap3
strap4
ROM_SI
ROM_SO
128M* 16* 4
1GB
128M* 16* 4
1GB
Samsung
SA000047QA0
Hynix
SA00003YO30
R
PU 45K
R
PU 45K
R
PD 45K
R
PD 45K
R
PU 5K
R
PU 5K
R
PD 5K
R
PD 5K
R
PD 10K
R
PD 10K
R
PD 45K
R
PD 35K
R
PU 10K
R
PU 10K
ROM_SCLK
R
PU 5K
R
PU 5K
A
A
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
22
of
61
2
1
2
150mA
1
2
C287
0.1U_0402_16V4Z
+PEX_PLLVDD
150mA
DIS@C258
DIS@C258
22U_0805_6.3V6M
1
2
1
C
L13
BLM18PG121SN1D_0603
SPEC: 120ohm ESR:0.18
L13= 120ohm
+IFPAB_IOVDD
R368 1 DIS@
IFPC_PLLVDD
IFPC_RSET
AF7
AF8
+IFPC_PLLVDD
AF6
+IFPC_IOVDD
R373 1 DIS@
IFPD_PLLVDD
IFPD_RSET
AG7
AN2
+IFPD_PLLVDD
IFPD_RESET
R375 1 DIS@ 2 10K_0402_5%
R377 1
@ 2 1K_0402_5%
AG6
+IFPD_IOVDD
R378 1 DIS@
AB8
AD6
+IFPEF_PLLVDD
IFPEF_RESET
R380 1 DIS@ 2 10K_0402_5%
R381 1
@ 2 1K_0402_5%
AC7
AC8
+IFPEF_IOVDD
R382 1 DIS@
29 DGPU_PWR_EN#
+3VSG
2 10K_0402_5%
2
AG8
AG9
Under GPU (one per pin)
+3V3MISC
Q62
AO3419L 1P SOT23-3
+3V3MISC
R370 1 DIS@ 2 10K_0402_5%
R372 1
@ 2 1K_0402_5%
1
2 10K_0402_5%
2
1
2
3
1
GS@
1
R737
2
GEL@ 0_0402_5%
+3VS
@
2 10K_0402_5%
1
R739
FB_CAL_TERM_GND
2
0_0402_5%
B
2 10K_0402_5%
Under GPU (one per pin)
+VDD33
1
N13P-PES-A1_FCBGA908
@
2
1
2
1
2
1
2
2
1
2
DIS@ C297
4.7U_0603_6.3V6K
B
Place near balls
DIS@ C272
22U_0805_6.3V6M
DIS@ C271
22U_0805_6.3V6M
DIS@ C270
10U_0603_6.3V6M
2
DIS@ C296
1U_0402_6.3V6K
FB_CAL_TERM_GND H25
DIS@ 1
2
R379
51.1_0402_1%
2
R366 1 DIS@ 2 10K_0402_5%
R367 1
@ 2 1K_0402_5%
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
1
DIS@ C295
1U_0402_6.3V6K
DIS@ 2
FB_CAL_PU_GND H27
1
R376
42.2_0402_1%
GEL@
Near GPU
D
DIS@ 1
FB_CAL_PD_VDDQ J27
2
R374
40.2_0402_1%
GS@
S
FB_GND_SENSE
L13
G
F2
+IFPAB_PLLVDD
IFPAB_RESET
IFPE_IOVDD
IFPF_IOVDD
FB_GND_SENSE
1
DIS@ 10_0402_5%
AH8
AJ8
FB_VDDQ_SENSE
2
R371
2
+VDD33
IFPD_IOVDD
F1
1
+3V3MISC
IFPEF_PLVDD
IFPEF_RSET
FB_VDDQ_SENSE
1
DIS@ 10_0402_5%
1
+1.05VSG
Under GPU
IFPC_IOVDD
2
R369
2
2
0.1U_0402_16V4Z
IFPA_IOVDD
IFPB_IOVDD
+1.5VSG
2
0_0603_5%
1
C282
2
120mA
1
370mA
@
J8
K8
L8
M8
2
1
+3VSG
@
VDD33_0
VDD33_1
VDD33_2
VDD33_3
2
1
Near GPU
IFPAB_PLLVDD
IFPAB_RSET
+1.5VSG
2
DIS@ C281
4.7U_0603_6.3V6K
AG26
1
DIS@ C290
4.7U_0603_6.3V6K
PEX_PLLVDD
2
DIS@ C269
10U_0603_6.3V6M
AG12
2
1
DIS@ C280
4.7U_0603_6.3V6K
PEX_SVDD_3V3
2
1
DIS@ C289
1U_0402_6.3V6K
AH12
2
1
DIS@ C279
1U_0402_6.3V6K
PEX_PLL_HVDD
1
DIS@ C268
4.7U_0603_6.3V6K
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
2700 mA
DIS@ C292
0.1U_0402_16V4Z
2
2
1
+1.05VSG
DIS@ C294
0.1U_0402_16V4Z
2
1
2
1
Near GPU
DIS@ C288
0.1U_0402_16V4Z
2
1
DIS@ C286
10U_0603_6.3V6M
C
1
DIS@ C285
10U_0603_6.3V6M
2
DIS@ C284
10U_0603_6.3V6M
1
DIS@ C283
10U_0603_6.3V6M
Near GPU
PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
Under GPU
AG19
AG21
AG22
AG24
AH21
AH25
DIS@ C291
0.1U_0402_16V4Z
2
PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
DIS@ C293
0.1U_0402_16V4Z
2
1
DIS@ C278
0.1U_0402_16V4Z
2
1
DIS@ C277
0.1U_0402_16V4Z
2
1
DIS@ C276
0.1U_0402_16V4Z
2
1
DIS@ C275
0.1U_0402_16V4Z
2
1
DIS@ C274
1U_0402_6.3V6K
1
DIS@ C273
4.7U_0603_6.3V6K
Under GPU
FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38
FBVDDQ_39
FBVDDQ_40
FBVDDQ_41
FBVDDQ_42
FBVDDQ_43
DIS@ C267
1U_0402_6.3V6K
2
AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27
B13
B16
B19
E13
E16
E19
H10
H11
H12
H13
H14
H15
H16
H18
H19
H20
H21
H22
H23
H24
H8
H9
L27
M27
N27
P27
R27
T27
T30
T33
V27
W27
W30
W33
Y27
POWER
2
1
DIS@ C265
0.1U_0402_16V4Z
2
1
DIS@ C264
0.1U_0402_16V4Z
2
1
DIS@ C263
0.1U_0402_16V4Z
1
DIS@ C262
0.1U_0402_16V4Z
2
DIS@ C261
1U_0402_6.3V6K
DIS@ C260
4.7U_0603_6.3V6K
2
1
2
1
D
7200mA
1
2
1
Part 5 of 7
Under GPU
D
DIS@ C266
1U_0402_6.3V6K
+1.5VSG
2
1
DIS@ C257
10U_0603_6.3V6M
2
U10E
1
+1.05VSG
Near GPU
DIS@ C254
1U_0402_6.3V6K
1
DIS@ C253
1U_0402_6.3V6K
Under GPU
1
DIS@C259
DIS@C259
22U_0805_6.3V6M
3
DIS@ C256
10U_0603_6.3V6M
4
DIS@ C255
4.7U_0603_6.3V6K
5
1
R365
0_0603_5%
PR-7
A
A
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
23
of
61
5
4
3
2
1
+VGA_CORE
U10F
+VGA_CORE
U10G
C
B
A
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_OPT
GND_OPT
Part 7 of 7
50A
D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
C16
W32
AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23
M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22
T12
T14
T16
T19
T21
T23
U13
U15
U17
U18
U20
U22
V13
V15
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y17
Y18
Y20
Y22
XVDD_1
XVDD_2
XVDD_3
XVDD_4
XVDD_5
XVDD_6
XVDD_7
XVDD_8
U1
U2
U3
U4
U5
U6
U7
U8
XVDD_9
XVDD_10
XVDD_11
XVDD_12
XVDD_13
XVDD_14
XVDD_15
XVDD_16
V1
V2
V3
V4
V5
V6
V7
V8
XVDD_17
XVDD_18
XVDD_19
XVDD_20
XVDD_21
XVDD_22
W2
W3
W4
W5
W7
W8
XVDD_23
XVDD_24
XVDD_25
XVDD_26
XVDD_27
XVDD_28
XVDD_29
XVDD_30
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
XVDD_31
XVDD_32
XVDD_33
XVDD_34
XVDD_35
XVDD_36
XVDD_37
XVDD_38
POWER
A2
AA17
AA18
AA20
AA22
AB12
AB14
AB16
AB19
AB2
AB21
A33
AB23
AB28
AB30
AB32
AB5
AB7
AC13
AC15
AC17
AC18
AA13
AC20
AC22
AE2
AE28
AE30
AE32
AE33
AE5
AE7
AH10
AA15
AH13
AH16
AH19
AH2
AH22
AH24
AH28
AH29
AH30
AH32
AH33
AH5
AH7
AJ7
AK10
AK7
AL12
AL14
AL15
AL17
AL18
AL2
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33
AL5
AM13
AM16
AM19
AM22
AM25
AN1
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34
AN4
AN7
AP2
AP33
B1
B10
B22
B25
B28
B31
B34
B4
B7
C10
C13
C19
C22
C25
C28
C7
D
GND
Part 6 of 7
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
D
C
B
N13P-PES-A1_FCBGA908
A
Issued Date
@
Compal Electronics, Inc.
Compal Secret Data
Security Classification
N13P-PES-A1_FCBGA908
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
24
of
61
5
4
3
2
1
VRAM DDR3 chips (1GB)
Mode D
Address
0..31
64Mx16 DDR3 *8== & gt; 1GB
128Mx16 DDR3 *8== & gt; 2GB
D
32..63
CS0_L#
CMD0
D
CMD1
CMD2
ODT_L
CMD3
CKE
CMD4
21,26 DQSA[7..0]
U12
+MEM_VREF0
M8
H1
VREFCA
VREFDQ
CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4
CMDA14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQMA[7..0]
21,26 MDA[63..0]
21,26 CMDA[30..0]
MDA[63..0]
CMDA[30..0]
+1.5VSG
DIS@
R383
240_0402_1%
C
C298
DIS@
0.1U_0402_16V4Z
+MEM_VREF0
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
2
CMDA12
CMDA27
CMDA26
DIS@
R385
240_0402_1%
M2
N8
M3
BA0
BA1
BA2
CLKA0
CLKA0#
CMDA3
+1.5VSG
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
F3
C7
DIS@
R386
240_0402_1%
1
2
C299
DIS@
0.1U_0402_16V4Z
+MEM_VREF1
DQMA1
DQMA3
DQSA#1
DQSA#3
CMDA5
ZQ0
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
M2
N8
M3
BA0
BA1
BA2
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A0
A4
A4
A1
A1
CMD12
BA0
BA0
CMD13
WE*
WE*
CMD14
A15
A15
CMD15
CAS*
CMD16
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
A0
CMD11
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
CAS*
CS0_H#
C
CMD17
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A7
A2
CMD10
+1.5VSG
A7
CMD8
Group2
A9
CMD9
MDA21
MDA19
MDA23
MDA17
MDA20
MDA16
MDA22
MDA18
D7
C3
C8
C2
A7
A2
B8
A3
RST
A9
CMD7
Group0
A14
B1
B9
D1
D8
E2
E8
F9
G1
G9
CMD18
ODT_H
CKE_H
CMD19
DQSA0
DQSA2
F3
C7
DQMA0
DQMA2
DQSL
DQSU
E7
D3
DQSA#0
DQSA#2
DML
DMU
G3
B7
CMDA5
DQSL
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
ZQ1
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
A13
CMD21
A8
A8
A6
A6
CMD23
A11
A11
CMD24
A5
A5
CMD25
A3
A3
CMD26
BA2
BA2
CMD27
BA1
BA1
CMD28
A12
A12
CMD29
A10
A10
CMD30
RAS*
RAS*
LOW
+1.5VSG
A13
CMD22
310mA
CMD20
HIGH
Not Available
B
1
J1
L1
J9
L9
DIS@
R388
243_0402_1%
2
1
B1
B9
D1
D8
E2
E8
F9
G1
G9
ZQ/ZQ0
+1.5VSG
1
CLKA0
DIS@
R392
160_0402_1%
L8
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
CMDA2
CMDA0
CMDA30
CMDA15
CMDA13
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
RESET
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CLKA0
CLKA0#
CMDA3
A1
A8
C1
C9
D2
E9
F1
H2
H9
DQSL
DQSU
T2
B
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DML
DMU
G3
B7
Group3
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
MDA1
MDA5
MDA2
MDA7
MDA0
MDA6
MDA3
MDA4
E3
F7
F2
F8
H3
H8
G2
H7
RST
CMD6
@
CMDA12
CMDA27
CMDA26
B2
D9
G7
K2
K8
N1
N9
R1
R9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
E7
D3
CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4
CMDA14
Group1
MDA30
MDA25
MDA31
MDA27
MDA28
MDA26
MDA29
MDA24
D7
C3
C8
C2
A7
A2
B8
A3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
310mA
DQSA1
DQSA3
+MEM_VREF1 M8
H1
+1.5VSG
CMDA2
CMDA0
CMDA30
CMDA15
CMDA13
1
DIS@
R384
240_0402_1%
2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
MDA11
MDA12
MDA8
MDA13
MDA9
MDA14
MDA10
MDA15
E3
F7
F2
F8
H3
H8
G2
H7
CLKA0#
DIS@
R389
243_0402_1%
2
21,26 DQMA[7..0]
21 CLKA0#
U13
DQSA#[7..0]
21,26 DQSA#[7..0]
21 CLKA0
@
A14
CMD5
DQSA[7..0]
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
CMDA2
CMDA3
CMDA5
CMDA18
CMDA19
R390
R391
R393
R394
R395
1
1
1
1
1
DIS@
DIS@
DIS@
DIS@
DIS@
2
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
Command Bit
Default Pull-down
ODTx
10k
10k
CKEx
DDR3
RST
CS*
10k
No Termination
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
+1.5VSG
+1.5VSG
1
2
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )
DIS@ C319
0.1U_0402_16V4Z
2
DIS@ C318
0.1U_0402_16V4Z
2
1
AMD :SA00003PF10
(S IC D3 64M16/800 23EY2387MB-12 PG-TFBGA 96P 1.5V)
A
Compal Electronics, Inc.
Compal Secret Data
Security Classification
Issued Date
2
1
DIS@ C317
0.1U_0402_16V4Z
2
1
DIS@ C316
0.1U_0402_16V4Z
2
1
DIS@ C315
0.1U_0402_16V4Z
2
1
DIS@ C314
1U_0402_6.3V6K
2
1
DIS@ C313
1U_0402_6.3V6K
2
1
DIS@ C312
1U_0402_6.3V6K
2
1
DIS@ C311
1U_0402_6.3V6K
2
1
DIS@ C310
0.1U_0402_16V4Z
2
1
DIS@ C309
0.1U_0402_16V4Z
2
1
DIS@ C308
0.1U_0402_16V4Z
2
1
DIS@ C307
0.1U_0402_16V4Z
2
1
DIS@ C306
0.1U_0402_16V4Z
2
1
DIS@ C305
0.1U_0402_16V4Z
2
1
DIS@ C304
1U_0402_6.3V6K
2
1
DIS@ C303
1U_0402_6.3V6K
2
A
1
DIS@ C302
1U_0402_6.3V6K
1
DIS@ C301
1U_0402_6.3V6K
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
25
of
61
5
4
3
2
1
VRAM DDR3 chips (1GB)
Mode D
Address
64Mx16 DDR3 *8== & gt; 1GB
128Mx16 DDR3 *8== & gt; 2GB
+MEM_VREF2
CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4
CMDA14
CMDA[30..0]
DQSA#[7..0]
DQSA[7..0]
MDA[63..0]
+1.5VSG
DIS@
R397
240_0402_1%
CMDA12
CMDA27
CMDA26
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSA5
DQSA6
F3
C7
DQSL
DQSU
DQMA5
DQMA6
T2
ZQ2
L8
DIS@
R401
243_0402_1%
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
CLKA1#
B1
B9
D1
D8
E2
E8
F9
G1
G9
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
F3
C7
DQSL
DQSU
DQMA4
DQMA7
DQSA#4
DQSA#7
CMDA5
ZQ3
E7
D3
DIS@
R402
243_0402_1%
A14
A9
CMD7
A7
A7
CMD8
A2
A2
CMD9
A0
A0
CMD10
A4
A4
CMD11
A1
A1
CMD12
BA0
BA0
CMD13
WE*
WE*
A15
A15
CMD15
CAS*
CAS*
CS0_H#
CMD16
CMD17
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
DQSL
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
C
ODT_H
CKE_H
B1
B9
D1
D8
E2
E8
F9
G1
G9
DML
DMU
G3
B7
CMD18
+1.5VSG
CMD20
A13
A13
CMD21
A8
A8
CMD22
A6
A6
CMD23
A11
A11
CMD24
A5
A5
CMD25
A3
A3
CMD26
BA2
BA2
CMD27
BA1
BA1
CMD28
A12
A12
CMD29
A10
A10
CMD30
RAS*
RAS*
LOW
HIGH
Not Available
B
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
2
1
2
1
2
DIS@
C332
0.1U_0402_16V4Z
2
1
DIS@
C331
0.1U_0402_16V4Z
2
1
DIS@
C330
0.1U_0402_16V4Z
2
1
DIS@
C329
0.1U_0402_16V4Z
2
1
DIS@
C328
0.1U_0402_16V4Z
2
1
DIS@
C327
0.1U_0402_16V4Z
2
1
DIS@ C326
1U_0402_6.3V6K
1
DIS@ C325
1U_0402_6.3V6K
+1.5VSG
DIS@ C324
1U_0402_6.3V6K
DIS@ C323
1U_0402_6.3V6K
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
310mA
+1.5VSG
2
CK
CK
CKE/CKE0
RST
A9
CMD14
B2
D9
G7
K2
K8
N1
N9
R1
R9
RST
CMD6
Group7
A14
CMD5
CMD19
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
DQSA4
DQSA7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
D7
C3
C8
C2
A7
A2
B8
A3
MDA58
MDA60
MDA56
MDA62
MDA57
MDA63
MDA59
MDA61
CMD4
Group4
+1.5VSG
BA0
BA1
BA2
J7
K7
K9
MDA33
MDA36
MDA34
MDA37
MDA35
MDA38
MDA32
MDA39
CKE
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
2
1
DIS@ C341
0.1U_0402_16V4Z
2
DIS@
R404
160_0402_1%
21 CLKA1#
M2
N8
M3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
DIS@ C340
0.1U_0402_16V4Z
21 CLKA1
2
CLKA1
J1
L1
J9
L9
1
B
ZQ/ZQ0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDA18
CMDA16
CMDA30
CMDA15
CMDA13
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
RESET
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DIS@ C339
0.1U_0402_16V4Z
2
CMDA5
DQSL
DQSU
VREFCA
VREFDQ
1
1
G3
B7
DML
DMU
CLKA1
CLKA1#
CMDA19
+1.5VSG
1
DIS@
R400
240_0402_1%
DQSA#5
DQSA#6
C321
DIS@
0.1U_0402_16V4Z
+MEM_VREF3
E7
D3
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
310mA
CMDA12
CMDA27
CMDA26
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
CMDA18
CMDA16
CMDA30
CMDA15
CMDA13
DIS@
R399
240_0402_1%
Group6
+1.5VSG
BA0
BA1
BA2
+1.5VSG
MDA50
MDA53
MDA49
MDA52
MDA48
MDA54
MDA51
MDA55
CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4
CMDA14
Group5
M8
H1
D
ODT_L
CMD3
DIS@ C338
0.1U_0402_16V4Z
2
CLKA1
CLKA1#
CMDA19
+MEM_VREF3
DIS@ C337
0.1U_0402_16V4Z
1
C320
DIS@
0.1U_0402_16V4Z
DIS@
R398
240_0402_1%
MDA41
MDA47
MDA43
MDA45
MDA40
MDA46
MDA42
MDA44
D7
C3
C8
C2
A7
A2
B8
A3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
+MEM_VREF2
C
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DIS@ C336
1U_0402_6.3V6K
21,25 MDA[63..0]
CS0_L#
CMD2
@
DIS@ C335
1U_0402_6.3V6K
21,25 DQSA[7..0]
VREFCA
VREFDQ
DIS@ C334
1U_0402_6.3V6K
21,25 DQSA#[7..0]
M8
H1
U15
2
21,25 CMDA[30..0]
@
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQMA[7..0]
21,25 DQMA[7..0]
32..63
0..31
CMD1
U14
DIS@ C333
1U_0402_6.3V6K
D
CMD0
A
A
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
26
of
61
5
4
3
2
1
Mode D
Address
VRAM DDR3 chips (1GB)
32..63
0..31
CS0_L#
CMD0
CMD1
64Mx16 DDR3 *8== & gt; 1GB
128Mx16 DDR3 *8== & gt; 2GB
D
CMD2
DQMC[7..0]
U16
+MEM_VREF4
21,28 MDC[63..0]
DIS@
R406
240_0402_1%
C
2
C342
DIS@
0.1U_0402_16V4Z
DIS@
R407
240_0402_1%
J7
K7
K9
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
310mA
DQSC1
DQSC3
F3
C7
DQMC1
DQMC3
1
2
C343
DIS@
0.1U_0402_16V4Z
+MEM_VREF5
DIS@
R409
240_0402_1%
DQSL
DQSU
E7
D3
DML
DMU
DQSC#1
DQSC#3
G3
B7
CMDC5
T2
RESET
ZQ4
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
CLKC0
CMDC2
CMDC0
CMDC30
CMDC15
CMDC13
1
2
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
F3
C7
E7
D3
310mA
DQSL
DQSU
DML
DMU
DQSC#0
DQSC#2
G3
B7
CMDC5
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
ZQ5
DIS@
R411
243_0402_1%
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
DIS@
R418
160_0402_1%
B1
B9
D1
D8
E2
E8
F9
G1
G9
A15
CAS*
CAS*
CS0_H#
CMD16
CMD17
ODT_H
CMD18
DQSL
DQSU
CMD20
A13
CMD21
A8
A8
CMD22
A6
A6
A11
A11
CMD24
A5
A5
CMD25
A3
A3
CMD26
BA2
BA2
CMD27
BA1
BA1
CMD28
A12
A12
CMD29
A10
A10
CMD30
RAS*
RAS*
LOW
+1.5VSG
C
CKE_H
CMD19
HIGH
A13
Not Available
B
CMDC2
CMDC3
CMDC5
CMDC18
CMDC19
R412
R413
R414
R415
R416
1
1
1
1
1
DIS@
DIS@
DIS@
DIS@
DIS@
2
2
2
2
2
Command Bit
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
Default Pull-down
ODTx
DDR3
10k
CKEx
10k
RST
CS*
10k
No Termination
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
CLKC0#
21 CLKC0#
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
WE*
A15
CMD15
A1
A8
C1
C9
D2
E9
F1
H2
H9
BA0
WE*
CMD14
+1.5VSG
CK
CK
CKE/CKE0
DQMC0
DQMC2
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
BA0
CMD23
J7
K7
K9
DQSC0
DQSC2
B2
D9
G7
K2
K8
N1
N9
R1
R9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
BA0
BA1
BA2
A4
A1
CMD13
Group2
A0
A4
1
DQSL
DQSU
M2
N8
M3
CLKC0
CLKC0#
CMDC3
+1.5VSG
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CMDC12
CMDC27
CMDC26
Group3
A0
CMD12
MDC23
MDC17
MDC22
MDC19
MDC20
MDC18
MDC21
MDC16
A2
CMD11
D7
C3
C8
C2
A7
A2
B8
A3
A7
A2
CMD9
Group0
A7
CMD10
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
MDC1
MDC4
MDC3
MDC5
MDC2
MDC6
MDC0
MDC7
RST
A9
CMD8
E3
F7
F2
F8
H3
H8
G2
H7
RST
A9
CMD7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
2
2
DIS@
R410
243_0402_1%
21 CLKC0
D
A14
CMD6
@
CMDC9
CMDC11
CMDC8
CMDC25
CMDC10
CMDC24
CMDC22
CMDC7
CMDC21
CMDC6
CMDC29
CMDC23
CMDC28
CMDC20
CMDC4
CMDC14
Group1
1
B
MDC30
MDC25
MDC31
MDC27
MDC28
MDC26
MDC29
MDC24
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
CK
CK
CKE/CKE0
CMDC2
CMDC0
CMDC30
CMDC15
CMDC13
DIS@
R408
240_0402_1%
D7
C3
C8
C2
A7
A2
B8
A3
+MEM_VREF5 M8
H1
+1.5VSG
CLKC0
CLKC0#
CMDC3
+1.5VSG
MDC8
MDC12
MDC10
MDC13
MDC9
MDC14
MDC11
MDC15
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BA0
BA1
BA2
+MEM_VREF4
E3
F7
F2
F8
H3
H8
G2
H7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
M2
N8
M3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
CMDC12
CMDC27
CMDC26
+1.5VSG
U17
VREFCA
VREFDQ
CMDC9
CMDC11
CMDC8
CMDC25
CMDC10
CMDC24
CMDC22
CMDC7
CMDC21
CMDC6
CMDC29
CMDC23
CMDC28
CMDC20
CMDC4
CMDC14
CMDC[30..0]
1
@
M8
H1
MDC[63..0]
21,28 CMDC[30..0]
A14
CMD5
DQSC#[7..0]
21,28 DQMC[7..0]
CKE
CMD4
DQSC[7..0]
21,28 DQSC[7..0]
21,28 DQSC#[7..0]
ODT_L
CMD3
+1.5VSG
2
1
2
DIS@ C363
0.1U_0402_16V4Z
2
1
DIS@ C362
0.1U_0402_16V4Z
2
1
DIS@ C361
0.1U_0402_16V4Z
2
1
DIS@ C360
0.1U_0402_16V4Z
2
1
DIS@ C359
0.1U_0402_16V4Z
2
1
DIS@ C358
1U_0402_6.3V6K
2
1
DIS@ C357
1U_0402_6.3V6K
2
1
DIS@ C356
1U_0402_6.3V6K
2
1
DIS@ C355
1U_0402_6.3V6K
2
1
DIS@ C354
0.1U_0402_16V4Z
2
1
DIS@ C353
0.1U_0402_16V4Z
2
1
DIS@ C352
0.1U_0402_16V4Z
2
1
DIS@ C351
0.1U_0402_16V4Z
2
1
DIS@ C350
0.1U_0402_16V4Z
2
1
DIS@ C349
0.1U_0402_16V4Z
2
1
DIS@ C348
1U_0402_6.3V6K
2
1
DIS@ C347
1U_0402_6.3V6K
2
1
DIS@ C346
1U_0402_6.3V6K
1
DIS@ C345
1U_0402_6.3V6K
+1.5VSG
A
A
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
27
of
61
5
4
3
2
1
VRAM DDR3 chips (1GB)
64Mx16 DDR3 *8== & gt; 1GB
128Mx16 DDR3 *8== & gt; 2GB
D
D
DQMC[7..0]
21,27 DQMC[7..0]
CMDC[30..0]
21,27 CMDC[30..0]
DQSC#[7..0]
21,27 DQSC#[7..0]
U18
DQSC[7..0]
21,27 DQSC[7..0]
+MEM_VREF6
CMDC9
CMDC11
CMDC8
CMDC25
CMDC10
CMDC24
CMDC22
CMDC7
CMDC21
CMDC6
CMDC29
CMDC23
CMDC28
CMDC20
CMDC4
CMDC14
+1.5VSG
DIS@
R420
240_0402_1%
DIS@
R421
240_0402_1%
C
1
2
C364
DIS@
0.1U_0402_16V4Z
+MEM_VREF6
CMDC12
CMDC27
CMDC26
M8
H1
M2
N8
M3
J7
K7
K9
CMDC18
CMDC16
CMDC30
CMDC15
CMDC13
DIS@
R422
240_0402_1%
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
K1
L2
J3
K3
L3
F3
C7
MDC36
MDC33
MDC37
MDC32
MDC38
MDC35
MDC39
MDC34
D7
C3
C8
C2
A7
A2
B8
A3
+MEM_VREF7
MDC49
MDC52
MDC51
MDC53
MDC50
MDC54
MDC48
MDC55
Group6
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSL
DQSU
CMDC12
CMDC27
CMDC26
B2
D9
G7
K2
K8
N1
N9
R1
R9
BA0
BA1
BA2
M8
H1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
M2
N8
M3
J7
K7
K9
CMDC18
CMDC16
CMDC30
CMDC15
CMDC13
K1
L2
J3
K3
L3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
CMD0
MDC44
MDC41
MDC47
MDC43
MDC45
MDC42
MDC46
MDC40
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VREFCA
VREFDQ
CLKC1
CLKC1#
CMDC19
+1.5VSG
Mode D
Address
@
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
CMDC9
CMDC11
CMDC8
CMDC25
CMDC10
CMDC24
CMDC22
CMDC7
CMDC21
CMDC6
CMDC29
CMDC23
CMDC28
CMDC20
CMDC4
CMDC14
Group4
+1.5VSG
310mA
DQSC4
DQSC6
E3
F7
F2
F8
H3
H8
G2
H7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CLKC1
CLKC1#
CMDC19
+1.5VSG
U19
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
MDC[63..0]
21,27 MDC[63..0]
@
MDC56
MDC60
MDC58
MDC62
MDC57
MDC63
MDC59
MDC61
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CMD2
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
2
DQMC4
DQMC6
C365
DIS@
0.1U_0402_16V4Z
1
E7
D3
DQSC#4
DQSC#6
G3
B7
CMDC5
T2
ZQ6
L8
DQSL
DQSU
RESET
ZQ/ZQ0
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
1
2
DIS@
R427
160_0402_1%
21 CLKC1#
CLKC1#
A7
A7
A2
A2
CMD9
A0
A0
CMD10
A4
A4
CMD11
A1
A1
CMD12
BA0
BA0
CMD13
WE*
WE*
CMD14
A15
A15
CMD15
B1
B9
D1
D8
E2
E8
F9
G1
G9
A14
CAS*
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSC5
DQSC7
F3
C7
DQSL
DQSU
DQMC5
DQMC7
E7
D3
DQSC#5
DQSC#7
G3
B7
CMDC5
T2
ZQ7
L8
DML
DMU
DQSL
DQSU
RESET
ZQ/ZQ0
DIS@
R424
243_0402_1%
2
J1
L1
J9
L9
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
C
CAS*
CMD16
310mA
1
DIS@
R425
243_0402_1%
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
2
CLKC1
21 CLKC1
J1
L1
J9
L9
A9
CMD8
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
RST
A9
CMD7
+1.5VSG
RST
CMD6
Group7
A14
CMD5
CS0_H#
CMD17
CMD18
ODT_H
CKE_H
CMD19
CMD20
A13
A13
CMD21
A8
A8
CMD22
A6
A6
CMD23
A11
A11
CMD24
A5
A5
CMD25
A3
A3
CMD26
BA2
BA2
CMD27
BA1
BA1
CMD28
A12
A12
CMD29
A10
A10
CMD30
RAS*
RAS*
LOW
1
B
DML
DMU
CKE
CMD4
+MEM_VREF7
DIS@
R423
240_0402_1%
ODT_L
CMD3
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CK
CK
CKE/CKE0
B2
D9
G7
K2
K8
N1
N9
R1
R9
CS0_L#
CMD1
Group5
+1.5VSG
BA0
BA1
BA2
32..63
0..31
HIGH
B
Not Available
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
+1.5VSG
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
DIS@ C385
0.1U_0402_16V4Z
2
DIS@ C384
0.1U_0402_16V4Z
1
DIS@ C383
0.1U_0402_16V4Z
2
DIS@ C382
0.1U_0402_16V4Z
1
DIS@ C381
0.1U_0402_16V4Z
2
DIS@ C380
1U_0402_6.3V6K
1
DIS@ C379
1U_0402_6.3V6K
2
DIS@ C378
1U_0402_6.3V6K
1
DIS@ C377
1U_0402_6.3V6K
2
DIS@
C376
0.1U_0402_16V4Z
1
DIS@
C375
0.1U_0402_16V4Z
2
DIS@
C374
0.1U_0402_16V4Z
1
DIS@
C373
0.1U_0402_16V4Z
2
DIS@
C372
0.1U_0402_16V4Z
1
DIS@
C371
0.1U_0402_16V4Z
2
DIS@ C370
1U_0402_6.3V6K
1
DIS@ C369
1U_0402_6.3V6K
2
DIS@ C368
1U_0402_6.3V6K
1
DIS@ C367
1U_0402_6.3V6K
+1.5VSG
A
A
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
28
of
61
5
4
3
2
+VCCP to +1.05VSG
2
1
2
C387
DIS@
1
DIS@
1.05VSG_GATE
6
1
D
R429
10_0603_5%
DIS@
D
Q14
PR-7
R831
Q79A
DIS@
1
2
2N7002KW 1N SOT323-3
C394
DIS@
0.1U_0402_25V6
1
1
2
2
R433
2
1
0_0402_5%
VGA_PWROK#
S
3
2
100K_0402_5%
DIS@
470K_0402_5%
4
2
1
VGA_PWROK#
C395
0.01U_0402_25V7K
DIS@
2
2
C386
3
5
1
R431
4
1
2
470K_0402_5%
6
DIS@
1
1U_0402_6.3V6K
2
ER1019
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C397
0.1U_0402_16V7K
@
2
DIS@
1
1
2
3
2 VGA_PWROK#
G DIS@
+VSBP
1
DIS@
Q80A
2N7002KDWH_SOT363-6
0_0402_5%
DIS@
1
8
7
6
5
C391
2
R430
10_0603_5%
DIS@
C390
C390
PR-7
1
2
C389
10U_0603_6.3V6M
R830
R434
2
DIS@
1
DIS@
Q80B
2N7002KDWH_SOT363-6
1.5VSG_GATE
PR-3
VGA_PWROK#
2
C388
10U_0603_6.3V6M
2
DIS@
1
1U_0402_6.3V6K
DIS@
1
2
R432 DIS@
100K_0402_5%
+VSBP
1
2
3
10U_0603_6.3V6M
8
7
6
5
1
C393
C392
2
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
+1.05VSG
U20
AO4304L_SO8
+1.5VSG
U21
AO4304L_SO8
1
+VCCP
+1.5V
4
+1.5V to +1.5VSG
D
1
1
PR-3
C396
0.1U_0402_16V7K
@
2
2N7002KDWH_SOT363-6
2
PR-9
+3VALW
Q3
+3VSG
AO3404AL_SOT23
Q78A
2
DIS@
2N7002KDWH_SOT363-6
1
DGPU_PWR_EN#
2
3
Q59
DIS@
S
2N7002KW 1N SOT323-3
R712
DIS@
10K_0402_5%
2N7002KDWH_SOT363-6
R666
DIS@
10K_0402_5%
C402
DIS@
0.1U_0402_25V6
D
2
1
2
G
1
0_0402_5%
2
2
5
4
1
R119
R437
470K_0402_5%
6
PR-7
DGPU_PWR_EN#
Q78B
DIS@
2N7002KDWH_SOT363-6
3VSG_GATE
2
100K_0402_5%
15,53 DGPU_PWR_EN
Q79B
DIS@
5
DGPU_PWR_EN
2
DIS@
1
R436
VGA_PWROK
1
40,53 VGA_PWROK
+VSBP
DGPU_PWR_EN#
23 DGPU_PWR_EN#
R711
100K_0402_5%
DIS@
2
VGA_PWROK#
1
R435
DIS@
200_0603_5%
2
2
C399
DIS@
2
3
C398
DIS@
R665
100K_0402_5%
DIS@
4
2
1
1
2
G
2
DIS@
1
1U_0402_6.3V6K
10U_0603_6.3V6M
1
C401
C400
10U_0603_6.3V6M
10U_0603_6.3V6M
2
DIS@
C
3
DIS@
3
1
1
D
C
S
+3VS
1
1
+3VS to +3VSG
+3VALW
1
PR-9
1
C403
0.1U_0402_16V7K
2
@
B
B
For EMI
+1.5VSG
+VCC_CORE
+1.5VSG
+VCC_CORE
1 C712
@
100P_0402_50V8J
1 C719
@
100P_0402_50V8J
2
+5VALW
2
+5VALW
1 C713
@
100P_0402_50V8J
2
1 C720
@
100P_0402_50V8J
2
+3VALW
+3VALW
2
1 C714
@
100P_0402_50V8J
2
1 C721
@
100P_0402_50V8J
A
A
Compal Secret Data
Security Classification
Issued Date
2011/12/05
Deciphered Date
2012/11/22
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
29
of
61
5
4
3
2
1
D6
BLUE
2
GREEN
CRT
3
1
YSDA0502C 3P C/A SOT-23
D7
RED
1
2
CHILISIN NBQ160808T-800Y-N 0603
RED
PCH_CRT_GRN
YSDA0502C 3P C/A SOT-23
L17
C408
2
1
2
C409
1
2
C410
1
2
1
C411
2
2
VSYNC_L
10P_0402_50V8J
2
1
10P_0402_50V8J
C407
10P_0402_50V8J
1
10P_0402_50V8J
C406
10P_0402_50V8J
R440
HSYNC_L
W=40mils
2
SMD1812P075TF .75A 13.2V
1
C404
@
D8
RB491D_SOT23-3
D9
BLUE
1
2
CHILISIN NBQ160808T-800Y-N 0603
10P_0402_50V8J
R439
2
1
150_0402_1%
2
1
150_0402_1%
R438
2
1
150_0402_1%
PCH_CRT_BLU
14 PCH_CRT_BLU
L14 @
1+5VS_CRTVCC 1
2
GREEN
1
2
CHILISIN NBQ160808T-800Y-N 0603
D
+CRT_VCC
W=40mils
+5VS
1
3
+CRT_VCC
L16
14 PCH_CRT_GRN
2
3
2
1
1
C405
@
2
0.1U_0402_16V4Z
PCH_CRT_RED
14 PCH_CRT_RED
0.1U_0402_16V4Z
L15
D
YSDA0502C 3P C/A SOT-23
D10
VGA_DDC_DATA_C
2
1
VGA_DDC_CLK_C
3
YSDA0502C 3P C/A SOT-23
PR-7
2
+CRT_VCC
ESD
+5VS
JCRT1
T36
R731
0_0402_5%
+3VS
+5VS_CRTVCC
VGA_DDC_DATA_C
GREEN
+5VS_CRTVCC
1
HSYNC_L
BLUE
10K_0402_5%
1
VSYNC_L
2
G
C
@ C415
1
@ C416
2
1
2
@ C419
33P_0402_50V8K
S
2
2
1
2
G
2
C423
2
0.1U_0402_16V4Z
R449
0.047U_0402_16V7K
2
1
220K_0402_1%
C427
2
B
1
2N7002KDWH_SOT363-6
Q1A
4.7U_0603_10V4Z
1
1
D
3
W=60mils
+3VS
PR-13
+3VS
@
C426
1
2
1
R450
2
5
4
0_0402_5%
1
14 PCH_ENVDD
PR-7
1
Q21
1
@ C420
33P_0402_50V8K
Q22
@ C417
470P_0402_50V8J
VGA_DDC_CLK_C
1
2
BSS138_SOT23
1
2
BSS138_SOT23
3
2
2
SUYIN_070546FR015S251ZR
CONN@
C
+5VS
@ C418
470P_0402_50V8J
JLVDS1
W=80mils
B+_L
L18
1
2
FBMA-L11-201209-221LMA30T_0805
B+
0.1U_0402_16V4Z
2
C425
1
C422
4.7U_0603_10V4Z
3
0.1U_0402_16V4Z
1
6 2
C424
@
1
R448
47K_0402_5%
R447
100_0805_5%
1
+3VS
Q23
SI2301BDS-T1-E3_SOT23-3
PR-13
2
+LCDVDD
+5VALW
1
LCD POWER CIRCUIT
+LCDVDD
2
1
2
10P_0402_50V8J
3
1
PCH_CRT_DDC_CLK
14 PCH_CRT_DDC_CLK
1
C414
16
17
G
G
C421
680P_0402_50V7K
G
VSYNC_L
2
10_0402_5%
10P_0402_50V8J
P
OE#
5
1
D_CRT_VSYNC 1
R446
4
D
Y
S
A
R734
100K_0402_5%
VGA_DDC_DATA_C
1
G
2
U24
SN74AHCT1G125GW_SOT353-5
+LCDVDD
3
16 CRT_DET#
R732
D
14 PCH_CRT_DDC_DAT
PCH_CRT_VSYNC
14 PCH_CRT_VSYNC
PCH_CRT_DDC_DAT
S
1
2
C413
0.1U_0402_16V4Z
VGA_DDC_CLK_C
2
R733
3
U23
SN74AHCT1G125GW_SOT353-5
2
HSYNC_L
2
10_0402_5%
1
1
R442
1
D_CRT_HSYNC
4
2
5
1
P
OE#
Y
G
A
4.7K_0402_5%
2
4.7K_0402_5%
PCH_CRT_HSYNC
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
100P_0402_50V8J
R441
2
1
2
C412
0.1U_0402_16V4Z
14 PCH_CRT_HSYNC
CRTTEST
RED
2N7002KDWH_SOT363-6
Q1B
R451
PCH_TXOUT0+
PCH_TXOUT0-
14 PCH_TXOUT0+
14 PCH_TXOUT0-
PCH_TXOUT1+
PCH_TXOUT1-
14 PCH_TXOUT1+
14 PCH_TXOUT1-
PCH_TXOUT2+
PCH_TXOUT2-
14 PCH_TXOUT2+
14 PCH_TXOUT2-
PCH_TXCLKPCH_TXCLK+
14 PCH_TXCLK14 PCH_TXCLK+
100K_0402_5%
2
INVTPWM
DISPOFF#
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
GMD GND
39
40
37
38
35
36
33
34
31
32
29
30
27
28
25
26
23
24
21
22
19
20
17
18
15
16
13
14
11
12
9
10
7
8
5
6
3
4
1
2
W=80mils
+LCDVDD
PCH_TZOUT1PCH_TZOUT1+
PCH_TZOUT1- 14
PCH_TZOUT1+ 14
PCH_TZOUT2+
PCH_TZOUT2-
B
PCH_TZOUT2+ 14
PCH_TZOUT2- 14
PCH_TZOUT0PCH_TZOUT0+
PCH_TZOUT0- 14
PCH_TZOUT0+ 14
PCH_TZCLKPCH_TZCLK+
PCH_TZCLK- 14
PCH_TZCLK+ 14
PCH_LCD_CLK
PCH_LCD_DATA
CABC_SAVING
PCH_LCD_CLK
PCH_LCD_DATA
CABC_SAVING
14
14
16
ACES_87242-4001-09
CONN@
+3VS
Camera
A
@
2
C654
0.1U_0603_50V_X7R
2
R457
1
INVTPWM
2
@
2
14 PCH_INV_PWM
C544
22P_0402_50V8J
1
0_0402_5%
R458
Panel Backlight Control
D
R455
Q31
2N7002KW 1N SOT323-3
IRT-1
40 BKOFF#
BKOFF#
1
33_0402_5%
2
R452
33_0402_5%
4
3
3
USB20_N3_L
1
L40
2
2
USB20_P3_L
C545
22P_0402_50V8J
2
2 R821
@
1
2
1
@
Compal Secret Data
Security Classification
S
R456
10K_0402_5%
Issued Date
2011/08/23
Deciphered Date
2012/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
4
2
C429
22P_0402_50V8J
@
@
Date:
5
7
8
A
C428
22P_0402_50V8J
1 0_0402_5%
1
2
3
4
5 G1
6 G2
ACES_87213-0600G
CONN@
R453
33_0402_5%
@
@
WCM-2012HS-900T
4
1
2
3
4
5
6
DISPOFF#
1
2
G
1 0_0402_5%
1
1
2
1
@
@
15 USB20_N3
15 USB20_P3
R28
100K_0402_5%
3
+LCDVDD
R727
0_0402_5%
2
1
@
2
2 R820
@
PR-7
PWR_SRC_ON
@
USB20_N3_L
USB20_P3_L
DMIC_CLK
DMIC_DATA
33 DMIC_CLK
33 DMIC_DATA
IRT-1
2
G
3
1
2
@
0_0402_5%
1
40 EC_INV_PWM
1
2
R728
100K_0402_5%~D
@
C613
1000P_0402_50V7K~D
1
JCM1
R454
4.7K_0402_5%
@
B+_L
1
D
2 0_0805_5%
S
@
2
60mil
B+
+3VS
1
Q54
SI3457BDV-T1-E3_TSOP6~D
+B+_Q
R729 1
@
6
4
5
2
1
1
Panel PWM Control
1
60mil
3
2
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
30
of
61
B
C
+3VS
HDD-SATA Redriver
12 SATA_PTX_DRX_P0
12 SATA_PTX_DRX_N0
SATA_PRX_DTX_P00.01U_0402_16V7K
SATA_PRX_DTX_N0 0.01U_0402_16V7K
U41
2 4.7K_0402_5%
SATA_PRX_DTX_P0_R
SATA_PRX_DTX_N0_R
R736 1
@
4.7K_0402_5%
2
1
12 SATA_PTX_DRX_P1
12 SATA_PTX_DRX_N1
12 SATA_PRX_DTX_P1
12 SATA_PRX_DTX_N1
A_OUTp
A_OUTn
B_PRE1
A_PRE1
TEST
GND
GND
EPAD
9
8
1 R668
2 @
2K +-1% 0402
SATA0_A_PRE0
SATA0_B_PRE0
15
14
SATA_PTX_C_DRX_P0_R
SATA_PTX_C_DRX_N0_R
11
12
SATA_PRX_C_DTX_P0_R
SATA_PRX_C_DTX_N0_R
U42
2 4.7K_0402_5%
7
VDD
VDD
2 C434
2 C437
SATA_PTX_DRX_P1_R
SATA_PTX_DRX_N1_R
1
2
A_INp
A_INn
SATA_PRX_DTX_P10.01U_0402_16V7K
SATA_PRX_DTX_N1 0.01U_0402_16V7K
1
1
2 C436
2 C435
SATA_PRX_DTX_P1_R
SATA_PRX_DTX_N1_R
5
4
B_OUTp
B_OUTn
+3VS
SATA1_B_PRE1
SATA1_A_PRE1
2
R670
0_0402_5%
2
1
2
1
2
1
2
1
+3VS
0_0402_5%
1 @
2 R403 ASM1466
10
20
1 R671
SATA1_A_PRE0
SATA1_B_PRE0
JHDD1
15
14
2 R699
2 R700
SATA_PTX_C_DRX_P0_R
SATA_PTX_C_DRX_N0_R
1 @
1 @
2 R701
2 R702
SATA_PRX_C_DTX_N0_R
SATA_PRX_C_DTX_P0_R
SATA_PTX_DRX_P10_0402_5%
SATA_PTX_DRX_N1 0_0402_5%
SATA_PRX_C_DTX_P1_R
SATA_PRX_C_DTX_N1_R
1 @
1 @
SATA_PRX_DTX_N0 0_0402_5%
SATA_PRX_DTX_P00_0402_5%
SATA_PTX_C_DRX_P1_R
SATA_PTX_C_DRX_N1_R
11
12
SATA_PTX_DRX_P00_0402_5%
SATA_PTX_DRX_N0 0_0402_5%
1 @
1 @
2 R703
2 R704
SATA_PTX_C_DRX_P1_R
SATA_PTX_C_DRX_N1_R
SATA_PRX_DTX_N1 0_0402_5%
SATA_PRX_DTX_P10_0402_5%
9
8
A_OUTp
A_OUTn
TEST
GND
GND
EPAD
SATA HDD BTB Conn.
2 @
2K +-1% 0402
PS8520
A_PRE0
B_PRE0
B_PRE1
A_PRE1
18
3
13
21
PIN7 & PIN18 have internal PD
1
2 R419
B_INp
B_INn
17
19
2
1 @
1 @
2 R705
2 R706
SATA_PRX_C_DTX_N1_R
SATA_PRX_C_DTX_P1_R
PS8520BTQFN20GTR2_TQFN20_4X4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
1
@
2
1 @
6
16
NC
REXT
1
1
R738 1
@
4.7K_0402_5%
1
70mA
@
EN
SATA_PTX_DRX_P10.01U_0402_16V7K
SATA_PTX_DRX_N1 0.01U_0402_16V7K
Place caps.
near U42
ASM1466
+3VS 0_0402_5%
ASM1466
@
R669 1
Place caps.
near U41
+3VS
PS8520
PS8520BTQFN20GTR2_TQFN20_4X4
+3VS
HDD-SATA Redriver
R405
2
A_PRE0
B_PRE0
B_OUTp
B_OUTn
18
3
13
21
R667
0_0402_5%
10
20
H
R426
2
1 @
B_INp
B_INn
5
4
2
@
NC
REXT
17
19
SATA0_B_PRE1
SATA0_A_PRE1
PIN7 & PIN18 have internal PD
1
A_INp
A_INn
1 @
0_0402_5%
6
16
G
C641
0.01U_0402_16V7K
2 C432
2 C431
VDD
VDD
C642
0.1U_0402_16V7K
1
1
1
2
SATA_PTX_DRX_P0_R
SATA_PTX_DRX_N0_R
EN
C643
1U_0603_10V6K
1U_0603_10V6K
2 C430
2 C433
0_0402_5%
70mA
@
7
F
C638
0.01U_0402_16V7K
1
1
+3VS
E
+3VS
C639
0.1U_0402_16V7K
12 SATA_PRX_DTX_P0
12 SATA_PRX_DTX_N0
@
R459 1
SATA_PTX_DRX_P00.01U_0402_16V7K
SATA_PTX_DRX_N0 0.01U_0402_16V7K
D
+3VS
ASM1466
Co-lay with redriver
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
+5VS
+3VS
31
32
33
34
35
36
ACES_88018-304G
CONN@
2
Add EQ pin for PS8520BTQFN20GTR2 FOR SATA0
SATA0_A_PRE0 1 R675
@
PS8520
SATA0_B_PRE0 1 R681
@
2 4.7K_0402_5%
SATA1_B_PRE1 1 R688
@
2 4.7K_0402_5%
SATA0_B_PRE0@ R678
1
2
0_0402_5%
2 4.7K_0402_5%
SATA1_A_PRE0 1 R683
@
2 4.7K_0402_5%
SATA1_B_PRE0 1 R689
@
PS8520
SATA1_A_PRE0 R690
1
2
@ 1.5K_0402_5%
ASM1466
PR-10
2 4.7K_0402_5%
SATA1_A_PRE1 1 R685
@
2 4.7K_0402_5%
Q24
+5VS
SI3456DDV-T1-GE3_TSOP6
SATA1_B_PRE0@ R686
1
2
0_0402_5%
C439
1U_0402_6.3V6K
R460
6
5
2
1
1
4
+5VS_ODD_R
1
+5VS_ODD
2
0_1206_5%
Placea caps. near ODD CONN.
3
2
+5VS_ODD
+3VS
SATA2_B_PRE1
SATA2_A_PRE1
PIN7 & PIN18 have internal PD
2
2
R740 1
@
4.7K_0402_5%
B_OUTp
B_OUTn
17
19
B_PRE1
A_PRE1
TEST
GND
GND
EPAD
R673
0_0402_5%
1 @
1
2 R417
A_PRE0
B_PRE0
9
8
1 R674
2 @
4.99K_0402_1%
SATA2_A_PRE0
SATA2_B_PRE0
A_OUTp
A_OUTn
15
14
11
12
1
1 C447
C446
2
2
1000P_0402_50V7K
ODD_EN
D
SATA_PTX_C_DRX_P2_R
SATA_PTX_C_DRX_N2_R
B_INp
B_INn
ASM1466
1
C448
2
3
SATA_PRX_C_DTX_P2_R
SATA_PRX_C_DTX_N2_R
16 ODD_EN#
Q25
2N7002KW 1N SOT323-3 R462
2
G
S
1
C444
2
PS8520BTQFN20GTR2_TQFN20_4X4
SATA ODD Conn.
1
@
NC
REXT
10
20
0_0402_5%
6
16
2
2
5
4
SATA_PRX_DTX_P2_R
SATA_PRX_DTX_N2_R
VDD
VDD
2
2 C636
2 C635
A_INp
A_INn
18
3
13
21
@1
@1
EN
1
2
C445
0.1U_0402_25V6
SATA_PRX_DTX_P20.01U_0402_16V7K
SATA_PRX_DTX_N2 0.01U_0402_16V7K
@
7
SATA_PTX_DRX_P2_R
SATA_PTX_DRX_N2_R
R461
330K_0402_5%
70mA
1.5M_0402_5%
12 SATA_PRX_DTX_P2
12 SATA_PRX_DTX_N2
2 C438
2 C637
2 R396
1
12 SATA_PTX_DRX_P2
12 SATA_PTX_DRX_N2
U43
2 4.7K_0402_5%
@1
@1
1 @
1
@
R672 1
SATA_PTX_DRX_P20.01U_0402_16V7K
SATA_PTX_DRX_N2 0.01U_0402_16V7K
+3VS 0_0402_5%
ASM1466
3
+3VS
1
1U_0402_6.3V6K
1U_0402_6.3V6K
ODD-SATA Redriver
0.1U_0402_16V4Z
+VSBP
+3VS
10U_0805_10V6K
2 4.7K_0402_5%
D
2 4.7K_0402_5%
SATA0_A_PRE1 1 R677
@
S
SATA0_B_PRE1 1 R680
@
+3VS
SATA1_B_PRE1@ R684
1
2
0_0402_5%
SATA1_A_PRE1@ R687
1
2
0_0402_5%
G
SATA0_A_PRE0
R682 2
1
@
2K_0402_1%
2
Add EQ pin for PS8520BTQFN20GTR2 FOR SATA1
+3VS
SATA0_B_PRE1@ R676
1
2
0_0402_5%
SATA0_A_PRE1@ R679
1
2
0_0402_5%
ASM1466
3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
GND
GND
GND
GND
GND
GND
A
SATA_PTX_DRX_P2
SATA_PTX_DRX_N2
0_0402_5%
0_0402_5%
1
1
2 R707
2 R708
SATA_PTX_C_DRX_P2_R
SATA_PTX_C_DRX_N2_R
SATA_PRX_DTX_P2
SATA_PRX_DTX_N2
0_0402_5%
0_0402_5%
1
1
2 R709
2 R710
SATA_PRX_C_DTX_P2_R
SATA_PRX_C_DTX_N2_R
SATA_PTX_C_DRX_P2_R
SATA_PTX_C_DRX_N2_R
C440 1
C441 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_PTX_DRX_P2_C
SATA_PTX_DRX_N2_C
SATA_PRX_C_DTX_N2_R
SATA_PRX_C_DTX_P2_R
C442 1
C443 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_PRX_DTX_N2_C
SATA_PRX_DTX_P2_C
Co-lay with redriver
JODD1
13
12
11
10
9
8
7
GND
A+
AGND
BB+
GND
6
5
4
3
2
1
DP
V5
V5
MD
GND
GND
PR-7
16 ODD_DETECT#
Add EQ pin for PS8520BTQFN20GTR2 FOR SATA2
SATA2_B_PRE1@ R692
1
2
0_0402_5%
SATA2_A_PRE1@ R695
1
2
0_0402_5%
ASM1466
SATA2_B_PRE1 1 R696
@
2 4.7K_0402_5%
SATA2_A_PRE1 1 R693
@
2 4.7K_0402_5%
SATA2_A_PRE0
R698 2
1
@
2K_0402_1%
SATA2_A_PRE0 1 R691
@
2 4.7K_0402_5%
SATA2_B_PRE0 1 R697
@
2 4.7K_0402_5%
15 ODD_DA#
Place caps.
near U43
+3VS
+3VS
4
1
R463
+5VS_ODD
1
R464
2
2
ODD_DA#_R
0_0402_5%
4
PR-7
SUYIN_127382FR013G109ZR_RV
CONN@
2
1
@
2
2
C644
0.01U_0402_16V7K
1
@
C645
0.1U_0402_16V7K
0.1U_0402_16V7K
C646
1U_0603_10V6K
1
@
SATA2_B_PRE0@ R694
1
2
0_0402_5%
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/09/23
2012/12/31
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC A8222
Document Number
B
C
D
E
F
Rev
B
4019G8
Date:
A
ODD_DETECT#_R
0_0402_5%
80mils
Monday, February 13, 2012
G
Sheet
31
H
of
61
5
4
3
2
1
+LAN_IO
W=60mils
+LAN_VDD
2
PR-7
1
C464
2
1
2
G
13 PCIE_PRX_GLANTX_N1
C470 1
0.1U_0402_16V7K
2
PCIE_PRX_C_GLANTX_N1
23
HSON
17
18
HSIP
HSIN
LED3/EEDO
LED1/EESK
LED0
13 LANCLK_REQ#
16
5,15,36,40,41 PLT_RST#
25
EECS/SCL
EEDI/SDA
PERSTB
13 CLK_PCIE_LAN
13 CLK_PCIE_LAN#
19
20
REFCLK_P
REFCLK_N
MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3
1
2
4
5
7
8
10
11
DVDD10
DVDD10
DVDD10
CLKREQB
DVDD33
DVDD33
2
LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3
NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT
AVDD33
AVDD33
AVDD33
AVDD33
ENSWREG
EVDD10
21
AVDD10
AVDD10
AVDD10
AVDD10
36
1
2
2 10K_0402_5%
2 1K_0402_5%
2 0_0402_5%
1
C472
2
2 2.49K_0402_1%
34
35
46
RSET
GND
PGND
RJ45_TX0+
RJ45_TX0-
+V_DAC
LAN_MDIP1
LAN_MDIN1
4
5
6
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
21
20
19
JLAN1
+LAN_EVDD10
SHLD1
RJ45_TX3-
TCT3
TD3+
TD3TCT4
TD4+
TD4-
MCT3
MX3+
MX3-
18
17
16
MCT4
MX4+
MX4-
1
1
1
1
2
2
2
2
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
RJ45_TX0+
75_0603_1%
75_0603_1%
75_0603_1%
75_0603_1%
6
1
PR1+
B
SHLD2
10
SANTA_130452-07
CONN@
PR-17
2
RJ45_TX2+
RJ45_TX2-
15
14
13
R481
R482
R483
R484
PR4+
RJ45_TX2-
+LAN_SROUT1.05
9
PR4-
7
RJ45_RX1-
+LAN_VDD
8
RJ45_TX3+
RJ45_RX1+
RJ45_RX1+
RJ45_RX1-
10
11
12
0.1U_0402_16V7K
+LAN_IO
RJ45_TX2+
VDDREG
VDDREG
XTLO
1
2
C473
12P_0402_50V8J
These components close to Pin 36
( Should be place within 200 mils )
+LAN_VDD
3
24
23
22
25MHZ_20PF_7V25000016
1
C475
10P_1206_2KV8J
RJ45_TX3+
RJ45_TX3-
1
D15
@
1
MCT1
MX1+
MX1-
C
3
TCT1
TD1+
TD1-
2
1
RTL8111F-CGT QFN 48P
+V_DAC
LAN_MDIP3
LAN_MDIN3
0.1U_0402_16V7K
GND
TS1
1
2
3
4
Y4
RJ45_TX0-
+LAN_VDDREG
+V_DAC
LAN_MDIP0
LAN_MDIN0
3
GND
W=60mils
C471
3
6
9
45
REGOUT
2
2.2UH +-5% NLC252018T-2R2J-N
12
42
47
48
33
1
XTLI
2
0_0402_5%
PR-7
27
39
14
15
38
+LAN_VDD
L19
W=60mils
1
3
2
ISOLATEB
24
49
7
8
9
0.1U_0402_16V7K
R472
2
LANWAKEB
26
R480 1
2
2
28
1K_0402_5%
B
1
C467
1
CKXTAL2
LAN_WAKE#
1
2
CKXTAL1
44
ISOLATEB
PR-7
R479
1
C466
C469
12P_0402_50V8J
2 10K_0402_5%
2 10K_0402_5%
13
29
41
43
XTLI
3.3V : Enable switching regulator
0V
: Disable switching regulator
1
PR-7
1
30 R473 1
32 R474 1
XTLO
R476 1
R478 1
2
0_0603_5%
31
37
40
+LAN_SROUT1.05
+LAN_IO
1
C465
2 +LAN_EVDD10
LAN_WAKE#
C
R475
R469
1
4.7U_0603_6.3V6K
HSOP
13 PCIE_PTX_GLANRX_P1
13 PCIE_PTX_GLANRX_N1
W=20mils
+LAN_VDD
0.1U_0402_16V7K
22
+V_DAC
LAN_MDIP2
LAN_MDIN2
2
S
3
D
PCIE_PRX_C_GLANTX_P1
0.01U_0402_16V7K
2
2N7002KW 1N SOT323-3
Q29
0.1U_0402_16V7K
2
2
2
1
C455
1U_0402_6.3V6K
2
1
1
1
U25
C468 1
C474 1
1
C454
0.1U_0402_16V7K
0_0603_5%
13 PCIE_PRX_GLANTX_P1
+LAN_IO
2
+LAN_VDDREG
0.1U_0402_16V7K
2
R471
10K_0402_5%
R477
15K_0402_5%
0.1U_0402_16V7K
1
3
W=40mils
1
2
2N7002KDWH_SOT363-6
14,36,41 PCIE_WAKE#
2
2
1
C453
D
R468
+LAN_IO
C463
0.1U_0603_25V7K
R470
10K_0402_5%
1
2
1
C452
These caps close to Pin 3,6,9,13,29,41,45
2N7002KDWH_SOT363-6
+LAN_IO
Q81A
+3VS
1
C451
These caps close to Pin 12,27,39,42,47,48
1
2
2
4.7U_0603_6.3V6K
6
1
R467
1
2 EN_WOL#
220K_0402_5%~N
2
1
C450
EN_WOL#
5
Q81B
R466
100K_0402_5%
40 EN_WOL
1
C449
W=20mils
+LAN_IO_DISC
4
2
1
C462
0.1U_0402_16V7K
2
1
C461
0.1U_0402_16V7K
2
1
C460
0.1U_0402_16V7K
2
2
1
C459
0.1U_0402_16V7K
2
D
1
C458
0.1U_0402_16V7K
2
G
G
C457
0.1U_0402_16V7K
1
AO3419L 1P SOT23-3
2
+5VALW
1.5A
D
S
C456
1U_0402_6.3V6K
1
1
0.1U_0402_16V7K
+LAN_IO
Q26
3
R465
470_0603_5%
0.1U_0402_16V7K
+3VALW
0.1U_0402_16V7K
2
W=60mils
AZC199-02SPR7G_SOT23-3
D16
LAN_MDIP1
6
I/O4
I/O2
5
VDD
GND
I/O1
1
ESD
2
I/O3
LAN_MDIP0
3
D17
LAN_MDIP3
6
I/O4
I/O2
3
5
VDD
GND
2
I/O3
I/O1
1
LAN_MDIP2
10/01 EMI Request
SP050007G00
FORM_ NS892409
D18
C300
2
2
LSE-200NX3216TRLF_1206-2
2
@
1
LSE-200NX3216TRLF_1206-2
2
D21
C219
LSE-200NX3216TRLF_1206-2
2
@
1
D20
A
@
1
D19
@
1
LSE-200NX3216TRLF_1206-2
2
LANGND
1
0.1U_0603_25V7K
LANGND
1
0.1U_0603_25V7K
+LAN_IO
LAN_MDIN1
4
LAN_MDIN0
LAN_MDIN3
AZC099-04S.R7G_SOT23-6
Issued Date
4
2011/1212
LAN_MDIN2
A
AZC099-04S.R7G_SOT23-6
Compal Secret Data
Security Classification
ESD
+LAN_IO
2012/11/22
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
32
of
61
D
E
EMI
2
PR-7
R491
1
2
1
DMIC_CLK_CODEC
FBMA-L10-160808-301LMT_2P
12 HDA_RST_AUDIO#
MIC_JD
HP_JD
DMIC_DATA_CODEC
2 0_0402_5%
PD#
PR-7
HDA_RST_AUDIO#
45
44
HP_OUT_L
HP_OUT_R
32
33
+MIC1_VREFO_L
MIC2_L
MIC2_R
HDA_SYNC_AUDIO
2
C498
5
HDA_SDOUT_AUDIO
SDATA_IN
PD#
HDA_BITCLK_AUDIO
8
HDA_SDIN_AUDIO R501
1
2
33_0402_5%
GPIO1/DMIC_CLK
4
HDA_SYNC_AUDIO
6
SDATA_OUT
3
10
BCLK
GPIO0/DMIC_DATA
EAPD
47
SPDIFO
+3VS
HDA_BITCLK_AUDIO
1
1
1
C496
@
2
SENSE B
CBP
MIC1_VREFO_R
LDO_CAP
35
2
2.2U_0603_16V6K
31
CBN
VREF
27
MIC1_VREFO_L
JDREF
19
PVSS2
PVSS1
DVSS2
DVSS1
CPVEE
34
HDA_SDOUT_AUDIO
MIC_JD
MIC1
2 R502
HP_JD
HP_OUTR
HP_OUTL
12
2 R556
@
HDA_SDIN0 12
1 0_0402_5%
L34
EAPD 40
(For USB Port5)
1
1
2
2
15 USB20_P5
4
4
3
3
AVSS1
AVSS2
26
37
2 R552
@
USB20_N5_R
USB20_P5_R
1
+MIC1_VREFO_R
C726
@
1
0_0402_5%
2
PR-12
AC97_VREF
1 R505
2
20K_0402_1%
1
2
C501
2.2U_0603_16V6K
1
C502
1
C503
2
2
1
C500
2
2 R749
@
+USB_VCCD
(For USB Port2)
USB20_P2_R
USB20_N2_R
GND2
GND1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ACES_88514-02401-071
CONN@
1 0_0402_5%
3
L35
15 USB20_P2
15 USB20_N2
4
1
2
2
USB20_P2_R
4
3
3
USB20_N2_R
1
1
4.7K_0402_5%
R506
WCM-2012HS-900T
2
2 R748
@
HDA_RST_AUDIO#
@1
2
+USB_VCCC
EMI close to JAU1
ALC269Q-VB5-GR_QFN48_7X7
@
1
C723
@
2
JAU1
MIC2
15 USB20_N5
AC_JDREF
YSDA0502C 3P C/A SOT-23
@
+MIC1_VREFO_R
+MIC1_VREFO_L
PR-7
30
28
5
6
D23
26
25
WCM-2012HS-900T
SENSE A
@
2.2K_0402_1%
2
2
2.2K_0402_1%
R497 1
R498 1
12
29
PCBEEP
ESD
12
20
MIC2_VREFO
HDA_SYNC_AUDIO
0_0402_5%1
48
RESET#
1
G1
G2
EMI
@
2
43
42
49
7
3
3
HP_OUTL
HP_OUTR
MIC1_L
MIC1_R
1
2
3
4
ACES_88266-04001
CONN@
2
0.22U_0603_16V7K
@
1
SPKOUT_R1
SPKOUT_R2
R494
@
0_0402_5%
SPK_OUT_R+
SPK_OUT_R-
36
1
1
HDA_BITCLK_AUDIO
2
LINE2_L
LINE2_R
18
C499
1
C486
1
2
3
4
YSDA0502C 3P C/A SOT-23
SPKOUT_L1
SPKOUT_L2
13
2
SPK_R2
22P_0402_50V8J
40
41
11
2 0_0603_5%
JSPK1
SPK_R1
SPK_R2
SPK_L1
SPK_L2
2
0.22U_0603_16V7K
@
1U_0603_10V6K
D22
@
MONO_OUT
SENSE_A
R492 1
C494
SPK_OUT_L+
SPK_OUT_L-
12
1 R503
2
20K_0402_1%
2 R504
1
39.2K_0402_1%
1
1 C482
R507 1
R508 1
R510 1
2
2 0_0402_5%
2 0_0402_5%
2 @
C504
C724
@
0.1U_0402_16V7K
C505
2
1
C725
@
2
PR-12
0.1U_0402_16V7K
1
2 @
1
0.1U_0402_16V7K
2 @
C506
C507
1
1 0_0402_5%
2 @
1
2 0_0402_5%
R509 1
0.1U_0402_16V7K
C508
1
2 0_0402_5%
1.8P_0402_50V8
40 EC_MUTE#
R500
SPK_R1
2
0.22U_0603_16V7K
@
1.8P_0402_50V8
L21
EC_MUTE#
2 0_0603_5%
1
C478
1.8P_0402_50V8
DMIC_CLK
30 DMIC_CLK
R490 1
HDA_SDOUT_AUDIO
2
LINE1_L
LINE1_R
2 C495 4.7U_0603_6.3V6K MIC1_C 21
MIC2_C 22
2 C497 4.7U_0603_6.3V6K
16
17
2 0_0402_5%
2
+5VS
U26
SYNC
DMIC_DATA R499 1
30 DMIC_DATA
SPK_L2
10U_0805_10V6K
MIC2
2
L20
2
1
MBK1608800YZF 0603
0.1U_0402_16V7K
MIC1_R 1
2
1K_0402_5%
MIC2_R 1
1 R496
2
1K_0402_5%
2 0_0603_5%
10P_0402_50V8J
38
25
46
2
23
24
1 R495
1
C490
14
15
MIC1
R489 1
SPKOUT_R1
AVDD2
C493
22P_0402_50V8J
@
2
SPKOUT_L2
10U_0805_10V6K
2
2
AVDD1
1
C492
39
2
PVDD2
C491
1
C489
2
PVDD1
PR-7
DMIC_CLK
1
9
EMI
1
1
0_0603_5%
C488
DVDD
1
DVDD_IO
2
1
0.1U_0402_16V7K
+3VS
2
0.22U_0603_16V7K
@
1U_0603_10V6K
+5VS_PVDD +VDDA
R493
10U_0603_6.3V6M
2
+3VS_DVDD
2
1
1 C476
@ C483
@
DMIC_DATA
C487
22P_0402_50V8J
@
2
SPKOUT_R2
10U_0805_10V6K
2
1
C485
0.1U_0402_16V7K
1
C484
10U_0603_6.3V6M
0_0603_5%
1
1
C481
SPK_L1
@ C477
+3VS_DVDD_R
1
0.1U_0402_16V7K
2
+3VS_DVDD
2
0.1U_0402_16V7K
1
1
C480
2 0_0603_5%
2
R487 1
1
1
C479
0.1U_0402_16V7K
0_0805_5%
PR-7
0.1U_0402_16V7K
1
10U_0805_10V6K
2
H
close to JSPK1
SPKOUT_L1
R488
+5VS
G
3
+5VS_PVDD
F
2
C
1.8P_0402_50V8
B
10P_0402_50V8J
A
EMI close to JAU1
0.1U_0402_16V7K
For EMI (on MIC and Headphone AGND to connected with
DGND)
4
4
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
A
B
C
D
E
F
Monday, February 13, 2012
G
Sheet
33
H
of
61
5
4
3
2
Card Reader RTS5137
(only SD/MMC/MS function)
1
Card Reader Connector
D
D
+3VS
+3VS_CR
1 0_0603_5%
1
REFE
2
3
DM
DP
+CARDPWR
4
5
6
3V3_IN
CARD_3V3
V18
7
NC
8
9
10
11
12
SP1
SP2
SP3
SP4
SP5
C616
1U_0402_6.3V6K
2
1
+VREG
30mil
12mil
1
SDWP
2
SDD1
SDD0
GPIO0
24
NC
23
SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6
@
1
R636
CLK_SD_48M
17
CLK_IN
22
21
20
19
18
16
15
14
13
2
1
10_0402_5% @ C614
2
10P_0402_50V8J
SDD0
SDD1
SDD2
SDD3
CLK_SD_48M 13
SDD2
SDD3
SDWP#
SDCD
VDD
CMD
CLK
VSS
VSS
8
9
1
2
U40
DAT0
DAT1
DAT2
CD/DAT3
10
11
WP SW
CD SW
GND SW
GND SW
12
13
SDCMD
T-SOL_156-2000302604
SDCLK_R 1
0_0402_5%
SDCD#
2
SDCLK
R634 EMI
RTS5137-GR_QFN24_4X4
25
2
C623
0.1U_0402_16V4Z
C619
4.7U_0603_10V4Z
PR-13
5
3
6
4
7
SDCMD
SDCLK
1
12mil
100P_0402_50V8J
+RREF
2
6.2K_0603_1%
USB20_N4_L
USB20_P4_L
+3VS_CR
1
JCR1
30mil
PR-7
EPAD
@
2
C615
R723 1
+3VS_CR
4
15 USB20_P4
3
USB20_P4_L
1
1 0_0402_5%
2
1
C617
0.1U_0402_16V4Z
C618
0.1U_0402_16V4Z
1
2 R823
R775
100K_0402_5%
2
@
R635
100K_0402_5%
2
1
2
C622
0.1U_0402_16V4Z
SDWP#
Close to connector
SDCLK
1
SDWP
2
3
WCM-2012HS-900T
100K_0402_5%
R768
1
4
30mil
USB20_N4_L
@
R773
100K_0402_5%
SDCD#
2
2
2
2
R774
100K_0402_5%
3
1
@
@
6
+CARDPWR
SDCD
5
2N7002KDWH_SOT363-6
Q20B
2
2N7002KDWH_SOT363-6
Q20A
4
1
15 USB20_N4
1
C
1 0_0402_5%
1
2 R822
L41
2
C
+3VS_CR
1
R633 2
+CARDPWR
C612
R632
2
1
1
2SDCLK
@
33_0402_5% @
22P_0402_50V8J
B
B
close JCR1
EMI
1
C621
@
2
22P_0402_50V8J
EMI
close U51
A
A
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/08/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Sheet
Monday, February 13, 2012
1
34
of
61
5
4
3
D24
1 1
109
HDMI_R_D1-
HDMI_R_D0+
D25
1 1
109
HDMI_R_D0+
HDMI_R_D1+
2 2
98
HDMI_R_D1+
HDMI_R_D0-
2 2
98
HDMI_R_D0-
HDMI_R_D2-
4 4
77
HDMI_R_D2-
HDMI_R_CK+
4 4
77
HDMI_R_CK+
HDMI_R_D2+
5 5
66
HDMI_R_D2+
HDMI_R_CK-
5 5
66
1
HDMI_R_CK-
3 3
3 3
8
8
D
R663
1M_0402_5%
2
G
2
D
+3VS
1
HDMI_R_D1-
2
TMDS_B_HPD
14 TMDS_B_HPD
3
HDMI_DETECT
1
D
L15ESDL5V0NA-4 SLP2510P8
S
L15ESDL5V0NA-4 SLP2510P8
1
For ESD request.
Q57
2N7002KW 1N SOT323-3
2
R638
20K_0402_5%
D26
5
+5VS
46@
4
+HDMI_5V_OUT
I/O2
VDD
I/O3
3
GND
I/O4
HDMI_SDATA
2
U44
GND
1
I/O1
HDMI_SCLK
1
C652
AZC099-04S.R7G_SOT23-6
HDMI ROYALTY
2
For ESD request.
2
OUT
1
3
IN
1
C653
AP2330W-7_SC59-3
2
+5VS
Q53
D
D
14 TMDS_B_DATA0
14 TMDS_B_DATA0#
14 TMDS_B_DATA1
14 TMDS_B_DATA1#
TMDS_B_DATA0
TMDS_B_DATA0#
TMDS_B_DATA1
TMDS_B_DATA1#
TMDS_B_DATA2
TMDS_B_DATA2#
2
0.1U_0402_16V7K 2
0.1U_0402_16V7K
2
0.1U_0402_16V7K 2
0.1U_0402_16V7K
2
0.1U_0402_16V7K 2
0.1U_0402_16V7K
2
0.1U_0402_16V7K 2
0.1U_0402_16V7K
HDMI_CK+
HDMI_CK-
1
1 C625
C624
1
1 C630
C631
1
1 C633
C627
1
1 C629
C632
HDMI_D0+
HDMI_D0HDMI_D1+
HDMI_D1HDMI_D2+
HDMI_D2D
1
S
2
G
36,41,42 SUSP
HDMI_R_D1-
C628
@
@
1
2
C
EN_HDMI
R643
Q56
2N7002KW 1N SOT323-3
@
@
HDMI_R_D1+
1
C634
@
2
HDMI_R_D0HDMI_R_D0+
HDMI_R_CK-
@
HDMI_CK+
HDMI_R_CK+
1
R644
2
0_0402_5%
4
R656
1
2
10K_0402_5%
2
G Q55
D
3
HDMI_R_D2+
For EMI
1
14 TMDS_B_DATA2
14 TMDS_B_DATA2#
TMDS_B_CLK
TMDS_B_CLK#
HDMI_R_D2-
2
0.1U_0402_16V7K
14 TMDS_B_CLK
14 TMDS_B_CLK#
2
@
604_0402_1%
2
604_0402_1%
2
604_0402_1%
2
604_0402_1%
2
604_0402_1%
2
604_0402_1%
2
604_0402_1%
2
604_0402_1%
2
1
R664
R645
TMDS_GND
1
R649
1
R646
1
R653
1
R659
1
R647
1
R651
1
R652
1
F1
1
+HDMI_5V
W=40mils0.5A 15VDC_FUSE
SI3456BDV-T1-E3 1N TSOP6
2
1
470K_0402_5%
+VSBP
1.5M_0402_5%
C
G
G
2
@
3
1
1U_0603_10V6K
4
@
C626
+HDMI_5V_OUT
1U_0603_10V6K
S
S
6
5
2
1
0.1U_0402_16V7K
HDMI
6
0.1U_0402_16V7K
HDMI_DETECT
4
3
3
1
+5VS
1
2
2
S
3
1
R648
+HDMI_5V_OUT
(pin 19) plug in 5V
WCM-2012-121T_0805
L32
2N7002KW 1N SOT323-3
HDMI_CK-
HDMI_R_CK+
JHDMI1
HDMI_DETECT
@
2
0_0402_5%
HDMI_R_CKHDMI_SDATA
HDMI_SCLK
B
HDMI_D0-
1
R658
@
2
0_0402_5%
HDMI_R_D0HDMI_R_CK-
1
1
2
2
HDMI_R_CK+
HDMI_R_D0-
4
4
3
3
HDMI_R_D0+
HDMI_R_D1-
L31
HDMI_D0+
+3VS
+3VS
1
R657
2
0_0402_5%
1
R639
@
2
0_0402_5%
HDMI_R_D1+
R641
4
4
3
1
2
2
HDMI_R_D2+
2.2K_0402_5%
HDMI_D1+
R660
2
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
3
1
HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D0+
@
+HDMI_5V_OUT
2.2K_0402_5%
1
2
2
1
R650
1
WCM-2012-121T_0805
2.2K_0402_5%
HDMI
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
B
20
21
22
23
SUYIN_100042GR019M26DZL
CONN@
5
HDMI_L_SCLK
2
0_0402_5%
HDMI_SCLK
3
HDMI_D1-
1
R662
@
2
0_0402_5%
HDMI_D2+
1
R661
@
2
0_0402_5%
4
A
HDMIDAT_NB
14 HDMIDAT_NB
R642 1
2 0_0402_5%
HDMI_L_SDATA
1
6
4
3
3
1
Q52A
1
2
HDMI_R_D0+
1 2.2P_0402_50V8C
HDMI_R_CK-
1 2.2P_0402_50V8C
HDMI_R_CK+
2
L30
5V PULL UP IN CONNECTER SIDE
A
WCM-2012-121T_0805
For EMI
HDMI_D2PR-7
Issued Date
1
R655
@
2
0_0402_5%
HDMI_R_D2-
Compal Secret Data
Security Classification
2011/08/23
Deciphered Date
2012/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
4
HDMI_R_D0-
1 2.2P_0402_50V8C
HDMI_SDATA
2N7002KDWH_SOT363-6
5
HDMI_R_D1+
1 2.2P_0402_50V8C
C701 2
HDMI_R_D2+
2
2.2K_0402_5%
HDMI_R_D1-
1 2.2P_0402_50V8C
C702 2
2
1 2.2P_0402_50V8C
C704 2
HDMI_R_D1-
HDMI_R_D2+
C705 2
WCM-2012-121T_0805
RV91, RV92 place near JHDMI connect
2N7002KDWH_SOT363-6
1
R640
L33
4
HDMI_R_D2-
1 2.2P_0402_50V8C
C700 2
1
R654
1 2.2P_0402_50V8C
C706 2
C703 2
Q52B
HDMICLK_NB
14 HDMICLK_NB
C707 2
3
2
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
35
of
61
5
4
X
+1.2VUSB
V
X
+1.2VS
X
X
7~10mil
For WAKE Function
R1021
R1022
@
1
2 4.7K_0402_5%
1 USB30@2 4.7K_0402_5%
USB30_SMI#
USB_PEPWRDET
R1023
R1024
1 USB30@2 10K_0402_5%
1 USB30@2 10K_0402_5%
USB_OCI#A
USB_OCI#B
R1034
USB_UREXT
S1
D
ASM1042
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
0_0402_5%
USB_PESEL
USB_PEPWRDET
USB_TEST_EN
USB_GPIO0
USB_GPIO1
USB_GPIO2
CLKREQ_USB30#
@
@
Mount
@
USB30_XT1
USB_PESEL
C1005
12P_0402_50V8J
USB30@
R1033
@
* Other applaction
+3V_PCH/+1.2VUSB
2
1
1
C1004
22P_0402_50V8J
+3VS
D
Y9
20MHZ_12PF_X3G020000FC1H-X
USB30@
@
2
1
C1006
22P_0402_50V8J
2
C1045
@
USB30_XT2
Express Card/Mini Card Mount
+3VS/+1.2VS
T1
PORST#
T2
C1046
@
0.1U_0603_16V7K
+5VALW/+3VALW
@
1
2
@
1
2
1 USB30@2
1 USB30@2
@
1
2
@
1
2
@
2
1
Mount
0.1U_0603_16V7K
0.1U_0603_16V7K
R1033
R1034
R1036
R1037
R1028
R1031
R1029
R1032 1 USB30@2 12.1K_0402_1%
R1022
* S3
Power Sequence
USB_PE_REXT R1030 1 USB30@2 12.1K_0402_1%
USB_PEPWRDET
1
X
2
X
1
1
V
+3VS
2
2
+3V_PCH
3
+3VUSB
3
4
S4/S5
1
2
S3
PE_RST#
+3VS
EMC Caps C1045, C1046 should
be placed at board(-8430.00
-3530.00)
+1.2VS
+1.2VS
+3VUSB
+1.2VUSB
PR-7
1
R1043
14,32,41 PCIE_WAKE#
R1044
@
2
+3VS
5,15,32,40,41 PLT_RST#
0_0402_5%
1
4.7K_0402_5%
1
37 USB_OCI#A
37 USB_OCI#B
USB_OCI#A
USB_OCI#B
PLT_RST#_USB30
USB_TEST_EN
2
R1045
PR-7
C1012
2
0_0402_5%
1
@
0.1U_0402_16V7K
65
PR-11
PCIE_PRX_USB3TX_N4 13
PCIE_PRX_USB3TX_P4 13
Q910
+3VALW
2
G
1
USB30@
C
USB30@
R1091
1K_0402_5%
USB30@
+VDD33U
U3TXDN_B_C 37
U3TXDP_B_C 37
USB30@
2N7002KDWH_SOT363-6
Q83B
5
U3RXDN_B
U3RXDP_B
+VDD12U
U3RXDN_B 37
U3RXDP_B 37
+VDD12U
+1.2VUSB
USB3_ON
2
USB30@
Q83A
2N7002KDWH_SOT363-6
2
+ 1.2 V U S B T O + 1.2 V S
ASM1042_TQFN64_9X9
Q904
AO3404AL_SOT23
+1.2VUSB
D
1
1
1
+3VS
2
G
2
+1.2VS
Pin 49
C1031
USB30@
2
USB30@
2
Pin 62
Pin 35
C1022
USB30@
1
2
Pin 48
C1023
USB30@
1
2
+5VALW
1
USB30@
Pin 54
40 USB3_ON
2
Pin 7
C1042
USB30@
2
C1034
USB30@
R1053 1
USB30@
1
2
Pin 31
Pin 60
C1035
USB30@
Pin 41
1
2
+1.5V
+1.2VUSB
1A
2
1
R1050
5.1K_0402_1%
USB30@
U91
5
9
6
7
VIN
VOUT
VIN
VOUT
VCNTL
POK
FB
3
4
8
EN
1A
1
GND
APL5930KAI-TRG_SO8
USB30@
2
1K_0402_5%
R1051 1
USB30@
11K_0402_1%
2
C1060
0.01U_0402_25V7K
USB30@
2
1
R1052
20K_0402_1%
2
USB30@
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2012/01/11
Deciphered Date
2012/01/11
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
A
USB30@
2
C1041
USB30@
2
+5VALW
R1094
USB30@
100K_0402_5%
1
2
FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V7K
0.1U_0402_16V7K
Pin 23
2
USB30@
USB3_ON
+VDD33U
0.1U_0402_16V7K
2
C1014
USB30@
1
0.1U_0402_16V7K
Pin 19
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
2
C1040
USB30@
10U_0603_6.3V6M
1
0.1U_0402_16V7K
2
C1039
USB30@
0.1U_0402_16V7K
1
10U_0603_6.3V6M
C1038
USB30@
1
USB30@
L905
1
1
+3VS
3
B
C1036
0.1U_0603_25V7K
USB30@
C1032
10U_0603_6.3V6M
+3VS
+3VUSB
A
2
2 USB30@
+1.5V
C1019
C1019
10U_0603_6.3V6M
10U_0603_6.3V6M
Pin 32
2
2
C1030
USB30@
C1018
1U_0603_10V6K
Pin 16
2
0.1U_0402_16V7K
0.1U_0402_16V7K
C1029
USB30@
0.1U_0402_16V7K
Pin 34
2
R747
USB30@
1
PR-11
+1.5Vto +1.2VUSB Transfer
1
+VDD12U
L904
2
USB30@
FBMA-L11-201209-221LMA30T_0805 1
C1021
1
0.1U_0402_16V7K
C1028
USB30@
1
0.1U_0402_16V7K
2
1
0.1U_0402_16V7K
C1020
USB30@
1
0.1U_0402_16V7K
Pin 20
2
1
0.1U_0402_16V7K
C1027
USB30@
1
10U_0603_6.3V6M
2
1
0.1U_0402_16V7K
C1026
USB30@
1
0.1U_0402_16V7K
2
10U_0603_6.3V6M
10U_0603_6.3V6M
C1025
USB30@
Q905 D
SUSP
2
G
2N7002KW 1N SOT323-3 S
USB30@
35,41,42 SUSP
1
2
C1016
0.1U_0402_16V7K
1 USB30@
+1.2VS
1
1.2VS_GATE
1
MX25L5121EMC-20G SOP 8P
USB30@
+1.2VUSB
+VSBP
2
USB_SPISCK
USB_SPISI
USB_SPISO
2
1.5M_0402_5%
VCC
SCLK
SI
SO
USB30@
1
2
R1049
330K_0402_5%
2
CS#
WP#
HOLD#
GND
8
6
5
2
1
1
3
7
4
1
U92
USB_SPICS#
3
2
4.7K_0402_5%
C1037
USB30@
R1048 @
4.7K_0402_5%
+1.2VS
3
10U_0603_6.3V6M
USB30@ R1047
B
R1092
220_0603_5%
1
2
U3TXDN_A_C 37
U3TXDP_A_C 37
U3TXDN_B_C
U3TXDP_B_C
1
2
+VDD12U
U3RXDN_A 37
U3RXDP_A 37
U3TXDN_A_C
U3TXDP_A_C
USB_UREXT
1
S
C1062
1U_0402_6.3V6K
CLK_PCIE_USB30# 13
CLK_PCIE_USB30 13
U3RXDN_A
U3RXDP_A
3
2
+VDD12U
USB30_XT1
USB30_XT2
+3VUSB
AO3413L_SOT23-3
PCIE_PTX_USB3RX_N4 13
PCIE_PTX_USB3RX_P4 13
D
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
S
U2DN_A
U2DP_A
37 U2DN_A
37 U2DP_A
(TQFN 64)
C1009 2
C1010 2
4
U2DN_B
U2DP_B
37 U2DN_B
37 U2DP_B
ASM1042
Close to ASM1042
USB30@
USB30@
1
1 C1011
2.2U_0603_16V6K
2
USB30@
T90 PAD @
T91 PAD @
+VDD33U
USB_PE_REXT
+VDD33U
PCIE_PRX_USB3TX_N4_C
PCIE_PRX_USB3TX_P4_C
2
C
USB_GPIO0
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
6
51.1K_0402_1%
R1040
1
2
+3VS
USB30@
USB_PORST#
USB_SPISCK
USB_SPISI
USB_SPICS#
USB_SPISO
GPIO1
SMI#
GPIO2
PE_SEL
PE_PWRDET
PE_CLKREQ#
VCC33_1
SPI_CLK
SPI_DO
SPI_CS#
SPI_DI
GND1
PORST#
UART_RX
UART_TX
VCC12_1
U2DN_B
U2DP_B
VSUS33_1
VSUS12_1
U2DN_A
U2DP_A
VSUS33_2
PE_WAKE#
PPON_A
PPON_B
OCI_A#
OCI_B#
PE_RST#
TEST_EN
VCC33_2
VCC12_2
1
13 CLKREQ_USB30#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
GPIO0
GND3
VCC12_3
PE_REXT
VCC33P
PE_TXN
PE_TXP
GNDA3
PE_RXN
PE_RXP
VDD12P
XI
XO
PE_CLKN
PE_CLKP
VCC12_4
VDD12U_2
U3RXN_A
U3RXP_A
GNDA2
U3TXN_A
U3TXP_A
UREXT
VCC33U
U3TXN_B
U3TXP_B
GNDA1
U3RXN_B
U3RXP_B
VDD12U_1
VSUS12_2
GND2
GND4
16 USB30_SMI#
1U_0402_6.3V6K @ C1008
1
2
1
2
@
R1039 0_0402_5%
USB30@ C1061
0.1U_0402_16V7K
USB_GPIO1
USB30_SMI#
USB_GPIO2
USB_PESEL
USB_PEPWRDET
CLKREQ_USB30#_R
USB30@
USB30@ R1090
100K_0402_5%
2
1
U90
3
T1: 2~80ms
T2: & gt; 200ms
2
Monday, February 13, 2012
Sheet
1
36
of
61
2
3
4
@ 1
R511
AI CHARGER
+5VALW
USB3_RX1_N_L
USB3_RX1_N_R
1
USB3_RX1_P_R
8
7
6
5
OUT
OUT
OUT
OC#
1
0_0402_5%
AP2301MPG-13 MSOP 8P
A
@ 1
R514
@ 1
R517
IU3@
1
Low Active
2
R515
USB_OC0#
1 USB30@2
0_0402_5%
R1056
USB_OC0# 15
USB3_TX1_N_L
C512
@ 1000P_0402_50V7K
2
USB3_TX1_N_C
1
0.1U_0402_16V7K
3
2
USB3_TX1_P_C
1
0.1U_0402_16V7K
2
C648
USB3_TX1_P_L
C649
40 USBSW_EN#
USBSW_EN#
1
R809 AI@
1
2
0_0402_5%
2
0_0402_5%
4
+5VALW
R516
100K_0402_5%
AI@
2
C511
0.1U_0402_16V7K
AI@
U28
CB
CEN
TDM
DM
TDP
DP
VDD
SELCDP
Thermal Pad
CEN
USB20_N0_CON
USB20_P0_CON
SELCDP
1
2
3
4
9
T44 PAD
+5VALW
USB3_TX1_P_R
A
R581
4.7K_0402_5%
AI@
USB20_N0_R
R746 1 NAI@
2 0_0402_5% USB20_N0_CON
USB20_P0_R
2
0_0402_5%
R745 1 NAI@
2 0_0402_5%
SELCDP
USB20_P0_CON
放在U28背面
@ 1
R519
R580
4.7K_0402_5%
@
1
2
R810 NAI@ 0_0402_5%
CB
2
0_0402_5%
USB3_RX2_P_L
1
3
4
2
+USB_VCCB
U29
USB3_RX2_N_R
1
L23
2.2U_0402_6.3V6M
1
2
3
4
2
1 0.22U_0603_16V7K
USBSW_EN#
40 USBSW_EN#
GND
IN
IN
EN#
@ 1
R520
8
7
6
5
OUT
OUT
OUT
OC#
IU3@
1
0_0402_5%
1
Low Active
@ 1
R522
USB_OC0#
2
R523
1 USB30@2
0_0402_5%
R1057
AP2301MPG-13 MSOP 8P
B
USB3_TX2_N_L
USB_OCI#B 36
2
USB3_TX2_N_C
1
0.1U_0402_16V7K
3
2
USB3_TX2_P_C
1
0.1U_0402_16V7K
2
C650
C517
@ 1000P_0402_50V7K
USB3_TX2_P_L
C651
2
S0 charging with SDP only
1
S0 charging with SDP or CDP
USB3_RX2_P_R
DLP11TB800UL2L_4P
2
0_0402_5%
2
0_0402_5%
charger port: left side & near user
4
USB3_TX2_N_R
1
L22
USB3_TX2_P_R
15 USB3_RX1_P
15 USB3_RX1_N
R1058 1 IU3@
R1059 1 IU3@
2 0_0402_5%
2 0_0402_5%
36 U3RXDP_A
36 U3RXDN_A
USB3_RX1_P_L
USB3_RX1_N_L
+USB_VCCC
2
R1060 1 USB30@2 0_0402_5%
R1061 1 USB30@2 0_0402_5%
2
1 0.22U_0603_16V7K
USBSW_EN#
C518
2.2U_0402_6.3V6M
1
2
3
4
GND
IN
IN
EN#
8
7
6
5
OUT
OUT
OUT
OC#
15 USB3_TX1_P
15 USB3_TX1_N
PR-7
1
R527
2
0_0402_5%
36 U3TXDP_A_C
36 U3TXDN_A_C
USB_OC2# 15
R1062 1 IU3@
R1063 1 IU3@
2 0_0402_5%
2 0_0402_5%
USB3_RX1_P_R
USB3_TX1_P_R
USB3_TX1_P_L
USB3_TX1_N_L
D27
1 1
USB3_TX1_N_R
For port 5
USB3_RX1_N_R
U30
@
1
Low Active
15 USB3_RX2_P
15 USB3_RX2_N
R1066 1 IU3@
R1067 1 IU3@
36 U3RXDP_B
36 U3RXDN_B
C
2 0_0402_5%
2 0_0402_5%
1
2 2
98
2
77
5 5
66
2 0_0402_5%
2 0_0402_5%
1 0.22U_0603_16V7K
USBSW_EN#
GND
IN
IN
EN#
USB3_TX1_N_R
USB3_TX1_P_R
10
11
12
13
4
4
3
3
USB20_N1_C
USB20_P1_R
1
1
L26
2
2
USB20_P1_C
+USB_VCCB
JUSB2
W=80mils
1
2
1
2
C521
47U_0805_6.3V
USB3_RX2_N_R
USB3_RX2_P_R
D29
1 1
109
USB3_RX2_N_R
USB3_RX2_P_R
2 2
98
USB3_RX2_P_R
USB3_TX2_N_R
4 4
77
USB3_TX2_N_R
5 5
66
1
2
3
4
5
6
7
8
9
VBUS
DD+
GND
STDA_SSRXSTDA_SSRX+
GND
STDA_SSTXSTDA_SSTX+
10
11
12
13
USB20_N1_C
USB20_P1_C
1 0_0402_5%
USB3_TX2_N_R
USB3_TX2_P_R
USB3_RX2_N_R
GND
GND
GND
GND
SANTA_373280-1
CONN@
USB3_TX2_P_R
D28
6
3 3
+USB_VCCD
GND
GND
GND
GND
WCM-2012HS-900T
USB20_N1_R
C520
470P_0402_50V7K
I/O2
VDD
GND
2
I/O3
I/O1
USB20_N1_C
3
5
+5VALW
I/O4
1
C
8
U31
1
2
3
4
USB3_RX1_N_R
USB3_RX1_P_R
USB3_TX1_P_R
USB3_RX2_P_L
USB3_RX2_N_L
USB3_TX2_P_L
USB3_TX2_N_L
C514
47U_0805_6.3V
SANTA_373280-1
CONN@
2 R528
@
R1076 1 USB30@2 0_0402_5%
R1078 1 USB30@2 0_0402_5%
2
VBUS
DD+
GND
STDA_SSRXSTDA_SSRX+
GND
STDA_SSTXSTDA_SSTX+
1 0_0402_5%
2
2.2U_0402_6.3V6M
C513
470P_0402_50V7K
1 0_0402_5%
2 R526
@
USB3_TX1_N_R
1
2
USB20_N0_C
1
2
3
4
5
6
7
8
9
USB3_RX1_P_R
4 4
8
+5VALW
2
USB20_P0_C
2
1
L27
3
USB20_N0_C
USB20_P0_C
USB3_RX1_N_R
USB3_TX2_P_R
R1073 1 IU3@
R1075 1 IU3@
36 U3TXDP_B_C
36 U3TXDN_B_C
@
3
4
R1068 1 USB30@2 0_0402_5%
R1070 1 USB30@2 0_0402_5%
15 USB3_TX2_P
15 USB3_TX2_N
For port 2
1
C522
@ 1000P_0402_50V7K
2
1
109
YSCLAMP0524P_SLP2510P8-10-9
1
4
2 R525
@
3 3
R1064 1 USB30@2 0_0402_5%
R1065 1 USB30@2 0_0402_5%
AP2301MPG-13 MSOP 8P
C523
USB20_P0_CON
2
0_0402_5%
JUSB1
W=80mils
1 0_0402_5%
WCM-2012HS-900T
+5VALW
B
+USB_VCCA
2 R521
@
DLP11TB800UL2L_4P
USB20_N0_CON
@ 1
R524
C524
DCP autodetect charger mode
0
2
C515
C519
Function
X
1
For port 1
C516
SELCDP
0
1
USB3_RX2_N_L
+5VALW
@
@
SLG55584AVTR_TDFN8_2X2
1
DLP11TB800UL2L_4P
USBAI_PEN#_R
2
0_0402_5%
8
7
6
5
USB3_TX1_N_R
1
L24
@ 1
R518
USBAI_PEN#
2 0_0402_5%
USB20_N0_R
USB20_P0_R
USB_OCI#A 36
2
40 USBAI_PEN#
R512 1
40 USBAI_EN
DLP11TB800UL2L_4P
1
2
GND
IN
IN
EN#
L25
1
1
2
1 0.22U_0603_16V7K
3
USBAI_PEN#_R 4
PR-7
AI@
2 2.2U_0402_6.3V6M
1
2
C510
4
2
2
C509
+USB_VCCA
U27
3
USB3_RX1_P_L
For port 0
@
5
2
0_0402_5%
2
1
OUT
OUT
OUT
OC#
YSCLAMP0524P_SLP2510P8-10-9
8
7
6
5
PR-7
USB20_P1_C
AZC099-04S.R7G_SOT23-6
1
R529
2
0_0402_5%
USB_OC1# 15
15 USB20_N0
15 USB20_P0
1
2
R1077 1 IU3@
R1079 1 IU3@
36 U2DN_B
36 U2DP_B
D
2 0_0402_5%
2 0_0402_5%
USB20_N0_R
USB20_P0_R
R1072 1 USB30@2 0_0402_5%
R1074 1 USB30@2 0_0402_5%
15 USB20_N1
15 USB20_P1
C525
@ 1000P_0402_50V7K
R1069 1 IU3@
R1071 1 IU3@
36 U2DN_A
36 U2DP_A
AP2301MPG-13 MSOP 8P
Low Active
4
D39
2 0_0402_5%
2 0_0402_5%
6
USB20_N1_R
USB20_P1_R
R1080 1 USB30@2 0_0402_5%
R1081 1 USB30@2 0_0402_5%
I/O4
I/O2
3
5
+5VALW
VDD
GND
I/O3
I/O1
1
USB20_P0_C
2
4
USB20_N0_C
D
AZC099-04S.R7G_SOT23-6
Compal Secret Data
Security Classification
Classification
Issued Date
2011/09/22
Deciphered Date
2012/12/31
Compal Electronics, Inc.
Title
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
1
2
3
4
Monday, February 13, 2012
5
Sheet
37
of
61
A
B
Power Button
930@
H5
H6
H8
H_3P0
1
H_3P0
1
H_3P0
1
H_3P0
1
H_3P0
51_ON# 43
@
930@
DAN202UT106_SC70-3
5
H3
1
51_ON#
H_3P0
1
1
ON/OFF 40
1
3
H2
3P0
2
ON/OFFBTN#
H1
1
D30
E
Screw Hole
R531
9012@
100K_0402_5%
100K_0402_5%
3
4
R530
1
SW1
NTC010-BB1G-C100C
2
1
2 9012@ 0_0402_5%
2
2
PR-7
R513 1
D
+3VL
+3VALW
ON/OFF switch
1
C
@
H9
@
H10
@
H11
H12
@
@
H13
H14
H15
H24
H25
2
EC_ON
R532
S
H_3P0
1
@
@
1
H_3P0
1
H_3P0
@
1
1
1
1
H18
4P3
Q30
2N7002KW 1N SOT323-3
930@
H19
H_4P3
@
@
H_3P0
H_3P0
@
H20
H_4P3
@
H21
H_4P3
H_4P3
@
@
H23
1
10K_0402_5%
930@
H_3P0
+5VALW
D
2
G
3
2
40,45 EC_ON
1
300_0402_5%
1
1
19-213A-T1D-CP2Q2HY-3T_WHITE
2
@
1
1
H_3P0
@
1
PWR_ON_LED1#
H_3P0
@
1
40 PWR_ON_LED1#
R722
H_3P0
@
1
LED7
1
PR-1
3P3
2
1
2
PWR_ON_LED1#
H_3P3
@
ON/OFFBTN#
H_3P1
H22
H_3P1
1
1
3
2
H17
1
H16
3P1
H_3P1
@
@
1
PJSOT24CH_SOT23-3
D31
@
@
FIDUCIAL_C40M80
FD3
@
FIDUCIAL_C40M80
FD4
@
FIDUCIAL_C40M80
1
1
1
FD2
@
1
FD1
Fan Control Circuit
3
3
@
FIDUCIAL_C40M80
+5VS
+3VS
2
1
U32
1
R533
10K_0402_5%
FAN_SPEED
40 FAN_SPEED
2
8
7
6
5
GND
GND
GND
GND
EN
VIN
VOUT
VSET
1
2
3
4
2
1
2
C527
1000P_0402_50V7K~D
JFAN1
+5VS_FAN
1
2
3
FAN_SPEED
1
APL5607KI-TRG_SO8
C529
1000P_0402_50V7K
1
C526
2.2U_0402_6.3V6M
C528
10U_0603_6.3V6M
2
4
5
1
2
3
GND
GND
ACES_85204-0300N
CONN@
40 FAN_SET
place as close as EC
4
4
Compal Secret Data
Security Classification
2011/08/23
Issued Date
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
A
B
C
D
Monday, February 13, 2012
Sheet
E
38
of
61
KSI0
KSI5
KSI6
KSI1
KSO2
KSO1
KSO4
KSO3
KSO5
KSO13
KSO8
KSO9
2
D33
D34
0.1U_0402_16V4Z
JTP1
JKB1
26
25
KSO15
KSO14
KSO12
KSO10
KSO11
KSO6
KSO8
KSO4
KSO2
KSO5
KSO13
KSI0
KSI3
KSO1
KSI2
KSI4
KSO3
KSI5
KSI6
KSO9
KSI7
KSI1
KSO0
KSO7
GND2
GND1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
9
10
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
G1
G2
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
L30ESDL5V0C3-2 C/A SOT-23
1
PCH_SMBDATA
PCH_SMBCLK
GP_INT
2
ACES_51522-00801-001
CONN@
@
1
2
L30ESDL5V0C3-2 C/A SOT-23
TP_CLK 40
TP_DATA 40
@
+3VS
R808
2.2K_0402_5%
GP_INT
Q64
3
SMBALERT#
1
D
D
KSO7
1
KSO[0..17] 40
S
S
KSO6
PCH_SMBCLK
C564
KSI[0..7] 12,40
KSO[0..17]
PCH_SMBDATA
G
KSO14
+3VS
KSI[0..7]
C571
100P_0402_50V8J
100P_0402_50V8J
KSO0
TP_CLK
TP_DATA
2
KSI4
Touch/B Connector
3
KSI3
INT_KBD Conn.
1
KSI2
PR-4
2
KSI7
3
KSO15
1
KSO12
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
10P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
10P_0402_50V8J
2
100P_0402_50V8J
2
10P_0402_50V8J
2
10P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
C570
100P_0402_50V8J
1
C553
1
C554
@
1
C555
@
1
C556
@
1
C557
@
1
C558
@
1
C559
@
1
C560
@
1
C561
@
1
C562
@
1
C563
@
1
C565
@
1
C566
@
1
C567
@
1
C568
@
1
C569
@
1
C572
@
1
C573
@
1
C574
@
1
C575
@
1
C576
@
1
C577
@
1
C578
@
1
C579
2
@
2
@
KSO11
1
KSO10
SMBALERT# 13
BSS138_SOT23
PCH_SMBDATA
PCH_SMBCLK
PCH_SMBDATA 10,11,13,41
PCH_SMBCLK 10,11,13,41
ACES_88514-02401-071
CONN@
+5VALW
2
10K_0402_5%
LED1
2
200_0402_5%
1
R714
+3VALW
D35
PCH_SATALED#
HT-121UYG_YELLOW-GREEN
PWR_ON_LED#
LED2
BATT_CHG_LED#
2
100_0402_5%
40 BATT_CHG_LED#
1
R716
2
Amber
BATT_LOW_LED#
3
+3VALW
3
2
3
1
1
HT-210UD-UYG_AMB-GREEN
LED3
YG
2
G
Green
40 WL_BT_LED#
3
1
@
2
WL_BT_LED#
UD
UD
3
BATT_CHG_LOW_LED#
CAPS_LED#
1
R715
+3VALW
D36
BATT_CHG_LED#
2
300_0402_5%
(Hall Effect Switch)
YSDA0502C 3P C/A SOT-23
1
40 BATT_CHG_LOW_LED#
Lid Switch
1
UYG
Green
@
2
YSDA0502C 3P C/A SOT-23
D37
@
2
200_0402_5%
1
R717
+3VS
C582
0.1U_0402_16V4Z
2
U36
1
1
HT-121UYG_YELLOW-GREEN
VOUT
3
1
D38
2
200_0402_5%
1
R719
NUM_LED#
+3VS
@
AH1806-W-7 SC59 3P
2
1
YG
2
G
Green
3
LID_SW_IN# 40
1
GND
YSDA0502C 3P C/A SOT-23
LED4
12 PCH_SATALED#
R578
47K_0402_5%
2
3
1
VDD
40 PWR_ON_LED#
2
2
YG
Green
G
LED
1
R713
@
1
C583
10P_0402_50V8J
2
3
HT-121UYG_YELLOW-GREEN
YSDA0502C 3P C/A SOT-23
LED5
2
YG
YG
40 NUM_LED#
G
Green
3
1
2
200_0402_5%
1
R720
+3VS
1
R721
+3VS
ESD
HT-121UYG_YELLOW-GREEN
LED6
YG
YG
2
G
G
Green
40 CAPS_LED#
3
1
2
200_0402_5%
HT-121UYG_YELLOW-GREEN
Compal Secret Data
Security Classification
Issued Date
2011/08/23
Deciphered Date
2012/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
Sheet
39
of
61
PR-7
2
2
0.1U_0402_16V4Z
@
1
C156
1
C157
1
1
1000P_0402_50V7K
PM_SLP_S4#
2
100P_0402_50V8J
C535
1
R535
0_0402_5%
930@
1000P_0402_50V7K
KB_RST#
2
100P_0402_50V8J
@
2
2
0.1U_0402_16V4Z
2
+3VALW
+3VALW
39
USBSW_EN#
1
10K_0402_5%
USBAI_PEN#
1
10K_0402_5% AI@
0.1U_0402_16V4Z
C536
IRT-2
2
2
R744
+3VS
AD_BID0
1
TP_CLK
PR-7
2
4.7K_0402_5%
TP_DATA
2
4.7K_0402_5%
AVCC
close U33
R536
100K_0402_5%
Ra
R743
+3VL
67
9
22
33
96
111
125
U33
Board ID
12,39
KSO[0..17]
2 ECAGND
R537 2
1
9012@ 0_0402_5%
VCC
VCC
VCC
VCC
VCC
VCC
D
KSI[0..7]
KSO[0..17]
1
R534
0_0805_5%
KSI[0..7]
L28
FBMA-L11-160808-800LMT_0603
1
2 +EC_VCCA
+3VALW_EC
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
2
C530
C531
C532
C533
C534
2
1
1
1
2
2
+3VALW
3
2
4
33K_0603_5%
R538
Rb
1
R541
1
R542
2
1
5
D
C537
0.1U_0402_16V4Z
8/23 Rb change to 33K
12
13
37
20
38
15 CLK_PCI_LPC
+3VALW
R540 2
C540
5,15,32,36,41
1 47K_0402_5%
2
EC_RST#
EC_SCI#
16 EC_SCI#
14 PM_CLKRUNEC#
0.1U_0402_16V4Z
1
PLT_RST#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
+3VALW
1
R543
1
R546
1
R548
2 EC_SMB_CK1_R
2.2K_0402_5%
2 EC_SMB_DA1_R
2.2K_0402_5%
2 FLASH_EN
10K_0402_5%
@
+3VS
1
R551
1
R730
2
@
2
EC_SCI#
10K_0402_5%
VGA_BUF#
10K_0402_5%
PR-7
43,44
43,44
13,20
13,20
EC_SMB_CK1 1 R560
EC_SMB_DA1 1 R561
1 R562
2 0_0402_5%
1 R563
2 0_0402_5%
EC_SMB_CK1
EC_SMB_DA1
PCH_SMLCLK
PCH_SMLDATA
B
2 0_0402_5%
2 0_0402_5%
EC_SMB_CK1_R
EC_SMB_DA1_R
EC_SMB_CK2
EC_SMB_DA2
AD
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
14 AC_PRESENT
20 VGA_BUF#
30 EC_INV_PWM
38 FAN_SPEED
14 SUSWARN#
41 E51TXD_P80DATA
R570
41 E51RXD_P80CLK
1
2
39 PWR_ON_LED#
9012@ 0_0402_5%
39 NUM_LED#
PR-7
14 PCH_PWROK
1
R572
0_0402_5%
5
2
PR-7
C552
47P_0402_50V8J
2 R573
1
C551
20P_0402_50V8
PROCHOT
2
G
A
1 100K_0402_5%
2
63
64
65
66
75
76
BATT_TEMPA
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
USBAI_PEN#
FAN_SET
PCH_DPWROK
DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
1 @
+3VALW_EC
2
+3VL
Stuff
R547 100K_0402_5%
ADP_I 43,44
930@
DRAMRST_CNTRL_PCH
R549
6,9,13
1
KB930
USBAI_PEN# 37
FAN_SET 38
PCH_DPWROK 14
EC_DRAMRST_CNTRL_PCH
R599
KB9012
2
200K_0402_5%
R571
D32
2
@
1
ACIN 14,44
C541
RB751V-40_SOD323-2
SA_PGOOD
R752 1
6
2 0.1U_0402_16V4Z
1
2 0_0402_5%
PR-7
83
84
85
86
87
88
EC_MUTE_R
USBAI_EN
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
PS2 Interface
97
98
99
109
CPU1.5V_S3_GATE
EN_WOL
HDA_SDO
R550 2
1
9012@ 0_0402_5% PR-7
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
R544 2
EAPD
TP_CLK
TP_DATA
1 0_0402_5% EC_MUTE#
USBAI_EN 37
PR-7
BT_ON 41
EAPD 33
TP_CLK 39
TP_DATA 39
EC_MUTE# 33
EC_MUTE#
SPI Device Interface
SPI Flash ROM
GPIO
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
SM Bus
C
2
C542
2
10K_0402_5%
100P_0402_50V8J
1
CPU1.5V_S3_GATE 9
EN_WOL 32
HDA_SDO 12
NTC_V 43
PR-1
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
PWR_ON_LED1#
USB3_ON 36
38
PR-11
@
PR-7 Delete R558
EC_SPI_WP
@ T37
PAD
BATT_CHG_LED#
CAPS_LED#
SUSACK#
BATT_CHG_LOW_LED#
SYSON
VR_ON
PM_SLP_S4#
PCH_RSMRST#
100
EC_LID_OUT#
101
2 R566
102
103 9012@ 0_0402_5%
104
BKOFF#
105
PBTN_OUT#
106
107
SA_PGOOD
108
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
ACIN_D
EC_ON
ON/OFF
LID_SW_IN#
SUSP#
V18R
GPI
1
R545
ACIN
77
78
79
80
122
123
Co-lay KB930/KB9012 PECI
BATT_TEMPA 43
ADP_I
AD_BID0
124
1
1
C543
EC_SPI_WP
2
100P_0402_50V8J
EC_SPI_WP 12
PCH_ENBKL
PCH_ENBKL 14
BATT_CHG_LED# 39
CAPS_LED# 39
SUSACK# 14
BATT_CHG_LOW_LED#
SYSON 42,47
VR_ON 50
PM_SLP_S4# 14
1
R559
2
930@ 43_0402_1%
H_PECI 5
Reserve for EMI please close to U4
39
PCH_RSMRST# 12,14
EC_LID_OUT# 16
PR-7
Turbo_V 43
PROCHOT 43
BKOFF# 30
PBTN_OUT# 12,14
WL_BT_LED# 39
SA_PGOOD 49
PCH_PWROK
R568 2
1 9012@ 0_0402_5%
R569 1 930@
2
0_0402_5%
1
@
2 10K_0402_5%
R554
B
MAINPWON 43,45 PR-7
PCH_PWROK
PR-14
+V18R
XCLK1
XCLK0
1
2
KB9012QF A3 LQFP 128P
20mil
H_PECI_R
EC_ON 38,45
ON/OFF 38
LID_SW_IN# 39
SUSP# 42,46,47,48
WL_OFF# 41
R571 1
2
9012@ 43_0402_1%
H_PECI_R
2
100P_0402_50V8J
@ 1
C1070
H_PECI
Reserve for EMI please close to U33
C550
4.7U_0805_10V4Z
L29
A
ECAGND 2
1
FBMA-L11-160808-800LMT_0603
R575
100K_0402_5%
1
SN74LVC1G06DCKR_SC70-5
1
Y
NC
4
2
3
H_PROCHOT#
1
5,43 H_PROCHOT#
A
EC_CRY1
14 SUSCLK_R
P
U34
1 @
C548
0.1U_0402_16V4Z~D
+3VS
PWR_ON_LED#
NUM_LED#
2
VR_HOT#
50 VR_HOT#
PM_SLP_S3#_R
PM_SLP_S5#_R
EC_SMI#
PCH_PWR_EN
FLASH_EN
AC_PRESENT
VGA_BUF#
EC_INV_PWM
FAN_SPEED
SUSWARN#
E51TXD_P80DATA
E51RXD_P80CLK
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
USBSW_EN# 37
VGA_PWROK 29,53
DGPU_PWROK 16
DS_WAKE# 16
ECAGND
2
1
C538
100P_0402_50V8J
ACIN_D
GND
GND
GND
GND
GND
1 R564
2 0_0402_5%
1 R565
2 0_0402_5%
16 EC_SMI#
42 PCH_PWR_EN
12 FLASH_EN
USBSW_EN#
VGA_PWROK
DGPU_PWROK
DS_WAKE#
PWM Output
PR-7
14 PM_SLP_S3#
14 PM_SLP_S5#
21
23
26
27
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
11
24
35
94
113
C
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
AGND
R539 2
1
2
3
4
5
7
8
10
69
C539
@ 22P_0402_50V8J
2
1
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
16 GATEA20
16 KB_RST#
12 SERIRQ
12,41 LPC_FRAME#
12,41 LPC_AD3
12,41 LPC_AD2
1 @ 33_0402_5%
12,41 LPC_AD1
12,41 LPC_AD0
2
Compal Secret Data
Security Classification
Close to IMVP7
Issued Date
2011/08/23
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
5
4
3
2
Monday, February 13, 2012
Sheet
1
40
of
61
B
C
D
E
+3VS
4.7U_0805_10V4Z
2
0.1U_0402_16V7K
2
1
C586
4.7U_0805_10V4Z
2
1
C587
0.1U_0402_16V7K
2
1
C588
0.1U_0402_16V7K
C589
0.1U_0402_16V7K
C590
2
2
13 WLANCLK_REQ#
R587 1
@
0_0402_5%~D
2
13 CLK_PCIE_WLAN#
13 CLK_PCIE_WLAN
PCI_RST#_R
CLK_LPC_DEBUG1_R
13 PCIE_PRX_WLANTX_N2
13 PCIE_PRX_WLANTX_P2
13 PCIE_PTX_WLANRX_N2
13 PCIE_PTX_WLANRX_P2
+3VS_WLAN
2
40 E51TXD_P80DATA
40 E51RXD_P80CLK
E51TXD_P80DATA
E51RXD_P80CLK
2 R596
R594 1
R595 1
1
2 0_0402_5%~D
2 0_0402_5%~D
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
WAKE#
RESERVED
RESERVED
CLKREQ#
GND
REFCLKREFCLK+
GND
RESERVED
RESERVED
GND
PERn0
PERp0
GND
GND
PETn0
PETp0
GND
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
3VSWLAN_GATE
2
390K_0402_5%
1
3.3V
GND
1.5V
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
GND
RESERVED
PERST#
+3.3Vaux
GND
+1.5V
SMB_CLK
SMB_DATA
GND
USB_DUSB_D+
GND
LED_WWAN#
LED_WLAN#
LED_WPAN#
+1.5V
GND
+3.3V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND
C592
54
+3VS_WLAN
6
2 0_0402_5%
1
R585
100_0603_5%
+1.5VS_WLAN
0_0402_5% 1
0_0402_5% 1
PLT_RST#
R590 1
R591 1
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
2 R588
@
2 R589 WL_OFF#
2 0_0603_5%
@
2 0_0603_5%
0_0402_5%
MINI1_SMBCLK
R592 1
@
2
MINI1_SMBDATA
@
1
2
R593 0_0402_5%
Q82A
SUSP
35,36,42 SUSP
2
2N7002KDWH_SOT363-6
PCH_WAN_RADIO_OFF#
WL_OFF# 40
PLT_RST# 5,15,32,36,40
0.01U_0402_25V7K
PR-0119
Q82B
5
SUSP
2N7002KDWH_SOT363-6
15
4
PCH_BT_ON
@
2
PR-15
1
R586 1
1
3VS_WLAN_CHG
1
R724
+VSBP
1
JMINI1
PCIE_WAKE#
14,32,36 PCIE_WAKE#
+3VS_WLAN
80mil
1
2
3
4
2
1
C585
8
7
6
5
2
1
1
C584
10U_0603_6.3V6M
+1.5VS_WLAN
1
U37
SI4178DY-T1-GE3_SO8
+3VS_WLAN
2
+3VS_WLAN
@ 1 0_1206_5%
1
R583 2
+3VALW
PR-7
2
1
WLAN/BT combo
R584
0_0805_5%
C591
22U_0805_6.3V6
+1.5VS
3
A
+3VS_WLAN
PR-7
+3VALW
PCH_SMBCLK 10,11,13,39
PCH_SMBDATA 10,11,13,39
USB20_N10 15
USB20_P10 15
2
PR-5
100K_0402_5%
16 PCH_BT_ON
40 BT_ON
PCH_BT_ON
BT_ON
R597 1
R598 1
@
2 1K_0402_0.5%
2 1K_0402_0.5%
53
GND
ACES_88915-5204
CONN@
5.2 mm High
Reserve for SW mini-pcie debug card.
Series resistors closed to KBC side.
LPC_FRAME#_R
R599
LPC_AD3_R
R600
LPC_AD2_R
R601
LPC_AD1_R
R602
LPC_AD0_R
R603
PCI_RST#_R
R604
CLK_LPC_DEBUG1_R
R605
3
1
1
1
1
1
1
1
2
2
2
2
2
2
2
0_0402_5% LPC_FRAME#
0_0402_5% LPC_AD3
0_0402_5% LPC_AD2
0_0402_5% LPC_AD1
0_0402_5% LPC_AD0
0_0402_5% PLT_RST#
CLK_LPC_DEBUG1
0_0402_5%
LPC_FRAME# 12,40
LPC_AD3 12,40
LPC_AD2 12,40
LPC_AD1 12,40
LPC_AD0 12,40
CLK_LPC_DEBUG1
3
15
PR-7
C593
R606
2
1
1
2CLK_LPC_DEBUG1_R
33_0402_5% @
@
22P_0402_50V8J
Reserve for EMI please close to JMINI1
4
4
Compal Secret Data
Security Classification
Issued Date
2011/1212
Deciphered Date
2012/11/22
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
4019G8
Date:
A
B
C
D
Monday, February 13, 2012
Sheet
E
41
of
61
A
B
C
+ 5 V A L W T O + 5 V S
D
+ 1.5 V T O + 1.5 V S
+5VALW
+5VS
Q33
1
D
3
R620
100K_0402_5%
2
35,36,41 SUSP
1
SUSP#
2
1
47K_0402_5%
C600
0.22U_0603_16V7K
SUSP
1
1
S 2N7002KW 1N SOT323-3
2
G
2
R622
10K_0402_5%
SUSP
2
2N7002KDWH_SOT363-6
Q76A
2
1
+1.5V_CPU_VDDQ
Q76B
2N7002KDWH_SOT363-6
+0.75VS
1
PR-16
1
Q77A
2N7002KDWH_SOT363-6
5
40,46,47,48 SUSP#
D
1
C599
0.01U_0402_25V7K
Q36
SUSP
2
R611
1
SUSP
2
6
PR-16
5
3
Q77B
2N7002KDWH_SOT363-6
4
5VS_GATE
2
390K_0402_5%
1
R610
1
+VSBP
2
R609
470_0603_5%
6
1
1
3
G
2
R608
100K_0402_5%
1
1
2
R607
10_0603_5%
2
2
2
1
1
S
3
C598
C598
4
+1.5VS
AO3413L_SOT23-3
10U_0603_6.3V6M
2
C595
1U_0603_10V6K
1
C594
2
10U_0805_10V6K
10U_0805_10V6K
C597
10U_0805_10V6K
C596
10U_0805_10V6K
2
1
1
2
3
4
+1.5V
8
7
6
5
1
U38
+5VALW
SI4178DY-T1-GE3_SO8
1
E
+ 3 V A L W T O + 3 V S
R623
22_0603_5%~D
+1.5V
SUSP
2
3
6
2
9 RUN_ON_CPU1.5VS3#
5
2N7002KDWH_SOT363-6
Q72A
C609
0.1U_0402_25V6
2
Q72B
2N7002KDWH_SOT363-6
SYSON#
5
Q73B
2N7002KDWH_SOT363-6
4
2
2
2
4
6
1
2
PCH_PWR_EN#
1
1
SUSP
1
AO3419L 1P SOT23-3
5
2
1
3
Q74B
2N7002KDWH_SOT363-6
R617
R617
20K_0402_5%
3VS_GATE
1
200K_0402_5%
2
R616
C608
0.1U_0402_16V7K
1
G
+VSBP
2
20mil
Q39
3
3
R614
220_0603_5%
4
2
C602
2
470_0402_5%
+1.5V_D
4
1
R628
+DDR_CHG
R613
@
1
2
0_0603_5%
D
2
+1.5V_CPU_VDDQ_CHG
2
+5V_PCH
S
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C601
2
10U_0603_6.3V6M
C604
2
1
+3VS
1
2
3
C605
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
8
7
6
5
+5VALW
1
2
R624
220_0402_5%~D
U39
+3VALW
SI4178DY-T1-GE3_SO8
@
R629
0_0402_5%
R630
1
Q74A
2N7002KDWH_SOT363-6
SUSP
1
2
0_0402_5%
+5VALW
PR-7
1
PR-16
+1.05VS
+VCCP
+5VALW
R619
100K_0402_5%
6
1
1
3
3
6
R621
10K_0402_5%
4
1
2N7002KDWH_SOT363-6
2
2
2
3
2
SUSP
2
5
Q75B
2N7002KDWH_SOT363-6
4
SUSP
2N7002KDWH_SOT363-6
Q75A
1
1
Q71B
2N7002KDWH_SOT363-6
R735
100K_0402_5%
1
2
1
R813
@
1
1
S
1M_0402_5%
2
D
3
Q43
PCH_PWR_EN#
2
G
2N7002KW 1N SOT323-3
R615
470_0603_5%
Q73A
2
40,47 SYSON
3V_GATE
2
+VSBP
2
5
40 PCH_PWR_EN
2
PR-14
1
6
2
C1047
2
G
1
0.1U_0402_25V6
1
2
C603
10U_0603_6.3V6M
2
C606
0.1U_0402_25V6
S
D
3
R618 2
1
200K_0402_5%
+V1.05S_VCCP_D
PCH_PWR_EN#
40mil
1
10U_0603_6.3V6M
470_0402_5%
470_0402_5%
+V1.05S_D
1
C607
R627
R718
100K_0402_5%
Q38
AO3404AL_SOT23
3
SYSON#
2
R612
@
2
1
0_0805_5%
R626
2
1
1
+3V_PCH
1
+3VALW
PCH_PWR_EN#
2N7002KDWH_SOT363-6
Q71A
C610
0.1U_0402_25V6
PR-9
PR-16
4
4
Compal Secret Data
Security Classification
Issued Date
2011/1212
2012/11/22
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A
B
C
D
Rev
B
4019G8
Monday, February 13, 2012
Sheet
E
42
of
61
B
For KB930 -- & gt; Keep PU1 circuit
(Vth = 0.825V)
For KB9012 (Red square) -- & gt; Remove PU1 circuit, but keep PR56
PH1, PR2, PQ1, PR7,PQ15,PR73,PR56
PH1 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C
1
MAINPWON 39,44
1
PR28
2
100_0402_1%
EC_SMB_CK1 39,43
1
PR31
2
100_0402_1%
2
100K_0402_5%
1
PR30
2
1K_0402_1%
1VSB_N_003
1
2
2
1
1
2
+VSBP
1
PQ3
TP0610K-T1-E3_SOT23-3
2
VSB_N_001
S
EC_SMB_DA1 39,43
1
PR29
1
@ PR4
@PR4
10K_0402_1%
PQ4
SSM3K7002FU_SC70-3
PC10
.1U_0402_16V7K
2
1
PR18
0_0402_5%
1
2VSB_N_002 2
G
2
D
3
2
44 POK
@ PD2
@PD2
PJSOT24CW_SOT323-3
2
1
3
2
1
2
PR16
100K_0402_1%
1
3
@
2
PR14
22K_0402_1%
1
2
PC8
0.22U_0603_25V7K
2
VL
1
PC6
1000P_0402_50V7K
3
B+
PC7
0.01U_0402_25V7K
PR27
1K_0402_1%
PD1
PJSOT24CW_SOT323-3
PC128
10U_0805_25V6K
2
1
1
2
EC_SMCA
EC_SMDA
TS_A
BATT+
2
1
PR13
100K_0402_1%
PL4
HCB2012KF-121T50_0805
1
2
1
OTP_N_003
3
2
@ PR6
@PR6
29.4K_0402_1%
39 NTC_V
ADP_OCP_2
2
5
PR7
20K_0402_1%
OT2 RHYST2
@ PR9
@PR9
0_0402_5%
2
1
2
0_0402_5%
PR3
21.5K_0402_1%
2
Turbo_V
PC9
0.1U_0603_25V7K
1
6
39 Turbo_V
2
PR5
100K_0402_1%
1
OT1 TMSNS2
VMB
1
2
1
@ PR73
@PR73
OTP_N_002
G718TM1U_SOT23-8
S
39 PROCHOT
7
4
2ADP_OCP_1
G
Change DC040007T0L to DC041112050
PL3
HCB2012KF-121T50_0805
1
2
8
GND RHYST1
3
@
D
@ PQ1
SSM3K7002FU_SC70-3
VCC TMSNS1
2
PH1
100K_0402_1%_TSM0B104F4251RZ
5,39 H_PROCHOT#
1
@
NTC_V
1
PJPDC1
GND 11
GND 10
9 9
8 8
7 7
6 6
5 5
4 4
3 3
2 2
1 1
PJP2
@SUYIN_200045GR009MX8SZR
1
@
PU1
2
+3VS
PR2
1K_0402_1%
1
@ PC4
@PC4
0.1U_0603_16V7K
1
+3VL
39,43 ADP_I
2
1
PC5
100P_0402_50V8J
2
1
PC3
1000P_0402_50V7K
2
1
PC2
100P_0402_50V8J
2
1
2
1
PC1
1000P_0402_50V7K
VL
CONN@
ACES_88299-0610
GND 8
GND 7
6 6
5 5
4 4
3 3
2 2
1 1
1
VIN
PL2
HCB2012KF-121T50_0805
1
2
ADPIN
D
2
PL1
HCB2012KF-121T50_0805
1
2
DCIN jack P/N:SP02000N000,
need doble confirm P/N with ME
C
PR56
12.1K_0402_1%
A
+3VALW
3
3
PJ3
BATT_TEMPA 39
2
+CHGRTC
2
1
1
+3VL
JUMP_43X39
1
1
3
1
+
2
1
@
PC12
0.1U_0603_25V7K
@ 1
PR24
2
22K_0402_1%
+
+RTCBATT
2
Change RTC For Cost Down
4
37 51_ON#
-
Must close PBJ1
1
LOTES_AAA-BAT-054-K01
CONN@
2
1
2
2
@ PR23
@PR23
100K_0402_1%
@
PC11
0.22U_0603_25V7K
@
PR20
68_1206_5%
VS
1
N1
@ PR19
@PR19
68_1206_5%
2
@ PQ5
@PQ5
TP0610K-T1-E3_SOT23-3
PBJ1
2
2
RTC Battery
1
@ PD4
@PD4
LL4148_LL34-2
BATT+
@
PD3
LL4148_LL34-2
VS_N_001
1
2
VIN
4
SP07000H700
VS_N_002
Compal Secret Data
Security Classification
For KB9012 -- & gt; Remove all 51_ON# circuit
Issued Date
2009/01/23
Deciphered Date
2010/01/23
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A
B
C
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
D
Sheet
43
of
61
A
B
C
D
1
for reverse input protection
SI1304BDL-T1-E3_SC70-3
3
PQ106 D
2
G
S
PR103
1
PR104
2
1
1M_0402_5%
1
2
3M_0402_5%
1
1UH_FDSD0630-H-1R0M-P3_11A_20%
1
DH_CHG
3
2
1
BQ24725_LX
2
1
1
2
PC109
0.01U_0402_50V7K
1
2
PC108
2200P_0402_50V7K
1
2
PC107
10U_0805_25V6K
1
PC106
10U_0805_25V6K
2
CSON1
1
1
ILIM
3
1
120K_0402_1%
2
1
1
PC125
0.01U_0402_25V7K
1
PR120
255K_0402_1%
Remember to change PC124 from SE000006S80
to SE025104K80 (2011-02-22)
PR121
100K_0402_1%
VIN
PR122
154K_0402_1%
2
PR118
@
PR119
2
14,20,39 ACIN
@
+3VALW
BQ24725_ILIM
@ PD8
@PD8
RB751V-40_SOD323-2
BQ24725_ACDET
3
@
PC124
0.1U_0603_16V7K
10
SCL
9
8
SDA
IOUT
2
7
1
ACDET
2
10K_0402_1%
6
1
Pre_chg
1
PR126
2
10K_0402_1%
3
PC120
10U_0805_25V6K
BATDRV
BQ24725_BATDRV
1
12
11
2
SRN
1
PR102
0.02_1206_1%
4
5
6
7
8
ACDRV
3
2
1
SRP
4
1
CMSRC
BQ24725_ACDRV
PR115
10_0603_1%
SRP
1
2 CSOP1
PR116
6.8_0603_5%
SRN
1
2 CSON1
2
3
13
1
2
14
CSOP1
GND
4
1
ACP
DL_CHG
2
15
BQ24725RGRR_VQFN20_3P5X3P5
+3VL
CHG
PC121
0.1U_0402_25V6
LODRV
2
ACN
ACOK
2
PC123
PR114
680P_0402_50V7K 4.7_1206_5%
PAD
BQ24725_CMSRC
@ PR117
@PR117
1
16
REGN
17
BTST
18
HIDRV
PHASE
19
20
VCC
PL101
4.7UH_ETQP3W4R7WFN_5.5A_20%
2
2
+3VALW
PR106
0_0402_5%
2
BATT+
0_0402_5%
PQ105
AO4468L_SO8
1
2 BQ24725_ACOK 5
10K_0402_1%
2
2DH_CHG1
4
PC119
1
2
21
1
1
PQ104
AON7408L
PR125
PC122
0.1U_0402_25V6
2
1
BQ24725_REGN
2
PD102
RB751V-40_SOD323-2
1U_0603_25V6K
PU101
PC114
0.01U_0402_50V7K
2
5
1
2
DH_CHG
BQ24725_LX
1U_0603_25V6K
2BQ24725_BATDRV_1
1
@
PR107
4.12K_0603_1%
PC116
1
1
2
3
4
1
2
PC101
0.1U_0402_25V6
1
2
PC102
0.1U_0402_25V6
1
2
PC103
10U_0805_25V6K
1
PC104
10U_0805_25V6K
2
1
2
1 1
BQ24725_BATDRV
0.047U_0402_25V7K
BQ24725_VCC
2
BQ24725_ACP
1
PC117
0.1U_0603_25V7K
2
1
2
PR109
4.12K_0603_1%
1
2
PC118
1
2
BQ24725_ACN
PR108
4.12K_0603_1%
@
8
7
6
5
PD101
BAS40CW_SOT323-3
PR110
10_1206_1%
1
2
2
PC115
0.1U_0402_25V6
3
2
VIN
PC105
10U_0805_25V6K
1
3
PC113
0.1U_0402_25V6
2
PC111
10U_0805_25V6K
2
BQ24725_ACDRV_1
1
PQ103
DMG4406LSS-13 1N SO8
PR111
2.2_0603_5%
BQ24725_BST 2
1
2
PC130
10U_0805_25V6K
2
1
1
1
2
4
1
2
B+
PR101
0.01_1206_1%
1
4
PL102
PC129
10U_0805_25V6K
2
4
1
PC112
2200P_0402_50V7K
2
PQ102
DMG4406LSS-13 1N SO8
1
8
2
7
3
6
5
2
P2
1
2
3
5
1
P1
PC110
0.1U_0402_25V6
PQ101
TPCA8059-H_PPAK56-8-5
@ PR105
0_0402_5%
VIN
2
1
PC127
2
1
100_0402_5%
2
EC_SMB_CK1 39,42
PR124
1
ILIM and external DPM
3.97A
PR123
66.5K_0402_1%
2
Max.
1
Typ
17.23V
17.63V
2
Min.
H-- & gt; L
L-- & gt; H
PC126
0.1U_0402_25V6
Vin Dectector
EC_SMB_DA1 39,42
ADP_I 39,42
100P_0402_50V8J
Please locate the RC
Near EC chip
2011-02-22
4
4
Compal Secret Data
Security Classification
Issued Date
2009/01/23
Deciphered Date
2010/01/23
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A
B
C
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
D
Sheet
44
of
61
A
B
C
D
E
1
2VREF_51125
2
PC308
1U_0603_16V6K
1
1
5
PC306
10U_0805_25V6K
2
PC312
2200P_0402_50V7K
2
1
UG_5V
VL
+5VALWP
1
PC318
4.7U_0805_10V6K
@
2
@
1
2
1
2
1
2
2
PC320
1U_0603_10V6K
1
+
PC305
1
RT8205LZQW(2)_WQFN24_4X4
PQ306
FDMC7692S_MLP8-5
PR315
95.3K_0402_1%
@
4
3
2
1
18
17
16
15
POK 42
SNUB_5V 2
NC
VREG5
VIN
GND
EN
PR314
499K_0402_1%
2
1
PQ304
AO4468L_SO8
2
LG_5V
150U_V_6.3VM_R18
19
5
20
LGATE1
SKIPSEL
PHASE1
LGATE2
13
1
PHASE2
2
PL305
2.2UH_ETQP3W2R2WFN_8.5A_20%
1
2
LX_5V
12
3
2
1
22
21
PR323
0_0402_5%
UGATE2
1
BOOT1
UGATE1
BOOT2
PQ305
AON7408L
4
PR309
PC315
2.2_0402_5%
0.1U_0402_10V7K
BST_5V 1
2 BST1_5V 1
2
PR313
4.7_1206_5%
23
PC317
680P_0402_50V7K
ENTRIP1
1
3
2
FB1
REF
TONSEL
ENTRIP1
24
EN0
1
2
3
2
B++
VO1
VREG3
11
LG_3V
4
@
FB2
1
LX_3V
8
7
6
5
PC316
PR312
680P_0402_50V7K
4.7_1206_5%
2
1 SNUB_3V 2
1
PC303
150U_V_6.3VM_R18
1
PR307
174K_0402_1%
1
2
PGOOD
VO2
PC314
8
PR308
0.1U_0402_10V7K
BST1_3V 1
1
2
2 BST_3V 9
2.2_0402_5%
UG_3V 10
14
PL303
4.7UH_ETQP3W4R7WFN_5.5A_20%
2
1
+
B++
2
PR318
0_0402_5%
7
1
1
2
3
2
+3VALWP
P PAD
2
PQ303
AON7408L
25
4
ENTRIP2
PU301
PC313
10U_0805_6.3V6M
4
5
6
PR303
133K_0402_1%
1
2
5
PC304
4.7U_0805_25V6-K
2
1
PC310
2200P_0402_50V7K
2
1
@
+3VLP
2
PC309
0.1U_0402_25V6
2
1
PC322
680P_0603_50V7K
2
1
1
PR306
20K_0402_1%
FB_5V 1
2
FB_3V
ENTRIP2
PL301
HCB2012KF-121T50_0805
1
PR302
20K_0402_1%
1
2
B++
B+
PR305
30.9K_0402_1%
1
2
PC311
0.1U_0402_25V6
2
1
PR301
13.7K_0402_1%
1
2
ENTRIP1
3
PC319
0.1U_0603_25V7K
D
4
3
ENTRIP2
6
2
B++
S
D
PQ307A
SSM6N7002FU_US6
G
2N_3_5V_001
5
1
S
2VREF_51125
3
PQ307B
SSM6N7002FU_US6
G
+3VLP
+3VL
PJP302
2
1
PAD-OPEN 2x2m
PR322
2.2K_0402_1%
1
2
PR321
0_0402_5%
1
2
1
1
+5VALWP
@
1
+3VALWP
+5VALW
(5A,200mils ,Via NO.= 10)
2
+3VALW
(4A,120mils ,Via NO.= 8)
PAD-OPEN 4x4m
3
1
@ PR319
100K_0402_1%
2
PAD-OPEN 4x4m
PJP303
N_3_5V_002 2
2
2
1
PR320
42.2K_0402_1%
VS
1
VL
PJP305
PQ308
DRC5115E0L_SOD323-3
PC321
4.7U_0805_25V6-K
39,42 MAINPWON
2
37,39 EC_ON
PR317
100K_0402_5%
1
2
4
4
For KB930 -- & gt; Keep PR319, Remove PR322
For KB9012 (Red square) -- & gt; Remove PR319
Keep PR322
Compal Secret Data
Security Classification
2007/08/02
Issued Date
2008/08/02
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A
B
C
D
Rev
B
4019G8
Sheet
Monday, February 13, 2012
E
45
of
61
A
B
C
D
1
1
2
2
@ PR405
@PR405
47K_0402_5%
2
@
1
PR402
10K_0402_1%
1
2
PC402
22U_0805_6.3V6M
2
FB_1.8VSP
1
2
PR401
20K_0402_1%
PC401
22U_0805_6.3V6M
PC404
68P_0402_50V8J
2
1
1
1
2
PR403
4.7_1206_5%
TP
NC
SY8033BDBC_DFN10_3X3
+1.8VSP
2
2
1
1
PR404
0_0402_5%
7
EN_1.8VSP
6
1
2
PL401
1UH_FDSD0630-H-1R0M-P3_11A_20%
1
2
SNUB_1.8VSP
FB
11
1
PC405
0.1U_0402_10V7K
39,41,46,47,48 SUSP#
3
NC
LX
2
2
2
LX_1.8VSP
SVIN
EN
LX
PG
PVIN
8
PC403
22U_0805_6.3V6M
PVIN
5
1
10
PC406
680P_0603_50V7K
4
PU401
VIN_1.8VSP
1
PL402
HCB1608KF-121T30_0603
1
2
9
+5VALW
PJP401
1
+1.8VSP
2
+1.8VS
(3A,120mils ,Via NO.= 6)
PAD-OPEN 4x4m
3
3
4
4
Compal Secret Data
Security Classification
Issued Date
2009/01/23
Deciphered Date
2012/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A
B
C
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
D
Sheet
46
of
61
5
2
1.5V_B+
D
PR511
1
2
0_0402_5%
DH_1.5V
39,41 SYSON
1
PC517
10U_0805_6.3V6K
2
1
2
PC508
10U_0805_6.3V6K
2
20
19
18
BOOT
VTT
5
VTTREF_1.5V
+1.5VP
FB
1
C
1.5V_B+
PR501
10.2K_0402_1%
2
1
FB_1.5V
+1.5VP
PR503
887K_0402_1%
1
2
PR502
10K_0402_1%
PC513
.1U_0402_16V7K
2
PR508
0_0402_5%
1
2
PC511
0.033U_0402_16V7K
6
7
8
2
@ PC512
680P_0402_50V7K
VTTREF_1.5V
off
on
on
4
2
+0.75VSP
off
off
on
3
EN_1.5V
1
Level
L
L
H
GND
@
2
VDDQ
TON_1.5V
2
Mode
S5
S3
S0
VTTGND
1
+5VALW
2
PC510
1U_0603_10V6K
21
1
VTTREF
S3
1
+5VALW
PQ502
FDMC7692S_MLP8-5
VLDOIN
VDD
UGATE
11
4
PAD
RT8207MZQW_WQFN20_3X3
S5
VDD_1.5V
VDDP
PU501
VTTSNS
TON
1
@ PR506
4.7_1206_5%
CS
12
1
2
PR507
5.1_0603_5%
1
2
1
2
3
PC501
+
SNUB_+1.5VP 2
C
330U_D2_2.5VY_R15M
1
PGND
PGOOD
PC509
1U_0603_10V6K
1
2
LGATE
14
13
PR505
20K_0402_1%
1
2CS_1.5V
5
+1.5VP
15
1
2
3
PL501
1UH_FDSD0630-H-1R0M-P3_11A_20%
2
1
PHASE
16
DL_1.5V
17
1
SW_1.5V
PC507
10U_0805_6.3V6K
+0.75VSP
4
PQ501
AON7408L
+1.5V
9
2
1
2
BOOT_1.5V
PC506
0.22U_0402_10V6K
1
5
@
PR504
1
2
2.2_0402_5%
DH_1.5V_1
PC503
4.7U_0805_25V6-K
1
2
PC502
10U_0805_25V6K
1
2
PC505
2200P_0402_50V7K
1
2
PC504
0.1U_0402_25V6
PC516
680P_0603_50V7K
2
1
BST_1.5V
@
1
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A
PL502
HCB1608KF-121T30_0603
1
2
B+
3
10
D
4
EN_0.75VSP
1
Note: S3 - sleep ; S5 - power off
@ PC514
0.1U_0402_10V7K
2
B
PJP501
1
39,41,45,46,47 SUSP#
2
B
PR510
0_0402_5%
2
1
1
PAD-OPEN 4x4m
PJP502
2
+1.5V (9A,360mils
,Via NO.= 18)
+0.75VS (2A,80mils
@ PC515
0.1U_0402_10V7K
,Via NO.= 4)
2
1
+1.5VP
PAD-OPEN 4x4m
PJP503
+0.75VSP
1
2
PAD-OPEN 3x3m
A
A
Compal Secret Data
Security Classification
Issued Date
2010/07/20
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Monday, February 13, 2012
Date:
Rev
B
4019G8
5
4
3
2
Sheet
1
47
of
61
3
2
1
PL702
HCB1608KF-121T30_0603
2
1
1
PC711
680P_0603_50V7K
5
B+
D
@
2
PC702
10U_0805_25V6K
2
1
2
1
PR712
100K_0402_1%
PC705
2200P_0402_50V7K
2
1
1
+3VS
D
PC704
0.1U_0402_25V6
2
1
+1.05VSP_B+
2
4
PC703
10U_0805_25V6K
5
49
PR703
PC706
4.7_0402_5%
0.22U_0402_10V6K
1
2 BST1_+1.05VSP 1
2
+V1.05S_VCCP_PWRGOOD
PQ701
AON7518
4
PU701
BST_+1.05VSP
10
DRVH
9
UG_+1.05VSP
3
EN
SW
8
SW_+1.05VSP
FB_+1.05VSP
4
VFB
V5IN
7
RF_+1.05VSP
5
TST
DRVL
6
PR711
1
2
0_0402_5%
UG_+1.05VSP1
PL701
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1
2
@ PC710
1000P_0402_50V7K
1
2
+1.05VSP1
@ PR709
1.2K_0402_1%
1
2
2
C
+1.05VSP
PR701
4.99K_0402_1%
2
1
PC701
2
PC766
.1U_0402_16V7K
1
PQ702
MDU1512RH
3
2
1
2
4
C
2
PC707
1U_0603_10V6K
1SNUB_+1.05VSP
2
TPS51212DSCR_SON10_3X3
+
PR706
4.7_1206_5%
330U_D2_2.5VY_R15M
1
11
2
1
1
TP
PR707
470K_0402_1%
2
@ PC708
0.1U_0402_16V7K
+1.05VSP
1
+5VALW
LG_+1.05VSP
1
39,41,45,46,48 SUSP#
VBST
TRIP
EN_+1.05VSP
PR705
0_0402_5%
1
2
PGOOD
2
5
1
TRIP_+1.05VSP
3
2
1
PR704
80.6K_0402_1%
1
2
PC709
680P_0402_50V7K
PR708
100_0402_1%
2
1
VCCIO_SENSE 8,46
2
VCCIO_SENSE1
1
PR702
10K_0402_1%
PJP701
1
2
PAD-OPEN 4x4m
PJP702
1
+1.05VSP
B
+1.05VS (12A,480mils
2
,Via NO.= 24)
B
PAD-OPEN 4x4m
PJP606
1
2
PAD-OPEN 4x4m
PJP607
1
+1.05VSP
2
+VCCP
PAD-OPEN 4x4m
A
A
Compal Secret Data
Security Classification
Issued Date
2010/07/20
Deciphered Date
2012/12/31
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Monday, February 13, 2012
Date:
Rev
B
4019G8
5
4
3
2
Sheet
1
48
of
61
5
4
3
2
1
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
VID [0]
0
0
1
1
D
VID[1]
0
1
0
1
VCCSA Vout
0.9V
0.8V
0.725V
0.675V
D
2
output voltage adjustable network
1
@ PC805
680P_0402_50V7K
2
SNUB_+VCCSA
+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A
1
@ PR801
4.7_1206_5%
PU801
SY8037BDCC_DFN12_3X3
12 PVIN
LX 1
LX
PG
4
VOUT
EN
5
VID1
VID0
PR804
100K_0402_5%
2
1
3
FB
39 SA_PGOOD
6
+VCCSA_EN
1
2
PR806
0_0402_5%
1
2
PR805
1K_0402_5%
1
2
PR802
1K_0402_5%
1
2
+3VS
48
PC804
22U_0805_6.3V6M
1
2
SVIN
7
1
9
8
+VCCSAP_FB
2
+VCCSAP
2
PC803
22U_0805_6.3V6M
1
2
10
LX
13
1
2
PC820
22U_0805_6.3V6M
1
2
PC819
22U_0805_6.3V6M
1
2
1
PC817
0.1U_0603_25V7K
2
PC818
2200P_0402_50V7K
C
PVIN
PC802
22U_0805_6.3V6M
1
2
11
PC815
68P_0402_50V8J
PL801
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1
2
+VCCSA_PHASE
PC801
22U_0805_6.3V6M
1
2
+VCCSA_PWR_SRC
PC809
0.1U_0402_10V7K
PL803
HCB1608KF-121T30_0603
1
2
GND
+5VALW
C
PR812
100_0402_5%
2
1
+V1.05S_VCCP_PWRGOOD
@
PR811
0_0402_5%
2
1
+VCCSA_SENSE 9
H_VCCSA_VID0 9
H_VCCSA_VID1 9
PJP801
+VCCSAP
B
1
2
+VCCSA
B
PAD-OPEN 4x4m
A
A
Compal Secret Data
Security Classification
Issued Date
2010/07/20
Deciphered Date
2012/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
1
Sheet
49
of
61
5
4
3
2
1
HF: 3.3n
3P: 3.3n
2P: 33n
HF: 24K
2P: 24K
1P: 24.9K
BST3
1
LG3 51
BST2
HG2 51
LG1 51
HG1 51
BST1
PR257
806_0402_1%
DROOP
PC251
1
2
CSREF
1000P_0402_50V7K
3P: 806
2P: 1K
1
2
TSENSE
BST1_1 1
2
2.2U_0603_10V7K
2
0_0402_5%
Option for
1 phase GFX
+5VS
CSP2A
SW1 51
PC238
0.22U_0402_10V6K
1
1
CSP3
SWN3 51
3P: install
2P: @
PR2462
6.65K_0402_1%
B
SWN2 51
PC268
1
1
1
2
PR262
75K_0402_1%
2
1500P_0402_50V7K
2
330P_0402_50V7K
1
2
PR255
165K_0402_1%
2 PR251 1
1
2
@ PR276
@PR276
0_0402_5%
CSREF
1
PR2582
6.65K_0402_1%
PC248
0.047U_0402_16V7K
1
PR2612
59K_0603_1%
100K_0402_1%_TSM0B104F4251RZ
PR2532
59K_0603_1%
SWN2
1
PR2562
59K_0603_1%
SWN3
PUT CLOSE
TO VCORE
HOT SPOT
HF: 59K
3P: 143K
2P: 143K
220K_0402_5%_ERTJ0EV224J
PUT CLOSE
TO VCORE
Phase 1
Inductor
Issued Date
A
HF: 330p
3P: 330p
2P: 220p
Compal Secret Data
Security Classification
2009/12/01
2010/12/31
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
4
PH202
SWN1
1
3P: install
2P: @
1
SWN1 51
2
PC260
0.047U_0402_16V7K
1
2
CSCOMP
CSP1
HF: 1500p
3P: 1500p
2P: 1500p
3Phase: @
2Phase: install
TSENSE
2
2
@ PR275
@PR275
0_0402_5%
PC243
1000P_0402_50V7K
A
5
@PR264
@PR264
0_0402_5%
2
PR2392
6.65K_0402_1%
PC265
0.047U_0402_16V7K
1
CSREF
CSSUM
2
2
+5VS
1
2
@ PR274
@PR274
0_0402_5%
1
CSP3
2Phase: @
1Phase: install
@PR231
@PR231
0_0402_5%
2
Option for
2 phase CPU
CSREF
PH201
1
+5VS
CSREF 51
PC258
.1U_0402_16V7K
HF: 3.65K
3P: 3.65K
2P: 806
1
C
SW3 51
3P: 73.2K
2P: 41.2K
DRVEN 51
HF: 4700P
3P: 1200p
2P: 1200p
PC247
1
2
3.65K_0402_1%
3P: 23.7K
2P: 24.9K
2
PR2362
73.2K_0402_1%
PC245
1
PR265
PR233
2.2_0603_5%
3P: 21K
2P: 12.4K
1
2
2
2
HF: 10K
3P: 10K
2P: 8.06K
1
2
0_0402_5%
PR279
.1U_0402_16V7K
CSP1
CSP2
CSP3
PR249
PC256
2
1COMP_CPU1
2
1
2.74K_0402_1%
4700P_0402_16V7K
HF: 2.74K
PR252
1
PC266
22P_0402_50V8J
1
23.7K_0402_1%
10K_0402_1%
1
2
3P: 6.04K
2P: 6.34K
PR260
0.033U_0402_16V7K
1
PC242
1
2FB_CPU3 1
2
10_0402_1%
0.033U_0402_16V7K
PR263
FB_CPU2
1
2
CSCOMP
LG2 51
1
6132P_VCCP
PC254
1
2
PR250
PR247
PC262
1
2FB_CPU1 1
2
49.9_0402_1%
330P_0402_50V7K
PR248
TRBST#
PC263
PC267
2
0.22U_0402_10V6K
SW2 51
CSP2
PR259
1
2
1K_0402_1%
PUT CLOSE
TO V_GT
HOT SPOT
PR222
PC241
2 BST3_1 1
2
2.2_0603_5%
0.22U_0402_10V6K
PR2262 BST2_1 1
1
2.2_0603_5%
100K_0402_1%_TSM0B104F4251RZ
6132_PWM 51
1
2
21K_0402_1%
HF: 22p
3P: 10p
2P: 10p
B
HF: 330p
3P: 560p
2P: 470p
SWN2A 51
2P: 36K
1P: 26.1K
HG3 51
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PC246
1000P_0402_50V7K
VSP
TRBST#
FB_CPU
COMP_CPU
IMON
ILIM_CPU
DROOP
1
2
PR254
1
2
0_0402_5%
8 VCCSENSE
VSN
2
PR218
6.98K_0402_1%
PH204
1
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
VCC
PWMA
VDDBP
BSTA
VRDYA
HGA
EN
SWA
SDIO
LGA
ALERT#
BST2
SCLK
HG2
VBOOT
NCP81012BMNR2G_QFN60_7X7 SW2
ROSC
LG2
VRMP
PVCC
VRHOT#
PGND
VRDY
LG1
VSN
SW1
VSP
HG1
DIFF
BST1
5,14 VGATE
PR237
1
2
0_0402_5%
1
6132_PWMA 51
1
8 VSSSENSE
2P: install
1P: @
2
PR220
1
2
36K_0402_1%
2
2
39 VR_HOT#
SWN1A 51
1
2
CSP2A
CSP1A
TSENSEA
CSP2A
1
1
PR235
10K_0402_5%
PC249
0.047U_0402_16V7K
2
PR230
1K_0402_1%
6.98K_0402_1%
2
2
2
PR234
75_0402_1%
1
2
3
VR_ON_CPU
4
VR_SVID_DAT1 5
PR227
VR_SVID_ALRT# 6
VR_SVID_CLK
10K_0402_1%
7
VBOOT
8
1
2
ROSC_CPU
9
2
VRMP
10
VR_HOT#
11
VGATE
12
13
14
DIFF_CPU
15
1
PC271
47P_0402_50V8J
CPU_B+
+3VS
1
+VCCP
PR232
51.1K_0402_1%
1
1
2
1
1PR215
2
21.5K_0402_1%
CSCOMPA
DIFFA
TRBSTA#
FBA
COMPA
IMONA
ILIMA
DROOPA
2VR_SVID_DAT1
0_0402_5%
6132_VCC
PR228
0_0402_5%
1
2
39 VR_ON
PR213
1
TSENSEA
PU201
PC239
0.01U_0402_25V7K
2
1
PR266
PC270
.1U_0402_16V7K
@ PR278
0_0402_5%
.1U_0402_16V7K
PAD
VSNA
VSPA
DIFFA
TRBSTA#
FBA
COMPA
IOUTA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA
1
1
2
PR224
2
54.9_0402_1%
1
8 VR_SVID_DAT
8 VR_SVID_ALRT#
8 VR_SVID_CLK
1
2
2
PR223
PC269
.1U_0402_16V7K
130_0402_1%
1
PC259
2.2U_0603_10V7K
1
2
CSREFA
TRBST#
FB
COMP
IOUT
ILIM
DROOP
CSCOMP
CSSUM
CSREF
CSP3
CSP2
CSP1
TSNS
DRVEN
PWM
+5VS
+VCCP
C
CSP1A
PC264
1
2
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
PR221
2_0603_5%
1
2
HF: 28.7K
2P: 66.5K
1P: 66.5K
CSREFA 51
CSSUMA
2
1
PC237
1000P_0402_50V7K
9 VSS_AXG_SENSE
PC257
1000P_0402_50V7K
PC255
0.047U_0402_16V7K
PR216
2
28.7K_0603_1%
HF: 21.5K , 2P: 21.5K , 1P: 15.8K
9 VCC_AXG_SENSE
@ PR277
0_0402_5%
1
SWN1A
2
CSREFA
1000P_0402_50V7K
13.7K_0402_1%
CSREFA
28.7K_0603_1%
1 PR212
PC235
1
2
DROOPA
HF: 1.65K
2P: 1.65K
1P: 1K
2P: install
1P: @
2
4700P_0402_16V7K
SWN2A
2
1
1 PR211
2
2.74K_0402_1%
PR209
1K_0402_1%
165K_0402_1%
PC252
COMPA1 1
2
2
PR206
2
1
1
1
1.65K_0402_1%
1
2
CSCOMPA
2
PR210
1
2 22P_0402_50V8J
PH203
220K_0402_5%_ERTJ0EV224J
NTC_PH203
1
1
1
2 PR207
2
PC244
D
13.7K_0402_1%
PR202
24K_0402_1%
PC240
330P_0402_50V7K
FBA2
1
2
2
HF: 1.15K
3P: 1.15K
2P: 8.06K
2
1
PR208
10_0402_1%
1
2
1
PC236
0.033U_0402_16V7K
1
1
PR204
2.1K_0402_1%
1
2
FBA1
2
PR203
1.15K_0402_1%
1
2
TRBSTA#
PC261
1
2
D
PR205
1
2
75K_0402_1%
PC253
.1U_0402_16V7K
1
2
PUT CLOSE
TO GT
Inductor
PC250
1
2
PC214
3300P_0402_50V7K
FBA3
1
2
HF: 22p
2P: 10p
1P: 10p
HF: 4700p
2P: 3300p
1P: 1500p
560P_0402_50V7K
HF: 2.74K
2P: 5.11K
1P: 5.11K
1500P_0402_50V7K
PR201
10_0402_1%
1
2
HF: 2.1K
3P: 2.1K
2P: 806
3
2
Rev
B
4019G8
Monday, February 13, 2012
Sheet
1
50
of
61
5
4
3
2
1
PC283
2200P_0402_25V7K
2
1
PC282
0.1U_0402_25V6
2
1
PC204
10U_0805_25V6K
2
1
PQ212
AON7518
PC203
10U_0805_25V6K
2
1
5
4
3
2
1
4
+VCC_CORE
PL201
0.15UH 20% PCMB104T-R15MS0R485 40A
1
4
+VCC_CORE
D
PL202
0.15UH 20% PCMB104T-R15MS0R485 40A
1
4
50 SW2
3
2
5
2
1
5
1
50 SW1
PR292
2.2_0603_5%
1
2
50 HG2
PQ203
AON7518
5
PC281
2200P_0402_25V7K
2
1
PC280
0.1U_0402_25V6
2
1
PC202
10U_0805_25V6K
2
1
PC201
10U_0805_25V6K
2
1
5
CPU_B+
3
2
1
D
3
2
1
4
3
2
1
4
PQ211
AON7518
PR291
2.2_0603_5%
1
2
50 HG1
PQ201
AON7518
5
CPU_B+
1
CSREF 50
PQ204
FDMS0308AS
4
50 LG2
10_0402_1%
SWN1 50
PC284
PR283
V2N_CPU 2
SNUB_CPU2
V1N_CPU 2
3
2
1
3
2
1
2
PR282
1SNUB_CPU1
2
PQ202
FDMS0308AS
4
50 LG1
3
PR281
4.7_1206_5%
PR280
4.7_1206_5%
1
CSREF 50
10_0402_1%
SWN2 50
1
2
680P_0402_50V7K
PL206
HCB2012KF-121T50_0805
2
1
PC292
2200P_0402_25V7K
2
1
1
1
PC299
10U_0805_25V6K
PL204
0.15UH 20% PCMB104T-R15MS0R485 40A
1
4
1
5
2
+
2
2
PC212
100U_25V_M
3
C
QC 45W CPU
solution: 3+2
MOS: cpu_core -- & gt; 上1(AON7518)下1(FDMS0308AS)
Gfx_core -- & gt; 上1(AON7518)下1(FDMS0308AS)
2
PR268
4.7_1206_5%
QC 45W CPU (HF)
solution: 3+2
MOS: cpu_core -- & gt; 上2(AON7518)下1(FDMS0308AS)
Gfx_core -- & gt; 上2(AON7518)下1(FDMS0308AS)
DC 35W CPU
VID1=1.05V
IccMax=53A
Icc_Dyn=43A
Icc_TDC=33A
R_LL=1.9m ohm
OCP~65A
QC 45W CPU
VID1=0.9V
IccMax=94A
Icc_Dyn=66A
Icc_TDC=56A
R_LL=1.9m ohm
OCP~110A
+VCC_CORE
50 SW3
CPU_B+
1
+
PC211
100U_25V_M
2
PC291
0.1U_0402_25V6
2
1
PC208
10U_0805_25V6K
2
1
PC207
10U_0805_25V6K
2
1
PL207
HCB2012KF-121T50_0805
2
1
PQ213
AON7518
5
4
3
2
1
4
3
2
1
50 HG3
C
PQ207
AON7518
5
PR293
2.2_0603_5%
1
2
680P_0402_50V7K
2
B+
CPU_B+
PC285
1
3
2
1
SNUB_CPU3
PQ206
FDMS0308AS
4
50 LG3
V3N_CPU 2
PR2711
DC 35W CPU
solution: 2+1
MOS: cpu_core -- & gt; 上1(AON7518)下1(FDMS0308AS)
Gfx_core -- & gt; 上1(AON7518)下1(FDMS0308AS)
CSREF 50
10_0402_1%
PC296
SWN3 50
2
680P_0402_50V7K
50 DRVEN
1SNUB_GFX1
2
3
2
1
PQ208
FDMS0308AS
+5VS
2 PR287
2
2 PR267 1EN_GFX2 3
2K_0402_1%
4
1VCC_GFX2
2
1
PR273
PR290
0_0402_5%
0_0402_5%
1
CSREFA 50
10_0402_1%
PWM
VCC
7
6
PQ215
AON7518
PQ209
AON7518
3
2
1
3
PR269
4.7_1206_5%
4
PQ210
FDMS0308AS
SWN1A 50
PC290
PC294
2200P_0402_25V7K
2
1
+VCC_GFXCORE_AXG
2
NCP5911MNTBG_DFN8_2X2
LG2A
50 CSREFA
PR270
2
1
10_0402_1%
SWN2A 50
1
2
680P_0402_50V7K
B
PL205
0.15UH 20% PCMB104T-R15MS0R485 40A
1
4
5
PC298
2.2U_0603_10V7K
PC293
0.1U_0402_25V6
2
1
5
5
SW2A
SW
GND
DRVL
EN
3
2
1
DRVH
HG2A
4
V2N_GFX
PR286
4.7_1206_5%
4
1
2
PC287
0.1U_0402_25V6
2
1
PC206
10U_0805_25V6K
2
1
PC205
10U_0805_25V6K
2
1
PQ214
AON7518
NCP5911MNTBG_DFN8_2X2
PC289
2.2U_0603_10V7K
50 6132_PWM
3
8
PR295
0_0603_5%
1
2
1
DRVL
2
LG1A
9
2
6
5
FLAG
SNUB_GFX2
GND
2
BST
5
VCC
4
PU203
1
1
EN
4
PC295
0.22U_0402_10V6K
3
2
1
1
2
5
SW1A
BSTA2_1
2
+VCC_GFXCORE_AXG
1
SW
7
3
1 PR288
2.2_0603_5%
PL203
0.15UH 20% PCMB104T-R15MS0R485 40A
1
4
5
1EN_GFX1
50 DRVEN
2K_0402_1%
2
1VCC_GFX1
2
1
PR272
PR289
0_0402_5%
0_0402_5%
+5VS
2
5
PR294
0_0603_5%
HG1A 1
2
BSTA2
2
8
PC288
2200P_0402_25V7K
2
1
9
DRVH
PR285
V1N_GFX
FLAG
PWM
4
3
2
1
BST
2
4
3
2
1
1
PQ205
AON7518
1
2
PU202
0.22U_0402_10V6K
BSTA1_1
PC286
50 6132_PWMA
PC209
10U_0805_25V6K
2
1
PR284
1
2
2.2_0603_5%
BSTA1
2Phase: install
1Phase:: @
PC210
10U_0805_25V6K
2
1
CPU_B+
CPU_B+
B
PC297
2
680P_0402_50V7K
A
A
QC 45W GT2
VID1=1.23V
IccMax=46A
Icc_Dyn=37A
Icc_TDC=38A
R_LL=3.9m ohm
OCP~55A
DC 35W GT2
VID1=1.23V
IccMax=33A
Icc_Dyn=20.2A
Icc_TDC=21.5A
R_LL=3.9m ohm
OCP~40A
Compal Secret Data
Security Classification
Issued Date
2009/12/01
Deciphered Date
2010/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
51
of
61
5
4
+VCC_CORE
3
+VCC_CORE
2
1
Below is 458544_CRV_PDDG_0.5 Table 5-8.
+VCC_GFXCORE_AXG
PC1105
10U_0805_6.3V6M
+
2
@
1
+
PC765
PC765
2
1
2
330U_D2_2V_Y
2
+
1
PC761
22U_0805_6.3V6M
2
2
2
2
1
1
1
1
2
1
PC1126
22U_0805_6.3V6M
+
1
2
PC764
2
2
1
2
1
330U_D2_2V_Y
PC1125
22U_0805_6.3V6M
2
+
1
2
PC763
1
1
2
1
PC760
22U_0805_6.3V6M
2
PC759
22U_0805_6.3V6M
22U_0805_6.3V6M
2
2
330U_D2_2V_Y
330U_D2_2V_Y
PC1124
22U_0805_6.3V6M
2
PC758
22U_0805_6.3V6M
22U_0805_6.3V6M
2
2
PC762
PC1123
22U_0805_6.3V6M
2
2
1
2
C
PC1166
2
1
+
PC1165
PC1165
PC1122
22U_0805_6.3V6M
2
330U_D2_2V_Y
2
1
1
330U_D2_2V_Y
PC1121
22U_0805_6.3V6M
1
2
2
1
PC1120
22U_0805_6.3V6M
PC1164
2
1
2
PC1119
22U_0805_6.3V6M
330U_D2_2V_Y
1
2
PC1118
22U_0805_6.3V6M
1
1
1
22U_0805_6.3V6M
2
PC1117
22U_0805_6.3V6M
1
1
+VCCP
1
1
PC757
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
1
PC756
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1115
22U_0805_6.3V6M
1
PC755
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
PC754
22U_0805_6.3V6M
2
PC1116
22U_0805_6.3V6M
1
1
PC753
PC753
22U_0805_6.3V6M
C
1
+VCCP
PC752
PC752
22U_0805_6.3V6M
PC1114
22U_0805_6.3V6M
2
1
2
PC1162
22U_0805_6.3V6M
2
2
1
PC751
PC751
22U_0805_6.3V6M
PC1113
22U_0805_6.3V6M
PC1161
22U_0805_6.3V6M
2
2
1
PC1158
PC1158
22U_0805_6.3V6M
PC1112
22U_0805_6.3V6M
2
1
1
PC1160
22U_0805_6.3V6M
2
1
2
1
PC1157
22U_0805_6.3V6M
PC1111
22U_0805_6.3V6M
1
PC1159
22U_0805_6.3V6M
2
1
2
1
PC1156
22U_0805_6.3V6M
1
2
1
D
PC1155
22U_0805_6.3V6M
2
+VCC_CORE
1
PC1154
22U_0805_6.3V6M
1
PC1110
10U_0805_6.3V6M
PC1153
22U_0805_6.3V6M
PC1109
10U_0805_6.3V6M
PC1152
22U_0805_6.3V6M
PC1108
10U_0805_6.3V6M
PC1151
22U_0805_6.3V6M
PC1107
10U_0805_6.3V6M
7 x 22 µF (0805)
2 x (0805) no-stuff
sites
+VCC_GFXCORE_AXG
D
PC1106
10U_0805_6.3V6M
5 x 22 µF (0805)
5 x (0805) no-stuff
sites
1
PC1104
10U_0805_6.3V6M
2
PC1103
10U_0805_6.3V6M
2
2
2
1
1
1
1
2
PC1102
10U_0805_6.3V6M
Socket Bottom
Socket Top
PC1101
10U_0805_6.3V6M
@
2
+VCC_CORE
Chief River
1
+
1
+
PC1127
330U_D2_2V_Y
2
2
@
PC1128
330U_D2_2V_Y
1
+
2
1
PC1129
330U_D2_2V_Y
+
@
PC1130
330U_D2_2V_Y
2
330uF*9m
470uF*4.5m
22uF
10uF
16
10
1
+
PC1131
330U_D2_2V_Y
8layer for DC CPU
2
4
B
B
8layer for QC CPU
5
16
10
6layer for DC CPU
5
16
10
6layer for QC CPU
4
16
10
1
GFX_CORE DC
2
12
GFX_CORE QC
3
12
1.05V_VCCP
2
12
A
A
Compal Secret Data
Security Classification
2008/09/15
Issued Date
Deciphered Date
2012/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
Sheet
1
52
of
61
A
B
C
D
PC971
10U_0805_25V6K
2
1
2
1
PC908
10U_0805_25V6K
1
PC907
10U_0805_25V6K
1
2
2
+
2
VSUM+_VGA ISEN2_VGA
1
+
2
1
+
2
PC910
330U_D2_2V_Y
1
PC904
330U_D2_2V_Y
1
PR909
1_0402_1%
2
1
V2N_VGA
3
PR908
10K_0402_1%
2
+VGA_CORE
VSUM-_VGA
2
PC940
680P_0402_50V7K
2
PC903
330U_D2_2V_Y
3
2
1
PR918
100K_0402_5%
1
2
+3VS
PR907
3.65K_0805_1%
2
1
1
PR906
4.7_1206_5%
4
SNUB2_VGA 2
LGATE2_VGA
@ PD901
RB751V-40TE17_SOD323-2
2
1
2
1P: @
2P: 100K
LF2_VGA
PQ904
FDMS0309S_POWER56-8-5
PR915
1.91K_0402_1%
29,39 VGA_PWROK
PL902
0.36UH_FDUM0640J-H-R36M-P3_22A_20%
1
4
1
GPU_VID6
GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID0
1
CLK_ENABLE#_VGA
1
1P : @
2P: install
3
2
1
PR911
2.2_0603_5%
2
1 UGATE2_VGA1
UGATE2_VGA
PHASE2_VGA
1P: @
2P: 1.91K
PR910
1.91K_0402_1%
1
2
HW端有PULL
PR904
PC938
2.2_0603_5%
0.22U_0603_10V7K
2
1BOOT2_2_VGA 1
2
DPRSLPVR_VGA
2
10K_0402_1%
+3VS
BOOT2_VGA
5
1
20
20
20
20
20
20
2
.1U_0402_16V7K
B+
@ PQ905
AON7518
4
3
2
1
1
4
GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID0
VRON_VGA
PC939
PR905
PQ903
AON7518
1
PR903
150K_0402_1%
1
2
15,20,29 DGPU_PWR_EN
PL903
HCB2012KF-121T50_0805
1
2
PL904
HCB2012KF-121T50_0805
1
2
PC937
2200P_0402_50V7K
2
PR902
0_0402_5%
5
5
2
PR917
68K_0402_1%
2
1
1
1P : @
2P: install
1
PC936
0.1U_0402_25V6
+VGA_B+
@
3
2
1
3
2
1
PQ901
AON7518
PC927
22U_0805_6.3V6M
2
1
PC926
47U_0805_6.3V6M
PC935
4.7U_0603_6.3V6M
PC933
4.7U_0603_6.3V6M
2
1
2 @
PC934
4.7U_0603_6.3V6M
2
1
PC928
22U_0805_6.3V6M
PC929
22U_0805_6.3V6M
1
PC906
10U_0805_25V6K
1
2
PC905
10U_0805_25V6K
1
2
1
2
PL901
0.36UH_FDUM0640J-H-R36M-P3_22A_20%
1
4
2
NTC_VGA
3
@ PQ906
AON7518
5
PHASE1_VGA
+VGA_CORE
V1N_VGA
3
2
1
+
2
PC902
330U_D2_2V_Y
+
2
1
1
1
PR939
1_0402_1%
PC901
330U_D2_2V_Y
SNUB1_VGA
3
2
1
2
1
PR938
10K_0402_1%
PR936
4.7_1206_5%
2
4
PQ902
FDMS0309S_POWER56-8-5
PR937
3.65K_0805_1%
2
1
1
LF1_VGA
LGATE1_VGA
1P : @
2P: install
VSUM+_VGA ISEN1_VGA
VSUM-_VGA
1
PC961
680P_0402_50V7K
4
2
VSUM-_VGA
PC962
0.1U_0402_16V7K
20W
solution:1P
OCP:38A
25W ~30W
solution:2P
OCP:75A
Compal Secret Data
Security Classification
Issued Date
2008/09/15
Deciphered Date
2012/12/31
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A
2 @
PC932
4.7U_0603_6.3V6M
2
1
PC931
4.7U_0603_6.3V6M
2
1
1
2
4
PC953
2200P_0402_50V7K
4
PC952
0.1U_0402_25V6
1
5
2
UGATE1_VGA1
PC954
0.22U_0603_10V7K
1
2
Layout Note:
Place near Phase1 Choke
1
1P: 0.1uF
2P: 0.22uF
2
1
VGA的電容用料 (20W ~ 35W的bulk cap都用330uF_9m * 4)
35W-- & gt; 5 * 0.1uF +15 * 4.7u + 22u * 3 + 330_9m * 4
2
@
2
1P: 866
2P: 1.58K
PR934
2.2_0603_5%
2
1 BOOT1_1_VGA
PH901
10K_0402_1%_TSM0A103F34D1RZ
PR943
1.58K_0402_1%
1
2
1P: @
1
@
5
PR916
2.2_0603_5%
2
1
UGATE1_VGA
PR933
2.61K_0402_1%
2
1
PR941
11K_0402_1%
2
1
PC957
0.022U_0603_25V7K
2
1
PC956
0.22U_0603_10V7K
2
1
1
PR942
10_0402_5%
1
2
PR932
82.5_0402_5%
2
1
2
PC959
330P_0402_50V7K
2
1
@
VSUM_VGA_N001
1
2
2
PR940
0_0402_5%
1
2
PC958
0.01U_0402_50V7K
1
@ PC955
330P_0402_50V7K
Near VGA Core
+VGA_B+
1P: 68nF
2P: 0.022uF
@
PC930
22U_0805_6.3V6M
PC919
4.7U_0603_6.3V6M
PC911
4.7U_0603_6.3V6M
2
1
PC918
4.7U_0603_6.3V6M
@
PC964
0.1U_0402_10V7K
@
2
@
PC963
0.1U_0402_10V7K
2
1
PC925
4.7U_0603_6.3V6M
2
1
PC917
4.7U_0603_6.3V6M
2
1
@
PC970
0.1U_0402_10V7K
2
1
PC922
4.7U_0603_6.3V6M
2
1
PC924
4.7U_0603_6.3V6M
2
1
PC916
4.7U_0603_6.3V6M
2
1
PC915
4.7U_0603_6.3V6M
2
1
PC967
0.1U_0402_10V7K
2
1
@
PC969
0.1U_0402_10V7K
2
1
PC921
4.7U_0603_6.3V6M
2
1
PC914
4.7U_0603_6.3V6M
2
1
@
PC966
0.1U_0402_10V7K
2
1
PC920
4.7U_0603_6.3V6M
2
1
PC913
4.7U_0603_6.3V6M
2
1
PC965
0.1U_0402_10V7K
2
1
1
2
1
PC923
4.7U_0603_6.3V6M
2
1
@
1
+5VS
VSUM+_VGA
PC960
0.01U_0402_25V7K
2
PR935
0_0402_5%
4
2
+VGA_B+
1_0402_5%
2
PC951
0.22U_0603_25V7K
PC950
1U_0603_10V6K
2
1
1
2
1
2
0_0402_5%
PC912
4.7U_0603_6.3V6M
2
1
1
2
+5VS
1
PC968
0.1U_0402_10V7K
2
1
1
2
0_0402_5%
2
+VGA_CORE
+5VS VSUM-_VGA
2
1
22 VSSSENSE_VGA
+5VS
PC943
1U_0603_10V6K
1P: @
2P: 0.22u
1
2
0_0402_5%
PR921
PR929 1
PC949
0.22U_0402_10V6K
2
2
PR930
249K_0402_1%
@ PR944
0_0402_5%
1
VDD_VGA
IMON_VGA
1
PR925
1
2
VCCP_VGA
PR927
ISEN1_VGA
PR931
10_0402_5%
22 VCCSENSE_VGA
ISL62883CHRTZ-T_TQFN40_5X5
VIN_VGA
1P: install
2P: @
+VGA_CORE
PR920
VCCP_VGA1
1
2
0_0402_5%
BOOT1_VGA
1P: 120K
2P: @249K
VSEN_VGA
ISEN2_VGA
2
PR928
267K_0402_1%
@ PR945
0_0402_5%
2
1
2
2FB2_VGA
1
PR926
3.48K_0402_1%
1
2
1
1
11
12
13
14
15
16
17
18
19
20
680P_0402_50V7K
PC946
47P_0402_50V8J
1
2
PC947
150P_0402_50V8J
AGND
PR924
PC945
499_0402_1%
1
2FB1_VGA
1
2
30
29
28
27
26
25
24
23
22
21
ISEN1
VSEN
RTN
ISUMISUM+
VDD
VIN
IMON
BOOT1
UGATE1
PC944
1000P_0402_50V7K
1
2
PR923
8.06K_0402_1%
2
1
PR922
249K_0402_1%
1
2
@
41
@ PC942
22P_0402_50V8J
BOOT2
UGATE2
PHASE2
VSSP2
LGATE2
VCCP
PWM3
LGATE1
VSSP1
PHASE1
PGOOD
PSI#
RBIAS
VR_TT#
NTC
VW
COMP
FB
ISEN3
ISEN2
2
RBIAS_VGA
PSI#_VGA
2
PH902
470K_0402_5%_TSM0B474J4702RE
1
2
3
4
5
6
7
8
9
10
RTN_VGA
ISUM-_VGA
1
VGA_VR_TT#
NTC_MOSFET_VGA
VW_VGA
COMP_VGA
FB_VGA
1
2 ISEN3_VGA
1
PR914
11.3K_0402_1%
1
2NTC_MOS_VGA
PC948
0.22U_0402_10V6K
20 ACIN_BUF
Under VGA Core
PC941
1U_0603_10V6K
1
2
1P : @
2P: install
CLK_EN#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PU901
PR913
0_0402_5%
1
2
40
39
38
37
36
35
34
33
32
31
PR912
100K_0402_5%
1
2
+3VS
3
+VGA_CORE
PR919
47K_0402_1%
2
1
2
B
C
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
D
Sheet
53
of
61
5
4
3
2
1
Power block
CPU OTP
Page 56
Turn Off
D
Input
Switch Page 57
DC IN
D
B+
+3VALWP: TDC:6A
+5VALWP: TDC:6.1A
RT8205LZQW(2) WQFN
CHARGER
CC:0A~3.64A
CV:12.6V(6cell)
BQ24725RGRR
+1.8VP: TDC:1.2A
SY8033BDBC
Always
Page 52
SUSP#
Page 59
Page 57
C
Page 60
+V1.05SP: TDC:7.9A
TPS51212DSCR
Battery
Page 61
SUSP#
+1.5VP: TDC:16A
TPS51212DSCR
DGPU_PWR_EN
B
+VGA_CORE
TDC:23A
TPS51212DSCR
+VCC_CORE
TDC: 52A
ISL95832HRTZ-T
VR_ON
+VCC_GFXCORE_AXG
TDC: 38A
ISL95832HRTZ-T
VR_ON
A
C
SUSP#
+VCCPP: TDC:8.5A
TPS51212DSCR
SYSON
Page 62
B
+0.75VSP: TDC:2A
APL5331KAC-TRL
Page 65
+VCCSAP: TDC:4.2A
TPS51461RGER
+3VALW
Page 62
+V1.05S_VCCP_PWRGOOD
Page 63
Page 64
A
Page 64
Compal Secret Data
Security Classification
2010/08/03
Issued Date
2012/12/31
Deciphered Date
Title
Compal Electronics, Inc.
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
54
of
61
5
4
3
2
Version Change List ( P. I. R. List )
Item Page#
Title
Date
Request
Owner
1
Page 1
Issue Description
Solution Description
Rev.
D
D
C
C
B
B
A
A
Compal Secret Data
Security Classification
2008/09/15
Issued Date
2012/12/31
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Compal Electronics, Inc.
SCHEMATIC A8222
Document Number
Rev
B
4019G8
Monday, February 13, 2012
Sheet
1
55
of
61
5
4
3
2
1
Timing Diagram for G3 or S4-5/M-off (Suspend Well Off) to S0/M0 [non Deep S4/S5 Platform]
ACIN/BATT-IN
+5VALW/+3VALW
D
VCCSUS
(+5V_PCH/+3V_PCH)
D
PCH_RSMRST#
PM_SLP_SUS#
T3 & gt; 0ms
T5 & lt; 90ms
AC_PRESENT
PWRBTN_OUT#
T0 & gt; 16ms
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
T9 & gt; 30us
T10 & gt; 30us
C
C
CPU1.5V_S3_GATE
SUSP#
CPU1.5V_S3_GATE may come up before SUSP# and come down after SUSP#
T & gt; ?ms
+V1.05S_VCCP(CPU),
+V1.05S(VccASW)
T=?ms
T11 & gt; 1ms PCH_APWROK may come up anytime before PCH_PWROK, but not after PCH_PWROK assertion
PCH_APWROK
SA_PGOOD
T & gt; ?ms
VR_ON
T33 & lt; 5ms
CPU SVID BUS
50 & lt; T36 & lt; 2000us
+VCC_CORE
T37 & lt; 5ms
B
B
VGATE
PCH_PWROK
T14 & gt; 99ms
T20 & gt; 2ms
H_CPUPWRGD
T18 & gt; 0ms
PM_DRAM_PWRGD
2ms & lt; T17 & lt; 650ms
SYSTEM_PWROK
SM_DRAMPWROK
+1.8VS_VCCPLL
PLT_RST#
T43 & gt; 100ms
H_CPUPWRGD to PLT_RST# 1ms & lt; T25 & lt; 100ms
A
A
Color
Command
Signal Names
Timing of these signals is set by PCH or processor
Signal Names
Timing of these signals should be met by the platform (EC)
Signal Names
Timing of these signals is set by IntelR MVP
Signal Names
Voltage rails or chip-to-chip buses
Issued Date
COMPAL Electronics，Inc
Compal Secret Data
Security Classification
2011/08/23
Deciphered Date
2012/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
SCHEMATIC A8222
Size
4
3
2
Rev
B
4019G8
Date:
5
Document Number
Monday, February 13, 2012
1
Sheet
56
of
61
5
4
3
2
LA-8222P Version change list (P.I.R. List)
Item
Fixed Issue
Reason for change
Page 1 of 3 ( for HW internal reference only)
Rev.
PG#
14
D
ER01
HW Design
05
0.2
Modify List
Delete
Date
Un-stuff
R577, Stuff R576
09/21
For non AI co-lay
+3VS Leakage
HW Design
Add R745,R746 for non AI
0.2
37
09/21
0.2
12
13
40
Change R132/R134 PU power to +3V_SPI
Delete Q3.A/B
Add R135, R137
Delete R552, R556
09/21
09/21
AI parts change to AI@
HW Design
0.2
36
Swap U90.39/40 to U90.36/37 net
Change R1040 to 47K from 4.7K ohm
Add Reserve R1029
ER05
Design change for card reader
0.2
34
Add Q20,R773,R775
Reserve R768, R774
Change Card reader Conn
09/22
ER06
HW Design / VGA sequence
0.2
29
Change to Q3(AO3404L) from U22(AO4430L)
Change R433 to 0 ohm, R432 to 10K ohm
Un stuff C396
09/21
ER07
HW Design
0.2
36
Change R1049 to 330k
Change Q904 to AO3404L from AP2301GN
Delete R1046, Add R747
09/21
ER08
HW Design
0.2
42
Change Q33 to AO3413L from AP2301GN
09/21
ER09
HW Design
0.2
18
Add un stuff R290
09/23
ER04
C
Can`t detect USB30 (JUSB2)
(10/3 - follow K45 change Dual FET
location from Q63 to Q20)
C
ER10
Refer to ORB
0.2
05
Change R577.2 power rail from +3VS to +3V_PCH
10/04
ER11
Refer to ORB
0.2
13
Del R135, R137.
Change SML1CLK to PCH_SML1CLK
Change SML1DATA to PCH_SML1DATA
10/04
0.2
40
Del Y5 , C545 , C546
10/04
ER12
HW Design
ER13
Refer to purchaser suggestion
0.2
15
Replace R230 NR with R780-R783.
Replace R237 NR with R784-R787.
Replace R242 NR with R792, R793, R288.
10/04
ER14
B
Phase
R205
D
ER02
ER03
1
Refer to purchaser suggestion
0.2
29
31
42
Change C387, C389, C399, C447, C602 PN
10/04
0.2
40
Del U33.123 EC_CRY2 net name
10/04
Reserved for Instant-On function.
0.2
13
Add R750
10/04
EMC request to reserve these caps.
0.2
36
Add C1045-C1048
10/04
0.2
43-55
Update Power circuit (1003)
10/04
ER15
ER16
HW Design
B
DRAMRST_CNTRL_PCH signal timing
ER17
ER18
ER19
Instant-On function - DRAMRST control by PCH.
0.2
13
Un-stuff R157, Stuff R750
10/06
ER20
ME Design Change.
0.2
38
Change H16, H17, H22 screw hole type to 3P5.
(dGPU & VRAM)
10/07
0.2
43-55
Update Power circuit (1011) - Del PC1163.
10/11
0.2
14
un-stuff D2, Add R751
40
un-stuff D32, R547,
(10/06 - Change location from R1082
to R750,
And Change its tolerance from 1% to
5%).
ER21
ER22
Refer to ORB design
ER23
Fine-tune timing.
10/13
Add R752
Assign U33.18 to AC_PRESENT signal.
A
A
29
0.2
42
change R432 from 100R to 10K.
change R435 from 10R to 200R.
change R607 from 220R to 10R.
Compal Electronics, Inc.
Compal Secret Data
Security Classification
Issued Date
10/13
2011/09/23
2012/12/31
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
SCHEMATIC A8222
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
57
of
61
5
4
3
2
LA-8222P Version change list (P.I.R. List)
Item
Rev.
PG#
Follow to ORB
0.2
05
Un-stuff
change for GPU H/W strapping STRAP1 to PL 45K
ohm to enhanced the PCIe PEG driving.
0.2
22
Change R349 from 34.8K to 45.3K
10/13
Refer to Intel review feedback item 5.
0.2
09
Add R277 0R 0805 5%
10/13
ER27
Refer to Intel review feedback item 11.
0.2
09
Add 149
10/13
ER28
Refer to Intel review feedback item 33.
0.2
31
Revise SATA P/N signals.
10/13
ER29
Refer to Intel review feedback item 37.
0.2
18
Del L6, Add R289
10/13
ER30
Refer to Intel review feedback item 40.
0.2
17
Del L4, Add R293
10/13
ER31
Refer to Intel review feedback item 42.
0.2
42
Add R230
10/13
Refer to Intel review feedback item 43.
0.2
42
on Stuff R244
10/18
10/14
ER24
Modify List
Date
R576, Stuff 0R to R577.
ER32
10/13
C
Refer test report to fine-tune oscillation
frequency
Change Y2 P/N,
Change C163, C164 to 12pF.
0.2
20
Change Y3 P/N,
Change C901, C900 to 12pF.
0.2
32
Change Y4 P/N,
Change C469, C4735 to 12pF.
0.2
36
Change Y9 P/N.
0.2
ER37
13
Refer test report to fine-tune oscillation
frequency
ER36
0.2
Refer test report to fine-tune oscillation
frequency
ER35
12
Refer test report to fine-tune oscillation
frequency
ER34
0.2
Change Y1 P/N,
Change C144, C145 to 18pF.
Refer test report to fine-tune oscillation
frequency
ER33
43-55
10/14
10/14
10/14
ER38
Update Power circuit (1014) - Modify Choke footprint.
ER39
For EMI request
0.2
32
R484 and R486 change to C219 and C300 to 0.1u.
10/17
ER40
For LED issue
0.2
39
change LED2 footprint to LED_HT-210UD-UYG_3P
10/17
ER41
For EMI request
0.2
05
Add R12 0 ohm at H_CPUPWRGD
10/17
ER42
For SATA GEN2 EA pass.
0.2
31
change R671 to 3.3k ohm.
10/17
ER43
For EMI request
0.2
16
Add C151 0.1uF to GND on H_THERMTRIP#
10/17
ER44
For EMI request
0.2
33
1.GND pin3→pin1,USBN9 pin1→Pin2,USBP9 pin2→Pin3
2.GND pin5→pin7,+USB_VCCD pin6,7→pin5,6
10/17
ER45
For EMI request
0.2
33
Add L34 , L35 , reserve R552, R556 ,R748 , R749
10/17
ER46
B
For EMI request
0.2
5
remove T2,T3,T4,T5,T6,T7,T8,T9,T46,T47
T38,T39,T40,T41,T42,T43,T10,T11,T45
10/17
Change +3VLP to +3VL
10/17
B
7
ER47
A
Phase
D
ER25
C
Reason for change
Page 2 of 3 ( for HW internal reference only)
ER26
D
Fixed Issue
1
For Power request
ER48
SATA Re-driver 2nd source.
38
0.2
40
PAR8520@ : U41-U43, R671=3.3K
0.2
38
U41-U43.
10/17
Compal Electronics, Inc.
Compal Secret Data
Security Classification
Issued Date
A
ASM1466@ : 1) Add R426,R405,R419,R403,R396,R417
2) R459, R669, R672 = 4.7K
3) R682, R690, R698 = 2K
2011/09/23
2012/12/31
Deciphered Date
Title
SCHEMATIC A8222
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
58
of
61
5
4
3
2
LA-8222P Version change list (P.I.R. List)
Item
Page 3 of 3 ( for HW internal reference only)
Rev.
PG#
ER49
For EMI request
0.2
34
remove C620 , C611 , C631
ER50
for HW design
0.2
39
change U36 PN to SA00003B900 and C583 unpop
ER51
D
Fixed Issue
1
For EMI request.
0.2
05
H_CPUPWRGD net name change to H_CPUPWRGD_R
10/20
10/26
Reason for change
Modify List
Date
10/18
D
10/18
ER52
For T88 request for ROM WP function
0.2
12
Reserve R137 , Q63, pop R135
change EC_PECI to EC_SPI_WP
ER53
For EMI request
0.2
13
Add R185
10/20
20
40
Change ACIN_BUF circuit
unstuff R730
10/20
ER54
to prevent +3VSG leakage when Optimus.
0.2
ER55
For remove MS fuction
0.2
34
Delete R637
10/20
ER56
For AP2301 EOS issue
0.2
37
change C510,C516,C519,C524 PN to SE026224K80
10/20
ER57
for EMI request
0.2
10/21
C
40
Add C156 , C157
14
Add unstuff R800,R801,R802,R803,R804,R805
40
Add PCH_DPWROK,DS_WAKE#,SUSACK#,SUSWARN#
C
ER58
Reserve for Deep Sx
0.2
ER59
for EMI request
0.2
35
Change L31~L33 PN to SM070000N00
10/26
11/22
10/19
ER2-1
For SATA signal driving
0.3
31
Change R668,R671 to 2K ohm for PAR8520
Add 10K ohm (R675,R677,R683,R685) for PAR8520
Unstuff R396,R417,R698,U43 for Asm1466
Unstuff C644,C645,C646
ER2-2
For EMI request
0.3
32
Add 0.1uF (C219,C300)
Change TS1 to SP050007G00 from SP050006L00
ER2-3
For Card reader function
0.3
34
Change SDD2 to U40.21 and SDD3 to U40.20
ER2-4
For USB charge & wake function
0.3
37
Add 0 ohm (R809,R810)
ER2-5
For WIN8
0.3
12
Add U5 SPI ROM 8M for Win8
ER2-6
For change Click Pad from Glide Pad.
0.3
13
39
40
39
Connect SMBUS to click pad.
Del SW3,SW4. change JTP1
Add Q64 , R808
Change PU to +3VS ( TP_CLK.TP_DATA )
Update JTP1(SP01001AE00) connector 8 pin
ER2-7
For HDMI LOYALTY
ER2-8
Change Main source for HDMI power
ER2-9
ER2-
B
Phase
11/22
11/22
11/22
11/22
12/12
0.3
35
Add 46@ HDMI LOYALTY
11/22
0.3
35
Change U44 SA00004ZB00 to SA00004ZA00
11/22
For +3VSG leackag when boot first time
0.3
15
Add R443 10k pull down , unstuff R244
12/01
For N13M-GS DID
0.3
22
Update strap pin table
B
12/01
switch
A
A
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/09/23
2012/12/31
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
SCHEMATIC A8222
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
59
of
61
5
4
3
2
LA-8225P Version change list (P.I.R. List)
Item
Fixed Issue
Reason for change
1
Page 4 of 4 ( for HW internal reference only)
Rev.
PG#
Modify List
Date
ER2-10
HW Design
0.3
42
ER2-11
For USB3.0 chip sequence
0.3
36
Change C1011 to 2.2uf from 1uF & lt; & lt; 0402 to 0603
Change R1040 to 51.1k +-1% ohm
HW Design
0.3
29
32
41
Change 2N7002 single to dual channel & lt; Q78~Q80 & gt;
Change 2N7002 single to dual channel & lt; Q81 & gt;
Change 2N7002 single to dual channel & lt; Q82 & gt;
12/05
ER2-13
HW Design for power saving
0.3
12
Un stuff R111~R113
12/05
ER2-14
HW Design
0.3
06
42
17
Change C73 SE070473Z80 to SE076473K80
Change C600 SE027224Z80 to SE026224K80
Change C180 SE000008L80 to SE000000I10
12/07
HW Design
0.3
12
35
42
Change 1U(0603) SE052105Z80 to SE080105K80
EMI request
0.3
ER2-17
HW Design
0.3
ER2-18
HW Design
0.3
ER2-19
Intel New chip of PCH HM76 rev.C1
0.3
ER2-20
HW Design
0.3
ER2-15
ER2-16
C
EMI
15
33
37
Page PCH,HDMI,DCDC,DIMM
30
34
41
16
14
40
PCH
12/12
D
12/07
Change USB2.0 port & OC#
12/15
Add R812 to GPIO22 PD 10k ohm , Unstuff R252
12/09
Un-Stuff R554, Stuff R226 (Change to 10k)
12/12
Change U3 PN to SA00005FH10
12/12
C
Change All 2n7002 to SB00009Q80 from SB00009620
Change 0.1uF SE102104K00 to SE076104K80
35
Add 2pF C700~C707
30
Add R820,R821 & L40(Unstuff)
12/12
ER2-21
EMI request
0.3
ER2-22
HW Design
0.3
20
Change Q900.2 control pin to +3VSG
12/12
ER2-23
For EMI request
0.3
39
Change U36 to SA000058600
12/14
ER2-24
For EMI request
0.3
29
ER2-25
For EMI request
0.3
05
40
12/12
Add Reverse 100pf
C710~C715,C717~C723 to +1.5VSG and other power plan
12/15
Add R12 1k ohm and C640 0.1u Capacitor
12/19
Add PWR_ON_LED1# on U33 Pin 119
01/02
PR-1
For ASUS request
1.0
PR-2
For EMI request
1.0
05
R12 change to 33ohm (SD028330A80)and C640
change to 100p(SE071101J80)
01/03
PR-3
For power consumption @ AC S5
1.0
29
R432 change to 100K(SD028100380)and C395 change
to 0.01u (SE075103K80)
01/03
PR-4
For ENE request
1.0
39
reserve KSI4,5,6,7 cap 10p to GND
01/06
PR-5
For debug function
1.0
41
stuff R595
01/06
PR-6
B
For GS gen3 support
1.0
22
R352 ,R349 bom structure change to @
01/06
PR-7
For HW design
For PLT_RST# leakage when power on
38
1.0
PR-9
For Mos max Vgs voltage tolerance
PR-10
41
15
change R584 footrprint 1206 to 0805 R_short
Add R445 and reserve R444
Add R813 1M ohm to GND
31
1.0
Add R830 amd R831 470k ohm to GND
42
Change R690 to 1.5K ohm to GND
01/19
A
01/06
Compal Electronics, Inc.
Compal Secret Data
Security Classification
Issued Date
01/06
01/06
unstuff R234
29
1.0
For Asmedia SATA redriver
B
change 0 ohm footrprint to R_short
1.0
PR-8
A
Phase
12/05
ER2-12
D
Change 2N7002 single to dual channel & lt; Q71~Q77 & gt;
Del R625, Q64
Change Q38 SI4178DY to AO3404AL
Add R813 PD 1.5M ohm
2011/1215
2012/11/22
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
SCHEMATIC A8222
Rev
B
4019G8
Sheet
Monday, February 13, 2012
1
60
of
61
5
4
3
2
LA-8222P Version change list (P.I.R. List)
Item
Fixed Issue
Reason for change
1
Page 5 of 5( for HW internal reference only)
Rev.
PR-11
For power consumption
For EMI
For HW design
Date
1.0
Add USB3_ON at U33 pin 120
33
1.0
PR-13
Modify List
modify asmedia power schematic
40
1.0
PR-12
PG#
36
Reserve C723~C726 1.8P capacitor to GND
01/13
C422,C423,C619 footprint change to 0603 from 0805
Phase
01/13
01/09
D
D
PR-14
For EMI
For HW deaign
34
42
Add Reserve C1070
41
1.0
Change C1047 and C606 to 0.1uF
40
1.0
PR-15
30
Change U37 to SI4178DY-T1-GE3 from AO4478
(WLAN power MOS)
01/17
Change R610,R724 to 390k from 47k ohm
C599,C592 change to 0.01uF.
01/19
01/17
PR-16
1.0
42 41
PR-17
For EMI
1.0
32
5
Change C475 to 10P (SE00000UO00)
Change C72 to 12P
Add C647
01/30
IRT-1
C
For power consumption @ AC S5
For EMI
1.A
30
Add C544 C545
02/08
IRT-1
For check AI charger exit or not
1.A
40
Change R743 bom structure to AI@
02/10
C
B
B
A
A
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2011/1215
2012/11/22
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5
4
3
2
SCHEMATIC A8222
4019G8
Sheet
Monday, February 13, 2012
1
61
of
Rev
B
61