Witam W załączniku firmware. Pozdrawiam
GFK-2427A
October 10, 2005
IMPORTANT PRODUCT INFORMATION
READ THIS INFORMATION FIRST
Product:
Series 90-30 PLC CPU374
CPU Firmware Version 11.23 Upgrade Kit
Release 11.23 of the Series 90™-30 PLC CPU374 is a maintenance release that addresses several issues
in CPU firmware. For details, see “CPU Problems Resolved by Firmware Version 11.23“ on page 3.
This upgrade is compatible with hardware versions labeled as IC693CPU374-Dx or earlier. It is not
compatible with IC693CPU374-Ex or later (CPU374 PLUS) hardware. Attempting to upgrade incompatible
hardware with this upgrade kit will fail and produce an error message with this text, “The selected firmware
files are not meant for this target device.”
Firmware Identification
CPU Catalog Number
IC693CPU374-Dx or earlier
CPU Firmware
Revision
Ethernet Daughterboard
Firmware
Main: 11.23 (37A1)
Boot: 11.00 (10A2)
Main: 1.02 (03A1)
Boot: 1.00 (15A2)
Upgrades
This firmware is released only as a stand-alone field upgrade. The field upgrade kit is orderable in disk form
from the factory and is also available on the GE Fanuc web site, http://www.gefanuc.com/. Firmware
upgrades require the IC690ACC901 Mini-converter and Cable Kit.
Upgrade Kit: 44A751579-G08
Documentation
Series 90™-30 PLC Installation and Hardware Manual, GFK-0356
Series 90™-30/20/Micro PLC CPU Instruction Set Reference Manual, GFK-0467
TCP/IP Ethernet Communications for the Series 90™ PLC User’s Manual, GFK-1541
TCP/IP Ethernet Communications Station Manager Manual, GFK-1186
Important Product Information (this document), GFK-2427
Important Product Information
2
GFK-2427A
CPU Functional Compatibility
Subject
HHP Compatibility
Programmer Version
Requirements
C Toolkit Compatibility
IC693CMM321 Ethernet
Option Module Version
Requirements
FBC Compatibility
Power Supply
Compatibility and
Requirements
IC693ALG220/221
Analog Input Module
Version Requirements
IC693PBM200 PROFIBUS
Master Module Version
Requirements
IC693PBS201 PROFIBUS
Slave Module Version
Requirements
Description
The CPU 374 does not support the Hand Held Programmer.
Machine Edition Logic Developer version 2.60 or later, VersaPro version 2.03 or
later, or Control version 2.50 or later must be used to configure and program the
CPU 374.
Version 4.00 or later of the C toolkit must be used for C programming.
All IC693 Ethernet Interface (IC693CMM321) modules used with this CPU should
be updated to IC693CMM321 firmware release 1.10 or later.
FIP Bus Controller version 3 or later is required for this CPU.
A CPU374 requires the use of a High Capacity Power Supply (IC693PWR330,
IC693PWR331 or IC693PWR332).
Power consumption of the CPU374 and its supporting devices are listed below:
CPU374 requires 1.48A @ +5VDC (= 7.4 Watts).
If used, the converter in the IC690ACC901 serial cable assembly requires 100mA
at 5VDC (=0.5 Watts).
If used, the IC690ACC900 RS-422/RS-485 to RS-232 converter requires 170mA at
5 VDC (=0.85 Watts).
Series 90-30 CPUs 35x/36x/37x are not compatible with versions “F” and earlier of
the IC693ALG220/221 Analog Input Modules. Version “G” or later of the
IC693ALG220/221 must be used with these CPUs. If a Version “F” or earlier
IC693ALG220/221 module is used with a 35x/36x/37x CPU, the %AI values
reported by the module may exhibit erratic behavior. Please refer to Internal ID
code CR70751 for more information.
All IC693PBM200 modules used with a CPU 374 MUST be updated to firmware
version 1.16 or later. When earlier IC693PBM200 versions are used with CPU374,
backplane communications errors and PLC faults occur frequently while the CPU
is in RUN mode. Please refer to Internal ID code CR-2169 for more information.
All IC693PBS201 modules used with a CPU 374 MUST be updated to firmware
version 1.28.1 or later. Earlier IC693PBS201 versions have issues similar to
IC693PBM200 versions earlier than 1.16. Please refer to Internal ID code CR2391 for more information.
Ethernet Functional Compatibility
Subject
SRTP Channels
Name Resolution
BOOTP
AAUI Port
Description
Unlike the CPU 364 (IC693CPU364), the CPU 374 does not support SRTP
Channels. (COMMREQs for Ethernet messages.)
Unlike the CPU 364 (IC693CPU364), the CPU 374 does not support Name
Resolution.
Unlike the CPU 364 (IC693CPU364), the CPU 374 does not support BOOTP.
Unlike the CPU 364 (IC693CPU364), the CPU 374 does not have an AAUI Port.
Important Product Information
3
GFK-2427A
CPU Problems Resolved by Firmware Version 11.23
Subject
Update of OEM Protection
Locked Machines With EZ
Program Loader
CRC Checksum Error and/or
Illegal Boolean Opcode Error
Possible After Run-Mode
Store
Sign of PID Derivative Term
Corrected in One Case
PID Integral Contribution
Description
A CPU 374 can now be updated with the EZ Program Loader when the CPU has
its OEM protection locked if the EZ Program Loader has the OEM password
programmed into it.
In previous releases, a Run-mode store followed by a Run-to-Stop transition may
occasionally cause either a CRC Checksum Error fault or an Illegal Boolean
Opcode fault in the PLC fault table.
This issue has been corrected.
Previously, when the DERIVATIVE_ACTION bit (bit 3) was set in the Config Word,
but the ERROR_TERM_SELECT bit (bit 0) was not set, the sign of the derivative
term was reversed. This problem has been corrected. See ” Documentation
Errata” on page 8 for related information.
Previously, a large step change of the PID Integral Contribution could occur when
the integral rate was changed while the PID control loop was active. The Integral
Contribution is now calculated correctly for all integral rates.
New CPU Features and Enhancements
Subject
Filtering Added for PID
Derivative Term
Description
Optional filtering may now be applied to the PID Derivative Term to improve
control loop stability in some applications. This filtering is enabled by setting bit 5
(previously unused) in the Config Word parameter of the PID Parameter Block.
See”Documentation Errata” on page 8 for more information.
CPU Restrictions and Open Issues
Subject
CPU Cleared / Hardware Fault
Received when Using EZ
Program Store Device to Update
RAM and Flash
CPU does not Revert to Backup
Ethernet Configuration After
Interrupted Store from EZ
Program Store Device
Watchdog Timeout / CPU Memory
Cleared when Using C Blocks
Power Supply Serial Port does
not Respond to SNP/SNPX
Requests
Number of SRTP Requests
Tallied May Vary
Description
When the “EZ Program Store” hardware configuration option is set to “RAM &
FLASH,” and the Memory Protect/Run Stop key switch is set to the “ON/RUN”
position, attempting to update the CPU from the EZ Program Store Device will
cause the user program, configuration, stored values, overrides, and fault
tables to be cleared, and a “CPU Hardware Fault” or “USD Flash Read Fail”
fault to be logged.
The update operation will work as expected if the key switch is set to the OFF
position, or the “EZ Program Store” hardware configuration option is set to
“RAM Only.”
The CPU retains its current Ethernet configuration instead of reverting to the
backup configuration when a push-button store from the EZ Program Store
Device is interrupted. (The interruption can take multiple forms, however one
example is disconnecting the EZ Program Store Device during the store.)
The user program, configuration, stored values, overrides, and fault tables are
cleared and a “PLC watchdog timer timed out” fault is logged if a C Block
compiled for hardware floating point (compiled using the mk3plc7.bat
function) attempts a floating point divide by zero. (This problem does not
occur if the C Block was compiled for software floating point – using the
mk3plc.bat function.)
The Power Supply Serial Port does not respond to SNP or SNPX requests
including the break character if an attach message is received that is missing
the last character before the BCC, or a message is received that has an
invalid BCC or is corrupted so the calculated BCC doesn’t match the BCC
specified in the message. Power to the CPU must be cycled to regain
communications.
When running multiple SRTP channels, the number of requests, as reported
by the client and the server, may differ between the connections.
Important Product Information
4
GFK-2427A
Subject
Reporting of Duplicate IP
Address
TCP Connections May Remain
Half-Open on CPU374 Server if
Client is Lost
Large Number of IP Reassembly
Failures on Large PING Between
CPU374s
REPP Does Not Save Results of
Aborted PING
STAT C Command Reports
Invalid Rack/Slot Location
Multiple Log Events
Intermittent SNTP Loss of
Synchronization
Description
The CPU374 does not log an exception or a fault in the PLC when it detects a
duplicate IP address on the network (unlike the CPU364). The duplicate IP
address is reported in the station manager STAT F command output only.
If an SRTP client with open connections to a CPU374 server is power cycled
or reset, the server’s TCP connection may remain open for a long time (until
the TCP keep-alive timer expires) once the client is restarted and attempts to
reopen the communication. If quick recovery of the connection is needed, the
AUP for TCP keep alive should be used to adjust the keep alive timer down to
the desired maximum time for holding open the broken connection.
When sending PINGs large enough to require more than one IP packet (1466
bytes or larger), a larger number than expected of IP ReasmFai tallies will be
seen on the client and a corresponding number of “no timely response” errors
will be seen in the PING results. Large SRTP transfers do not exhibit the
same behavior. EGD messages always fit in a single packet and thus are not
subject to this kind of problem.
The station manager REPP command does not retain the results of a PING
that is aborted due to error. The PING results are reported when the PING is
aborted, but subsequent REPP commands give the results of the last
successfully terminated PING.
The station manager STAT C command reports the CPU 374 as being
located in Rack 0 Slot 15 instead of Rack 0 Slot 1.
The Ethernet interface sometimes generates multiple exception log events
and PLC Fault Table entries when a single error condition occurs. Under
repetitive error conditions, the exception log and/or PLC Fault Table can be
completely filled with repetitive error messages.
Under moderately heavy EGD traffic load, the Ethernet interface may
occasionally lose synchronization with its SNTP time server and generate
exception log event 29, entry 2=bH.
Important Product Information
5
GFK-2427A
CPU Operational Notes
Subject
Difference Between Series 90-30
CPUs and Other GE Fanuc
CPUs: Power Flow During First
Invocation of PID Function
Block
Battery Backup Limitations
Overrides Not Stored to
Flash or EZ Program Store
Device
Writing Flash Using a Serial
Programmer
Storing Large Configurations
Simultaneous Load and
Store
Transition Tables are not
cleared when the reference
tables are cleared
Upgrading Firmware with
Many Modules in Rack
Description
In all Series 90-30 CPU models, PID function blocks DO NOT pass power
flow during the first invocation after a Stop-to-Run transition. Power flow IS
passed on the second and all subsequent invocations.
This behavior is different from VersaMax and PACSystems CPUs, which pass
power flow during every invocation, including the first. PLC applications that
are intended to be portable across all GE Fanuc PLC products should not rely
on either behavior.
The expected life of a standard Series 90-30 3-volt lithium battery used to
back up a CPU 374 is 1.2 months when used continuously. If a longer battery
backup period is required, the external battery module (IC693ACC302) is
available. The extended battery module provides a battery backup period of
15 months for the CPU374. See GFK-2124 for additional information.
When storing reference data to flash or the EZ Program Store Device,
overrides are not stored. This means that after the reference data is read
back from flash or the EZ Program Store Device and subsequently the PLC is
put into Run Mode, the logic may execute differently. Therefore, overrides
should not be used if reference data is stored to flash or to the EZ Program
Store Device. If overrides are used, particular care should be taken to
prevent loading reference data from flash at power up. If this precaution is
not observed, unexpected operation may occur upon power cycle.
When writing very large programs to flash memory, you may need to increase
the request timeout value in the programming software to avoid receiving a
request timeout message. An upper bound of 25 seconds is typically
satisfactory. For further details, see the item “Store of Program or Reference
Tables to Flash may Cause Loss of Ethernet Communications” in Section 6B,
Ethernet Operational Notes in this document.
A Series 90-30 PLC using a CPU 374 supports a maximum of 32 DSM314
modules. This number is reduced when other intelligent modules are used in
the PLC, such as APM and GBC modules. It may also be reduced when:
The number of racks in the PLC increases;
The total size of logic, motion and AUP files increases;
The application uses C logic blocks or a C logic program; and
Connected programmers or HMI devices are used to read reference
memory or fault tables.
In some cases it may be possible to increase the number of DSM341
modules that the CPU 374 will accept in the hardware configuration by storing
logic first and then storing the configuration separately.
When operating with multiple programmers attached, initiating a store
operation from one programmer during a load operation from another
programmer will cause the load to fail.
The transition tables are not cleared upon clearing the reference tables
through the programmer.
The process of upgrading the PLC firmware with the WinLoader utility may fail
when multiple IO modules are in the main, remote or expansion racks, due to
the extra time it takes to restart the PLC CPU. If the upgrade process fails,
wait until the OK LED on the power supply stops blinking and then click the
Retry button on the Winloader Firmware Update Failed dialog box. If the
upgrade fails again, move the PLC CPU to a rack without IO modules and
restart the upgrade process.
Important Product Information
6
GFK-2427A
Ethernet Operational Notes
Subject
Subnet Mask Value Must
Be Correct For IP
Address Class
Configuration of IP
Address is Required
Before Using Ethernet
Communications
Proper IP Addressing is
Always Essential
Ethernet Programmer
May Briefly Lose
Communications When
Configuration Stored
Description
The CPU374 accepts some invalid combinations of IP address and subnet mask. For
example, the combination of IP address = 129.0.0.1 and subnet mask = 255.254.0.0 is
accepted although it is invalid. This example is a Class B IP address, as defined by its
two most significant bits. The next 14 most significant bits define the network number or
netid. To be valid, the subnet mask must contain ones in the bit positions of the IP
address’s class and netid fields.
When an invalid combination of this kind is stored through either the hardware
configuration or station manage “chsosw” command, the CPU374 will assume that
certain IP addresses are reachable on the local subnet when they are not. In the
example above, addresses in the range 129.1.0.1 through 129.1.255.255 are affected.
This issue prevents Ethernet communications with the affected IP addresses until the
subnet mask is corrected.
The following table specifies minimum subnet masks for each address class.
Address Class
IP Address Range
Minimum
Subnet Mask Value
A
0.0.0.1 through 127.255.255.255
255.0.0.0
B
128.0.0.1 through 191.255.255.255
255.255.0.0
C, D, E
192.0.0.1 through 255.255.255.255
255.255.255.0
See chapter 6 in TCP/IP Communications for the Series 90 PLC User’s Manual,
GFK-1541B, for additional information on IP addresses, subnet masks and related
issues.
The Ethernet interface within the CPU module cannot operate on a network until a valid
IP address is configured. The necessary Ethernet addressing information must be
configured prior to actual network operation. Use one of the following methods:
Perform the initial configuration using a PLC Programmer connected through the
PLC power supply serial port.
Connect a serial terminal to the station manager port of the CPU374. Then use the
CHSOSW command to enter a temporary IP address. The Ethernet Interface can
then be accessed over the network (such as by an Ethernet PLC Programmer). See
TCP/IP Ethernet Communications for the IC69* Station Manager Manual for details.
Temporarily assign an IP address to the module using the Ethernet network. Refer
to Appendix D of the TCP/IP Ethernet Communications Station Manager Manual,
GFK-1186G, for details.
The CPU374’s embedded Ethernet Interface must be configured with the correct IP
Address for proper operation in a TCP/IP Ethernet network. Use of incorrect IP
addresses can disrupt network operation for the CPU374 and for other nodes on the
network. Refer to the TCP/IP Ethernet Communications User’s Manual, GFK-1541B, for
important information on IP addressing.
Storing a PLC configuration containing Ethernet configuration values may require the
Ethernet interface to restart itself in order to use any changed configuration values. When
the Ethernet interface restarts, an Ethernet PLC Programmer briefly reports a loss of
communications. If this occurs, the Ethernet Interface will post two or more PLC faults
with the text “LAN system-software fault; resuming”, and fault-specific data starting with
080008 and/or 080042. In addition, faults with text “Bad remote application request;
discarded request” (1B0021) and “Local request to send rejected; discarded request”
(110005) may occur. When these faults occur, the STAT LED on the CPU374 is turned
off to indicate posting of faults to the PLC fault tables. In some cases, a 10-second delay
may occur before loss of communications is detected. Normal operation resumes once
the Ethernet Interface restarts. The STAT LED can be reset using the Station Manager
OK command.
When the PLC configuration is stored from an Ethernet PLC Programmer, the
communications loss occurs immediately after successful completion of the store.
Attempts to store configuration plus logic and/or reference tables in one operation can
fail. However, storing configuration separately from logic or reference tables always
succeeds.
Important Product Information
7
GFK-2427A
Subject
Store of Program or
Reference Tables to
Flash May Cause Loss of
Ethernet
Communications
Ethernet Flash Test
Failure
Invalid Ethernet Restart
Event
YATS32 SNTP Server
Configuration
First Ping Response Lost
after Restart of Ethernet
Interface
Multiple Zero Period EGD
Exchanges May Not
Produce Similar Numbers
of Samples
EGD Performance
Information
Multicast Data Not
Filtered
Changing IP Address
While SRTP Connection
Open May Generate Log
Events
Heavy Load Can Block
Station Manager
Description
While storing the PLC program, configuration, and/or reference tables from PLC RAM
memory into Flash memory or to the EZ Program Store device, Ethernet data
communications may be lost. Normal data transfers are temporarily suspended during a
Flash or EZ Program Store device store operation. In these cases, Ethernet data
transfers (such as used by an Ethernet PLC Programmer connection) will fail when the
store exceeds the 16-second maximum period allowed for completion. Upon completion
of the store operation, normal operation will resume. If a timeout occurs during a store to
Flash or EZ Program Store device, the timeout value should be increased in the
programming software being used. See the User’s Manual for the programming software
for more details.
The Ethernet daughter board continually tests the integrity of its flash memory. In the
extremely unlikely event that corrupted flash is detected, a “Module software corrupted;
requesting reload” fault is posted to the PLC Fault table, and the daughter board enters
firmware loader mode. However, attempting to reload the firmware always fails when a
hard failure of a flash memory device has occurred.
After power is applied, the restart event (event 1H) in the Ethernet Station Manager
exception log may occasionally contain 000cH in entry 3, erroneously indicating that a
time-out of the Ethernet watchdog timer occurred. This condition does not produce a
PLC fault or turn off the Ethernet STAT LED, and it has no effect on subsequent
operation. It is unlikely to occur when a power supply recommended in Power Supply
Compatibility and Requirements from section 2 of this document is used. Note that an
actual watchdog time-out produces a “Reset of daughter board” fault in the PLC Fault
table.
Users of the YATS32 SNTP server should either configure the server for broadcast mode
or multicast mode, but not for both. If the server is configured for both modes, two time
messages will be sent to the PLC either simultaneously, or within a short period of time.
Immediately after restarting the Ethernet Interface, the first response to a PING large
enough to require more than one IP packet (1466 bytes or larger) is not generated.
Please refer to Internal ID Code CR-1828 for more information.
If more than one EGD produced exchange is configured for a production period of zero,
the exchanges may not produce similar numbers of samples. Due to the way that
scheduling occurs when multiple exchanges are scheduled “as fast as possible”, some
zero period exchanges may produce significantly more samples than others.
Users requiring detailed EGD performance information should contact their Application
Engineer and ask about the EGD Performance Application Note for the CPU374.
The CPU374 does not do hardware filtering of multicast data over Ethernet. This means
that extraneous multicast messages on the network add an additional load on the
CPU374 PLC, and may significantly degrade performance. Sufficient load can cause the
CPU374 to reset its communication processor.
SRTP connections established to the client are not terminated gracefully when the
CPU374's IP address is changed. SRTP channels report either a 9690H or 0190H
status, and possibly remain open until the connections are terminated as a result of client
timeouts. Please refer to Internal ID Code CR-1434 for more information.
A heavy EGD or SRTP load can block Station Manager operation. Please refer to
Internal ID Code CR-1433 for more information.
Important Product Information
8
GFK-2427A
Documentation Errata
Series 90™-30/20/Micro PLC CPU Instruction Set Reference Manual, GFK-0467M, chapter 12, “Control
Functions,” section “PID Algorithm Selection (PIDISA or PIDIND) and Gains”
The description of the Derivation term should be replaced with the following text:
The Derivative term is the time rate of change of the Error term in the interval since the last PID solution.
Derivative = ∆Error / dt = (Error – previous Error) / dt,
where
dt = Current PLC elapsed time - PLC elapsed time at previous PID solution.
In normal mode (that is, without Reverse-Action mode), this is the change in the error term.
(Error – previous Error) = (SP – PV) – (previous SP – previous PV)
= (previous PV – PV) – (previous SP – SP)
However, when the Error Polarity bit (bit 0) in the Config Word is set, the sign of the change in the error
term is reversed.
(Error – previous Error) = (PV – SP) – (previous PV – previous SP)
= (PV – previous PV) – (SP – previous SP)
The change in the error term depends on changes in both the Set Point and the Process Variable. If the
Set Point is constant, the difference between SP and the previous SP is zero and has no effect on the
output. However, Set Point changes can cause large transient swings in the derivative term and hence
the output. Loop stability may be improved by eliminating the effect of Set Point changes on the
derivative term. Set the third bit (bit 2) of the Config Word to 1 to calculate the Derivative based only on
the change in PV. For bit 2 set in normal mode (bit 0 = 0),
(Error – previous Error) = (previous PV – PV),
and with bit 2 set in Reverse-Action mode (bit 0 = 1),
(Error – previous Error) = (PV – previous PV).
For details on the Config Word, see page 9.
For information about a related issue, see “CPU Problems Resolved by Firmware Version 11.23” on page 3.
Important Product Information
9
GFK-2427A
In table 12-13 on page 12-82 of GFK-0467M, the Config Word row should be replaced with:
%Ref+0012
Config
Word
Low 6
bits
used
Bit 0: Error Polarity. When this bit is 0, the error term is SP - PV.
When this bit is 1, the error term is PV - SP. Setting this bit to 1
modifies the standard PID Error Term from the normal (SP – PV) to (PV – SP),
reversing the sign of the feedback term. This is for reverse acting controls where the
CV must go down when the PV goes up.
Bit 1: Output Polarity. When this bit is 0, the CV output represents the output of the
PID calculation. When it is set to 1, the CV output represents the negative of output
of the PID calculation. Setting this bit to 1 inverts the Output Polarity so that CV is
the negative of the PID output rather than the normal positive value.
Bit 2: When this bit is 1, the setpoint is removed from derivative calculation. For
details, see the discussion on page 8.
Bit 3: Deadband action. When the Deadband action bit is 0, no deadband action is
chosen. If the error is within the deadband limits, the error is to be zero. Otherwise
the error is not affected by the deadband limits.
If the Deadband action bit is 1, deadband action is chosen. If the error is within the
deadband limits, the error is forced to be zero. If, however, the error is outside the
deadband limits, the error is reduced by the deadband limit (error = error –
deadband limit).
Bit 4: Anti-reset windup action. When this bit is 0, the anti-reset windup action uses
a reset back calculation. When the output is clamped, this replaces the accumulated
Y remainder value with whatever value is necessary to produce the clamped output
exactly.
When the bit is 1, this replaces accumulated Y term with the value of the Y term at
the start of the calculation. In this way, the pre-clamp Y value is held as long as the
output is clamped.
Bit 5: Enable derivative filtering. When this bit is set to 0, no filtering is applied to
the derivative term.
When set to 1, a first order filter is applied. This will limit the effects of higher
frequency process disturbances on the derivative term.
Installation in Hazardous Locations
The following information is for products bearing the UL marking for Hazardous Locations:
•
WARNING - EXPLOSION HAZARD - SUBSTITUTION OF COMPONENTS MAY IMPAIR SUITABILITY FOR
CLASS I, DIVISION 2.
•
WARNING - EXPLOSION HAZARD - WHEN IN HAZARDOUS LOCATIONS, TURN OFF POWER BEFORE
REPLACING OR WIRING MODULES.
•
WARNING - EXPLOSION HAZARD - DO NOT DISCONNECT EQUIPMENT UNLESS POWER HAS BEEN
SWITCHED OFF OR THE AREA IS KNOWN TO BE NONHAZARDOUS.
•
EQUIPMENT LABELED WITH REFERENCE TO CLASS I, GROUPS A, B, C & D, DIV. 2 HAZARDOUS
LOCATIONS IS SUITABLE FOR USE IN CLASS I, DIVISION 2, GROUPS A, B, C, D OR NON-HAZARDOUS
LOCATIONS ONLY.
Important Product Information
10
GFK-2427A
IC693CPU374 Data
Controller Type
Single slot CPU module with embedded Ethernet Interface
Processor
Processor Speed
133 MHz
Processor Type
Embedded 586
Execution Time (Boolean Operation)
0.15 µsec per boolean instruction
Type of Memory Storage
RAM and Flash
Memory
User Memory (total)
240KB (245,760) Bytes
Note: Actual size of available user program memory depends on the amounts configured
for %R, %AI, and %AQ configurable word memory types.
Discrete Input Points - %I
2,048 (fixed)
Discrete Output Points - %Q
2,048 (fixed)
Discrete Global Memory - %G
1,280 bits (fixed)
Internal Coils - %M
4,096 bits (fixed)
Output (Temporary) Coils - %T
256 bits (fixed)
System Status References - %S
128 bits (%S, %SA, %SB, %SC - 32 bits each) (fixed)
Register Memory - %R
Configurable 128 to 32,640 words
Analog Inputs - %AI
Configurable 128 to 32,640 words
Analog Outputs - %AQ
Configurable 128 to 32,640 words
System Registers - %SR
28 words (fixed)
Timers/Counters
& gt; 2,000 (depends on available user memory)
Hardware Support
Battery Backed Clock
Yes
Battery Back Up (Number of months
with no power)
1.2 months for internal battery (installed in the power supply)
15 months with external battery (IC693ACC302)
Load Required from Power Supply
7.4 watts of 5VDC. High Capacity power supplies recommended.
Hand Held Programmer
CPU374 does not support Hand Held Programmer
EZ Program Store Device
Yes
Total Baseplates per System
8 (CPU baseplate + 7 expansion and/or remote)
Software Support
Interrupt Support
Supports the periodic subroutine feature.
Communications and Programmable
Coprocessor Compatibility
Yes
Override
Yes
Floating Point Math
Yes, hardware floating point math
Programming Support
VersaPro 2.03 or later. Machine Edition Logic Developer 2.60 or later. Control software
version 2.50 or later.
Communications Support
Built-in Serial Ports
No serial ports on CPU374. Supports RS-485 port on power supply.
Protocol Support
SNP and SNPX on power supply RS-485 port
Built-in Ethernet Communications
Ethernet (built-in) – 10/100 base-T/TX Ethernet Switch
Number of Ethernet Ports
Two, both are 10/100baseT/TX ports with auto sensing. RJ-45 connection
Number of IP Addresses
One
Protocols
SRTP and Ethernet Global Data (EGD). No channel support.
Web Server Support
None
Environmental and Agency Specifications
Operating Temperature
0 to 60°C (32 to 140°F) ambient
Storage Temperature
-40°C to +85°C
Agency Approvals
UL508, C-UL (Class I, DIV II, A, B, C, D), CE Mark
Low Temperature (LT) Testing
Yes. The CPU374 is available for -40° to 60°C operation.
REVISIONS
REV
DESCRIPTION
DATE
APPROVED
INSTRUCTIONS FOR UPGRADING
IC693CPU374 WITH NEW FIRMWARE
The Series 90™-30 PLC CPU has operating firmware stored in FLASH memory. The firmware upgrade and WinLoader
update utility for these CPUs are provided on the upgrade disk or in the upgrade ZIP file downloaded from the Web. (Not all
upgrade kits are available for Web download.) The WinLoader update utility is a Windows-based program that controls
downloading the new firmware from the upgrade disk to the FLASH memory on the PLC CPU. WinLoader requires
Windows 95/98/ME, Windows NT 4.0, Windows 2000, or Windows XP. The hardware required to run these operating
systems is also adequate to run WinLoader.
NOTE: The instructions provided outline a specific procedure that MUST be followed in sequence. If the procedure for
some reason is not followed, please contact the GE FANUC Hotline for help in upgrading the PLC CPU.
PLEASE READ ALL INSTRUCTIONS COMPLETELY PRIOR TO STARTING THE FIRMWARE UPDATE
PROCEDURE.
TO INSTALL THE NEW FIRMWARE, PERFORM THE FOLLOWING STEPS:
1.
Save or backup any programs or data resident in the PLC CPU before performing the firmware update.
2.
Place the PLC in STOP/NOIO Mode.
3.
Set the Memory Protect/Run Stop Key Switch to the “OFF/STOP” position.
4.
Clear the configuration in the PLC CPU. This will setup the Power Supply Serial Port for 19200 baud, 8 bits per
char, odd parity, and 1 stop bit. If the serial port is already set to these default values then this step is not necessary.
5.
Clear any faults in the PLC.
6.
Close any applications (including PLC programming applications) that may be using the COM ports of your PC.
7.
Connect the serial port of your computer to the Power Supply Serial Port on the PLC CPU. (See the section entitled
“CABLES REQUIRED FOR UPGRADING” at the end of this document for a list of the required cables.)
UNLESS OTHERWISE NOTED
DIMENSIONS ARE IN INCHES/MM
TOLERANCES ON:
2 PL DECIMALS
3 PL DECIMALS
ANGLES=
FRACTIONS=
THIRD ANGLE PROJECTION
SIGNATURES
DATES
DRAWN T.BINGLER
02/04/04
CHECKED
ENGRG
TITLE
T.BINGLER
02/04/04
INSTALLATION INSTRUCTIONS
ISSUED
DIST
621
SIZE
A
GEGS NO
DWG NO
44A751629
VERSION LEVEL
SCALE
SHEET
1
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4
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8.
a)
DESCRIPTION
DATE
APPROVED
Ordered Upgrade Kit:
If you ordered an upgrade kit, unzip all of the files in the upgrade ZIP file located on the upgrade diskette to a
new directory on your hard drive. Then, execute the upgrade software from that location on your hard drive.
The upgrade cannot be executed directly from the upgrade diskette because the uncompressed size of the update
files is larger than the capacity of a floppy disk.
b) Downloaded Upgrade from Web:
If you downloaded the upgrade kit from the Web (Not all upgrade kits are available for Web download.), unzip
all of the files in the upgrade ZIP file to a new directory on your hard drive and execute the upgrade software
from that location.
9.
Invoke the WinLoader (“WinLoader.exe”) software package by double clicking on its icon in the location
determined by the previous step.
10.
Select the serial port on your computer you are using to communicate with the PLC CPU. (ex: “COM1”)
11.
Begin the firmware upgrade by single clicking the " Update " button. When the upgrade begins, the “OK” and
“RUN” LEDs on the PLC CPU’s Power Supply blink in unison. These LEDs continue to blink in unison while the
PLC CPU firmware is being updated. When the PLC CPU firmware update completes, the “OK” and “RUN” LEDs
on the power supply briefly turn off, then the “OK” LED flashes for a short period of time and then comes on solid.
Now, the “EOK,” “LAN,” and “STAT” LEDs on the PLC CPU blink in unison. At this point the update to the PLC
CPU firmware is complete and the WinLoader utility automatically begins the update of the Ethernet Interface
firmware. WinLoader’s status bar shows the update status during the entire update process.
12.
Upon successful completion of the update, the “OK” and “RUN” LEDs on the PLC CPU’s Power Supply and the
“EOK,” “LAN,” and “STAT” LEDs on the PLC CPU turn off. Then, the “OK” and “EOK” LEDs flash for a short
period of time and then come on solid. The WinLoader utility also displays a dialog indicating the final status of the
update. If the update was successful, and you have no other units to update, indicate that another device is NOT to
be updated by clicking the " No " button. If you do have additional units to update, click the “Yes” button and follow
this procedure again. If the update was not successful, see the " Common Causes of Failure " section below to
determine how to correct the problem.
13.
If you ordered an upgrade kit, place the upgrade label on the PLC CPU ensuring no vents or other labels are
covered.
UNLESS OTHERWISE NOTED
DIMENSIONS ARE IN INCHES/MM
TOLERANCES ON:
2 PL DECIMALS
3 PL DECIMALS
ANGLES=
FRACTIONS=
THIRD ANGLE PROJECTION
SIGNATURES
DATES
DRAWN T.BINGLER
02/04/04
CHECKED
ENGRG
TITLE
T.BINGLER
02/04/04
INSTALLATION INSTRUCTIONS
ISSUED
DIST
621
SIZE
A
GEGS NO
DWG NO
44A751629
VERSION LEVEL
SCALE
SHEET
2
OF
4
REVISIONS
REV
DESCRIPTION
DATE
APPROVED
COMMMON CAUSES OF FAILURE
1.
PLC is not in STOP/NOIO mode. SIDE EFFECTS: A WinLoader dialog box appears stating there is a “CPU State
Mismatch”. REMEDY: WinLoader asks if it’s OK to clear fault tables and place PLC in STOP/NOIO mode. Click
Yes and proceed.
2.
Connected to wrong serial port. SIDE EFFECTS: A WinLoader dialog box appears stating the “Firmware Update
Failed.” It lists several possible reasons why the firmware update failed. REMEDY: Make sure the serial cable is
connected to the Power Supply Serial Port and the correct COM port of the PC (should match COM port indicated on
WinLoader screen), turn the PLC CPU off and back on, and start the process again.
3.
COM port on computer already in use. SIDE EFFECTS: A WinLoader dialog box appears stating the " Firmware
Update Failed " and the selected COM port is either busy or does not exist. REMEDY: Close any other applications
(including PLC programming applications) and ensure the serial cable is connected to correct COM port on the PC and
start the upgrade process again.
4.
Memory Protect/Run Stop Key Switch in the “ON/RUN” position. SIDE EFFECTS: A WinLoader dialog box
appears stating the “Firmware Update Failed.” It lists several possible reasons why the firmware update failed.
REMEDY: Set the Memory Protect/Run Stop Key Switch to the “OFF/STOP” position, turn the PLC CPU off and back
on, and start the process again.
5.
Upgrading Firmware with Many Modules in the PLC. SIDE EFFECTS: After a successful start of the upgrade
process, a WinLoader dialog box appears during step 11 stating the “Firmware Update Failed” and that Winloader
“Cannot connect to the target device.” REMEDY: Wait until the “EOK,” “LAN,” and “STAT” LEDs on the PLC
CPU begin to blink in unison and then click the Retry button on the error dialog box. Alternatively, move the PLC CPU
to a rack without I/O modules and restart the upgrade process.
UNLESS OTHERWISE NOTED
DIMENSIONS ARE IN INCHES/MM
TOLERANCES ON:
2 PL DECIMALS
3 PL DECIMALS
ANGLES=
FRACTIONS=
THIRD ANGLE PROJECTION
SIGNATURES
DATES
DRAWN T.BINGLER
02/04/04
CHECKED
ENGRG
TITLE
T.BINGLER
02/04/04
INSTALLATION INSTRUCTIONS
ISSUED
DIST
621
SIZE
A
GEGS NO
DWG NO
44A751629
VERSION LEVEL
SCALE
SHEET
3
OF
4
REVISIONS
REV
DESCRIPTION
DATE
APPROVED
RESTARTING AN INTERRUPTED FIRMWARE UPGRADE
A. Turn the PLC CPU off and back on.
B. If a partial or erroneous download was performed, the PLC CPU may power up with either the “OK” and “RUN” LEDs on
the PLC CPU’s power supply flashing in unison, the “EOK,” “LAN,” and “STAT” LEDs on the PLC CPU blinking in
unison, or both. If any of the above conditions are true, begin again at step six of the installation instructions; otherwise
begin again at step one.
CABLES REQUIRED FOR UPGRADING
Either of the two options below may be used to connect your PC to your PLC CPU to perform a firmware upgrade.
Option 1
Catalog Number
IC690ACC901
Description
RS-422/RS-485 to RS-232 Miniconverter Kit
Option 2
Catalog Number
IC690ACC900
IC690CBL303
IC690CBL702
IC690CBL705
Description
RS-422/RS-485 to RS-232 Converter (also requires cable IC690CBL303 and either IC690CBL702 or
IC690CBL705 below)
15-pin RS-442 Serial Cable
9-pin RS-232 Serial Cable
25-pin RS-232 Serial Cable
UNLESS OTHERWISE NOTED
DIMENSIONS ARE IN INCHES/MM
TOLERANCES ON:
2 PL DECIMALS
3 PL DECIMALS
ANGLES=
FRACTIONS=
THIRD ANGLE PROJECTION
SIGNATURES
DATES
DRAWN T.BINGLER
02/04/04
CHECKED
ENGRG
TITLE
T.BINGLER
02/04/04
INSTALLATION INSTRUCTIONS
ISSUED
DIST
621
SIZE
A
GEGS NO
DWG NO
44A751629
VERSION LEVEL
SCALE
SHEET
4
OF
4